阅读说明：本技术 高密度插座 (High density socket ) 是由 滕凯·陈 约翰·C·劳尔克斯 丽·庄 于 2019-01-08 设计创作，主要内容包括：一种连接器组件包括一绝缘本体、第一和第二导电接地薄片体(参见例如661和663)以及多个接地联接。所述绝缘本体具有设置在其(参见例如662)内的多个导电信号端子。所述绝缘本体具有相反的两侧表面以及在其内的在所述两侧表面之间延伸的多个开口。所述第二接地薄片体间隔并平行于所述第一接地薄片体。所述接地联接电连接于所述两接地薄片体中的一个并朝向所述两接地薄片体中的另一个延伸且延伸穿过所述本体的开口。(A connector assembly includes an insulative body, first and second electrically conductive ground wafers (see, e.g., 661 and 663), and a plurality of ground couplings. The insulative body has a plurality of conductive signal terminals disposed therein (see, e.g., 662). The insulative body has opposite side surfaces and a plurality of openings therein extending between the side surfaces. The second ground wafer is spaced apart from and parallel to the first ground wafer. The ground coupling is electrically connected to one of the two ground wafers and extends toward the other of the two ground wafers and through the opening of the body.)

1. A connector assembly comprising:

a housing defining a port;

a slot in the port;

a wafer block aligned with the card slot, the wafer block including a pair of ground wafers and a pair of signal wafers, the pair of signal wafers each supporting at least four terminals, wherein the terminals are arranged in two rows of contacts disposed on a first side and a second side of the card slot, the pair of signal wafers are positioned adjacent to each other and the pair of ground wafers are on either side of the adjacent pair of signal wafers, each ground wafer including a plurality of raised areas that protrude into the cavity of at least one signal wafer in the direction of the other ground wafer.

2. The connector assembly of claim 1, wherein at least some of the plurality of raised areas of at least one of the pair of ground wafers contact the other ground wafer through the voids in at least one signal wafer.

3. The connector assembly of claim 2, wherein the pair of ground wafers comprises a conductive metalized plastic.

4. The connector assembly of claim 3, wherein the pair of ground wafers are electrically coupled via contacts made through the voids of at least one signal wafer.

5. The connector assembly of claim 2, wherein the pair of ground wafers comprises plated plastic.

6. The connector assembly of claim 2, wherein at least some of the plurality of elevated regions comprise stakes.

7. The connector assembly of claim 6, wherein at least some of the plurality of raised areas comprise recesses for receiving the stub portions.

8. The connector assembly of claim 2, wherein at least one of the pair of ground wafers includes at least one of an aperture for receiving a stub and a recess for receiving a stub.

9. The connector assembly of claim 1, wherein the raised area is disposed between two rows of contacts on the first side and further extends toward a horizontal centerline of the card slot to enhance shielding between the two rows of contacts.

10. A connector assembly comprising:

an insulative body having a plurality of conductive signal terminals disposed therein, said insulative body having opposite side surfaces and a plurality of openings therein extending between said side surfaces;

a first conductive ground wafer;

a second ground wafer that is electrically conductive, the second ground wafer being spaced apart from and parallel to the first ground wafer; and

a plurality of ground links electrically connected to and extending between the first and second ground wafers, the ground links extending through the opening of the body having a plurality of electrically conductive signal terminals disposed therein.

11. The connector assembly of claim 10, further comprising:

a second insulative body having a plurality of second conductive signal terminals disposed therein, the second insulative body having opposite side surfaces and a plurality of second openings therein extending between the side surfaces; and

a third ground wafer that is electrically conductive, the third ground wafer being spaced apart from and parallel to the second ground wafer; and

a plurality of second ground couplings electrically connected to and extending between the second ground wafer and the third ground wafer, the second ground couplings extending through a second opening of the second body.

12. The connector assembly of claim 10, wherein the ground coupling includes a plurality of protrusions disposed on one of the first and second wafers.

13. The connector assembly of claim 10, wherein the ground coupling includes a first protrusion disposed on the first ground wafer and a second protrusion disposed on the second ground wafer.

14. The connector assembly of claim 13, wherein the first and second protrusions engage each other.

15. The connector assembly of claim 10, wherein the ground wafer comprises a conductive metalized plastic.

16. The connector assembly of claim 10, wherein said insulative body includes an insulative terminal rib extending along each terminal, and said ground coupling defines a plurality of terminal paths within which said terminal rib is disposed.

17. The connector assembly of claim 16, wherein each signal terminal includes a contact portion, a tail portion, and a body portion extending between the contact portion and the tail portion, and a terminal beam portion extends along the entire body portion of each signal terminal.

18. The connector assembly of claim 17, wherein the ground coupling is disposed along substantially an entire length of the body portion of each terminal.

19. The connector assembly of claim 18, wherein the insulative body further comprises a connecting bead interconnecting the plurality of terminal beads, and the ground coupling is configured to further define a plurality of bead paths within which the connecting bead is disposed.

20. The connector assembly of claim 10, wherein the plurality of signal terminals are arranged in differential signal terminal pairs.

21. The connector assembly of claim 20, wherein the differential signal terminal pairs are broadside coupled.

22. The connector assembly of claim 21, wherein the differential signal terminals are edge-coupled.

23. The connector assembly of claim 20, wherein the insulative body includes a first signal wafer having a plurality of first signal terminals therein and a second signal wafer having a plurality of second signal terminals therein.

24. The connector assembly of claim 23, wherein each differential signal terminal pair includes one of the first signal terminals and one of the second signal terminals.

25. A connector assembly comprising:

an insulative body having a plurality of conductive signal terminals disposed therein, the insulative body having opposing side surfaces and a plurality of openings therein extending between the side surfaces;

a first conductive ground wafer;

a second ground wafer that is electrically conductive, the second ground wafer being spaced apart from and parallel to the first ground wafer; and

a plurality of ground links electrically connected to one of the two ground wafers and extending toward the other of the ground wafers, the ground links extending through an opening of the body having a plurality of electrically conductive signal terminals disposed therein.

Technical Field

The present invention relates to the field of input/output (IO) connectors, and more particularly to IO connectors suitable for very high data rate applications.

Background

Input/output (IO) connectors are designed to support high data rates and many improvements have been developed to help provide data rates up to 25Gbps and even higher. However, to support the needs and desires of users, companies are constantly seeking ways to support significantly higher data rates. As a result, development efforts are underway to support very high data rate payloads (payload) using NRZ or PAM4 encoding. However, these enhancements (innovatis) will pose a significant problem for existing manufacturing techniques (position) because conventional circuit boards and connectors together cannot support the relevant Nyquist frequency quickly (ready) with signals up to over 25 GHz. Thus, new architectures and methods will be required.

Another approach to support increased data rates has been to attempt to increase the number of ports. One way to increase the number of ports is to reduce the size of the connector, thereby enabling similarly sized connectors to add additional ports and higher signal density. For example, many standard connectors are often designed to operate at a 0.8mm or 0.75mm pitch and have recently been approved to support a 0.5mm connector standard (OCULINK connector). While shrinking connector size is effective for completely new (clean sheet) designs and supporting very high densities at the front of the chassis, the smaller the connector, the more challenging it is to design an optical connector because the very small size makes it challenging to dissipate sufficient heat energy when used in active applications. They also tend to employ smaller sized conductors, which makes it difficult to support cables of lengths exceeding 2 or 3 meters under electrical signal transmission (signaling). In addition, new smaller connector sizes pose potential problems for backward compatibility. As a result, certain individuals would appreciate further improvements in connector technology.

Disclosure of Invention

A connector is disclosed that includes a wafer set formed of a plurality of terminals supported by an insulative frame. The wafer set may be located within a housing without a pedestal. The card slot element is aligned with the contact portions of the plurality of terminals. In one embodiment, a connector may include a wafer that supports two rows of terminals on either side of a card slot and the connector may be arranged with press-fit tails. In addition to press fit tails, other termination methods are contemplated.

Drawings

The present invention is illustrated by way of example and not limited in the accompanying figures in which like references indicate similar elements and in which:

fig. 1 shows a perspective view of an embodiment of a connector system.

Figure 2 shows a perspective cut-away view of the embodiment shown in figure 1 taken along line 1-1.

Fig. 3 shows another perspective view of the embodiment shown in fig. 1.

Fig. 4 shows a simplified perspective view of the embodiment shown in fig. 3.

Figure 5 shows a perspective view of an embodiment of a plug module before insertion into a receptacle.

Fig. 6 shows a perspective view of an embodiment of a receptacle.

Figure 7A shows a perspective cut-away view of the embodiment shown in figure 6 taken along line 7-7.

FIG. 7B illustrates an enlarged, simplified perspective view of the embodiment shown in FIG. 7A.

Fig. 7C shows an enlarged perspective view of an embodiment of fig. 7A in which a second set of terminals can be seen immediately behind the embedded (following in-line) terminals in the conventional first set of terminals.

Fig. 8 shows a perspective view of the embodiment shown in fig. 6 with the cover partially removed.

Fig. 9 shows a simplified perspective view of the embodiment shown in fig. 6 with the top wall and front portion of the cover removed.

Figure 10 shows a perspective cut-away view of the embodiment shown in figure 7 with a modified top wall.

Fig. 11A shows a perspective view of an embodiment of a connector.

FIG. 11B shows an enlarged perspective view of the embodiment shown in FIG. 11A.

FIG. 12 shows another perspective view of the embodiment shown in FIG. 11A.

FIG. 13 shows a partially exploded perspective view of the embodiment shown in FIG. 11A.

Fig. 14 shows an enlarged perspective view of the embodiment shown in fig. 13.

Fig. 15 shows a perspective view of the embodiment of fig. 13 with the slot connector removed.

Figure 16 illustrates a perspective view of one embodiment of a retaining strip securing a wafer set.

Fig. 17 illustrates an exploded partial perspective view of an embodiment of a connector.

Figure 18 illustrates an exploded perspective view of a portion of one embodiment of a signal wafer pair surrounded by a ground wafer.

Fig. 19 shows a simplified perspective view of the embodiment shown in fig. 18 with an insulating frame removed for illustration purposes.

Figure 20 illustrates a perspective view of one embodiment of a signal wafer pair.

Fig. 21 shows a perspective view of this embodiment with the insulating frame removed.

Fig. 22 illustrates a perspective view of one embodiment of a plurality of terminals of a contact row provided in a bottom port.

Fig. 23 shows another perspective view of the embodiment shown in fig. 22.

Fig. 24 shows a side view of the embodiment shown in fig. 22.

Fig. 25A shows a plan view of the embodiment shown in fig. 21.

FIG. 25B shows an enlarged plan view of the embodiment shown in FIG. 25A.

Fig. 26 shows a schematic view of an embodiment of a connector having a plug-in.

Figure 27 shows a perspective view of one embodiment of a receptacle.

Fig. 28 shows a perspective view of an embodiment of a connector.

Fig. 29 shows a partially exploded perspective view of the embodiment shown in fig. 28.

FIG. 30 shows a partially exploded perspective view of the embodiment shown in FIG. 28 with some features removed.

Fig. 31 shows an exploded perspective view of a portion of the wafer block of the embodiment shown in fig. 28.

Fig. 32 shows a perspective view of a high speed wafer block of the embodiment shown in fig. 28.

Fig. 33 shows a partially exploded perspective view of the high speed wafer block shown in fig. 32.

Fig. 34 is an exploded perspective view of a portion of an externally connected ground wafer from the high speed wafer block shown in fig. 32, showing contact and tail inserts for the ground wafer.

Fig. 35 shows a side view of a right ground wafer from the high speed wafer block shown in fig. 32.

Fig. 36 is a perspective view of an intermediate ground wafer from the high speed wafer block shown in fig. 32.

Fig. 37 shows another perspective view of an intermediate ground wafer from the high speed wafer block shown in fig. 32.

Fig. 38 is an enlarged perspective view of an intermediate ground wafer from the high-speed wafer block shown in fig. 32.

Fig. 39 is a front left perspective view of an intermediate ground wafer from the high speed wafer block shown in fig. 32.

Fig. 40 is a front right perspective view of a left signal wafer from the high speed wafer block shown in fig. 32.

Fig. 41 is an enlarged perspective view of a left signal sheet from the high-speed sheet block shown in fig. 32.

Fig. 42 is an exploded perspective view of a front right portion of a left signal wafer from the high speed wafer block shown in fig. 32.

Fig. 43 is a partially exploded perspective view of a left front portion of a left signal wafer from the high speed wafer block shown in fig. 32.

Fig. 44 shows a perspective view of a right ground wafer from the high speed wafer block shown in fig. 32.

Fig. 45 is an enlarged perspective view of a right ground wafer from the high speed wafer block shown in fig. 32.

Fig. 46 shows another perspective view of a right ground wafer from the high speed wafer block shown in fig. 32.

Fig. 47 is a perspective view of the left ground wafer and the left signal wafer from the high speed wafer block shown in fig. 32.

Fig. 48 is an enlarged perspective view of the left ground wafer and the left signal wafer from the high-speed wafer block shown in fig. 32.

Fig. 49 is a perspective view of the right ground wafer and the right signal wafer from the high speed wafer block shown in fig. 32.

Fig. 50 is an enlarged perspective view of the right ground wafer and the right signal wafer from the high-speed wafer block shown in fig. 32.

Fig. 51 illustrates a cut-away view of the high speed wafer block shown in fig. 32 taken generally along line 51-51.

Fig. 52 shows a partially exploded view of the high speed wafer block shown in fig. 51 with the right signal wafer removed for cleaning.

Fig. 53 shows a partial exploded view of the high speed wafer block shown in fig. 51.

Fig. 54 shows a partially exploded view of a high speed wafer block, similar to fig. 53, but with the right signal wafer insulator removed for cleaning.

Fig. 55 shows a cut-away perspective view of the high speed wafer block of fig. 51 with a portion of the right ground wafer cut generally along line 55-55.

Fig. 56 shows a cut-away view of the high speed wafer block, similar to fig. 55, but with the right signal wafer insulator removed for cleaning.

Fig. 57 illustrates a perspective view of an alternate embodiment of an intermediate ground wafer from the high speed wafer block shown in fig. 32.

Fig. 58 shows an enlarged perspective view of the left ground and signal wafers from the high speed wafer block shown in fig. 32, but with the left signal wafer having its insulation removed for cleaning purposes.

Fig. 59 shows another enlarged perspective view of the left ground and signal wafers from the high speed wafer block shown in fig. 32, but with the left signal wafer having its insulation removed for cleaning purposes.

Detailed Description

The following detailed description illustrates exemplary embodiments and is not intended to limit the combinations explicitly disclosed. Thus, unless otherwise indicated, features disclosed herein may be combined together to form additional combinations not shown for the sake of brevity.

As can be appreciated from fig. 1-5, a receptacle 100 is mounted on a circuit board and provides a right angle configuration configured to receive the plug module 20. The illustrated socket design is beneficial for use with a plurality of plug modules including cooling slots (cooling slots) 115. Although the use of cooling channels 115 in a module is not required, cooling channels 115 can provide additional cooling and, when employed with other features disclosed herein, make it easier to cool a module that employs more than 8 watts of power.

The receptacle 100 includes a housing 120 and the receptacle 100 can support the light pipe 105 if desired. Referring to fig. 6, the housing includes a top wall 122, a first side wall 123, a second side wall 124, a rear wall 125, and a front edge 126. The receptacle 100 defines a top port 121a and a bottom port 121 b. Both the first side wall 123 and the second side wall 124 may include vent holes 135.

As can be appreciated, the design shown is intended to facilitate cooling of an inserted plug module 20. Thus, the design has been adjusted to improve air flow in a number of ways as will be discussed herein. In some embodiments, the receptacle 100 may include an in-ride heat sink 134 in communication with a front grill 130 and a rear aperture set 132. The top wall 122 may include a cooling opening (cooling aperture)122a and an over-riding heat sink 133 can be disposed within the cooling opening 122 a. These riding heat sinks are typically designed so that they extend into the port and engage an inserted plug module, which helps provide a conductive path for heat to be conducted away (direct away) from the plug module. It should be noted that in some cases it may not be desirable to have additional cooling (e.g., in applications where active modules are not intended) and in such cases many optional thermal features may be omitted. Thus, the illustrated in-riding heat sink and various ventilation features may be omitted if not required (for clarity, use of the techniques described herein may be considered in both active and passive modules).

One common design of prior sockets employs a base located inside a housing that helps define a connector. The cage helps support the mated plug modules, can help support the connectors, and can also provide EMI protection. A connector within the housing supports a plurality of terminals that each include tail portions and contact portions that allow the mated plug module to be electrically connected to a circuit board (or cable if a Bipass design is desired). A socket, which is typically press fit to a circuit board for ease of assembly, must therefore have the terminals of the connector aligned with the terminals (terminations) of the cage. As can be appreciated, the cover may be formed of metal and is intended to have a plurality of tails of a fully repeatable layout, the plurality of tails having desired dimensional control relative to each other. The tails of the connector can also be carefully manufactured so that the tails are aligned with each other. However, it is somewhat more difficult to align the tails of the connectors with the tails of the cage because there are multiple dimensional stacks. This dimensional problem is made more difficult by the fact that the base supports the wafer and the wafer supports the terminals in a typical press-fit design. Thus, the terminals are dimensionally controlled relative to each other within a wafer but have a dimensional stack (stack up) relative to the housing and other wafers, while the housing and cage have a dimensional stack. Prior designs have attempted to have a base surface (datum) that acts as a stop to carefully control the insertion of the base into the cover to control the tolerance (tolerances) between the base surface and the tails of both the cover and the connector.

While such control is feasible, it presents (turns out) more challenging and more difficult, particularly as the tail decreases in size. Applicants have identified that instead of having a stop that limits and controls the position of the base relative to the shroud, it is preferable to have a system in which the shroud 120 and connector 129 are docked together in a manner that allows infinite (infinite) adjustment within a small range so that docking of the shroud 120 and connector 129 can be accomplished in a controlled manner and dimensional control can be ensured. As shown, the cover 120 includes bottom walls 140, 141, each of the bottom walls 140, 141 having a tongue 142 that is inserted into a respective card slot plug 150, 160. More specifically, these tabs 142 from the cover 120 are inserted into tab slots 153, 163 in the mating portions 152, 162 of the slot connectors 150, 160, respectively. As can be appreciated, the slot connectors 150, 160 engage a wafer set 220 and will provide some additional dimensional stacking therebetween. In an embodiment, this insertion can be done based on the alignment between the wafer set 220 and the cover 120, thereby eliminating some stacking in dimensions that would otherwise exist. In one embodiment, the tab 142 has an interference fit with the tab slots 153, 163 so that the cover and connector 129 are properly engaged and stay in place relative to each other. Such a manufacturing process allows the position of the cover 120 and wafer set 220 to be better controlled relative to each other and improves the yield (yield) of the socket 100 while ensuring that the socket 100 is properly mounted on a circuit board.

As can be appreciated from these figures, the connector 129 is shown with a base omitted. Applicants have surprisingly found that the use of a housing is not necessary to support a wafer set 220, as long as a plurality of wafers are fixedly secured together, preferably on at least two sides. In an illustrated embodiment, the plurality of retention bars 171 are on opposite sides and one of the sides has two retention bars 171. The plurality of retaining bars 171 are connected to wafer 221 via wafer tabs (nubs)229, and wafer tabs 229 can be heat staked to retaining bars 171. The illustrated connector 129 shows an embodiment in which a triangular layout is provided by two retaining bars 171 on one side and one retaining bar 171 on a second side of the wafer set. Although having at least two retaining bars 171 (each located on a different side of the connector) is desirable, a triangular layout of the retaining bars 171 has been identified as beneficial because it provides improved control and support for the wafers 221 that make up the wafer set 220. It has been determined that the elimination of the base provides certain unexpected benefits. One aspect is that no pedestal is perfectly square and straight (straight), whereby the tolerance in the pedestal adds to the tolerance in the multiple wafers and thereby increases the tolerance in the location of the multiple tails. By removing the pedestals, applicants have better control over the position of the trailing portion of the wafer set relative to the housing. Removing the base also allows the size of the socket to be reduced, thereby allowing for increased density.

Each wafer 221 includes an insulative frame 221 a. The illustrated insulative frame 221 includes a top protrusion 224 and supports a plurality of terminal sets 252, 262, 272 (as can be expected, in some embodiments, there is a three wafer system including a ground wafer and two signal wafers). It should be noted that the illustrated terminal configuration, while beneficial to the illustrated socket, is not intended to be limiting as the feature of providing a connector that does not require a base has wide applicability. These design elements that provide a removal base may thus be used with a wide range of wafer configurations.

The terminal set 252 includes a plurality of terminals 253, and each of the plurality of terminals 253 includes a contact portion 253a, a tail portion 253b, and a body portion 253c extending therebetween. Similarly, the terminal set 262 includes a plurality of terminals 263, each of the plurality of terminals 263 includes a contact portion 263a, a tail portion 263b and a body portion 263c extending therebetween. Because the tails 253b, 263b are shown for press-fitting into a circuit board, it would be beneficial to provide a receptacle (helpful) to which force can be quickly applied to the tails to press them into vias on a circuit board. As shown, the insulating frame 121a includes a plurality of top protrusions extending to a top wall 122 of the enclosure 120. Due to the illustrated design, the force exerted on the cover body 120 is transmitted to the end portions 253b, 263b through the insulating frame body 121a and thus a reliable press-fitting operation is possible.

The illustrated plurality of top protrusions 124 have a plurality of notches 124a so that the wafer engages the top wall in a plurality of locations but still leaves a gap. The plurality of notches 124a can be arranged in a pattern that allows air to flow along the top wall 122 of the cover in a desired manner. As can be appreciated, the number and size and location of the notches 124a can be varied as appropriate to provide the desired air flow.

It should be noted that while the notches 124a provide a serpentine path for air to flow through, the notches 124a do not provide a straight path for air to flow between the wafers and the top wall and thereby increase the pressure drop of the air flow through the receptacle. Although the path shown may be considered a zig-zag or undulating path, other paths may be provided depending on the configuration of the top wall. Chamfers may be used on some or all of the top protrusions (see, e.g., top protrusions 528 of fig. 32) to promote better laminar (less turbulent) or swirling) airflow. In an alternative embodiment, the protrusion 124 may be shortened and an insert 129a (shown schematically in fig. 26) may be located between the wafer set 220 and the top wall 122. The insert 129a can transfer forces from the top wall 122 to the wafers 221 while providing a more optimal air flow path (thereby reducing air resistance) between the top wall 122 and the wafer set 220. In another alternative embodiment, the insert 129a can be removable and used only to mount the connector on the circuit board 10 before being removed. In such a design, the rear wall 125 of the shroud 120 can be attached after both the shroud 120 (or at least a majority of it) and the connector 129 are pressed into the circuit board and the opening can provide reduced air resistance. Thus, many variations are possible depending on the need for air flow and the desire to manage costs.

The illustrated design provides wafers 221 with a front row 245 of contacts and a rear row 246 of contacts spaced apart in a plug module insertion direction and configured to engage two rows of pads on a mating connector. Although not required, the benefit of such a design is a significant increase in density. If such a density is not desired, then multiple wafers can be made to support a smaller number of terminals. It should be noted that the wafers are shown arranged in a pattern that provides a repeating pattern of ground, signal, and signal. Other patterns are possible if desired. The ground wafer may include terminals that share a common ground (common) together, if desired, and in one embodiment the ground wafer may have the contact portion engage the top wall to provide an electrical ground to the housing.

Because the connector 129 does not require a housing (although it is possible to use a housing if desired in some embodiments), the connector 129 is shown supporting a slot-in connector with the wafer set 220. As shown, the slot connectors 150, 160 each have shoulders similar to the shoulders 156a, 156b of the retention features that snap onto at least some of the wafers in the wafer set 220 to provide the desired positional and stability control. In an embodiment, only the ground wafer may include retention features. As shown, the shoulders 156a, 156b may have slots 154, the slots 154 engaging the protrusions 226, although other retention configurations are also suitable. The slot connectors 150, 160 are positioned in the ports 121a, 121b defined by the cover 120 and provide a slot 151 with a plurality of contacts on either side of the slot 151 by the slot 151. Card slot 151 preferably includes terminal slots 155 for front row 245 of contacts so that the most vulnerable contacts are protected during initial mating with a mating plug connector. The rear contact row 246 can advantageously omit terminal slots because the front of the slot-in connectors 150, 160 help align and control the mating plug-in card (paddle card). If desired, a slot connector 160 may include a peg 166, the peg 166 being for insertion into a circuit board, but such a feature is optional and not expected to be helpful for a design that includes two vertically disposed ports in a 2XN configuration (helpful).

In one embodiment, the retention bar 171 can be configured to engage the cover 120. The retention bar 171 can be made wider than the wafer set 220 so that the retention bar 171 slides along both sidewalls of the cover 220. If such a structure is desired (which helps to ensure proper alignment of the cover 120 with the wafer set 220), the retention bar 171 can include a vent 172 to allow air to flow through the receptacle more quickly.

It has been determined that for a full double row design, die cut formation is desirable for all contacts (it has been determined that this provides mechanical and signal integrity benefits). Thus, the illustrated embodiment features two rows of stamped contacts on both sides 151a, 151b of the card slot 151.

To support the leading contact row 245, the wafer 221 includes an arm 228, and the arm 228 extends beyond the trailing contact row 246. The arm 228 helps ensure that the impedance through the body of the wafer is managed to be more consistent. To provide suitable flexibility, the arm 228 may include a notch 228a, the notch 228a allowing the arm 228 to flex slightly.

As described above, each of the plurality of terminals includes a contact portion, a tail portion, and a body portion extending therebetween. The illustrated configuration includes a ground wafer 271 and a signal wafer set 250, the signal wafer set 250 including a first signal wafer 251 and a second signal wafer 261. One signal wafer can be said to support multiple negative (-v) signals and the other signal wafer can correspondingly be said to support multiple positive (+ v) signals; together, these signals form a set of differential pair signals (-v/+ v). Signal wafer set 250 thus provides a top port, a first differential pair 254a, a second differential pair 254b, a third differential pair 254c, and a fourth differential pair 254 d. The signal wafer set 250 also provides bottom ports, a fifth differential pair 255a, a sixth differential pair 255b, a seventh differential pair 255c, and an eighth differential pair 255 d. As can be appreciated from the illustrated terminal configuration, the terminals forming the two rear differential pairs have tail portions between the tail portions of the two differential pairs forming the front contact portions for the top and bottom ports, respectively. For example, differential tail groups 257b and 257c are associated with contact pairs 258b and 258c, respectively, with the contact pairs 258b, 258c being in the rear contact row. The differential tail groups 257a and 257d flank the differential tail groups 257b, 257c and are associated with the contact pairs 258a, 258d located in the front contact row. It has been determined that this configuration is beneficial because it allows the three rows of terminals to have similar lengths despite having one terminal that is significantly longer. The illustrated embodiment thereby helps provide a more consistent terminal length.

As can be appreciated, the contact portions of a top row are opposite the contact portions of a bottom row. In one embodiment, the contact portions of the terminals forming the top row of contact portions may have a formed portion (form)256b that is bent in a first direction, while the terminals forming the bottom row of contact portions may have a formed portion 256a that is also bent in the first direction. For example, all groups of contact portions may have a profile bent to one side (for example they can both be bent to the left or both to the right) when the contact portions are viewed straight in the plug-in direction of a plug module. While such a configuration is beneficial, it has been found (it turns out) that for some applications it is desirable to offset the contacts of the top row from the contacts of the bottom row. To provide this functionality, the contact portion may taper downwardly from a beam portion 302a, 302b to a pad contact portion 301a, 301b, wherein the pad contact portion 301a, 301b is less than half the width of the beam portion 302a, 302 b. If desired, the pad contacts of the top row and the pad contacts of the bottom row may be located on opposite sides of the beam portion to provide an offset alignment. If such an alignment is not required, the contacts can be arranged symmetrically or in some other desired form (configuration).

The pitch can vary depending on the interface (interface) to be used. As shown, the terminals are at an x-pitch, which may be 0.8mm and the top and bottom terminals may have a y-offset, which may be 0.4 mm. If the connector provides a double row of contacts at the top and bottom and the front contacts are intended to be compatible with existing designs, it would be beneficial to match the pitch of the contacts to the existing design (match). If a new design is preferred, the pitch can be varied as desired, keeping in mind that signal integrity performance can be more challenging because a pitch reduction below 0.8mm and below 0.65 pitch typically requires additional features such as biased (biased) plug-in cards and/or contact interfaces (such as for an OCULINK connector).

Fig. 27-51 illustrate an alternative embodiment of certain aspects of the connector embodiment described above with reference to fig. 1-26. The embodiments now described with respect to fig. 27-51 may be combined in whole or in part with certain connector embodiments already described depending on the particular aspects of the implementation. Thus, some connector embodiment aspects may remain unchanged, some aspects replaced with the presently described structure, and some aspects modified to incorporate the presently described structure.

As can be appreciated from fig. 27, a receptacle 500 is mounted on a circuit board 510 and provides a right angle configuration configured to receive a plug module (not shown), see, for example, plug module 20. The illustrated receptacle 500 design may be used with plug modules that include cooling channels (see, e.g., cooling channel 115), although such cooling channels are not required in receptacle 500 that is compatible with the plug modules.

The receptacle 500 includes a housing 520 and the receptacle 500 can support a light pipe if desired (see, e.g., light pipe 105). The housing includes a top wall 522, a first sidewall 523, a second sidewall 524, a back wall 525, and a front edge 526. The receptacle 500 defines a top port 521 a and a bottom port 521 b. The top wall and both side walls may include vents 535.

As can be appreciated, the design shown is intended to facilitate cooling of an inserted plug module. Thus, the design has been adjusted to improve airflow in a variety of ways as will be discussed herein. In some embodiments, the receptacle 500 may include an on-board heat sink (see, e.g., on-board heat sink 134) in communication with a front grill 530 and a rear set of apertures (see, e.g., rear set of apertures 132). The top wall 522 may include a cooling opening 522a and an over-riding heat sink can be disposed within the cooling opening 522 a. These riding heat sinks are typically designed so that they extend into the port and engage an inserted plug module, which helps provide a conductive path for heat to be conducted away from the plug module. It should be noted that in some cases it may not be desirable to have additional cooling (e.g., in applications where active modules are not intended) and in such cases many optional thermal features may be omitted. Thus, the illustrated inner-riding heat sink and various ventilation features may be omitted, if not required.

One common design of prior sockets employs a base located inside a housing that helps define a connector. The cage helps support the mated plug modules and can help support the connector and can also provide EMI protection. A connector within the housing supports a plurality of terminals that each include tail portions and contact portions that allow the mated plug module to be electrically connected to a circuit board (or cable if a Bipass design is desired). A receptacle that is typically press fit onto a circuit board for ease of assembly is such that the terminals of the connector are aligned with the ends of the cage. As can be appreciated, the cover may be formed of metal and is intended to have a plurality of tails of a fully repeatable layout, the plurality of tails having desired dimensional control relative to each other. The tails of the connector can also be carefully manufactured so that the tails are aligned with each other. However, it is somewhat more difficult to align the tails of the connectors with the tails of the cage because there are multiple dimensional stacks. This dimensional problem is made more difficult by the fact that the base supports the wafer and the wafer supports the terminals in a typical press-fit design. Thus, the terminals are dimensionally controlled relative to each other within a wafer but have a dimensional stack (stack up) relative to the housing and other wafers, while the housing and cage have a dimensional stack. Prior design attempts have been made to have a base (datum) that acts as a stop to carefully control the insertion of the base into the cover to control the tolerance between the base and the tails of both the cover and the connector (tolerances)

While such control is feasible, it presents more challenges and difficulties, particularly as the tail is reduced in size. Applicants have identified that instead of having a stop that limits and controls the position of the base relative to the cover, it is preferable to have a system in which cover 520 and connector 529 are docked together in a manner that allows infinite adjustment within a small range, so that docking of cover 520 and connector 529 can be accomplished in a controlled manner and dimensional control can be ensured. As with the previous embodiment (see, for example, bottom walls 140 and 141, tongue 142, tongue slots 153, 163 in fig. 7B), the cover 520 includes two bottom walls each having a tongue that is inserted into a respective slot-in plug 550, 560. More specifically, these tabs from the cover 520 are inserted into tab slots in the mating portions of the slotted inserts 550, 560, respectively. As can be appreciated, the slot connectors 550, 560 engage a wafer set 620 and will provide some additional dimensional stacking therebetween. In an embodiment, this insertion can be done based on the alignment between the wafer set 620 and the cage 620, thereby eliminating some stacking in dimensions that would otherwise exist. In one embodiment, the tongue has an interference fit with the tongue groove so that the cover and connector 529 are properly engaged and stay in place relative to each other. Such a manufacturing process allows the position of the cage 520 and wafer set 620 to be better controlled relative to each other and improves the productivity of the socket while ensuring that the socket is properly mounted on a circuit board.

As can be appreciated from these figures, the connector 529 is shown with a base omitted. Applicants have surprisingly found that the use of a housing is not necessary to support a wafer set 620, as long as a plurality of wafers are fixedly secured together, preferably on at least two sides. In an illustrated embodiment, the plurality of retaining strips 571 are located on opposite sides and one of the sides has two retaining strips 571. A plurality of retaining strips 571 are connected to wafer set 620 via wafer tabs), such as wafer tab 629, which wafer tab 629 can be heat staked to retaining strips 571. The illustrated connector 529 illustrates an embodiment in which two retaining bars are located on one side, one retaining bar is located on a second side, and one retaining bar is located on a third side of the wafer set 620. It has been determined that the elimination of the base provides certain unexpected benefits. One aspect is that no pedestals are perfectly square and straight, whereby tolerances in the pedestals add to tolerances in the wafer and thereby increase tolerances in the location of the tails. By removing the pedestals, it is believed that the position of the trailing portion of the wafer set relative to the housing is better controlled. Removing the base also allows the size of the socket to be reduced, thereby allowing for increased density.

The illustrated connector 529 illustrates an embodiment having two retaining clips 572 for securing the slot connectors 550 and 560 to the wafer set 620. The retaining clip 572 is connected to the slot connectors 550 and 560 via tabs or posts that can be heat staked to the retaining clip 572. Depending on the embodiment, some or all of the retaining bars or either or both of the retaining clips may be conductive structures for common grounding across some or all of the ground wafers. Also depending on the embodiment, there may be a digital ground and a chassis ground, the digital ground typically being associated with signal transmission and a signal reference, and the chassis ground typically being associated with an outer shield function and an Earth reference (Earth reference). In some systems or situations, the digital ground and chassis ground are ideally isolated from each other, while in other situations it may be advantageous to have the digital ground and chassis ground share ground. The retaining strip and the retaining clip may not perform any common grounding function or they may perform a common grounding for digital grounding or chassis grounding or some combination of the two. For example, the holding bar may perform a common ground for digital grounds, while the holding clip may perform a common ground for chassis grounds. In other embodiments, at least some of the retaining bars engage the cover so that it may not be desirable for them to contact the plated plastic of one or more ground wafers, thereby maintaining isolation between the different grounds of the wafers and the cover.

Similar to the wafer design already described, wafer set 620 has a front contact row 641 and a rear contact row 642 spaced apart in a plug module insertion direction and configured to engage two rows of pads on a mating connector. Although not required, the benefit of such a design is a significant increase in density. If such a density is not required, the wafer can be made to support a smaller number of terminals.

The illustrated wafer set 620 includes three wafer blocks, two high speed wafer blocks 660 on either side of a low speed/power wafer block 670. It should be noted that the high speed wafer block 660 is shown arranged in a manner to provide a ground-signal-ground pattern, while the low speed/power wafer block 670 is shown arranged in a manner to provide a signal-power-signal pattern or a signal-ground-signal pattern. Other patterns are also possible. Thus, the high-speed wafer block 660 includes a left ground wafer 661, a left differential pair signal wafer 662, an intermediate ground wafer 663, a right differential pair signal wafer 664, and a right ground wafer 665 arranged in that order.

Each wafer of the signal wafer pair 662, 664 includes an insulative frame (molded plastic, such as LCP, for example) disposed over or around a plurality of signal terminals. For example, referring to fig. 40 to 43, the pair of signal wafers 662 includes an insulating frame 662a and an insulating frame 662 b. Insulating frames 662a, 662b are shown supporting the plurality of terminal sets 710, 712, respectively, as shown for the previous embodiment (see, e.g., plurality of terminal sets 252, 262 in fig. 21). The insulating frame may be formed around the plurality of terminal sets 710, 712 by insert molding or over molding or with a base member manufactured separately from the plurality of terminal sets. The terminal sets 710, 712 and terminals 711, 713 may be the same as or similar to the terminal sets 252, 263 and terminals 253, 263 described above.

As shown in fig. 42 and 43 (and with reference to fig. 21-25), each terminal of each differential pair is broadside-coupled to the other terminal with only an air gap between them except along their outer edges where they are supported by the insulative frame of their respective wafers. More specifically, each terminal 711 of the terminal set 710 includes a terminal rib (web)715 of the insulating material of the insulating frame 662a that does not completely (partially) surround the terminal along its length or substantially its entire length. The terminal rib portion 715 includes: an upper portion 715a extending in a continuous manner along the entire length of each terminal 711 and along the upper edge; and a lower portion 715b extending in a continuous manner along the entire length of each terminal and along the lower edge. The inner surface of each terminal (i.e., facing its broadside coupling counterpart terminal) is free of insulative material, as best seen in fig. 42, while the opposite side of each terminal (i.e., facing its adjacent ground wafer 661) is generally free of insulative material but includes insulative material along some portion thereof. The insulating frame body 662a further includes connecting ribs (connecting webs)716 extending between the plurality of terminal ribs 715 and connecting the plurality of terminal ribs 715. As shown, the connecting rib 716 extends over a portion of the terminal 711 at 716 a. In some embodiments, the overlapping portion 716a may be omitted. The terminal and connection ribs 715 and 716 define a plurality of voids (void) or openings 717 along their lengths between vertically aligned pairs of terminal ribs.

The terminals 713 of the terminal set 712 are provided with a terminal rib 720 of insulating material of the insulating frame 662b, the terminal rib 720 not completely surrounding the terminals along their length or substantially their entire length in a similar but mirror-image manner compared to the rib 715. The terminal rib 720 includes an upper portion 720a, a lower portion 720b, a connection rib 721, an insulating portion 721a, and an opening 722, which are similar, and the description thereof will not be repeated. When the insulating frames 662a and 662b are aligned and fixed together, the terminal rib portions 715, the connection rib portions 716, and the openings 717 of the frame 662a are aligned with the terminal rib portions 720, the connection rib portions 721, and the openings 722 of the frame 662b, respectively. The aligned openings 717 and 722 define an opening 723 through the entire signal wafer pair when the insulative frame bodies 662a and 662b are secured together.

The insulative frame of each signal wafer pair 662, 664 can be secured together in any desired manner. For example, as shown in fig. 42-43, the insulative frame bodies 662a, 662b of the signal wafer pair 662 have stubs or projections 691 and complementary shaped holes or recesses 692 for mating with one another when joined. (depending on the embodiment, the holes of some or all of the signal wafers may not extend all the way through the wafer, and the illustrated stub and hole layout is but one example, and many embodiment-related variations are possible). In some embodiments, the stub and hole of one signal wafer has an interference fit with the other signal wafer. Further, in some embodiments, the pairs of signal wafers are fused (welded) together to fix the alignment of their respective pluralities of terminal sets and thus the alignment of each corresponding pair of terminals (one terminal from each terminal set) creating the resulting differential pair.

The ground sheets 661, 663, 665 are made of metallized plastic to be electrically conductive and commonly grounded. For example, metallized plastic may take various forms: it may be doped to become sufficiently conductive, it may be plated, it may be doped and plated, it may be inked, it may be etched (etched), or it may be some combination of any of the foregoing methods. While in the case of plating, the plating may cover the entire surface of the ground wafer, selective plating may instead be desired. In some embodiments, the metal contact inserts 668 and metal tail inserts 669 (shown in fig. 34) are press fit (stitched) or inserted into pockets of the ground wafer 665 (after press fit as shown in fig. 35) rather than formed by a terminal overmolding process (as described above for other embodiments). Such insert compression (whether for the contact portions or the tail portions or both) can be performed against all or any of ground wafers 661,663, 665. Similar contact inserts and/or tail inserts may be formed for various signal wafers or power wafers and then press fit into the wafers as desired. Additionally, the tail insert may be a press-fit tail insert or a surface mount tail insert. Rather than using a tail insert, some embodiments could conceivably include plated or metalized conductive plastic tails. Such tails may be formed as part of any molded wafer and are either conductive or made conductive (e.g., plated).

Furthermore, and more generally, the method being described facilitates combining a molded and plated (galvanic) series conductive path with conductive wafer supported communication portions (communication) such as a set of press-fit terminals between conventional mateable connector portions and conventional termination portions to a PCB. The conductive communication portion is conventionally formed by extending a stamped press-fit tail, while a metal portion is similarly stamped to form ground and/or signal terminals. The press-fit insert under consideration can provide a hybrid solution combining the versatility of press-forming features with the precision and versatility of molded plastics with inherent conductive elements. Although the set of solutions (set) described herein mainly refers to the integration (integration) of a molded conductive ground system with a common set of ground terminals, the application of this technique can also be applied to non-continuous (discrete) signal terminals.

As shown, the ground wafers 661, 663, 665 have a plurality of raised areas (tabs), stakes and recesses for mating with one another when signal wafer pairs 662 and 664 are interposed therebetween. In some embodiments, the stub and recess of one ground wafer has an interference fit with the opposing clamping (sanding) ground wafer, and in some embodiments the raised area of each ground wafer is sufficient to substantially fill the cavity of the clamping signal wafer pair (again, depending on the embodiment, the recess of some or all of the ground wafers may be replaced with (inset) a hole in the ground wafer for receiving the stub of the opposing ground wafer, and the illustrated stub and recess layout is but one example, many embodiments are possible depending on the variations). It may be desirable for some or all of the raised areas (tabs), stakes and/or recesses to be metallized to allow conduction between the ground wafers 661, 663, 665 and for common grounding.

More specifically, the ground wafers 661, 663, 665 are configured to be substantially or completely electrically isolated and provide the required impedance control along each differential signal pair of signal wafer pairs 662, 664. Referring to fig. 51-56, each adjacent pair of ground wafers (i.e., ground wafers 661, 663 and ground wafers 663, 665) includes a series of interlocking projections 735, 738, 739 that form a portion of a shielding structure that, along with the generally planar structure of the ground wafers, surrounds or generally surrounds the path 730 in which the terminal beads 715, 720 are disposed to at least significantly shield the differential pair of terminals along the entire length of the terminals or a significant portion of the length of the terminals. Interlocking projections 735, 738, 739 form conductive ground links (links) between ground wafers 661, 663, 665.

Referring to fig. 36-37, the intermediate ground wafer 663 includes a plurality of spaced-apart raised areas or projections 735 on each of the first side 663a and the opposing second side 663 b. The plurality of projections 735 are grouped together and aligned to form a plurality of channels 731a, channels 731a forming a portion of path 730, and terminal ribs 715, 720 of signal wafer pairs 662, 664 are disposed within path 730. The projections 735 are shown as having a variety of shapes and configurations (configurations), but in each case the projections 735 are configured to mate or engage a similar but oppositely configured structure on the facing ground wafers 661, 665 to create a complementary interengaging structure.

In one example, some of the projections 735a include a plurality of generally rectangular, spaced-apart smaller projections or teeth 736. In another example, the projection 735b includes one or more rounded posts or projections 737, or with or without one or more rectangular projections 736. In yet another example, the projection 735c includes a single rectangular projection 736. In yet another example, projection 735d includes a circular socket and projection 735e includes a single rectangular socket. The plurality of projections 735 may extend linearly and/or obliquely and be spaced apart to further define the channel 732a within which the attachment ribs 716, 721 are disposed. Other configurations are also contemplated. As shown, the projections 736, 737 have different heights that may function to assist in aligning and assembling the ground wafers 661, 663, 665. The alternating heights of the protrusions 736, 737 may also provide improved electrical functionality in some cases.

Referring to fig. 34, the left ground wafer 661 includes a planar first surface 661a and an opposite second side 661 b. The second side 661b includes a plurality of protrusions 738 that are similar but opposite in configuration to the protrusions 735 on the first side 663a of the intermediate ground wafer 663. Using the example described above, each projection 738a abuts an oppositely configured and aligned projection 735a, each projection 738b abuts an oppositely configured and aligned projection 735b, and each projection 738c abuts an oppositely configured and aligned projection 735 c. A plurality of protrusions 738 similarly define channels 731b in which portions of terminal ribs 715, 720 are disposed and channels 732b in which portions of connecting ribs 716, 721 are disposed. Channels 731a, 731b interact to define shielded terminal paths 730 within which terminal ribs 715, 720 are disposed, while channels 732a, 732b interact to define rib paths 733 within which connection ribs 716, 721 are disposed.

Similarly, right ground wafer 665 includes a planar first surface 665a and an opposing second side 665 b. Second side 665b includes a plurality of projections 739, projections 739 being similar but of opposite configuration as compared to projections 735 on second side 663b of intermediate ground wafer 663. Using the example described above, each projection 739a abuts an oppositely configured and aligned projection 735a, each projection 739d abuts an oppositely configured and aligned projection 735d, and each projection 739e abuts an oppositely configured and aligned projection 735 d. A plurality of projections 739 similarly define channels 731b in which portions of terminal ribs 715, 720 are disposed and channels 732b in which connecting ribs 716, 721 are disposed. Channels 731a, 731b interact to define terminal paths 730 within which terminal ribs 715, 720 are disposed and channels 732a, 732b interact to define rib paths 733 within which connection ribs 716, 721 are disposed.

Although the protrusions 735 on the opposite sides 663a, 663b of intermediate ground sheet 663 are identically configured and thus the protrusions 738 and the protrusions 739 are identically configured, other configurations may be employed so long as these protrusions of ground sheets 661, 663, 665 engage with each other to form terminal path 730 formed by terminal channel 731 and tendon path 733 formed by tendon channel 732.

The ground wafers 661, 663, 665 can be secured together in any desired manner. As shown, the intermediate ground wafer 663 includes a plurality of recesses or receptacles 740 on the first side 663a and a plurality of posts 741 on the second side 663 b. The left ground wafer 661 includes a plurality of posts 742 on a second side 661b, the posts 742 configured to be secured within receptacles 740 on the first side 663a of the middle ground wafer 663 to secure the left and middle ground wafers together. The right ground wafer 665 includes a plurality of receptacles 743 on the second side 665b, the receptacles 743 being configured to be secured to posts 741 on the second side 663b of the intermediate ground wafer 663 to secure the right and intermediate ground wafers together. If desired, the posts 741, 742 may include crush ribs 741a, 742a to assist in securing the ground wafers 661, 663, 665 together.

To assemble a high speed wafer block 660, signal wafer pairs 662 are assembled by aligning and securing together insulative frame bodies 662a, 662b having terminal sets 710, 712 therein. The second pair of signal wafers 664 may be assembled in the same manner. The left ground wafer 661 is fixed to the intermediate ground wafer 663 with a first pair of signal wafers 662 positioned between the left ground wafer 661 and the intermediate ground wafer 663. In so doing, the first pair of signal wafers 662 is positioned between the left ground wafer 661 and the middle ground wafer 663 with the terminal rib portions 715, 720 aligned with the terminal channels 731a on the first side 663a of the middle ground wafer 663 and the terminal channels 731b on the second side 661b of the left ground wafer 661. The connective ribs 716, 721 align with the rib channels 732a on the first side 663a of the middle ground wafer 663 and the rib channels 732b of the second side 661b of the left ground wafer 661.

The right ground sheet 665 is fixed to the intermediate ground sheet 663 via a second pair of signal sheets 664 located between the right ground sheet 665 and the intermediate ground sheet 663. In so doing, the second pair of signal wafers 664 is positioned between intermediate ground wafer 663 and right ground wafer 665 with terminal rib portions 715, 720 aligned with terminal channels 731a on the second side 663a of intermediate ground wafer 663 and terminal channels 731b on the second side 665b of right ground wafer 665. Connecting ribs 716, 721 are aligned with rib channels 732a on second side 663b of middle ground wafer 663 and rib channels 732b on second side 665b of right ground wafer 665.

Referring to fig. 51-56, a first signal wafer pair 662 is interposed between a left ground wafer 661 and an intermediate ground wafer 663, and a second signal wafer pair 664 is interposed between an intermediate ground wafer 663 and a right ground wafer 665. The conductive properties and structure of ground wafers 661, 663, 665 along terminal channels 731a, 731b provide lateral shielding and impedance control for the terminals within signal wafer pair 662, 664. The projections 735 of the intermediate ground wafer 663 interact or engage with the projections 738 of the left ground upstanding wafer 661 and the projections 739 of the right ground wafer 665 to substantially fill the voids or openings 723 on the signal wafer pairs 662, 664. The conductive properties and structure of the protrusions 735, 738, 739 within opening 723 provide vertical shielding and impedance control for the terminals within the signal wafer pairs 662, 664. Thus, the terminals 711, 713 of each differential signal pair are substantially surrounded along their entire length by the conductive shield from the ground wafer due to the conductive plating on the ground wafers 661, 663, 665. The interruption of the shield occurs in the gaps between the projections 735, 738, 739 forming the bead channel 732. However, such interruptions are very small and rare (infirequent) so as not to significantly interrupt or affect the electrical performance of the illustrated connector system.

The fully assembled structure includes terminal ribs 715, 720 disposed in terminal channels 731a, 731b in a tight (light) manner and connecting ribs 716, 721 disposed in rib channels 732a, 732b, such that the assembled signal wafer pairs 662, 664 and ground wafers 661, 663, 665 form a rigid assembly. The rigidity of the assembly may assist in distributing forces on the assembly during press-fitting of the assembly onto a circuit board.

Various alternative configurations are contemplated. For example, referring to fig. 57, ground couplings such as projections 735, 738, 739 between ground wafers 661, 663, 665 could have other configurations including a small number of rectangular projections 745 and a large number of cylindrical posts 746 and complementary shaped mating structures on the aligned ground wafers 661, 663, 665. Additionally, in some embodiments, all of the ground couplings may not be in a plated or direct electrical connection with an adjacent ground wafer.

Further, rather than forming metalized plastic ground wafers 661, 663, 665 and inserting metal contact inserts 668 and metal tail inserts 669, the ground wafers may be formed in other ways, such as by stamping the contact and tail portions as part of a guide frame assembly and then forming a metalized plastic structure around the guide frame including the contact and tail portions. In other words, an alternative form of ground wafer may employ a ground wafer formation (i.e., a lead frame with contact and tail portions) similar to that shown at 271 in fig. 18 but incorporating ground couplings between wafers that extend through the signal wafer pairs. The alternative ground wafer including the ground coupling may be formed of a metalized plastic that is then electrically connected to a guide frame within the wafer.

Also, in another embodiment, a structure may be formed, such as from a metalized plastic, including protrusions 735, 738, 739, wherein such structure is then connected to a conductive ground plate having contact portions and tail portions. Even further, the signal terminals may be edge coupled rather than broadside coupled. In one example, the terminals of each differential pair may be located in separate signal wafers or pads and edge coupled so that they are horizontally aligned and located between a pair of ground wafers. In another example, the terminals of each differential pair may be edge coupled and vertically aligned in a pedestal located between a pair of ground wafers.

In a further aspect, ground wafers 661, 663, 665 can be configured to enhance shielding and further electrical isolation between front and rear contact rows 641, 642 within card slots 750, 751. More specifically, referring to fig. 58-59, ground wafers 661, 663, 665 further include projections that extend laterally within upper and lower card slots 750, 751. The left ground wafer 661 includes a protrusion 755 extending laterally from the second side 661b toward the middle wafer 663 and toward a horizontal centerline of the grooves 750, 751.

The intermediate ground wafer 663 includes projections 756 extending laterally within the grooves 750, 751 from the first side 663a toward the left ground wafer 661 and toward a horizontal centerline of the grooves. Intermediate ground engaging wafer 663 further includes projections 757 extending transversely within grooves 750, 751 from second side 663b toward right ground engaging wafer 665 and toward a horizontal centerline of the grooves. Right ground wafer 665 includes a projection 758 (fig. 44) within grooves 750, 751 extending transversely from second side 665b toward center wafer 663 and toward a horizontal centerline of the grooves. The protrusions 755-58 enhance shielding and further electrical isolation between the front contact row 641 and the rear contact row 642 within the card slots 750, 751. In one embodiment, pairs of protrusions (e.g., 755, 756 and 757, 758) may be mechanically or electrically connected to each other to further enhance shielding and isolation functions.

The disclosure provided herein illustrates features by way of preferred and exemplary embodiments thereof. Numerous other embodiments, modifications and variations within the scope and spirit of the appended claims will occur to persons of ordinary skill in the art from a reading of this disclosure.