阅读说明：本技术 一种宽带低噪声高功率容限的准环形器 (Quasi-circulator with broadband, low noise and high power tolerance ) 是由 陈文� 舒一洋 邓至贤 钱慧珍 罗讯 于 2020-05-13 设计创作，主要内容包括：本申请公开了一种宽带低噪声高功率容限的准环形器,宽带180°混合网络的求和端口与准环形器的发射端电连接,求差端口与准环形器的接收端电连接,第一输入端口与双向同相级电路的第一端电连接,第二输入端口与非互易反相级电路的第一端电连接,双向同相级电路的第二端和非互易反相级电路的第二端均与天线电连接,阻抗平衡电阻的第一端分别与非互易反相级电路第一端与第二输入端口电连接,第二端接地。利用双向同相级和非互易反相级电路结合宽带180°混合网络和阻抗平衡电阻实现准环形器。不仅实现了天线端到发射端的反向隔离,还实现了接收路径无基本的3-dB路径损耗,进而在较宽频率范围内高的发射端功率容限和低的接收端噪声系数。(The application discloses quasi-circulator of broadband low noise high power tolerance, the port of summing of the 180 mixed network of broadband is connected with quasi-circulator's transmitting terminal electricity, the port of seeking difference is connected with quasi-circulator's receiving terminal electricity, first input port is connected with the first end electricity of two-way homophase class circuit, the second input port is connected with the first end electricity of non-reciprocal inverter class circuit, the second end of two-way homophase class circuit and the second end of non-reciprocal inverter class circuit all are connected with the antenna electricity, the first end of impedance balance resistance is connected with the second input port electricity with non-reciprocal inverter class circuit first end respectively, the second end ground connection. The quasi-circulator is realized by combining a broadband 180-degree hybrid network and an impedance balancing resistor by utilizing bidirectional in-phase stage and non-reciprocal anti-phase stage circuits. The reverse isolation from the antenna end to the transmitting end is realized, the no basic 3-dB path loss of a receiving path is realized, and the high power tolerance of the transmitting end and the low noise coefficient of the receiving end in a wide frequency range are realized.)

1. A wideband low noise high power tolerant quasi-circulator, comprising: the broadband 180-degree hybrid network is provided with a summing port, a difference port, a first input port and a second input port, the summing port is electrically connected with a transmitting end of a quasi-circulator, the difference port is electrically connected with a receiving end of the quasi-circulator, the first input port is electrically connected with a first end of the bidirectional in-phase circuit, the second input port is electrically connected with a first end of the non-reciprocal phase-reversal circuit, both the second end of the bidirectional in-phase circuit and the second end of the non-reciprocal phase-reversal circuit are electrically connected with an antenna, an impedance balancing resistor is arranged between the first end of the non-reciprocal phase-reversal circuit and the second input port, and the first end of the impedance balancing resistor is respectively electrically connected with the first end of the non-reciprocal phase-reversal circuit and the second input port, the second end of the impedance balancing resistor is grounded.

2. The wideband low noise high power tolerant quasi-circulator of claim 1 wherein said quasi-circulator is configured with an external power supply for providing additional energy to low energy signals when said distributed signals received by said bi-directional non-inverting stage and non-reciprocal inverting stage are not equal.

3. The wideband low-noise high-power tolerant quasi-circulator of claim 1 wherein said wideband 180 ° hybrid network is a multi-layer microstrip-slotline coupled wideband 180 ° hybrid network, with a common-gate stage as a bi-directional in-phase stage and a common-source stage as a non-reciprocal inverter stage.

4. The wideband low noise high power tolerant quasi-circulator of claim 3 wherein said summing port, said first input port and said second input port are located at a top layer of the structure, said differencing port is located at a bottom layer of the structure, a ground layer is located between the top layer and the bottom layer, and slot lines are etched on said ground layer in a wideband 180 ° hybrid network of said multi-layer microstrip-slot line coupled structure.

5. A wideband, low noise, high power tolerant quasi-circulator as claimed in claim 3, the common-gate circuit comprises a first capacitor, a second capacitor, a first resistor, a second resistor, a first inductor, a second inductor and a first MOS (metal oxide semiconductor) transistor, the first end of the first capacitor is electrically connected with the antenna, the second end of the first capacitor is respectively electrically connected with the first end of the first inductor and the source electrode of the first MOS tube, the second end of the first inductor is grounded, the grid electrode of the first MOS tube is electrically connected with the first end of the first resistor, the second end of the first resistor is electrically connected with a first internal power supply, the drain electrode of the first MOS tube is respectively grounded with the first end of the second inductor and the first end of the second capacitor, and the second end of the second capacitor is electrically connected with the first input port, and the two ends of the second resistor are respectively electrically connected with the second end of the second inductor and a second internal power supply.

6. The wideband low noise high power tolerant quasi-circulator of claim 3 wherein said common source stage circuit comprises: the antenna comprises a third capacitor, a fourth capacitor, a third resistor, a fourth resistor, a second MOS (metal oxide semiconductor) tube and a third inductor, wherein the first end of the third capacitor is electrically connected with an antenna, the second end of the third capacitor is respectively electrically connected with the first end of the third resistor and the grid electrode of the second MOS tube, the second end of the third resistor is electrically connected with a third internal power supply, the source electrode of the second MOS tube is electrically connected with the first end of the fourth resistor, and the second end of the fourth resistor is grounded; the drain electrode of the second MOS tube is electrically connected with the first end of the third inductor and the first end of the fourth capacitor respectively, the second end of the third inductor is electrically connected with a fourth internal power supply, and the second end of the fourth capacitor is electrically connected with the second input port.

7. The wideband low noise high power tolerant quasi-circulator of claim 5 or 6 wherein said MOS transistor is an NMOS transistor or a PMOS transistor.

8. The wideband low noise high power tolerant quasi-circulator of claim 7 wherein said differencing port is provided with a fifth capacitor, a first terminal of said fifth capacitor being electrically connected to said differencing port and a second terminal of said fifth capacitor being connected to ground.

9. A wideband low noise high power tolerant quasi-circulator as claimed in claim 5 or claim 6 wherein the resistor and capacitor in the circuit are variable resistors and variable capacitors.

10. The wideband low noise high power tolerant quasi-circulator of claim 1 wherein said impedance balancing resistor is a variable resistor.

Technical Field

The application relates to the technical field of quasi-circulators, in particular to a quasi-circulator with a broadband, low noise and high power tolerance.

Background

With the ever-increasing demand for high data rates in modern wireless communications, there has been a strong demand and development in recent years for wireless channels having large capacity, along with a need to improve the spectral utilization of the channels. Among the various techniques to improve spectrum utilization, full duplex systems have been introduced to double the spectrum efficiency. Such a full duplex system may allow the Transmitter (TX) and Receiver (RX) to operate simultaneously at the same frequency, as opposed to frequency division duplex or time division duplex. One of the key challenges of a full-duplex transceiver is that a signal transmitted from a transmitter can be received by its own receiver, which can cause self-interference. To avoid this self-interference, there should be a high degree of isolation between the transmitter output and the receiver baseband.

A microwave circulator or quasi-circulator is a three-port device that allows only unidirectional ring transmission of signals between its three ports. The quasi-circulator is used as a core component widely used in a full-duplex system, has the function of connecting and isolating a transmitting system and a receiving system, enables signal transmission and signal reception to share one antenna, and greatly saves the size and cost of the system. The performance of the quasi-circulator directly affects the quality of the whole transceiving system, and the quasi-circulator is widely applied to radio frequency front ends, unidirectional amplifiers and unidirectional phase shifters as the most common devices. The quasi-circulator is applied to a full-duplex transceiving system, and the key is to realize high isolation between a transmitting port and a receiving port and realize that a transmitting channel and a receiving channel respectively complete the functions without mutual influence. Meanwhile, the low-insertion-loss broadband high-power-consumption broadband_1dB) Etc. still determine the excellent operating performance of the system.

As shown in fig. 1, a device is provided withAn active quasi-circulator circuit with high transmit-receive isolation. The structure realizes the one-way function of the quasi-circulator by utilizing the non-reciprocity of the transistor, realizes the isolation of the transmitting end and the receiving end of the quasi-circulator by combining the phase cancellation principle, and realizes the adjustability of the working center frequency by utilizing the variable capacitor. This structure can achieve high isolation of the transmission port and the reception port in a wide frequency band. But this structure has a relatively high return loss and a large noise figure at the receiving end due to excessive use of transistors and limits the power margin at its transmitting end, i.e. the 1dB compression point (P), due to the reverse isolation of the antenna end from the transmitting end achieved by the power amplifier stage_1dB) Quasi-circulator circuit (fig. 3) including quasi-circulator circuit based on passive L range coupler and amplifier (fig. 2), isolator and passive power divider, but this combined quasi-circulator has substantial 3-dB path loss introduced by passive devices, also makes the noise figure of the receive path large, and the operating frequency range needs to be further expanded.

Therefore, how to achieve low noise figure at the receiving end and high power margin at the transmitting end of the quasi-circulator in a wide operating frequency range is a technical problem to be solved in the field.

Disclosure of Invention

In order to solve the technical problems, the following technical scheme is provided:

in a first aspect, an embodiment of the present application provides a wideband low-noise high-power tolerant quasi-circulator, including: the broadband 180-degree hybrid network is provided with a summing port, a difference port, a first input port and a second input port, the summing port is electrically connected with a transmitting end of a quasi-circulator, the difference port is electrically connected with a receiving end of the quasi-circulator, the first input port is electrically connected with a first end of the bidirectional in-phase circuit, the second input port is electrically connected with a first end of the non-reciprocal phase-reversal circuit, both the second end of the bidirectional in-phase circuit and the second end of the non-reciprocal phase-reversal circuit are electrically connected with an antenna, an impedance balancing resistor is arranged between the first end of the non-reciprocal phase-reversal circuit and the second input port, and the first end of the impedance balancing resistor is respectively electrically connected with the first end of the non-reciprocal phase-reversal circuit and the second input port, the second end of the impedance balancing resistor is grounded.

By adopting the implementation mode, the framework of the quasi-circulator is realized by combining the bidirectional in-phase stage circuit and the nonreciprocal inverter stage circuit with the broadband 180-degree hybrid network and the impedance balancing resistor. The reverse isolation from the antenna end to the transmitting end is realized, the no basic 3-dB path loss of a receiving path is realized, and the high power tolerance of the transmitting end and the low noise coefficient of the receiving end in a wide frequency range are realized.

With reference to the first aspect, in a first possible implementation manner of the first aspect, the quasi-circulator is provided with an external power supply, where the external power supply is configured to provide additional energy for a low-energy signal when the distributed signals received by the bidirectional non-reciprocal stage circuit and the bidirectional non-reciprocal stage circuit are not equal to each other.

With reference to the first aspect, in a second possible implementation manner of the first aspect, the broadband 180 ° hybrid network is a broadband 180 ° hybrid network with a multilayer microstrip-slot line coupling structure, the common-gate stage circuit is used as a bidirectional in-phase stage circuit, and the common-source stage circuit is used as a non-reciprocal inverter stage circuit.

With reference to the second possible implementation manner of the first aspect, in a third possible implementation manner of the first aspect, in the broadband 180 ° hybrid network of the multilayer microstrip-slot line coupling structure, the summing port, the first input port, and the second input port are located at a top layer of the structure, the difference port is located at a bottom layer of the structure, a ground layer is located between the top layer and the bottom layer, and a slot line is etched on the ground layer.

With reference to the second possible implementation manner of the first aspect, in a fourth possible implementation manner of the first aspect, the common-gate circuit comprises a first capacitor, a second capacitor, a first resistor, a second resistor, a first inductor, a second inductor and a first MOS (metal oxide semiconductor) transistor, the first end of the first capacitor is electrically connected with the antenna, the second end of the first capacitor is respectively electrically connected with the first end of the first inductor and the source electrode of the first MOS tube, the second end of the first inductor is grounded, the grid electrode of the first MOS tube is electrically connected with the first end of the first resistor, the second end of the first resistor is electrically connected with a first internal power supply, the drain electrode of the first MOS tube is respectively grounded with the first end of the second inductor and the first end of the second capacitor, and the second end of the second capacitor is electrically connected with the first input port, and the two ends of the second resistor are respectively electrically connected with the second end of the second inductor and a second internal power supply.

With reference to the second possible implementation manner of the first aspect, in a fifth possible implementation manner of the first aspect, the common-source stage circuit includes: the antenna comprises a third capacitor, a fourth capacitor, a third resistor, a fourth resistor, a second MOS (metal oxide semiconductor) tube and a third inductor, wherein the first end of the third capacitor is electrically connected with an antenna, the second end of the third capacitor is respectively electrically connected with the first end of the third resistor and the grid electrode of the second MOS tube, the second end of the third resistor is electrically connected with a third internal power supply, the source electrode of the second MOS tube is electrically connected with the first end of the fourth resistor, and the second end of the fourth resistor is grounded; the drain electrode of the second MOS tube is electrically connected with the first end of the third inductor and the first end of the fourth capacitor respectively, the second end of the third inductor is electrically connected with a fourth internal power supply, and the second end of the fourth capacitor is electrically connected with the second input port.

With reference to the fourth or fifth possible implementation manner of the first aspect, in a sixth possible implementation manner of the first aspect, the MOS transistor is an NMOS transistor or a PMOS transistor.

With reference to the sixth possible implementation manner of the first aspect, in a seventh possible implementation manner of the first aspect, the difference port is provided with a fifth capacitor, a first end of the fifth capacitor is electrically connected to the difference port, and a second end of the fifth capacitor is grounded.

With reference to the fourth or fifth possible implementation manner of the first aspect, in an eighth possible implementation manner of the first aspect, the resistor in the circuit is a variable resistor, and the capacitor is a variable capacitor.

With reference to the first aspect, in a ninth possible implementation manner of the first aspect, the impedance balancing resistor is a variable resistor.

Drawings

FIG. 1 is a schematic diagram of an active quasi-circulator circuit in the prior art;

FIG. 2 is a diagram of a quasi-circulator structure using L ange coupler and amplifier in the prior art;

FIG. 3 is a schematic diagram of a quasi-circulator structure using an isolator and a power divider in the prior art;

FIG. 4 is a schematic diagram of a frame of a quasi-circulator provided in an embodiment of the present application;

fig. 5 is a schematic diagram of a received signal voltage transmission of a quasi-circulator according to an embodiment of the present application;

fig. 6 is a schematic diagram of received signal energy transmission of a quasi-circulator provided in an embodiment of the present application;

fig. 7 is a schematic diagram of a broadband 180 ° hybrid network according to an embodiment of the present application;

fig. 8 is a schematic circuit diagram of a quasi-circulator according to an embodiment of the present disclosure;

fig. 9 is a schematic diagram illustrating a common source connection method in a circuit structure of a quasi-circulator according to an embodiment of the present application;

fig. 10 is a diagram illustrating simulation results of a quasi-circulator circuit according to an embodiment of the present application.

Detailed Description

The present embodiment is described below with reference to the accompanying drawings and the detailed description.

Fig. 4 is a schematic diagram of a frame of a quasi-circulator provided in an embodiment of the present application, and referring to fig. 4, the quasi-circulator provided in the embodiment of the present application includes: the bidirectional non-reciprocal inverter circuit comprises a bidirectional in-phase stage circuit, a non-reciprocal inverter stage circuit and a broadband 180-degree hybrid network.

The broadband 180 DEG hybrid network is provided with a summing port, a differencing port, a first input port and a second input port, the summation port is electrically connected with the transmitting end of the quasi-annular device, the difference port is electrically connected with the receiving end of the quasi-annular device, the first input port is electrically connected with the first end of the bidirectional non-reciprocal inverter stage circuit, the second input port is electrically connected with the first end of the non-reciprocal inverter stage circuit, the second end of the bidirectional non-reciprocal inverter stage circuit and the second end of the bidirectional non-reciprocal inverter stage circuit are both electrically connected with an antenna, an impedance balance resistor is arranged between the first end of the nonreciprocal inverter circuit and the second input port, the first end of the impedance balancing resistor is electrically connected with the first end of the non-reciprocal inverter circuit and the second input port respectively, and the second end of the impedance balancing resistor is grounded. The bidirectional in-phase stage circuit has the characteristic of enabling signals to be transmitted in two directions without changing the phase of the signals, and similarly, the nonreciprocal inverting stage circuit enables the signals to be transmitted in one direction and inverted in phase, and the signals are transmitted in the reverse direction and are in a high-resistance state.

A broadband 180 ° hybrid network in the quasi-circulator is used to achieve broadband isolation between the quasi-circulator transmit-receive ports. The summing port (1) of the 180-degree hybrid network is connected with the transmitting end of the quasi-circulator, and the difference port (4) is connected with the receiving end of the quasi-circulator. The bidirectional in-phase stage circuit and the nonreciprocal inverter stage circuit are respectively connected with the antenna terminal and a first input port (2) and a second input port (3) of the broadband 180-degree hybrid network through appropriate matching circuits. In addition, the resistance balance resistance R₀And the non-reciprocal inverting stage is connected with the 180-degree hybrid network to adjust the isolation between the transceiver ports of the quasi-ring transceiver.

The bidirectional in-phase stage and the non-reciprocal anti-phase stage are connected to the 180-degree hybrid network in a matching mode, and therefore unidirectional isolation from the antenna end to the transmitting end can be achieved. As shown in FIG. 5, the signal in the receive path is at each critical node (i.e., N)₁，N₂，N₃，N₄，N₅And N₆) A voltage diagram of (a) is depicted. The signal from the antenna (port 2) is split into two paths, defined as receive path 1 and receive path 2, respectivelyPath 2 is received.

For receive path 1, at N, due to the inherent characteristics of the bi-directional non-inverting stage circuit₁And N₂At this point, the received signals are in phase. In contrast, due to the signal inversion characteristic of the non-reciprocal inverting stage, the received signal is phase-inverted at the output of the inverting stage in the receive path 2, i.e. at N₄And N₅The phases of the received signals are opposite. Thus, at the output node N₂And N₅At this point, the received signal is inverted. By proper impedance matching of the bi-directional in-phase stage and the non-reciprocal anti-phase stage, N is guaranteed₂And N₅The signal amplitude at (a) remains the same within the operating band, i.e. the final signal is differential-mode at the output of the two stages.

Then, since the sum of the signals entering from the first input port (2) and the second input port (3) of the 180 ° hybrid network will be formed at the summing port (1) and the difference thereof at the difference port (4), finally the sum of the differential mode signals is formed at the summing port (1) and the difference of the differential mode signals is formed at the difference port (4). Thus, the signal from the antenna port is cancelled at the transmit port, i.e. a unidirectional antenna end to transmit end isolation is achieved. Since an amplification stage is not introduced in the transmission path to realize reverse isolation, P of the transmission end_1dBWithout being limited in theory, this solves the problem of low transmit-side power tolerance.

Fig. 6 shows a signal energy transmission diagram of the quasi-circulator receiving path. Schematic diagrams of signal energy in the receive path at key nodes N1, N2, N3, N4, N5 and N6 are depicted, P_RX,1、P_RX,2、P_RX,3、P_RX,4、P_RX,5、P_RX,6. To achieve unidirectional isolation (P) from quasi-circulator antenna end to transmitting end_RX,30), it is necessary to make the node N₂And N₅Of the same received signal energy (i.e., P)_RX,2＝P_RX,5)。

Gain (P) of a non-reciprocal inverter stage by using an external power supply to provide additional energy_A) The energy of the receiving path 1 is greater than the receiving path at the combined antenna endEnergy (P) of path 2_RX,1>P_RX,4) Design of energy distribution of (1), satisfy P_RX,1×P_T＝P_RX,4×P_AThe design requirement of (3) can realize the unidirectional isolation between the antenna end and the transmitting end of the quasi-circulator, and simultaneously realize the inherent path loss smaller than 3dB in the receiving path, thereby obtaining better receiving channel performance. Therefore, the problems of large loss of a receiving path and high noise coefficient in the traditional technology are solved.

In addition, the impedance balance resistor R₀The quasi-ring oscillator is used for adjusting the isolation between the transceiving ports of the quasi-ring oscillator, because the impedance of the bidirectional in-phase stage and the non-reciprocal anti-phase stage in the structure has the non-linear characteristic which changes along with the frequency change, so that R can be used for obtaining high isolation between the transmitting end and the receiving end of the quasi-ring oscillator in a wider frequency range₀The adjustable resistor is designed to meet good application under different frequencies.

Referring to fig. 7, in the embodiment of the present application, a multilayer microstrip-slot line coupling structure is adopted to implement a broadband 180 ° hybrid network, a common-gate stage circuit is used as a bidirectional in-phase stage circuit, and a common-source stage circuit is used as a non-reciprocal inverter stage circuit. Another advantage of using the common-gate and common-source circuits is that noise cancellation of the common-gate transistor is implemented at the receiving end of the quasi-circulator by using a noise cancellation technique, so that the noise coefficient of the receiving end is further reduced, and the quality of the received signal is improved.

The common gate-common source stage is connected to the 180-degree hybrid network, so that noise introduced by a common gate stage transistor in a receiving path can be eliminated when reverse isolation from an antenna end to a transmitting end is realized. For receive path 1, at N, due to the inherent nature of the common-gate topology₁And N₂At this point, the noise generated by the common gate transistor is inverted. On the contrary, due to the signal inversion characteristic of the common-source transistor, the noise of the common-gate stage is inverted at the output of the common-source stage in the receive path 2, i.e. at N₄And N₅Here, the noise phases of the common gate transistors are opposite. Thus, at the output port node N of the common-gate-common-source stage₂And N₅The common gate induced noise is in phase. By means of a pair of common gatesThe common source stage is properly impedance matched to ensure N₂And N₅The signal amplitude remains the same in the operating band, i.e. the common gate generated noise is common mode.

Then, since the sum of the signals entering from the first input port (2) and the second input port (3) of the 180 ° hybrid network will form at the summing port (1) and the difference at the difference port (4), finally a difference in common mode noise is formed at the difference port (4). Therefore, the noise introduced by the common gate and the signal from the antenna port are cancelled at the second input port (3) (receiving port) and the summing port (1) (transmitting port), respectively, i.e. a low receiving end NF and a unidirectional isolation of the antenna to the transmitting end are achieved at the same time.

The broadband 180 hybrid network in the embodiment shown in fig. 7 can be viewed as a splitter or combiner with out-of-phase and in-phase functionality. The summing port (1), the first input port (2) and the second input port (3) are positioned on the top layer, the difference port (4) is positioned on the bottom layer and is all of a microstrip type, the middle layer is a ground, and a slot line is etched on the ground. When operating in an out-of-phase distribution situation, a signal is transmitted at the differencing port (4) of the microstrip and coupled to the slotline in the ground plane by using microstrip to slotline conversion. The signal then propagates along the slot line until it is coupled to the microstrip line between the first input port (2) and the second input port (3) using another slot-to-microstrip transition. Because the current at the upper end and the lower end of the slot line are opposite in direction, the signals reach the first input port (2) and the second input port (3) with the same amplitude and opposite phases. In the case of co-division, the signal comes from the summing port (1), and since it is split into two identical paths at the T-junction, the divided signals at the first input port (2) and the second input port (3) are all identical signals in amplitude and phase. Similarly, when the 180 ° hybrid network is used as a combiner, signals enter from the first input port (2) and the second input port (3), and the two signals are subtracted at the difference port (4) and added at the summation port (1).

Fig. 8 is a schematic circuit diagram of a quasi-circulator according to an embodiment of the present disclosure. Wherein the two-way same-phase stage adoptsThe gate transistor circuit is implemented and the matching circuit is designed to obtain good antenna port matching and less loss of the transmission path. The nonreciprocal reverse stage is realized by adopting a common-source stage transistor circuit with source negative feedback, and the optimization of a matching circuit is to obtain excellent noise performance of a receiving path and realize the reverse isolation from an antenna end to a transmitting end. Can balance the resistance R by adjusting the impedance₀Resulting in a higher isolation between the quasi-circulator transmit-receive ports.

Further, the common-gate stage circuit includes a first capacitor C1, a second capacitor C2, a first resistor R1, a second resistor R2, a first inductor L1, a second inductor L2, and a first MOS transistor M1, a first end of the first capacitor C1 is electrically connected to the antenna, a second end of the first capacitor C1 is electrically connected to the first end of the first inductor L1 and the source of the first MOS transistor M1, a second end of the first inductor L1 is grounded, a gate of the first MOS transistor M1 is electrically connected to the first end of the first resistor R1, and a second end of the first resistor R1 is electrically connected to a first internal power source V1_G1The drain of the first MOS transistor M1 is grounded to the first end of the second inductor L2 and the first end of the second capacitor C2, respectively, the second end of the second capacitor C2 is electrically connected to the first input port (2), and two ends of the second resistor R2 are electrically connected to the second end of the second inductor L2 and the second internal power supply V, respectively_D1And (6) electrically connecting.

The common-source stage circuit comprises a third capacitor C3, a fourth capacitor C4, a third resistor R3, a fourth resistor R4, a second MOS transistor M2 and a third inductor L3, wherein a first end of the third capacitor C3 is electrically connected with an antenna, a second end of the third capacitor C3 is electrically connected with a first end of the third resistor R3 and a grid electrode of the second MOS transistor M2 respectively, and a second end of the third resistor R3 is electrically connected with a third internal power supply V_G2The source of the second MOS transistor M2 is electrically connected with the first end of the fourth resistor R4, the second end of the fourth resistor R4 is grounded, the drain of the second MOS transistor M2 is electrically connected with the first end of the third inductor L3 and the first end of the fourth capacitor C4, respectively, the second end of the third inductor L3 is electrically connected with a fourth internal power supply V_D2Electrical connection, the fourth electricalThe second end of the capacitor C4 is electrically connected to the second input port (3).

The difference port is provided with a fifth capacitor C5, a first end of the fifth capacitor C5 is electrically connected with the difference port (4), and a second end of the fifth capacitor C5 is grounded.

In the embodiment of the present application, the MOS transistor in the quasi-circulator framework may be an NMOS transistor or a PMOS transistor, the common source connection may be the connection method shown in fig. 9, and different matching circuits are required for different connection methods, so that different effects are also produced. The resistor can be designed into a variable resistor, the capacitor can be designed into a variable capacitor, and the broadband 180-degree mixed junction can be designed to be composed of adjustable microstrip lines.

Fig. 10 shows the simulation result of important parameters of the quasi-circulator circuit according to an embodiment of the present application. And (3) designing an S parameter and noise coefficient simulation result diagram of the broadband quasi-circulator. The working bandwidth is 1.66-2.76 GHz, and the relative working frequency range is 48.6%. In-band transmit-receive port isolation (S) for quasi-circulator₃₁) Is-17.7 to-20.2 dB, and the insertion loss (S) of a transmitting channel₂₁) Is-3.5 to-4.7 dB, and the insertion loss (S) of the receiving channel₃₂) Is-0.8 to-1.4 dB, and the reverse isolation (S) from the antenna to the transmitting end₁₂) Is-10.3 to-12.7 dB, and the Noise Factor (NF) of the receiving end is 3.0 to 3.3 dB. Note that the operating bandwidth is defined here as the return loss of each port being less than-10 dB. From the large signal response simulation result chart of the wide-band quasi-circulator, the 1dB compression point (IP) input at the transmitting end of the quasi-circulator is seen_1dB) Much greater than 30dBm, here IP_1dBAnd taking the corresponding input power when the output power is 1dB lower than the linear output power. Simulation results show the noise coefficient and P of the broadband quasi-circulator of the design in the bandwidth and the in-band_1dBHas certain advantages in performance, and alleviates the defects of the prior art in the aspects of the performance.

From the foregoing embodiments, the wideband low-noise high-power tolerant quasi-circulator provided by the embodiments of the present application utilizes bidirectional non-reciprocal inverting stage and non-reciprocal inverting stage circuits in combination with a wideband 180 ° hybrid network and an impedance balancing resistor R₀Architecture of a quasi-circulator is implemented. Not only realize the antenna end toReverse isolation of the transmitting end also achieves no basic 3-dB path loss of the receiving path, and further achieves high transmitting end power tolerance and low receiving end noise coefficient in a wide frequency range.

It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

Of course, the above description is not limited to the above examples, and technical features that are not described in this application may be implemented by or using the prior art, and are not described herein again; the above embodiments and drawings are only for illustrating the technical solutions of the present application and not for limiting the present application, and the present application is only described in detail with reference to the preferred embodiments instead, it should be understood by those skilled in the art that changes, modifications, additions or substitutions within the spirit and scope of the present application may be made by those skilled in the art without departing from the spirit of the present application, and the scope of the claims of the present application should also be covered.