Reconfigurable series-parallel type switched capacitor voltage converter with high conversion efficiency

文档序号:1326297 发布日期:2020-07-14 浏览:8次 中文

阅读说明:本技术 高转换效率的可重构串联-并联型开关电容电压变换器 (Reconfigurable series-parallel type switched capacitor voltage converter with high conversion efficiency ) 是由 马俊 卞坚坚 于 2020-05-15 设计创作,主要内容包括:高转换效率的可重构串联-并联型开关电容电压变换器,包括N-1个控制单元,能够实现第二变换端和第一变换端的电压转换比为1:1至N:1。当可重构串联-并联型开关电容电压变换器中第一变换端和第二变换端的电压转换比为Nx:1时,将N-1个控制单元分为k+1组控制模块,设置k个控制开关管分别对应前k组控制模块,前k组控制模块中每组包含m个控制单元,最后一组控制模块包含t个控制单元,m=Nx-1,k和t满足N-1=m×k+t,且k和m同时为0或同时为正整数,t取尽可能小。本发明最大限度地利用了电路中的每个器件,具有高电压转换效率和低热损耗;另外提出将本发明的电荷泵进行相关级联、并联的使用方案,增加了设计的灵活性,提升了电荷泵的电流性能。(The reconfigurable series-parallel type switched capacitor voltage converter with high conversion efficiency comprises N-1 control units, wherein the voltage conversion ratio of a second conversion end to a first conversion end can be 1:1 to N:1, when the voltage conversion ratio of the first conversion end to the second conversion end in the reconfigurable series-parallel type switched capacitor voltage converter is Nx:1, the N-1 control units are divided into k +1 groups of control modules, k control switch tubes are respectively arranged to correspond to k groups of control modules, each group in the k groups of control modules comprises m control units, the last group of control modules comprises t control units, m is Nx-1, k and t meet the condition that N-1 is m × k + t, and k and m are both 0 or both positive integers, t is as small as possible.)

1. The reconfigurable series-parallel type switched capacitor voltage converter with high conversion efficiency comprises N-1 control units and a control switch tube, wherein N is a positive integer greater than 1;

the jth control unit comprises a capacitor, a first NMOS tube, a second NMOS tube and a third NMOS tube, j is a positive integer and j ∈ [1, N-1 ];

the drain electrode of the first NMOS tube is connected with one end of a capacitor and serves as the input end of the jth control unit, and the source electrode of the first NMOS tube is connected with the first conversion end of the reconfigurable series-parallel type switch capacitor voltage converter;

the drain electrode of the second NMOS tube is connected with the input end of the (j +1) th control unit, the source electrode of the second NMOS tube is connected with the drain electrode of the third NMOS tube and the other end of the capacitor, and the source electrode of the third NMOS tube is connected with the reference ground;

the drain electrode of a second NMOS tube in the N-1 th control unit is connected with a first conversion end of the reconfigurable series-parallel type switch capacitor voltage converter;

the method is characterized in that the N-1 control units are divided into k +1 groups of control modules, k is a positive integer not greater than N-1, each group in the front k groups of control modules comprises m control units, the last group of control modules comprises t control units, and k, m and t are non-negative integers;

the reconfigurable series-parallel type switch capacitor voltage converter further comprises k-1 control switch tubes, wherein the k control switch tubes are respectively corresponding to the front k groups of control modules, the drain electrode of the ith control switch tube is connected with the second conversion end of the reconfigurable series-parallel type switch capacitor voltage converter, the source electrode of the ith control switch tube is connected with the input end of the first control unit in the corresponding ith group of control modules, i is a positive integer and i ∈ [1, M ];

the grid electrode of the ith control switch tube and the grid electrode of the second NMOS tube in the corresponding ith control module are connected with the clock signal of the ith control module, and the grid electrodes of the first NMOS tube and the third NMOS tube in the ith control module are connected with the inverted signal of the clock signal of the ith control module;

the clock signal of the ith group of control modules is in reverse phase with the clock signal of the (i +1) th group of control modules, and the clock signal of the 1 st group of control modules is the clock signal of the series-parallel type switched capacitor voltage converter;

the grid electrode of the second NMOS tube in the last group of control modules is connected with a low level, and the grid electrodes of the first NMOS tube and the third NMOS tube in the last group of control modules are connected with a high level;

the reconfigurable series-parallel type switched capacitor voltage converter can achieve the voltage conversion ratio of the second conversion end to the first conversion end to be 1:1 to N:1, when the voltage conversion ratio of the first conversion end to the second conversion end in the reconfigurable series-parallel type switched capacitor voltage converter is Nx:1, Nx is a positive integer and Nx ∈ [1, N ], m is Nx-1, k and t meet the requirement that N-1 is m × k + t, k and m are both 0 or both positive integers, and t is taken as small as possible.

2. The reconfigurable series-parallel type switched capacitor voltage converter with high conversion efficiency according to claim 1, wherein P reconfigurable series-parallel type switched capacitor voltage converters are cascaded to form a cascaded total switched capacitor voltage converter, P is a positive integer larger than 1, each cascaded reconfigurable series-parallel type switched capacitor voltage converter is used as a sub-switched capacitor voltage converter, the input end of the P-th sub-switched capacitor voltage converter is connected with the output end of the P-1-th sub-charge pump, the input end of the 1-th sub-switched capacitor voltage converter is used as the input end of the cascaded total switched capacitor voltage converter, the output end of the P-th sub-switched capacitor voltage converter is used as the output end of the cascaded total switched capacitor voltage converter, P is a positive integer and P ∈ [1, P ];

the p-th sub-switched capacitor voltage converter comprises Np1 control unit, NpThe conversion ratio of the output end and the input end of the p-th sub-switched capacitor voltage converter is a positive integer larger than 1Lp∈[1,Np](ii) a When the p-th sub-switched capacitor voltage converter takes the first conversion end as the input end and the second conversion end as the output end, ap1, when the p-th sub-switched capacitor voltage converter has the second conversion terminal as the input terminal and the first conversion terminal as the output terminal, apThe voltage conversion ratio of the output end to the input end of the cascaded total switched capacitor voltage converter is L: 1,

3. the high-conversion-efficiency reconfigurable series-parallel type switched capacitor voltage converter according to claim 2, wherein Q number of first switched capacitor voltage converters having the same voltage conversion ratio are used in parallel, the clock signals of two adjacent first switched capacitor voltage converters are different in phase by 360 °/Q, and each first switched capacitor voltage converter can selectively employ the reconfigurable series-parallel type switched capacitor voltage converter or the cascade total switched capacitor voltage converter.

4. The high conversion efficiency reconfigurable series-parallel type switched capacitor voltage converter according to any one of claims 1 to 3, wherein the clock signal of the series-parallel type switched capacitor voltage converter is a square wave signal with a 50% duty cycle.

Technical Field

The invention belongs to the technical field of power supply systems, and relates to a reconfigurable series-parallel type switched capacitor voltage converter with high conversion efficiency.

Background

With the construction of data centers and the popularization of consumer electronics rapid charging, the energy density of voltage converters is continuously improved, and higher energy density inevitably requires higher conversion efficiency. In these new fields of application, conventional charge pump topologies are widely used. The charge pump is a switched capacitor voltage converter, and compared with other voltage converter topologies, the charge pump is mainly characterized by only a capacitive energy storage device and not an inductive energy storage device. Also because of this feature, two advantages are obtained for the charge pump: firstly, without a magnetic energy storage device, the charge pump can instantly reduce the current to zero, so that the charge pump is naturally a soft switch, and the switching loss of the charge pump is remarkably reduced; secondly, also because there is no magnetic energy storage device, the charge pump also has no conduction heat loss introduced by the magnetic energy storage device. For the above two reasons, the charge pump can achieve higher conversion efficiency.

Fig. 1 is a conventional 2:1 series-parallel type charge pump, four power transistors Q1-Q4 are alternately turned on at a 50% duty cycle, Q1 and Q3 are on in one phase, Q2 and Q4 are off, Q2 and Q4 are on in the next phase, Q1 and Q3 are off, fig. 2 shows the operation of the CF L Y capacitor in two phases, in the ideal no-load condition, the CF L Y capacitor voltage is equal to the VY voltage, which is equal to half the VX voltage.

If the 2:1 series-parallel type charge pump is generalized to the N:1 series-parallel type charge pump, as shown in fig. 3 and 4. In one phase, N-1 capacitors are connected in series between the VX voltage and the VY voltage; in the other phase, N-1 capacitors are coupled in parallel between the VY voltage and ground. In the ideal no-load condition, all N-1 capacitors are equal in voltage, equal to the VY voltage; the VX voltage is equal to the sum of the voltage of the N-1 capacitors and the voltage of VY, namely the VX voltage is equal to the voltage of N x VY.

Fig. 3 omits level conversion for convenience of description, and it is considered that the power tube is turned on when logic seen by a gate of the power tube is high, and turned off when logic seen by the gate of the power tube is low, INV in fig. 3 is an inverter, logic before and after the inverter is opposite, and a clock signal C L K is a square wave signal with a 50% duty ratio.

The obvious advantage of the series-parallel charge pump configuration is that the N-1 CF L Y capacitors of the Dickson charge pump are VY, 2 VY, … …, (N-1) VY voltages, while all CF L Y capacitors of the series-parallel charge pump are VY voltages, which is commercially significant in practice, since the series-parallel charge pump configuration requires CF 2Y capacitors not to exceed VY voltages, when the series-parallel charge pump configuration is operated with VXV voltages, such as VXV L Y voltages, and VXV 2Y capacitors is used for a period of time equal to VXV 18, VXV 2Y voltages, VXV 2Y capacitors are used for a period of time equal to VXV 18, VXV 2Y capacitors are used for a period of time equal to VXV 2Y voltages, when the series-parallel charge pump configuration is operated with VXV 2Y voltages, VXV 7, which is used for a period of time equal to VXV 2Y voltages, VXV 7, which is used for a period of equal to VXV 2Y voltages, when the series-parallel charge pump configuration is used for a period of VXV 2Y capacitors, VXV 2Y capacitors is used for a period of time equal to VXV 2Y voltages, which is used for a period of VXV 2Y voltages equal to VXV 7, VXV 2Y voltages, which is used for a period of time equal to VXV 2Y capacitors, VXV 2Y voltages, VXV 2Y capacitors, which is used for a period of time equal to VXV 7, which is used for a period of VXV 7, VXV 2Y capacitors, VXV 7, which is used for a period of time equal to 7, when the charge pump configuration of a period of time equal to 7, when the same size equal to 7, when the charge pump configuration of a period of.

Disclosure of Invention

Aiming at the defects of low voltage conversion efficiency and large heat loss of the traditional series-parallel type charge pump system, the invention provides the reconfigurable series-parallel type switched capacitor voltage converter which has high conversion efficiency, can utilize each device in a circuit to the maximum extent, improves the voltage conversion efficiency and reduces the heat loss.

The technical scheme of the invention is as follows:

the reconfigurable series-parallel type switched capacitor voltage converter with high conversion efficiency comprises N-1 control units and a control switch tube, wherein N is a positive integer greater than 1;

the jth control unit comprises a capacitor, a first NMOS tube, a second NMOS tube and a third NMOS tube, j is a positive integer and j ∈ [1, N-1 ];

the drain electrode of the first NMOS tube is connected with one end of a capacitor and serves as the input end of the jth control unit, and the source electrode of the first NMOS tube is connected with the first conversion end of the reconfigurable series-parallel type switch capacitor voltage converter;

the drain electrode of the second NMOS tube is connected with the input end of the (j +1) th control unit, the source electrode of the second NMOS tube is connected with the drain electrode of the third NMOS tube and the other end of the capacitor, and the source electrode of the third NMOS tube is connected with the reference ground;

the drain electrode of a second NMOS tube in the N-1 th control unit is connected with a first conversion end of the reconfigurable series-parallel type switch capacitor voltage converter;

dividing the N-1 control units into k +1 groups of control modules, wherein k is a positive integer not greater than N-1, each group in the front k groups of control modules comprises m control units, the last group of control modules comprises t control units, and k, m and t are all non-negative integers;

the reconfigurable series-parallel type switch capacitor voltage converter further comprises k-1 control switch tubes, wherein the k control switch tubes are respectively corresponding to the front k groups of control modules, the drain electrode of the ith control switch tube is connected with the second conversion end of the reconfigurable series-parallel type switch capacitor voltage converter, the source electrode of the ith control switch tube is connected with the input end of the first control unit in the corresponding ith group of control modules, i is a positive integer and i ∈ [1, M ];

the grid electrode of the ith control switch tube and the grid electrode of the second NMOS tube in the corresponding ith control module are connected with the clock signal of the ith control module, and the grid electrodes of the first NMOS tube and the third NMOS tube in the ith control module are connected with the inverted signal of the clock signal of the ith control module;

the clock signal of the ith group of control modules is in reverse phase with the clock signal of the (i +1) th group of control modules, and the clock signal of the 1 st group of control modules is the clock signal of the series-parallel type switched capacitor voltage converter;

the grid electrode of the second NMOS tube in the last group of control modules is connected with a low level, and the grid electrodes of the first NMOS tube and the third NMOS tube in the last group of control modules are connected with a high level;

the reconfigurable series-parallel type switched capacitor voltage converter can achieve the voltage conversion ratio of the second conversion end to the first conversion end to be 1:1 to N:1, when the voltage conversion ratio of the first conversion end to the second conversion end in the reconfigurable series-parallel type switched capacitor voltage converter is Nx:1, Nx is a positive integer and Nx ∈ [1, N ], m is Nx-1, k and t meet the requirement that N-1 is m × k + t, k and m are both 0 or both positive integers, and t is taken as small as possible.

The reconfigurable series-parallel type switch capacitor voltage converter is used as a sub-switch capacitor voltage converter, the input end of the P-th sub-switch capacitor voltage converter is connected with the output end of the P-1 th sub-charge pump, the input end of the 1 st sub-switch capacitor voltage converter is used as the input end of the cascaded total switch capacitor voltage converter, the output end of the P-th sub-switch capacitor voltage converter is used as the output end of the cascaded total switch capacitor voltage converter, P is a positive integer and P ∈ [1, P ];

the p-th sub-switched capacitor voltage converter comprises Np1 control unit, NpThe conversion ratio of the output end and the input end of the p-th sub-switched capacitor voltage converter is a positive integer larger than 1Lp∈[1,Np](ii) a When the p-th sub-switched capacitor voltage converter takes the first conversion end as the input end and the second conversion end as the output end, ap1, when the p-th sub-switched capacitor voltage converter has the second conversion terminal as the input terminal and the first conversion terminal as the output terminal, apThe voltage conversion ratio of the output end to the input end of the cascaded total switched capacitor voltage converter is L: 1,

specifically, Q first switched capacitor voltage converters with the same voltage conversion ratio are used in parallel, the phase difference of clock signals of two adjacent first switched capacitor voltage converters is 360 DEG/Q, and each first switched capacitor voltage converter can select to adopt the reconfigurable series-parallel switched capacitor voltage converter or the cascaded total switched capacitor voltage converter.

Specifically, the clock signal of the series-parallel type switched capacitor voltage converter is a square wave signal with a 50% duty ratio.

The invention has the beneficial effects that: the invention furthest utilizes each device in the circuit, reduces the waste of the devices, solves the problem that the working efficiency is low under certain voltage conversion ratio in the traditional N:1 series-parallel type charge pump, improves the voltage conversion efficiency and reduces the heat loss; in addition, the invention provides a use scheme of carrying out related cascade connection and parallel connection on the charge pump, thereby increasing the flexibility of design and improving the current performance of the charge pump.

Drawings

Fig. 1 is a schematic diagram of a conventional 2:1 series-parallel type charge pump.

Fig. 2 is a schematic diagram of the operation of a conventional 2:1 series-parallel type charge pump in two phases.

Fig. 3 is a schematic structural diagram of an N:1 series-parallel charge pump (illustrating that the source terminals of the power transistors are connected to different levels, and the actual driving needs to perform level conversion on the logic signals, where the level conversion is omitted, and a logic high represents that the power transistors are turned on and a logic low represents that the power transistors are turned off).

Fig. 4 is a schematic diagram of the operation of an N:1 series-parallel type charge pump in two phases.

Fig. 5 (a) is a working schematic diagram when the conventional 3:1 series-parallel type charge pump realizes a voltage conversion ratio between the second conversion terminal and the first conversion terminal at 3:1, fig. 5 (b) is a working schematic diagram when the conventional 3:1 series-parallel type charge pump realizes a voltage conversion ratio between the second conversion terminal and the first conversion terminal at 2:1, and fig. 5 (c) is a working schematic diagram when the conventional 3:1 series-parallel type charge pump realizes a voltage conversion ratio between the second conversion terminal and the first conversion terminal at 1: 1.

Fig. 6 (a) is a working schematic diagram when the 3:1 series-parallel type switched capacitor voltage converter provided by the present invention realizes a voltage conversion ratio between the second conversion terminal and the first conversion terminal is 3:1, fig. 6 (b) is a working schematic diagram when the 3:1 series-parallel type switched capacitor voltage converter provided by the present invention realizes a voltage conversion ratio between the second conversion terminal and the first conversion terminal is 2:1, and fig. 6 (c) is a working schematic diagram when the 3:1 series-parallel type switched capacitor voltage converter provided by the present invention realizes a voltage conversion ratio between the second conversion terminal and the first conversion terminal is 1: 1.

Fig. 7 is a schematic diagram of the overall structure of the reconfigurable series-parallel type switched capacitor voltage converter with high conversion efficiency according to the present invention.

In fig. 8, (a), (b), (c) and (d) are schematic diagrams of the 4:1 series-parallel type switched capacitor voltage converter according to the present invention, respectively, when the voltage conversion ratio between the second conversion terminal and the first conversion terminal is 4:1, 3:1, 2:1 and 1: 1.

In fig. 9, (a), (b), (c), (d), and (e) are schematic diagrams of the operation of the 5:1 series-parallel type switched capacitor voltage converter according to the present invention to achieve voltage conversion ratios of the second conversion terminal to the first conversion terminal of 5:1, 4:1, 3:1, 2:1, and 1:1, respectively.

In fig. 10, (a), (b), (c), (d), (e) and (f) are schematic diagrams of the operation of the 6:1 series-parallel type switched capacitor voltage converter according to the present invention when the voltage conversion ratio between the second conversion terminal and the first conversion terminal is 6:1, 5:1, 4:1, 3:1, 2:1 and 1:1, respectively.

Fig. 11 is a schematic structural diagram of P series-parallel type switched capacitor voltage converters according to the present invention in cascade.

Fig. 12 is a schematic diagram of a configuration in which Q first switched capacitor voltage converters are used in parallel.

Detailed Description

The technical solution of the present invention is described in detail below with reference to the accompanying drawings and specific embodiments.

The invention provides a reconfigurable series-parallel type switched capacitor voltage converter with high conversion efficiency, which is an N:1 series-parallel type charge pump and can realize that the voltage conversion ratio of a second conversion end and a first conversion end is 1:1 to N:1, wherein N is a positive integer greater than 1. When the first conversion end is used as an input end and the second conversion end is used as an output end, the voltage of the first conversion end can be raised by 1 to N times and then output from the second conversion end; when the second conversion terminal is used as an input terminal and the first conversion terminal is used as an output terminal, the voltage of the second conversion terminal can be reduced and converted into 1 to 1/N times of the input voltage and then output from the first conversion terminal.

The reconfigurable series-parallel type switched capacitor voltage converter is determined according to the voltage conversion ratio of a second conversion end and a first conversion end, when the voltage conversion ratio of the first conversion end and the second conversion end is Nx:1, Nx is a positive integer and Nx ∈ [1, N ], the values of m-Nx-1, k and t satisfy the conditions that N-1 is m × k + t, k and m are simultaneously 0 or positive integers, and t is the minimum value in all possible conditions, which is described by combining the following fig. 6, 8, 9 and 10.

As shown in fig. 6, N is 3, one has 2 control units, the 1 st control unit includes a capacitor CF L Y1, a first NMOS Q1_ a, a second NMOS Q1_ B and a third NMOS Q1_ C, the drain of the first NMOS Q1_ a is connected to one end of a capacitor CF L Y1 and serves as the input of the 1 st control unit, the source thereof is connected to the first conversion terminal VY of the series-parallel type switched capacitor voltage converter, the drain of the second NMOS Q1_ B is connected to the input of the 2 nd control unit, i.e., the drain of the first NMOS Q2_ a in the 2 nd control unit, the source thereof is connected to the drain of the third NMOS Q1_ C and the other end of the capacitor CF L Y1, the source of the third NMOS Q7 _ C is connected to the reference ground, if the drain of the power transistor is connected to a different reference level, the actual driving needs to switch the logic signal according to different reference level, the drain of the logic signal is switched to the drain of the first NMOS Q2Y 2, the drain of the second NMOS Q363672B is connected to the drain of the second NMOS 2Y 2 and the drain of the third NMOS 363672C, the drain of the second NMOS 36363672C is connected to the drain of the third NMOS 3636363672, the drain of the NMOS Q2, the NMOS Q2 parallel type switched capacitor Q2, the third NMOS 2C, the drain of the NMOS 363672C is connected to the drain of the NMOS 363636363672 parallel type switched transistor.

In fig. 6, (a) the second and first transfer terminal voltage transfer ratios are 3:1, Nx is 3, then m-Nx-1 is 2, which means that each of the first K groups of control modules includes 2 control units, and since N-1 is m × K + t, i.e. 2-2K + t, and K and m can only be 0 or positive integers simultaneously, so K can only take 1, t is 0, i.e. 2 control units of the 3:1 series-parallel type switched capacitor voltage converter are divided into two groups of control modules, the first group includes 2 control units, and the last group includes no control unit, which requires one controlled switching tube, (B) in fig. 6, the second and first transfer terminal voltage transfer ratios are 2:1, when N x is 2, m-1 is N-1, N-Q-1 is 1, N-Q-K is N + t 2, when m-K is N + t 2, m + t is N + t 2, m + t is N + t 2, N + t 2, m is N + t, when m + t, N + t, which is equal to N + t 2, which is equal to N + t, which is equal to N + t, which is equal to m + t 2, which is equal to.

In this embodiment, a control switch Q _ B is added to a control switch Q _ a of a conventional 3:1 series-parallel type switch capacitor voltage converter, which solves the problem of low efficiency when the conventional 3:1 series-parallel type switch capacitor voltage converter operates at a voltage ratio of 2:1, as shown in the circuit of fig. 6 (B), when the switch capacitor voltage converter is changed to a voltage conversion ratio of 2:1, all capacitors and power transistors are fully utilized, specifically, when a power transistor with a gate phase Phi 1 is turned on, a power transistor with a gate phase Phi 2 is turned off, a capacitor CF Y is connected between a second conversion terminal VX and a first conversion terminal VY through Q _ B and Q _ a, the capacitor CF Y is connected between the first conversion terminal VY and ground through Q _ a and Q _ C, when a power transistor with a gate phase Phi _ a Phi _ C and Q _ C is turned on, a power transistor with a gate phase Phi _ C and Q _ C is connected between the first conversion terminal VY, a power transistor with a second conversion terminal VY and ground, a capacitor Y is connected between a power transistor with a phase Phi _ C and Q _ C, a power transistor with a phase Phi _ C and a ground, a power transistor with a phase Phi _ C, a power transistor with a phase Phi _ Y _ C and a phase Phi _ C, a power transistor C is connected to a power transistor C, a power transistor C is connected to a power transistor C to a ground, a power transistor C to a power.

For a 3:1 series-parallel type switched capacitor voltage converter, let RQ3_A+RQ1_B+RQ2_A+RQ1_C+RQ1_A>RQ3_B+RQ2_A+RQ2_B+RQ2_CThis assumption is consistent with the design of a normal switched capacitor voltage converter. When the voltage conversion ratio becomes 2:1,

the turn-on power consumption of the conventional scheme is as follows: ploss_conventional=IY^2*(RQ3_A+RQ1_B+RQ2_A+RQ1_C+RQ1_A)

The on power consumption of the scheme of the embodiment is as follows: ploss_proposed=(IY/2)^2*[(RQ3_A+RQ1_B+RQ2_A+RQ1_C+RQ1_A)+(RQ3_B+RQ2_A+RQ2_B+RQ2_C)]<(IY/2)^2*[(RQ3_A+RQ1_B+RQ2_A+RQ1_C+RQ1_A)+(RQ3_A+RQ1_B+RQ2_A+RQ1_C+RQ1_A)]=Ploss_conventional/2

Wherein IY is the current at end VY, RQ3_A、RQ1_BEtc. are the on-resistances of the corresponding MOS transistors.

Therefore, the scheme in this embodiment, by increasing the cost of one power tube, the loss of the switch capacitor voltage converter is halved when the switch capacitor voltage converter operates at 2:1, and the cost of the added power tube is negligible compared with the cost of the added power tube. Another advantage of this embodiment is that the current at terminal VX remains continuous, and the conventional scheme has terminal VX with no current in one of the phases.

According to this embodiment, the method for solving the problem of the 3:1 series-parallel type switched capacitor voltage converter is generalized to any N:1 series-parallel type switched capacitor voltage converter, as shown in fig. 7, N-1 control units of the N:1 series-parallel type switched capacitor voltage converter are divided into k +1 groups of control modules, each group in the front k groups of control modules includes M control units, the last group, that is, the k +1 group of control modules includes t control units, the last group is actually an idle group, k-1 control switch tubes are added, k control switch tubes in total correspond to the front k groups of control modules respectively, a drain electrode of the ith control switch tube is connected to a second conversion end, that is, a VX end, a source electrode of the ith control switch tube is connected to an input end of the first control unit in the ith group of control modules, and i ∈ [1, M ].

The invention converts an N:1 series-parallel type switched capacitor voltage converter into k series-parallel type switched capacitor voltage converters, wherein N-1 is M × k + t, k (M +1):1 series-parallel type switched capacitor voltage converter constitutes an N:1 series-parallel type switched capacitor voltage converter, M, M, t are non-negative integers, for the N:1 switched capacitor voltage converter, there are N-1 CF L Y capacitors, since N-1 is M × k + t, the N-1 CF L Y capacitors can be divided into k groups, each group has M CF L Y capacitors, each group has M CF L Y capacitors which can operate according to (M +1):1 series-parallel type switched capacitor voltage converter, the remaining t capacitors are idle and coupled between VY and ground, the conventional N:1 series-parallel switched capacitor voltage converter, if the (M +1):1 series-parallel switched capacitor voltage converter operates, only M capacitors and t capacitors are used, the related power transistors can only operate, if the related power transistors are switched on average, the power transistors are switched on, the conventional N:1, the scheme only has M capacitors, the related power transistors are switched on average, if the current is equal to k, the related power transistors, the conventional scheme is changed into M-parallel switched capacitors, the conventional power transistors, the scheme of the invention, the scheme can only has M-parallel switched capacitors of the scheme, and the scheme, the scheme of the scheme, if the scheme can only if the related power transistors, the related power transistors are switched capacitors of the scheme of the invention, the scheme of the invention, the.

For convenience of understanding, fig. 8, 9 and 10 respectively list examples of the switched capacitor voltage converter with N being 4, 5 and 6, and other cases can be obtained according to the general schematic diagram of N:1 shown in fig. 7.

When N-4, in fig. 8, (a) the second and first switching terminals are switched to 4:1, Nx-4, then m-Nx-1-3, meaning that each group of the front k group of control modules contains 3 control units, and when N-1-m × k + t, i.e. 3-3 k + t, and k and m can only be simultaneously 0 or simultaneously positive integers, so k can only be 1, t is 0, 3 control units are divided into a group of control modules, and one control switch Q4_ a, and when the last group of control modules does not contain a control unit, (b) in fig. 8, the second and first switching terminals are 3:1, when Nx-3, then m-Nx-1-2, meaning that each group of the front k group of control modules contains 2 control units, and when N-k is equal to 3, m-k + t 2, when m-k is equal to m + t 2, when m-k + t 3, when m-k is equal to m-t + t, when m + t is equal to 0, when m + t, when N + t, when N + t 2, when N + t +.

Similarly, when N is 5, the voltage conversion ratio between the second conversion terminal and the first conversion terminal in (a) in fig. 9 is 5:1, Nx is 5, m is 4, k can only be 1, and t is 0; in fig. 9, (b) the voltage conversion ratio between the second conversion terminal and the first conversion terminal is 4:1, Nx is 4, m is 3, k can only take 1, and t is 1; in fig. 9, (c) the voltage conversion ratio between the second conversion terminal and the first conversion terminal is 3:1, Nx is 3, m is 2, k may be 1 or 2, and t is 2 or 0; if t is as small as possible, taking t as 0 and k as 2; in fig. 9, (d) the voltage conversion ratio between the second conversion terminal and the first conversion terminal is 2:1, Nx is 2, m is 1, k may be 1, 2, 3, 4, and t is 3, 2, 1, 0; if t is as small as possible, taking t as 0 and k as 4; in fig. 9, (e) the voltage conversion ratio between the second conversion terminal and the first conversion terminal is 1:1, Nx is 1, m is 0, k and m are both 0, and then t is 4. When N is 6, the voltage conversion ratios of the second conversion end and the first conversion end are respectively 6:1, 5:1, 4:1, 3:1, 2:1 and 1:1 by using the 6:1 switched capacitor voltage converter provided by the invention, as shown in fig. 10 (a) (b) (c) (d) (e) (f).

Two cases of applying the reconfigurable series-parallel type switched capacitor voltage converter proposed by the present invention are given below.

The first application of the invention is as follows:

if a higher-order switched capacitor voltage converter is to be realized, P N:1 switched capacitor voltage converters provided by the invention can be used as sub-switched capacitor voltage converters to be cascaded to form a cascaded total switched capacitor voltage converter. As shown in FIG. 11, the cascade scheme is that P series-parallel type switched capacitor voltage converters are N11 series-parallel type switch capacitor voltage converter, N21 series-parallel type switch capacitor voltage converter, … … NP1 series-parallel type switched capacitor voltage converter, Np1A series-parallel type switch capacitor voltage converter comprises Np1 control unit capable of realizing voltage conversion ratio of the second conversion terminal to the first conversion terminal of 1:1 to Np1, P is a positive integer and P ∈ [1, P ]]The voltage conversion ratio of the P series-parallel type switch capacitance voltage converters can be arbitrarily selected, for example, the voltage conversion ratio of the second conversion end of the 1 st sub-switch capacitance voltage converter and the voltage conversion ratio of the first conversion end are selected to be L11, the voltage conversion ratio between the second conversion end and the first conversion end of the 2 nd sub-switched capacitor voltage converter is L21, … …, the voltage conversion ratio between the second conversion terminal and the first conversion terminal of the P-th sub-switched capacitor voltage converter is LP:1,L1∈[1,N1],L2∈[1,N2],……,LP∈[1,NP]Thus any Np1 the series-parallel type switch capacitor voltage converters can convert into VXsubP:VYsubP=LpSwitched capacitor voltage converter of 1, Lp∈[1,Np]。

P series-parallel switched capacitor voltage converters according to the present invention are cascaded as sub-switched capacitor voltage converters, each sub-switched capacitor voltage converter being an independent switched capacitor voltage converter according to the present invention as shown in fig. 7, and the independence includes two aspects: (1) the conversion ratio of each sub-switched capacitor voltage converter is independent and does not need to be the same; (2) the first conversion end of any stage of sub-switched capacitor voltage converter can be used as an input end, and the second conversion end can be used as an output end, or the second conversion end of any stage of sub-switched capacitor voltage converter can be used as an input end, and the first conversion end can be used as an output end, and the input end and the output end of each stage of sub-switched capacitor voltage converter can be arranged in a non-uniform manner, for example, the first conversion end of the first stage of sub-switched capacitor voltage converter is used as an input end, and the second conversion end of the second stage of sub-switched capacitor voltage converter is used as an output end, and the second conversion end of the second stage of sub-switched capacitor voltage converter.

The voltage conversion ratio of the output end and the input end of the p-th-stage sub-switch capacitor voltage converter is set to beWhen a ispWhen the voltage value is 1, the first conversion terminal of the p-th sub-switched capacitor voltage converter is used as the input terminal, the second conversion terminal is used as the output terminal, and the p-th sub-switched capacitor voltage converter is used for increasing L the voltage of the input terminalpOutputting after doubling; when a ispWhen the value is-1, the second conversion end of the p-th stage sub-switched capacitor voltage converter is used as an input end, the first conversion end is used as an output end, the p-th stage sub-switched capacitor voltage converter is used for reducing the input end voltage and converting the input end voltage into 1/L of the input end voltagepThe output is multiplied, the voltage conversion ratio of the output end to the input end of the cascaded total switch capacitor voltage converter formed by the cascade connection of the P sub switch capacitor voltage converters is L: 1,

the second application of the invention is as follows:

for an N:1 series-parallel type switched capacitor voltage converter, in order to reduce current ripples at a VX end and current ripples at a VY end or increase current capacity, two or more N:1 series-parallel type switched capacitor voltage converters are usually connected in parallel in a staggered phase mode, because the current of the switched capacitor voltage converters follows an exponential curve of charging and discharging of a resistor and a capacitor, the current is uneven in each period, in order to make the whole input and output current smoother, a plurality of switched capacitor voltage converters are usually connected in parallel in a staggered phase mode, sometimes a system wants to increase the current capacity, a plurality of switched capacitor voltage converters are also connected in parallel, as shown in FIG. 12, first switched capacitor voltage converters with the same Q conversion ratio (N: 1) are connected in parallel, but clock signals C L K are staggered 360 degrees/Q degrees with each other, wherein the first switched capacitor voltage converters can independently adopt the N:1 series-parallel type switched capacitor voltage converters proposed by the invention, or adopt a scheme of cascading the plurality of series-parallel switched capacitor voltage converters to obtain the N:1 series-parallel switched capacitor voltage converters, and the invention can also adopt the first switched capacitor voltage converters which are connected in parallel and are connected together in a cascaded together according to the invention.

In summary, the present invention provides a scheme of adding a control switching tube and staggering phases to a conventional 3:1 series-parallel type switched capacitor voltage converter in an embodiment, and solves the problem of low working efficiency of the conventional 3:1 series-parallel type switched capacitor voltage converter when the voltage conversion ratio is 2:1, and extends the method of solving the problem of low working efficiency of the 3:1 series-parallel type switched capacitor voltage converter to any N:1 series-parallel type switched capacitor voltage converter, and for an N:1 series-parallel type switched capacitor voltage converter, there are N-1 control units, i.e., N-1 CF L Y capacitors, and N-1 control units are divided into k +1 groups of control modules, each group in the front k groups of control modules includes m control units, and the last group of control modules includes t control units, so that the N:1 series-parallel type switched capacitor voltage converter can be converted into k (m +1) series-parallel type switched capacitor voltage converters, and in addition, there are only t CF L Y capacitors left, and the idle circuits are utilized to the greatest extent, and each of the series-parallel switched capacitor voltage converter is improved, and the scheme of reducing the heat loss of the series-parallel switched capacitors, and increasing the voltage converter, and the invention provides a scheme of the invention of the series-parallel type switched capacitor voltage converter.

It will be appreciated by those of ordinary skill in the art that the foregoing examples are intended to assist the reader in understanding the principles of the invention, and are to be construed as being without limitation to such specifically recited examples and embodiments. Those skilled in the art can make various other specific changes and combinations based on the teachings of the present invention without departing from the spirit of the invention, and these changes and combinations are within the scope of the invention.

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