阅读说明：本技术 半导体器件结构、肖特基二极管及其制备方法 (Semiconductor device structure, Schottky diode and preparation method thereof ) 是由 郝茂盛 袁根如 张楠 陈朋 马艳红 于 2020-04-21 设计创作，主要内容包括：本发明提供一种半导体器件结构、肖特基二极管及其制备方法,肖特基二极管的制备方法包括：提供具有凹槽结构的生长基底,生长第一N型氮化镓层及第二N型氮化镓层,剥离生长衬底,形成阴极金属层及阳极金属层。本发明在生长基底上进行侧向外延生长形成第一N型氮化镓层,可以提高氮化镓晶体质量,提高表面平整度,减少晶体缺陷,制作垂直结构的肖特基二极管,有利于承受较大的电流及电压,另外,设置阴阳电极上下平行错开,有利于避免两电极直接对冲击穿芯片,提高氮化镓肖特基二极管的耐压特性与降低其漏电流。(The invention provides a semiconductor device structure, a Schottky diode and a preparation method thereof, wherein the preparation method of the Schottky diode comprises the following steps: providing a growth substrate with a groove structure, growing a first N-type gallium nitride layer and a second N-type gallium nitride layer, and stripping a growth substrate to form a cathode metal layer and an anode metal layer. The first N-type gallium nitride layer is formed by lateral epitaxial growth on the growth substrate, the quality of gallium nitride crystals can be improved, the surface flatness is improved, the crystal defects are reduced, the Schottky diode with a vertical structure is manufactured, larger current and voltage can be borne, in addition, the arrangement of the anode and the cathode in parallel staggered mode is beneficial to avoiding the direct impact breakdown of two electrodes on a chip, the voltage resistance of the gallium nitride Schottky diode is improved, and the leakage current of the gallium nitride Schottky diode is reduced.)

1. A preparation method of a Schottky diode is characterized by comprising the following steps:

providing a growth substrate, wherein a plurality of groove structures are formed in the growth substrate;

forming a first N-type gallium nitride layer on the growth substrate, wherein the first N-type gallium nitride layer is filled in the groove structure and extends to the growth substrate around the groove structure;

forming a second N-type gallium nitride layer on the first N-type gallium nitride layer, wherein the doping concentration of the second N-type gallium nitride layer is lower than that of the first N-type gallium nitride layer;

stripping the growth substrate to form a connection surface on one side of the first N-type gallium nitride layer close to the growth substrate;

and forming a cathode metal layer electrically connected with the first N-type gallium nitride layer on the connecting surface, and forming an anode metal layer electrically connected with the second N-type gallium nitride layer on the second N-type gallium nitride layer.

2. The method for manufacturing a schottky diode according to claim 1, further comprising the step of, before the step of peeling off the growth substrate: providing a temporary supporting substrate, transferring the structure with the second N-type gallium nitride layer onto the temporary supporting substrate, wherein one side, far away from the first N-type gallium nitride layer, of the second N-type gallium nitride layer is in contact with the temporary supporting substrate, and the temporary supporting substrate is removed before the anode metal layer is formed.

3. The method of manufacturing a schottky diode as described in claim 1, further comprising the steps of: and forming a metal substrate electrically connected with the connecting surface and the cathode metal layer between the connecting surface and the cathode metal layer.

4. The method of claim 1, wherein the trench structures are arranged in parallel at equal intervals or in periodic intervals.

5. The method of claim 4, wherein the distance between the trench structures is less than 10 μm, and the width of the bottom of the trench structures is between 0.1 μm and 3 μm.

6. The method of claim 1, wherein the growth substrate comprises, from bottom to top, a semiconductor substrate and a sacrificial dielectric layer, wherein the sacrificial dielectric layer has a plurality of openings formed therein for exposing the semiconductor substrate, and the openings form the trench structure.

7. The method for manufacturing the schottky diode as claimed in claim 6, wherein a growth auxiliary layer is formed on the inner wall of the opening and the sacrificial dielectric layer around the inner wall, the opposite surface of the growth auxiliary layer in the opening forms the groove structure, and/or a buffer layer is further formed between the semiconductor substrate and the sacrificial dielectric layer, and the opening penetrates through the buffer layer to expose the semiconductor substrate.

8. The method for manufacturing a schottky diode according to any one of claims 1 to 7, further comprising, after peeling the growth substrate and before forming the cathode metal layer, the steps of: and forming a dielectric layer on the connecting surface, wherein a connecting part opening exposing the connecting surface is formed in the dielectric layer, a bonding metal layer is at least formed in the connecting part opening, and the cathode metal layer is electrically connected with the first N-type gallium nitride layer through the bonding metal layer.

9. The method of claim 8, wherein the bonding metal layer in the connection opening is vertically parallel to and offset from the anode metal layer.

10. A semiconductor device structure, comprising:

the growth substrate is provided with a plurality of groove structures;

the first N-type gallium nitride layer is filled in the groove structure and extends to the growth substrate around the groove structure; and

and the second N-type gallium nitride layer is formed on the first N-type gallium nitride layer, and the doping concentration of the second N-type gallium nitride layer is lower than that of the first N-type gallium nitride layer.

11. The semiconductor device structure of claim 10, wherein the growth substrate comprises, from bottom to top, a semiconductor substrate and a sacrificial dielectric layer, wherein a plurality of openings exposing the semiconductor substrate are formed in the sacrificial dielectric layer, and the openings form the groove structure.

12. The semiconductor device structure of claim 11, wherein a growth auxiliary layer is formed on the inner wall of the opening and the sacrificial dielectric layer around the inner wall, and the opposite surfaces of the growth auxiliary layer in the opening form the groove structure; and/or a buffer layer is further formed between the semiconductor substrate and the sacrifice medium layer, and the opening penetrates through the buffer layer to expose the semiconductor substrate.

13. The semiconductor device structure of claim 12, wherein the sacrificial dielectric layer comprises SiO₂Layer, Si₃N₄At least one of the layers; the buffer layer comprises Al_xGa_1-xAt least one of the N layer, the BN layer and the AlN layer, wherein x is more than or equal to 0 and less than or equal to 0.5; the growth-assist layer includes an AlN layer.

14. The semiconductor device structure of any one of claims 10-13, wherein each of the trench structures is arranged in parallel at equal intervals or at periodic intervals; the distance between the groove structures is less than 10 μm, and the width of the bottom of the groove structures is between 0.1 μm and 3 μm.

15. A schottky diode, comprising:

a first N-type gallium nitride layer having a lower surface and an upper surface opposite to each other;

the second N-type gallium nitride layer is formed on the upper surface of the first N-type gallium nitride layer, and the doping concentration of the second N-type gallium nitride layer is lower than that of the first N-type gallium nitride layer;

the anode metal layer is formed on the second N-type gallium nitride layer and is electrically connected with the second N-type gallium nitride layer;

the dielectric layer is formed on the lower surface of the first N-type gallium nitride layer, a connecting part opening exposing the lower surface is formed, and the bonding metal layer is at least formed in the connecting part opening;

and the cathode metal layer is formed on one side of the bonding metal layer, which is far away from the first N-type gallium nitride layer, and is electrically connected with the first N-type gallium nitride layer through the bonding metal layer.

16. The schottky diode of claim 15 wherein a metal substrate is formed between the bonding metal layer and the cathode metal layer in electrical connection with both.

17. The schottky diode of claim 15 or 16 wherein the bonding metal layer in the connection opening is vertically parallel to and offset from the anode metal layer.

Technical Field

The invention belongs to the technical field of semiconductors, and particularly relates to a semiconductor device structure, a Schottky diode and a preparation method thereof.

Background

With the wide use of high-power devices in various fields such as military, civil and the like, people have increasingly greater requirements on schottky diodes and requirements on performance of schottky diodes. Silicon-based schottky diode devices have long been used, but with the years of silicon technology development, the performance of the corresponding silicon-based schottky diode has approached its theoretical limit. Gallium nitride is used as a third generation wide bandgap semiconductor material, has the characteristics of large forbidden band width, large breakdown electric field, high electron drift velocity and the like, and the Schottky diode manufactured by adopting the gallium nitride also has the excellent characteristics of high temperature resistance, high voltage resistance and small on-resistance, thereby being an ideal material for manufacturing a new generation Schottky diode.

At present, besides the problems of the gan material itself, the reverse breakdown voltage and the leakage current of the gan schottky diode are far from the theoretical ideal value, and many international research groups are searching for different methods to solve and improve the problem from the structural or technological point of view, so as to improve the voltage withstanding property of the gan schottky diode and reduce the leakage current thereof, so that the device can work under higher power.

Therefore, how to provide a semiconductor device structure, a schottky diode and a method for manufacturing the same to solve the above problems in the prior art is necessary.

Disclosure of Invention

In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a semiconductor device structure, a schottky diode and a method for manufacturing the same, which are used to solve the problems of the prior art, such as poor growth quality of gallium nitride crystal, and difficulty in effectively improving the breakdown voltage and leakage current of the gan schottky diode.

To achieve the above and other related objects, the present invention provides a method for manufacturing a schottky diode, the method comprising the steps of:

providing a growth substrate, wherein a plurality of groove structures are formed in the growth substrate;

forming a first N-type gallium nitride layer on the growth substrate, wherein the first N-type gallium nitride layer is filled in the groove structure and extends to the growth substrate around the groove structure;

forming a second N-type gallium nitride layer on the first N-type gallium nitride layer, wherein the doping concentration of the second N-type gallium nitride layer is lower than that of the first N-type gallium nitride layer;

stripping the growth substrate to form a connection surface on one side of the first N-type gallium nitride layer close to the growth substrate;

and forming a cathode metal layer electrically connected with the first N-type gallium nitride layer on the connecting surface, and forming an anode metal layer electrically connected with the second N-type gallium nitride layer on the second N-type gallium nitride layer.

Optionally, before the step of peeling off the growth substrate, the method further comprises the steps of: providing a temporary supporting substrate, transferring the structure with the second N-type gallium nitride layer onto the temporary supporting substrate, wherein one side, far away from the first N-type gallium nitride layer, of the second N-type gallium nitride layer is in contact with the temporary supporting substrate, and the temporary supporting substrate is removed before the anode metal layer is formed.

Optionally, the preparation method further comprises the steps of: and forming a metal substrate electrically connected with the connecting surface and the cathode metal layer between the connecting surface and the cathode metal layer.

Optionally, each of the groove structures is arranged in parallel at equal intervals or in periodic intervals.

Optionally, the distance between the groove structures is less than 10 μm, and the width of the bottom of the groove structures is between 0.1 μm and 3 μm.

Optionally, the growth substrate includes a semiconductor substrate and a sacrificial medium layer from bottom to top, wherein a plurality of openings exposing the semiconductor substrate are formed in the sacrificial medium layer, and the openings form the groove structure.

Optionally, a growth auxiliary layer is formed on the inner wall of the opening and the sacrificial medium layer around the inner wall, and the opposite surfaces of the growth auxiliary layer in the opening form the groove structure.

Optionally, a buffer layer is further formed between the semiconductor substrate and the sacrificial dielectric layer, and the opening penetrates through the buffer layer to expose the semiconductor substrate.

Optionally, the method further comprises, after the step of peeling the growth substrate and before the step of forming the cathode metal layer: and forming a dielectric layer on the connecting surface, wherein a connecting part opening exposing the connecting surface is formed in the dielectric layer, a bonding metal layer is at least formed in the connecting part opening, and the cathode metal layer is electrically connected with the first N-type gallium nitride layer through the bonding metal layer.

Optionally, the bonding metal layer in the connection opening and the anode metal layer are vertically parallel and staggered correspondingly.

The present invention also provides a semiconductor device structure, wherein the semiconductor device structure can be prepared by referring to the preparation method provided by the present invention, and of course, can also be prepared by other methods, and the semiconductor device structure comprises:

the growth substrate is provided with a plurality of groove structures;

the first N-type gallium nitride layer is filled in the groove structure and extends to the growth substrate around the groove structure; and

and the second N-type gallium nitride layer is formed on the first N-type gallium nitride layer, and the doping concentration of the second N-type gallium nitride layer is lower than that of the first N-type gallium nitride layer.

Optionally, the growth substrate includes a semiconductor substrate and a sacrificial medium layer from bottom to top, wherein a plurality of openings exposing the semiconductor substrate are formed in the sacrificial medium layer, and the openings form the groove structure.

Optionally, the sacrificial dielectric layer comprises SiO₂Layer, Si₃N₄At least one of the layers.

Optionally, a growth auxiliary layer is formed on the inner wall of the opening and the dielectric layer around the inner wall, and the opposite surfaces of the growth auxiliary layer in the opening form the groove structure.

Optionally, a buffer layer is further formed between the semiconductor substrate and the sacrificial dielectric layer, and the opening penetrates through the buffer layer to expose the semiconductor substrate.

Optionally, the buffer layer comprises Al_xGa_1-xAt least one of the N layer, the BN layer and the AlN layer, wherein x is more than or equal to 0 and less than or equal to 0.5.

Optionally, the growth-assist layer comprises an AlN layer.

Optionally, each of the groove structures is arranged in parallel at equal intervals or in periodic intervals.

Optionally, the distance between the groove structures is less than 10 μm.

Optionally, the width of the bottom of the groove structure is between 0.1 μm and 3 μm.

The invention also provides a schottky diode, which can be prepared by referring to the preparation method provided by the invention, and of course, can also be prepared by adopting other methods, and the schottky diode comprises:

a first N-type gallium nitride layer having a lower surface and an upper surface opposite to each other;

the second N-type gallium nitride layer is formed on the upper surface of the first N-type gallium nitride layer, and the doping concentration of the second N-type gallium nitride layer is lower than that of the first N-type gallium nitride layer;

the anode metal layer is formed on the second N-type gallium nitride layer and is electrically connected with the second N-type gallium nitride layer;

the dielectric layer is formed on the lower surface of the first N-type gallium nitride layer, a connecting part opening exposing the lower surface is formed, and the bonding metal layer is at least formed in the connecting part opening;

and the cathode metal layer is formed on one side of the bonding metal layer, which is far away from the first N-type gallium nitride layer, and is electrically connected with the first N-type gallium nitride layer through the bonding metal layer.

Optionally, a metal substrate electrically connected to the bonding metal layer and the cathode metal layer is formed between the bonding metal layer and the cathode metal layer.

Optionally, the bonding metal layer in the connection opening and the anode metal layer are vertically parallel and staggered correspondingly.

As described above, the first N-type GaN layer is formed by lateral epitaxial growth on the growth substrate, the quality of GaN crystal can be improved, the surface flatness can be improved, the crystal defects can be reduced, the Schottky diode with a vertical structure can be manufactured, larger current and voltage can be borne, in addition, the arrangement of the anode and the cathode which are staggered in parallel up and down is beneficial to avoiding the direct impact breakdown of the two electrodes on a chip, the voltage resistance of the GaN Schottky diode can be improved, and the leakage current of the GaN Schottky diode can be reduced.

Drawings

Fig. 1 is a flow chart illustrating a process for manufacturing a schottky diode according to an embodiment of the present invention.

Fig. 2(a) -3 and fig. 5-12 are schematic diagrams illustrating structures obtained in steps of a method for manufacturing a schottky diode according to a first embodiment of the present invention, wherein fig. 12 is a schematic diagram illustrating a structure of an example of a schottky diode according to a third embodiment.

FIG. 4 shows a scanning electron micrograph of the structure of FIG. 3.

Description of the element reference numerals

101 growth substrate

1011 semiconductor substrate

1012 buffer layer

1013 sacrificial dielectric layer

1014 growth assistance layer

102 first N-type gallium nitride layer

102a connecting surface

103 second N-type gallium nitride layer

104 temporary support substrate

105 dielectric layer

106 bonding metal layer

107 metal substrate

108 cathode metal layer

109 anode metal layer

110. 111 insulating dielectric barrier layer

S1-S5

Detailed Description

The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.

As in the detailed description of the embodiments of the present invention, the cross-sectional views illustrating the device structures are not partially enlarged in general scale for convenience of illustration, and the schematic views are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.

For convenience in description, spatial relational terms such as "below," "beneath," "below," "under," "over," "upper," and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these terms of spatial relationship are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Further, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.

In the context of this application, a structure described as having a first feature "on" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed in between the first and second features, such that the first and second features may not be in direct contact.

It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed freely, and the layout of the components may be more complicated.