阅读说明：本技术 一种低相位噪声的双谐振腔噪声滤波压控振荡器 (Low-phase-noise double-resonant-cavity noise filtering voltage-controlled oscillator ) 是由 张雷 袁泽心 于 2020-04-26 设计创作，主要内容包括：本发明涉及一种低相位噪声的双谐振腔噪声滤波压控振荡器,属于微波集成电路设计技术领域。由交叉耦合对管、固定电容阵列、可变电容阵列、源漏耦合变压器以及二次谐波阻挡电路组成。交叉耦合对管由两个对称的射频晶体管组成,用来补偿电感电容谐振腔中的损耗,固定电容阵列由2对被外部数字码控制的电容组成,可变电容阵列由一对变容管组成,源漏耦合变压器由65nm工艺中的极厚第九金属层绕线组成,二次谐波阻挡电路由谐振在载波频率二倍频的电感电容谐振腔组成。本发明采用变压器耦合的源漏同向摆动以增大振荡器的摆幅,采用在振荡器底部串接二次谐波抑制电路,以抑制振荡器中二次谐波电流导致的闪烁噪声上的变频,从而降低了压控振荡器的相位噪声。(The invention relates to a low-phase-noise voltage-controlled oscillator with double resonant cavity noise filtering, belonging to the technical field of microwave integrated circuit design. The device comprises cross-coupled pair tubes, a fixed capacitor array, a variable capacitor array, a source-drain coupling transformer and a second harmonic blocking circuit. The cross coupling pair transistor is composed of two symmetrical radio frequency transistors and is used for compensating loss in an inductance-capacitance resonant cavity, the fixed capacitance array is composed of 2 pairs of capacitances controlled by an external digital code, the variable capacitance array is composed of a pair of variable capacitance tubes, the source-drain coupling transformer is composed of a winding of a ninth metal layer with the thickness of 65nm in the process, and the second harmonic wave blocking circuit is composed of an inductance-capacitance resonant cavity which resonates at carrier frequency doubling. The invention adopts the source-drain equidirectional swing of the transformer coupling to increase the swing amplitude of the oscillator, and adopts the secondary harmonic suppression circuit connected in series at the bottom of the oscillator to suppress the frequency conversion on flicker noise caused by the secondary harmonic current in the oscillator, thereby reducing the phase noise of the voltage-controlled oscillator.)

1. A low-phase-noise double-resonant-cavity noise-filtering voltage-controlled oscillator is characterized by comprising cross-coupled pair transistors M1 and M2, a fixed capacitor array, a variable capacitor array, a source-drain coupling transformer and a second harmonic blocking circuit; the fixed capacitor array is connected with the variable capacitor array in parallel, two ends of the fixed capacitor array and the variable capacitor array which are connected in parallel are respectively connected with an output node of the double-resonant cavity noise filtering voltage-controlled oscillator, the output node is a drain electrode of the cross coupling geminate transistor, meanwhile, the output node is respectively connected with an outer ring port of the source-drain coupling transformer, a source electrode of the source-drain coupling transformer is connected with an inner ring port of the source-drain coupling transformer, a voltage bias tap p5 of the source-drain coupling transformer is connected with a power supply, a ground tap p6 of the source-drain coupling transformer is connected with one end of the second harmonic blocking circuit, and the other end of the second harmonic blocking circuit is.

2. The dual-cavity noise-filtering voltage-controlled oscillator of claim 1, wherein:

the cross-coupled pair transistor consists of two symmetrical radio frequency transistors M1 and M2, the grid electrode of an NMOS transistor M1 is connected with an input node p2 of a source-drain coupling transformer outer ring L1, the drain electrode of M1 is connected with an input node p1 of a transformer outer ring L1, and the grid electrode of an NMOS transistor M1 is connected with an input node p3 of a source-drain coupling transformer inner ring L2; the grid electrode of the NMOS transistor M2 is connected with the input node p1 of the source-drain coupling transformer outer ring L1, the drain electrode of the NMOS transistor M2 is connected with the input node p2 of the source-drain coupling transformer outer ring L1, the grid electrode of the NMOS transistor M2 is connected with the input node p4 of the source-drain coupling transformer inner ring L2, and the cross-coupled pair transistors are used for compensating the loss in the inductance-capacitance resonant cavity to maintain oscillation;

the fixed capacitor array consists of four capacitors C1, C2, C3 and C4, four resistors R1, R2, R3 and R4 which are respectively connected with the four capacitors C1, C2, C3 and C4 in an end way, two switching transistors MC0 and MC1 and two inverters F0 and F1; the capacitor C1 is connected with one end of the resistor R1, the other end of the resistor R1 is connected with the output end of the inverter F0, the output end of the inverter F0 is connected with one end of the resistor R2, the other end of the resistor R2 is connected with the drain electrode of the switch transistor MC0, and the drain electrode of the switch transistor MC0 is simultaneously connected with the other end of the resistor R1; one end of the capacitor C3 is connected with one end of the resistor R3, the other end of the resistor R3 is connected with the output end of the inverter F1, the output end of the inverter F1 is simultaneously connected with one end of the resistor R4, the other end of the resistor R4 is connected with the drain electrode of the switch transistor MC1, and the drain electrode of the switch transistor MC1 is simultaneously connected with the other end of the resistor R3; when a digital control signal C0 input from the outside of the oscillator is 1, the other end of the capacitor C1 and the other end of the capacitor C2 are connected to the resonant cavity of the double-resonant-cavity noise-filtering voltage-controlled oscillator through the input ports p1 and p 2; when the digital control signal C0 is equal to 0, the other end of the capacitor C1 and the other end of the capacitor C2 are not connected to the resonant cavity, and when the digital control signal C1 is equal to 1, the other end of the capacitor C3 and the other end of the capacitor C4 are connected to the resonant cavity through the input ports p2 and p1 of the external coil of the source-drain coupling transformer; when a digital control signal C1 input from the outside of the oscillator is equal to 0, the other end of the capacitor C3 and the other end of the capacitor C4 are not connected to the resonant cavity, and the fixed capacitor array is used for discretely adjusting the oscillation frequency;

the variable capacitor array is composed of a varactor CV1, a varactor CV2, a varactor CV3 and a varactor CV4, wherein the gate end of the varactor CV1 is connected with an input port p1, the end of the varactor is connected with a control end network cable 1, the gate end of the varactor CV2 is connected with an input port p2, the end of the varactor CV2 is connected with the control end network cable 1, the gate end of the varactor CV3 is connected with the input port p3, the end of the varactor CV3 is connected with the control end network cable 1, the gate end of the varactor CV4 is connected with an input port p4, and the end of the varactor CV4 is connected with the control end network cable 1; the variable capacitor array is used for continuously adjusting the oscillation frequency;

the source-drain coupling transformer comprises 6 ports: two output ports p1 and p2 of the outer ring L1 are respectively connected with radio frequency transistors M1 and M2 of the cross-coupled pair transistors, two output ports p3 and p4 of the inner ring L2 are connected with the sources of the cross-coupled pair transistors, a voltage bias tap p5 of a source-drain coupled transformer is connected with a power supply, and a tap ground p6 is grounded; the source-drain coupling transformer is used for forming a source-drain homodromous oscillation waveform;

the second harmonic blocking circuit consists of an inductance-capacitance resonant cavity Ls and an inductance-capacitance Cs, the inductance-capacitance resonant cavity Ls is connected with the inductance-capacitance Cs in parallel, one end of the inductance-capacitance resonant cavity Ls, which is connected with the inductance-capacitance Cs in parallel, is connected with a tap ground p6 of the source-drain coupling transformer, and the other end of the inductance-capacitance resonant cavity Ls, which is connected with the inductance-capacitance Cs in parallel, is grounded; the second harmonic blocking circuit is used for suppressing a second harmonic current in the oscillator.

Technical Field

The invention relates to a low-phase-noise voltage-controlled oscillator with double resonant cavity noise filtering, belonging to the technical field of microwave integrated circuit design.

Background

In recent years, automotive electronics and automotive millimeter wave radar technology are rapidly developed, and the application capability of millimeter waves in an automotive radar system is gradually proved. In order to reduce the cost of the automotive radar, signal transmission and data processing of the radar must be integrated on a system on chip manufactured by a complementary metal oxide (hereinafter, referred to as CMOS) process, wherein a high-frequency phase-locked loop is required to provide a pure local oscillation signal for receiving and transmitting so as to reduce the influence of phase noise on the accuracy of distance measurement and speed measurement.

For a CMOS pll, the main sources of phase noise are the charge pump and the voltage controlled oscillator. The charge pump determines the in-band noise of the phase-locked loop, and the voltage-controlled oscillator determines the out-of-band noise of the phase-locked loop. However, we often find that the bandwidth of the phase locked loop is not more than in the order of hundreds of kHz, and the phase noise degraded by the vco flicker noise up-conversion of this frequency band is reflected in the overall performance. According to ISF theory in Hajimiri's 1998 article A.Hajimiri and T.H.Lee, "agricultural of phase noise in electronic reactors," in IEEE Journal of solid-State Circuits, vol.33, No.2, pp.179-194, Feb.1998, "flicker noise up-conversion will cause asymmetry in the output waveform of the voltage controlled oscillator and ISF_eff,dcIncreased and therefore, some technical reduction is required. 2016Mina Shahmammadi describes qualitatively the ISF in "M.Shahmammadi, M.Babaie and R.B.Staszewski," A1/fNoise Upconversion Reduction Technique for Voltage-Biased RF CMOSOscillators, "in IEEE Journal of Solid-State Circuits, vol.51, No.11, pp.2610-2624, and Nov.2016_eff,dcThe increase is mainly due to the 2 nd harmonic current in the oscillating waveform.

Disclosure of Invention

The invention aims to provide a low-phase-noise voltage-controlled oscillator with double resonant cavities and noise filtering, which is used for reducing ISF (inverse pulse-width modulation) by inhibiting second harmonic current_eff,dcAnd the phase noise performance of the voltage-controlled oscillator is improved.

The invention provides a low-phase-noise double-resonant-cavity noise-filtering voltage-controlled oscillator, which comprises cross-coupled geminate transistors M1 and M2, a fixed capacitor array, a variable capacitor array, a source-drain coupling transformer and a second harmonic blocking circuit; the fixed capacitor array is connected with the variable capacitor array in parallel, two ends of the fixed capacitor array and the variable capacitor array which are connected in parallel are respectively connected with an output node of the double-resonant cavity noise filtering voltage-controlled oscillator, the output node is a drain electrode of the cross coupling geminate transistor, meanwhile, the output node is respectively connected with an outer ring port of the source-drain coupling transformer, a source electrode of the source-drain coupling transformer is connected with an inner ring port of the source-drain coupling transformer, a voltage bias tap p5 of the source-drain coupling transformer is connected with a power supply, a ground tap p6 of the source-drain coupling transformer is connected with one end of the second harmonic blocking circuit, and the other end of the second harmonic blocking circuit is.

The above-mentioned double-resonator noise filtering voltage-controlled oscillator, wherein:

the cross-coupled pair transistor consists of two symmetrical radio frequency transistors M1 and M2, the grid electrode of an NMOS transistor M1 is connected with an input node p2 of a source-drain coupling transformer outer ring L1, the drain electrode of M1 is connected with an input node p1 of a transformer outer ring L1, and the grid electrode of an NMOS transistor M1 is connected with an input node p3 of a source-drain coupling transformer inner ring L2; the grid electrode of the NMOS transistor M2 is connected with the input node p1 of the source-drain coupling transformer outer ring L1, the drain electrode of the NMOS transistor M2 is connected with the input node p2 of the source-drain coupling transformer outer ring L1, the grid electrode of the NMOS transistor M2 is connected with the input node p4 of the source-drain coupling transformer inner ring L2, and the cross-coupled pair transistors are used for compensating the loss in the inductance-capacitance resonant cavity to maintain oscillation;

the fixed capacitor array consists of four capacitors C1, C2, C3 and C4, four resistors R1, R2, R3 and R4 which are respectively connected with the four capacitors C1, C2, C3 and C4 in an end way, two switching transistors MC0 and MC1 and two inverters F0 and F1; the capacitor C1 is connected with one end of the resistor R1, the other end of the resistor R1 is connected with the output end of the inverter F0, the output end of the inverter F0 is connected with one end of the resistor R2, the other end of the resistor R2 is connected with the drain electrode of the switch transistor MC0, and the drain electrode of the switch transistor MC0 is simultaneously connected with the other end of the resistor R1; one end of the capacitor C3 is connected with one end of the resistor R3, the other end of the resistor R3 is connected with the output end of the inverter F1, the output end of the inverter F1 is simultaneously connected with one end of the resistor R4, the other end of the resistor R4 is connected with the drain electrode of the switch transistor MC1, and the drain electrode of the switch transistor MC1 is simultaneously connected with the other end of the resistor R3; when a digital control signal C0 input from the outside of the oscillator is 1, the other end of the capacitor C1 and the other end of the capacitor C2 are connected to the resonant cavity of the double-resonant-cavity noise-filtering voltage-controlled oscillator through the input ports p1 and p 2; when the digital control signal C0 is equal to 0, the other end of the capacitor C1 and the other end of the capacitor C2 are not connected to the resonant cavity, and when the digital control signal C1 is equal to 1, the other end of the capacitor C3 and the other end of the capacitor C4 are connected to the resonant cavity through the input ports p2 and p1 of the external coil of the source-drain coupling transformer; when a digital control signal C1 input from the outside of the oscillator is equal to 0, the other end of the capacitor C3 and the other end of the capacitor C4 are not connected to the resonant cavity, and the fixed capacitor array is used for discretely adjusting the oscillation frequency;

the variable capacitor array is composed of a varactor CV1, a varactor CV2, a varactor CV3 and a varactor CV4, wherein the gate end of the varactor CV1 is connected with an input port p1, the end of the varactor is connected with a control end network cable 1, the gate end of the varactor CV2 is connected with an input port p2, the end of the varactor CV2 is connected with the control end network cable 1, the gate end of the varactor CV3 is connected with the input port p3, the end of the varactor CV3 is connected with the control end network cable 1, the gate end of the varactor CV4 is connected with an input port p4, and the end of the varactor CV4 is connected with the control end network cable 1; the variable capacitor array is used for continuously adjusting the oscillation frequency;

the source-drain coupling transformer comprises 6 ports: two output ports p1 and p2 of the outer ring L1 are respectively connected with radio frequency transistors M1 and M2 of the cross-coupled pair transistors, two output ports p3 and p4 of the inner ring L2 are connected with the sources of the cross-coupled pair transistors, a voltage bias tap p5 of a source-drain coupled transformer is connected with a power supply, and a tap ground p6 is grounded; the source-drain coupling transformer is used for forming a source-drain homodromous oscillation waveform;

the second harmonic blocking circuit consists of an inductance-capacitance resonant cavity Ls and an inductance-capacitance Cs, the inductance-capacitance resonant cavity Ls is connected with the inductance-capacitance Cs in parallel, one end of the inductance-capacitance resonant cavity Ls, which is connected with the inductance-capacitance Cs in parallel, is connected with a tap ground p6 of the source-drain coupling transformer, and the other end of the inductance-capacitance resonant cavity Ls, which is connected with the inductance-capacitance Cs in parallel, is grounded; the second harmonic blocking circuit is used for suppressing a second harmonic current in the oscillator.

The low-phase-noise voltage-controlled oscillator with the double resonant cavities for noise filtering has the advantages that:

1. in the low-phase-noise double-resonant-cavity noise-filtering voltage-controlled oscillator, the source-drain equidirectional swing caused by transformer coupling is adopted to increase the swing amplitude of the oscillator, so that the phase noise of the voltage-controlled oscillator is reduced.

2. The invention adopts a method of connecting a second harmonic suppression circuit in series at the bottom of the oscillator to suppress the frequency conversion on flicker noise caused by second harmonic, thereby further reducing the phase noise of the voltage-controlled oscillator.

Drawings

Fig. 1 is a schematic circuit diagram of a low phase noise dual-resonator noise-filtered vco according to the present invention.

Fig. 2 is a structure diagram of a fixed capacitor array in the dual-resonator noise-filtering voltage-controlled oscillator of the present invention.

Fig. 3 is a graph comparing ISF functions of voltage-controlled oscillators before and after a second harmonic blocking circuit is used.

Fig. 4 is a phase noise contrast diagram of a voltage controlled oscillator before and after a second harmonic blocking circuit is used.

Detailed Description

The circuit schematic diagram of the low-phase-noise voltage-controlled oscillator with the double-resonant-cavity noise filtering is shown in fig. 1 and comprises cross-coupled geminate transistors, a fixed capacitor array, a variable capacitor array, a source-drain coupling transformer and a second harmonic blocking circuit; the fixed capacitor array is connected with the variable capacitor array in parallel, two ends of the fixed capacitor array and the variable capacitor array after being connected in parallel are respectively connected with an output node of the double-resonant-cavity noise filtering voltage-controlled oscillator, the output node is a drain electrode of the cross-coupled geminate transistor, meanwhile, the output node is respectively connected with an outer ring port of the source-drain coupling transformer, a source electrode of the source-drain coupling transformer is connected with an inner ring port of the source-drain coupling transformer, a voltage bias tap of the source-drain coupling transformer is connected with a power supply, a ground tap of the source-drain coupling transformer is connected with one end of the second harmonic blocking circuit, and the other end of the second harmonic blocking.

In the above dual-resonator noise filtering voltage-controlled oscillator:

the cross-coupled pair transistor consists of two symmetrical radio frequency transistors M1 and M2, the grid electrode of an NMOS transistor M1 is connected with an input node p2 of a source-drain coupling transformer outer ring L1, the drain electrode of M1 is connected with an input node p1 of a transformer outer ring L1, and the grid electrode of an NMOS transistor M1 is connected with an input node p3 of a source-drain coupling transformer inner ring L2; the grid electrode of the NMOS transistor M2 is connected with the input node p1 of the source-drain coupling transformer outer ring L1, the drain electrode of the NMOS transistor M2 is connected with the input node p2 of the source-drain coupling transformer outer ring L1, the grid electrode of the NMOS transistor M2 is connected with the input node p4 of the source-drain coupling transformer inner ring L2, and the cross-coupled pair transistors are used for compensating the loss in the inductance-capacitance resonant cavity to maintain oscillation;

the circuit schematic diagram of the fixed capacitor array is shown in fig. 2, and the fixed capacitor array is composed of four capacitors C1, C2, C3 and C4, four resistors R1, R2, R3 and R4 respectively connected with the four capacitors C1, C2, C3 and C4 in a terminating mode, two switch transistors MC0 and MC1, and two inverters F0 and F1. A capacitor C1 is connected with one end of the resistor R1, the other end of the resistor R1 is connected with the output end of the inverter F0, the output end of the inverter F0 is connected with one end of a resistor R2, the other end of the resistor R2 is connected with the drain electrode of the switch transistor MC0, and the drain electrode of the switch transistor MC0 is simultaneously connected with the other end of the resistor R1; one end of the capacitor C3 is connected with one end of the resistor R3, the other end of the resistor R3 is connected with the output end of the inverter F1, the output end of the inverter F1 is simultaneously connected with one end of the resistor R4, the other end of the resistor R4 is connected with the drain electrode of the switch transistor MC1, and the drain electrode of the switch transistor MC1 is simultaneously connected with the other end of the resistor R3; when a digital control signal C0 input from the outside of the oscillator is 1, the other end of the capacitor C1 and the other end of the capacitor C2 are connected to the resonant cavity of the double-resonant-cavity noise-filtering voltage-controlled oscillator through the input ports p1 and p 2; when the digital control signal C0 is equal to 0, the other end of the capacitor C1 and the other end of the capacitor C2 are not connected to the resonant cavity, and when the digital control signal C1 is equal to 1, the other end of the capacitor C3 and the other end of the capacitor C4 are connected to the resonant cavity through the input ports p2 and p1 of the external coil of the source-drain coupling transformer; when a digital control signal C1 input from the outside of the oscillator is equal to 0, the other end of the capacitor C3 and the other end of the capacitor C4 are not connected to the resonant cavity, and the fixed capacitor array is used for discretely adjusting the oscillation frequency;

the variable capacitor array is composed of a varactor CV1, a varactor CV2, a varactor CV3 and a varactor CV4, wherein a gate terminal of the varactor CV1 is connected with an input port p1, a gate terminal of the varactor CV2 is connected with a control terminal network 1, a gate terminal of the varactor CV 3683 is connected with an input port p2, a gate terminal of the varactor CV2 is connected with the control terminal network 1, a gate terminal of the varactor CV3 is connected with the input port p3, a gate terminal of the varactor CV3 is connected with the control terminal network 1, a gate terminal of the varactor CV4 is connected with an input port p4, and a gate terminal of the varactor CV4 is connected with the control terminal network 1. The variable capacitor array is used for continuously adjusting the oscillation frequency;

the source-drain coupling transformer is composed of a winding of a ninth metal layer with a very thick thickness in a 65nm process, and comprises 6 ports: two output ports p1 and p2 of the outer ring L1 are respectively connected with radio frequency transistors M1 and M2 of the cross-coupled pair transistors, two output ports p3 and p4 of the inner ring L2 are connected with the sources of the cross-coupled pair transistors, a voltage bias tap p5 of a source-drain coupled transformer is connected with a power supply, and a tap ground p6 is grounded; the source-drain coupling transformer is used for forming a source-drain homodromous oscillation waveform;

the second harmonic blocking circuit consists of an inductance-capacitance resonant cavity Ls and a capacitor Cs which resonate at carrier frequency twice, the inductance-capacitance resonant cavity Ls is connected with the inductance-capacitance Cs in parallel, one end of the inductance-capacitance resonant cavity Ls, which is connected with the inductance-capacitance Cs in parallel, is connected with a tap ground p6 of the source-drain coupling transformer, and the other end of one end of the inductance-capacitance resonant cavity Ls, which is connected with the inductance-capacitance Cs in parallel, is grounded; the second harmonic blocking circuit is used for suppressing a second harmonic current in the oscillator.

In order to make the objects, technical solutions and features of the present invention clearer and more clear, the following detailed description and description are made with reference to the accompanying drawings:

as shown in fig. 1, the low-phase-noise voltage-controlled oscillator with dual resonant cavities and noise filters of the present invention is composed of cross-coupled pair transistors, a fixed capacitor array, a variable capacitor array, a source-drain coupled transformer, and a second harmonic blocking circuit. The cross-coupled pair transistor consists of two symmetrical TSMC CMOS 65nm nmos _25ud18 RF transistors, the gate and drain of which are connected to the drain and gate of the other through metal wires, respectively, to compensate the loss in the LC resonator to maintain oscillation. The fixed capacitor array is composed of capacitors controlled by 2-bit digital codes, the digitally controlled capacitors can be controlled by external digital control codes to access the resonant cavities of the oscillator, and the more the digitally controlled capacitors are controlled by the external digital control codes to access the resonant cavities of the oscillator, the lower the oscillation frequency is. The variable capacitor array is composed of a pair of variable capacitors, wherein each variable capacitor is a self-reflecting transistor with a source and a drain of N-type heavy doping and a well of N-type light doping, the capacitance value of the self-reflecting transistor is increased along with the increase of grid-body voltage, the connection method of the variable capacitors in the oscillator is that a grid electrode is connected with an output node, and a body end is connected with a control voltage node, so that the larger the control voltage is, the smaller the grid-body voltage is, the smaller the capacitance of the variable capacitors connected into the resonant cavity is, and the higher the oscillation frequency is. The source-drain coupling transformer consists of a winding of a ninth extremely thick layer in a 65nm process and comprises 6 ports: 2 ports (p1, p2) of the outer ring are connected with the drains of the coupled pair transistors, 2 ports (p3, p4) of the inner ring are connected with the sources of the coupled pair transistors, 1 tap voltage bias point (p5) and 1 tap ground (p 6); the second harmonic wave blocking circuit consists of an inductance capacitance resonant cavity (Ls, Cs) with smaller resonance frequency doubling at carrier frequency; the second harmonic blocking circuit can suppress the second harmonic current in the oscillator, thereby suppressing the flicker noise up-conversion and improving the phase noise performance; the specific connection mode is as follows:

the cross-coupled pair transistor shown in fig. 1 is formed by transistors M1, M2, wherein transistors M1, M2 are NMOS transistors. The grid electrode of the NMOS transistor M1 is connected with an input node p2 of a transformer outer ring L1, the drain electrode of the NMOS transistor M1 is connected with an input node p1 of a transformer outer ring L1, and the grid electrode of the NMOS transistor M1 is connected with an input node p3 of a transformer inner ring L2; the gate of the NMOS transistor M2 is connected to the input node p1 of the transformer outer L1, the drain of the NMOS transistor M2 is connected to the input node p2 of the transformer outer L1, and the gate of the NMOS transistor M2 is connected to the input node p4 of the transformer inner L2. The variable capacitor array shown in fig. 1 is composed of varactors CV1, CV2, CV3 and CV4, wherein the gate of the varactor CV1 is connected with p1, and the body of the varactor CV1 is connected with a control terminal network wire 1; the grid end of the varactor CV2 is connected with p2, and the end of the varactor CV2 is connected with a control end network cable 1; the grid end of the varactor CV3 is connected with p3, and the end of the varactor CV3 is connected with a control end network cable 1; varactor CV4 gate terminal is connected to p4, body terminal is connected to control end network wire 1. The fixed capacitor array of fig. 1 is shown in detail in fig. 2.

The fixed capacitor array shown in fig. 2 is composed of capacitors C1, C2, C3 and C4, 4 resistors R1, R2, R3 and R4 respectively connected with the capacitors, two switching transistors MC0 and MC1, and two inverters F0 and F1; the capacitor C1 is connected with the resistor R1, the resistor R1 is connected with the output end of the inverter F0, the output end of the inverter F0 is connected with the resistor R2, the resistor R2 is connected with the switch transistor MC0, and the switch transistor MC0 is connected with the resistor R1; the capacitor C3 is connected with the resistor R3, the resistor R3 is connected with the output end of the inverter F1, the output end of the inverter F1 is connected with the resistor R4, the resistor R4 is connected with the switch transistor MC1, and the switch transistor MC1 is connected with the resistor R3; when a digital control signal C0 input from the outside of the oscillator is 1, the capacitor C1 and the capacitor C2 are connected to the resonant cavity of the double-resonant-cavity noise-filtering voltage-controlled oscillator through the input ports p1 and p 2; when the digital control signal C0 is equal to 0, the capacitor C1 and the capacitor C2 are not connected to the resonant cavity, and when the digital control signal C1 is equal to 1, the capacitor C3 and the capacitor C4 are connected to the resonant cavity through the input ports p1 and p 2; when the digital control signal C1 input from the outside of the oscillator is 0, the capacitor C3 and the capacitor C4 are not connected into the resonant cavity; the fixed capacitor array is used for discretely adjusting oscillation frequency;

the source-drain coupling transformer shown in fig. 1 is composed of a winding of an extremely thick ninth metal layer in a 65nm process, and comprises 6 ports: 2 ports (p1, p2) of the outer ring are connected with the drains of the coupled pair transistors, 2 ports (p3, p4) of the inner ring are connected with the sources of the coupled pair transistors, 1 tap voltage bias point (p5) and 1 tap ground (p 6); the value range of the coupling coefficient k of the two coils is 0.4-0.3.

The second harmonic blocking circuit shown in fig. 1 is composed of an inductance-capacitance resonant cavity (Ls, Cs) with a smaller resonance frequency doubled at the carrier frequency; ls and Cs are connected in parallel, one end of the Ls and Cs is connected with a p6 port, and the other end of the Ls and Cs is grounded; the second harmonic blocking circuit can suppress the second harmonic current in the oscillator, thereby suppressing flicker noise up-conversion and improving the phase noise performance.

In an embodiment of the present invention, a 65nm CMOS process (which is a conventional fabrication process in the art) is used to fabricate a low-phase noise dual-resonator noise-filtering voltage-controlled oscillator circuit, and simulation results thereof are shown in fig. 3 and 4. Fig. 3 is a comparison graph of ISF functions of voltage-controlled oscillators before and after the second harmonic blocking circuit is adopted, the overall ISF function is decreased, the average value of the ISF function is also decreased, according to the pulse sensitive function theory, the degree of up-conversion of flicker noise into phase noise is weakened, and the comparison graph can be verified by fig. 4; fig. 4 is a phase noise comparison diagram of voltage controlled oscillators before and after a second harmonic blocking circuit is used, and the level of phase noise is reduced after the second harmonic blocking circuit is used. As can be seen from fig. 3 and 4, the voltage-controlled oscillator circuit proposed by the present invention can improve the phase noise performance of the conventional voltage-controlled oscillator circuit.

The above examples demonstrate the correctness and effectiveness of the present invention. The above description is only for the low phase noise capacitive-inductive voltage-controlled oscillator under a specific CMOS process and a specific frequency band, but is not intended to limit the scope of the present invention.