阅读说明：本技术 基于布线优化的碳化硅功率开关器件并联设计方法 (Parallel design method of silicon carbide power switch device based on wiring optimization ) 是由 张千帆 曲建真 崔淑梅 王金鑫 袁雪 于 2019-11-06 设计创作，主要内容包括：一种基于布线优化的碳化硅功率开关器件并联设计方法,属于电力电子技术领域。本发明针对现有SiC器件并联方案中,由于不相等的开关损耗和瞬态电流的限制,无法在多个SiC器件并联时发挥SiC器件的最佳性能的问题。包括在PCB电路板上,依次并行设置至少三个布线分隔槽,在每个布线分隔槽内设置由两个SiC器件组成的功率半桥,从而增加相邻功率半桥之间的寄生电感。本发明可改善多个SiC器件并联应用中存在的开关瞬态电流均流性能,可将SiC器件稳定可靠的应用于大功率和大电流电力电子变换器。(A parallel design method of a silicon carbide power switch device based on wiring optimization belongs to the technical field of power electronics. The invention aims at the problem that the optimal performance of the SiC device can not be exerted when a plurality of SiC devices are connected in parallel due to unequal switching loss and transient current limitation in the existing parallel connection scheme of the SiC device. The power half-bridge structure comprises at least three wiring separation grooves which are sequentially arranged on a PCB in parallel, and a power half-bridge composed of two SiC devices is arranged in each wiring separation groove, so that parasitic inductance between adjacent power half-bridges is increased. The invention can improve the current sharing performance of the switch transient current existing in the parallel application of a plurality of SiC devices, and can stably and reliably apply the SiC devices to high-power and high-current power electronic converters.)

1. A parallel design method of a silicon carbide power switch device based on wiring optimization is characterized by comprising the following steps:

at least three wiring separation grooves are sequentially arranged on the PCB in parallel, and a power half-bridge consisting of two SiC devices is arranged in each wiring separation groove, so that the parasitic inductance between the adjacent power half-bridges is increased.

2. The wiring-optimization-based parallel design method for silicon carbide power switching devices according to claim 1, wherein two direct current capacitors are connected in parallel between the two SiC devices.

3. The parallel design method for the SiC power switches based on the wiring optimization according to claim 2, wherein the number of the wiring separation grooves is four, and eight SiC devices and eight DC capacitors in the four wiring separation grooves form a half-bridge unit.

4. The parallel design method of silicon carbide power switching devices based on wiring optimization according to claim 3, further comprising designing a driving circuit, wherein the driving circuit utilizes a laminated busbar wiring manner to reduce the difference of parasitic loop inductances of the driving circuits, so that the same driving signal is applied to each parallel SiC device.

Technical Field

The invention relates to a parallel design method of a silicon carbide power switch device based on wiring optimization, and belongs to the technical field of power electronics.

Background

Silicon carbide (SiC) power switching devices can break through three performance limits of existing silicon devices: higher blocking voltage, higher operating temperature and higher switching speed. The SiC device is used in the power electronic converter, so that the system efficiency can be obviously improved, and the volume and weight of a cooling and heat dissipation system and a passive filter device are reduced, so that the system power density is obviously improved.

The current capacity of an individual SiC device is generally low in view of the manufacturing yield of the SiC device. In order to apply SiC devices to high power and high current power electronic converters, it is often necessary to connect a plurality of SiC devices in parallel. However, unequal switching losses and transient current overshoot between the parallel SiC devices limit the maximum switching frequency and maximum current capacity of the parallel unit, and thus the optimum performance of the SiC devices cannot be achieved.

Therefore, the existing SiC device parallel scheme has two problems: 1, the number of parallel devices is usually less than 3, which limits the maximum current capacity of the parallel unit; 2 additional auxiliary current sharing devices, such as power coupling inductors, high bandwidth current sensors, etc., are usually required, which increases the system cost, and at the same time, increases the system complexity, thereby reducing the reliability of the overall operation of the system.

Disclosure of Invention

Aiming at the problem that the optimal performance of a SiC device cannot be exerted when a plurality of SiC devices are connected in parallel due to unequal switching loss and transient current limitation in the existing SiC device parallel connection scheme, the invention provides a wiring optimization-based parallel design method for a silicon carbide power switch device.

The invention discloses a parallel design method of a silicon carbide power switch device based on wiring optimization.

According to the parallel design method of the silicon carbide power switch device based on wiring optimization, two direct current capacitors are connected between the two SiC devices in parallel.

According to the parallel design method of the silicon carbide power switch device based on the wiring optimization, the number of the wiring separation grooves is four, and eight SiC devices and eight direct current capacitors in the four wiring separation grooves form a half-bridge unit.

According to the parallel design method of the silicon carbide power switch device based on the wiring optimization, the design method further comprises the step of designing a driving circuit, wherein the driving circuit reduces the difference of parasitic loop inductance of the driving circuit by using a laminated busbar wiring mode, so that the same driving signal is applied to each parallel SiC device.

The invention has the beneficial effects that: the method improves the current sharing performance of the switch transient current existing in the parallel application of a plurality of SiC devices, and can stably and reliably apply the SiC devices to high-power and high-current power electronic converters.

The invention is suitable for the parallel connection design of a plurality of SiC power switching devices, does not increase an additional auxiliary current-sharing device, improves the transient current-sharing problem in the parallel connection application of a plurality of SiC devices by increasing the separating groove in the optimized layout design of the power circuit, and thereby reduces the cost and the complexity of the system.

Drawings

FIG. 1 is a schematic diagram of a silicon carbide power switching device designed using the method of the present invention in parallel; the dashed line boxes in the drawings represent wiring separation grooves;

fig. 2 is a schematic view showing the generation of parasitic inductance between adjacent wiring dividing grooves in fig. 1;

FIG. 3 is a schematic illustration of the parasitic inductance formed between prior parallel silicon carbide devices;

FIG. 4 is a schematic illustration of the parasitic inductance formed between parallel silicon carbide devices designed using the method of the present invention; in the figure, the PCB separation groove is a wiring separation groove;

FIG. 5 is a waveform diagram of transient current experimental test for switching on the upper switching tube in a conventional silicon carbide parallel half bridge;

FIG. 6 is a waveform of a test of the switching transient current of the lower and middle diodes of a conventional silicon carbide parallel half bridge;

FIG. 7 is a waveform diagram of an experimental test of the switching transient current of the lower switching tube in the conventional silicon carbide parallel half bridge;

FIG. 8 is a waveform of a test waveform of a turn-on transient current experiment of a body diode on a conventional silicon carbide parallel half bridge;

FIG. 9 is a waveform diagram of experimental test of transient current switching on upper switching tubes of a silicon carbide parallel half bridge designed by the method of the present invention;

FIG. 10 is a waveform of experimental test of turn-on transient current of lower and middle body diodes of a silicon carbide parallel half bridge designed by the method of the present invention;

FIG. 11 is a waveform diagram of experimental transient current switching test of the lower switching tube in the silicon carbide parallel half bridge designed by the method of the present invention;

FIG. 12 is a waveform of experimental testing of turn-on transient current for a body diode on a silicon carbide parallel half bridge designed by the method of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.

The invention is further described with reference to the following drawings and specific examples, which are not intended to be limiting.