Digital filter based on distributed algorithm

文档序号:1508266 发布日期:2020-02-07 浏览:34次 中文

阅读说明:本技术 一种基于分布式算法的数字滤波器 (Digital filter based on distributed algorithm ) 是由 贺克军 龙善丽 吴传奇 童紫平 唐兴刚 张紫乾 武凤芹 徐福彬 张慧 于 2019-10-24 设计创作,主要内容包括:本发明公开了一种基于分布式算法的数字滤波器,由CIC滤波器、CIC补偿滤波器和半带滤波器级联构成;输入信号经过CIC滤波器进行抽取滤波,降低高速系统的工作频率;随后将信号送入CIC补偿滤波器,补偿信号在CIC滤波器中的通带衰减,并进一步增加阻带衰减,减小过渡带带宽;最后信号经过基于分布式算法的半带滤波器后,过渡带更加陡峭,阻带衰减再次降低,完全满足数字滤波器性能要求后输出有用信号。各滤波器参数在达到滤波器总体性能、满足信号处理速度的前提下,最大程度减小硬件资源消耗,缩减实现电路的面积。(The invention discloses a digital filter based on a distributed algorithm, which is formed by cascading a CIC filter, a CIC compensation filter and a half-band filter; the input signal is subjected to decimation filtering through a CIC filter, so that the working frequency of a high-speed system is reduced; then, the signal is sent to a CIC compensation filter, the passband attenuation of the signal in the CIC filter is compensated, the stop band attenuation is further increased, and the transition band bandwidth is reduced; and finally, after the signal passes through a half-band filter based on a distributed algorithm, the transition band is steeper, the stop band attenuation is reduced again, and a useful signal is output after the performance requirement of the digital filter is completely met. On the premise that the parameters of each filter reach the overall performance of the filter and meet the signal processing speed, the hardware resource consumption is reduced to the maximum extent, and the area of a circuit is reduced.)

1. A digital filter based on distributed algorithm is characterized in that the digital filter is formed by cascading a CIC filter, a CIC compensation filter and a half-band filter;

the input signal is extracted and filtered by a CIC filter and then is sent to a CIC compensation filter, and the passband attenuation of the compensation signal in the CIC filter is compensated; and then the signal is used as an output useful signal after passing through a half-band filter.

2. The digital filter based on distributed algorithm of claim 1, wherein the CIC filter adopts an N-stage CIC filter architecture, and the stop band attenuation of the N-stage CIC filter is N times of a single stage.

3. The digital filter based on the distributed algorithm of claim 1, wherein the CIC filter comprises an integrator module, a comb filter module, and a decimation module.

4. A digital filter based on distributed algorithm as claimed in claim 1, characterized in that the CIC compensation filter uses FIR filter.

5. The digital filter based on distributed algorithm of claim 1, wherein the CIC compensation filter comprises 1 multiply-accumulator and a storage unit for storing filter coefficients.

6. A digital filter based on distributed algorithm as claimed in claim 1 or 5, wherein in the CIC compensation filter, the output signal is obtained by adding all products of a plurality of coefficients respectively multiplied by the data output by the CIC filter.

7. The digital filter according to claim 1, wherein the half-band filter is an even symmetric FIR filter, and the coefficients are symmetric and have a half coefficient value of 0.

8. The digital filter based on the distributed algorithm as claimed in claim 1, wherein the filter coefficients of the half-band filter are pre-stored in ROM, and the coefficients and the output signal of the CIC compensation filter are put into the operation unit for operation by addressing the control signal, and the coefficients are stored in RAM;

the operation unit comprises a multiplier, the rest operations are completed by addition and shift, and the intermediate result of the operation is stored in the RAM;

the control signal addressing reads out the final operation result of the operation unit from the RAM as an output useful signal.

Technical Field

The invention relates to the field of digital signal processing, in particular to a digital filter, which is particularly suitable for signal processing in a sigma-delta ADC system. The method reduces the use of hardware resources to the maximum extent on the premise of ensuring the digital filtering performance.

Background

The present digital filter is widely applied to the field of data signal processing, such as a decimation filter in an ADC, an interpolation filter in a DAC, and the like. Iir (infinite impulse response) filters and fir (finite impulse response) filters are the most common digital filters in linear time invariant systems. The IIR filter has high filtering efficiency, can obtain good amplitude-frequency response of the filter by using less hardware resources, but is limited in application neighborhood due to the fact that the IIR filter does not have strict linear phase characteristics; and IIR has feedback on the realization framework, the finite word length effect is a problem which must be considered in the filter operation process, and the system oscillation is easily caused by improper processing. The FIR filter has strict linear phase characteristics and generally adopts a non-recursive structure, so that the FIR filter is less influenced by a finite word length effect; however, the FIR filter operation is a convolution operation, and the order of the FIR filter operation is 5 to 10 times of the order of the IIR filter under the condition of satisfying the same amplitude-frequency response index, so that the operation consumes a large amount of hardware resources.

In a multi-rate signal processing system, a CIC (cascade Integrator comb) filter is also often used, for example, a quantized analog signal in a sigma-delta adc first enters the CIC filter for decimation filtering anti-aliasing. The CIC filter has the characteristics of simple realization and high operation speed, and only needs an adder and a multiplier. However, CIC filters generally have the problems of severe passband attenuation, wide transition band, and the like. The stop-band attenuation is related to the filter series, and larger stop-band attenuation inevitably consumes more hardware resources while suppressing the side lobe.

Disclosure of Invention

The invention provides a digital filter based on a distributed algorithm aiming at the defects of the prior art.

In order to solve the technical problems, the technical scheme adopted by the invention is as follows:

a digital filter based on distributed algorithm is characterized in that the digital filter is formed by cascading a CIC filter, a CIC compensation filter and a half-band filter;

the input signal is extracted and filtered by a CIC filter and then is sent to a CIC compensation filter, and the passband attenuation of the compensation signal in the CIC filter is compensated; and then the signal is used as an output useful signal after passing through a half-band filter.

Furthermore, the CIC filter adopts an N-level CIC filter architecture, and the stop band attenuation of the N-level CIC filter is N times of that of a single level.

Further, the CIC filter includes an integrator module, a comb filter module, and a decimation module.

Further, the CIC compensation filter employs an FIR filter.

Further, the CIC compensation filter includes 1 multiply-accumulator and a storage unit for storing the filter coefficients.

Furthermore, in the CIC compensation filter, all products obtained by multiplying a plurality of coefficients by the data output by the CIC filter are added to obtain an output signal.

Further, the half-band filter is an even symmetric FIR filter, with symmetric coefficients and half coefficient value of 0.

Furthermore, the filter coefficient of the half-band filter is pre-stored in the ROM, the coefficient and the signal output by the CIC compensation filter are put into an operation unit for operation through control signal addressing, and the coefficient is stored in the RAM;

the operation unit comprises a multiplier, the rest operations are completed by addition and shift, and the intermediate result of the operation is stored in the RAM;

the control signal addressing reads out the final operation result of the operation unit from the RAM as an output useful signal.

The invention achieves the following beneficial effects:

firstly, an input signal is subjected to decimation filtering through a CIC filter, so that the working frequency of a high-speed system is reduced; then, the signal is sent to a CIC compensation filter, the passband attenuation of the signal in the CIC filter is compensated, the stop band attenuation is further increased, and the transition band bandwidth is reduced; and finally, after the signal passes through a half-band filter based on a distributed algorithm, the transition band is steeper, the stop band attenuation is reduced again, and a useful signal is output after the performance requirement of the digital filter is completely met. According to the cascade filter based on the distributed algorithm, on the premise that the parameters of each filter reach the overall performance of the filter and meet the signal processing speed, the hardware resource consumption is reduced to the maximum extent, and the area of a circuit is reduced.

Drawings

FIG. 1 is a general architecture for implementing the filter of the present invention;

FIG. 2 is a CIC filter implementation architecture of the present invention;

FIG. 3 is a CIC compensation filter implementation architecture of the present invention;

fig. 4 is a half-band filter implementation architecture based on a distributed algorithm according to the present invention.

Detailed Description

The invention is further described below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.

As shown in fig. 1, the present invention is composed of a cascade of a CIC filter, a CIC compensation filter and a half-band filter. Firstly, an input signal is subjected to decimation filtering through a CIC filter, so that the working frequency of a high-speed system is reduced; then, the signal is sent to a CIC compensation filter, the passband attenuation of the signal in the CIC filter is compensated, the stop band attenuation is further increased, and the transition band bandwidth is reduced; and finally, after the signal passes through a half-band filter based on a distributed algorithm, the transition band is steeper, the stop band attenuation is reduced again, and a useful signal is output after the performance requirement of the digital filter is completely met.

Shown in fig. 2 is an N-stage CIC filter architecture. The system mainly comprises an integrator module, a comb filter module and a decimation module M. The stopband attenuation of the N-stage CIC filter is N times of that of a single stage, and the transfer function of the N-stage CIC filter is as follows:

Figure 111950DEST_PATH_IMAGE002

wherein D is a filter delay factor, and 1 is generally selected in high-speed design; m is a filter decimation factor; and N is the filter order.

In sigma-delta adcs, the second stage CIC compensation filter is typically implemented as a FIR filter and the order of the compensation filter is not too high since its main role is to compensate for signal attenuation in the passband. The first stage CIC filter usually has a larger decimation value, and when the second stage compensation filter is designed, the second stage compensation filter can be designed in a time multiplexing manner. The FIR filter essentially multiplies the data output from the CIC filter by each coefficient, and finally adds all the products. The specific architecture of the CIC compensation filter is shown in fig. 3, and the whole compensation filter design only needs 1 multiplier-accumulator and a storage unit for storing the filter coefficient, which is equivalent to the design of the pipeline, although the design difficulty is improved to some extent, the circuit area is greatly saved.

The sigma-delta ADC filter output generally requires that the stop band and the pass band are symmetrical, and the pass band side frequency and the stop band side frequency are symmetrical based on fs/4. The last stage filter therefore usually employs a half-band filter, which is essentially an even symmetric FIR filter whose coefficients are symmetric and have half 0. However, in order to obtain a steep transition band, and other performances of the filter all need to meet design indexes, the order of the last stage half-band filter is higher, and the structure of the second stage compensation filter cannot be adopted for realization. The design of the last-stage high-order half-band filter is realized by adopting a distributed algorithm, as shown in figure 4. The filter coefficients can be pre-stored in the ROM, and the coefficients and the signals output by the CIC compensation filter are put into an arithmetic unit for operation through control signal addressing, and the coefficients are stored in the RAM for standby. The arithmetic unit only comprises a multiplier, the rest operations are all completed by addition and shift, and the intermediate result of the operation is stored in the RAM. Finally, the final operation result is read out from the RAM by the addressing of the control signal, and a useful signal is output. The high-order half-band filter adopting the distributed algorithm only uses one multiplier, and other operations are completed by more convenient addition and shift, so that the operation speed is not reduced, and the hardware expense is saved.

The invention designs a digital filter by adopting a distributed algorithm, and the filter uses a cascade structure and is suitable for digital signal processing of sigma-delta ADC circuits and the like. The filter can meet various performance indexes of a system based on the filter, and the filter realized by adopting time multiplexing and distributed algorithm can greatly reduce the circuit hardware overhead and save the chip area without reducing the operation speed.

The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.

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