Photoetching plate and method for manufacturing integrated circuit

文档序号:152567 发布日期:2021-10-26 浏览:42次 中文

阅读说明:本技术 光刻版及集成电路的制造方法 (Photoetching plate and method for manufacturing integrated circuit ) 是由 樊航 于 2020-04-23 设计创作,主要内容包括:本发明涉及一种光刻版及集成电路的制造方法。该光刻版包括多个用于光刻对位的光栅图形单元,光栅图形单元包括多个膜层保留区域图形和多个间隙区域图形,至少有一个膜层保留区域图形的宽度与其余膜层保留区域图形的宽度不同,间隙区域图形与膜层保留区域图形间隔排列,间隙区域图形的数量与膜层保留区域图形的数量相同,且大于等于2;其中,间隙区域图形的最大宽度小于光栅图形单元的宽度的一半。与传统的光刻版上的光栅图形单元相比,制作工艺的波动对晶圆上本申请中的光栅图形单元的形貌的影响较小,光栅图形单元的形貌更易控制且均匀性更好,不易生成填充不足的光栅图形单元,可以较大程度的减小光刻工艺的返工率,降低生产成本。(The invention relates to a method for manufacturing a photoetching plate and an integrated circuit. The photoetching plate comprises a plurality of grating graphic units for photoetching alignment, wherein each grating graphic unit comprises a plurality of film layer reserved area graphs and a plurality of gap area graphs, the width of at least one film layer reserved area graph is different from the width of the rest film layer reserved area graphs, the gap area graphs and the film layer reserved area graphs are arranged at intervals, and the number of the gap area graphs is the same as that of the film layer reserved area graphs and is more than or equal to 2; wherein the maximum width of the gap area pattern is less than half of the width of the raster pattern unit. Compared with the conventional grating pattern unit on the photoetching plate, the grating pattern unit on the wafer has the advantages that the influence of the fluctuation of the manufacturing process on the appearance of the grating pattern unit is small, the appearance of the grating pattern unit is easier to control and has better uniformity, the grating pattern unit which is not filled enough is not easy to generate, the rework rate of the photoetching process can be reduced to a large extent, and the production cost is reduced.)

1. A reticle including a plurality of grating patterning units for photolithographic alignment, the grating patterning units comprising:

the film layer reserved area patterns are film reserved areas in the grating pattern units, and the width of at least one film layer reserved area pattern is different from the width of the rest film layer reserved area patterns;

the gap area patterns are film removing areas in the grating pattern units, the gap area patterns and the film layer reserving area patterns are arranged at intervals, and the number of the gap area patterns is the same as that of the film layer reserving area patterns and is more than or equal to 2;

wherein the maximum width of the gap area pattern is less than half of the width of the grating pattern unit, and the width of the grating pattern unit is the sum of the widths of the film layer reserved area patterns and the gap area patterns.

2. The reticle of claim 1, wherein the grating pattern unit comprises 3 patterns of the film retention areas, and wherein two patterns of the film retention areas have the same width.

3. The reticle of claim 1, wherein the width of one or more of the film layer retention area patterns in the raster pattern unit is the same as the width of the gap area pattern on an adjacent side.

4. The reticle of claim 1, wherein the width of each of the film layer retention area patterns in the raster graphics unit is different from the width of the adjacent gap area pattern.

5. The reticle of claim 1, wherein the raster graphics unit includes 4 of the film retention area patterns, and wherein at least two of the film retention area patterns have different widths.

6. The reticle of claim 1, wherein the width of the film layer retention area pattern and/or the gap area pattern in the grating pattern unit is greater than or equal to 0.5 micrometers and less than or equal to 2 micrometers.

7. The reticle of claim 1, wherein the width of the raster graphics unit is equal to 8 microns.

8. The reticle of claim 1, wherein a difference between a sum of widths of the film layer retention area patterns and a sum of widths of the gap area patterns in the grating pattern unit is 0 micron or more and 1 micron or less.

9. A lithographic plate comprising a marking pattern unit for lithographic alignment, the marking pattern unit comprising X rows and Y columns of grating pattern units, wherein the grating pattern units are according to any one of claims 1 to 8, X is an odd number equal to or greater than 2, and Y is an integer equal to or greater than 2.

10. The reticle of claim 9, wherein the label graphic elements comprise 5 rows and 7 columns of grating graphic elements or 7 rows and 7 columns of grating graphic elements, and the spacing between the same side edges of two adjacent columns of grating graphic elements is 20 microns.

11. A method of manufacturing an integrated circuit, comprising:

obtaining a substrate, wherein a first thin film is formed on the substrate;

performing photolithography on the photoresist formed on the first film by using the reticle according to claim 9 or 10, wherein the photoresist after the photolithography is completed covers the first film of the film layer reserved region pattern, and the first film of the gap region pattern is exposed;

etching the first film of the exposed gap area pattern of the photoresist to obtain a grating pattern unit which is formed by a film layer reserved area pattern and the gap area pattern and forms a marking pattern unit, wherein the etched film layer reserved area pattern is higher than the gap area pattern, and a height difference is formed between the film layer reserved area pattern and the gap area pattern;

forming a second film on the first film, wherein the second film on the film layer retention region pattern and the gap region pattern of the first film is influenced by the height difference to form a diffraction grating on the upper surface of the second film;

and photoetching and aligning through the diffraction grating, photoetching the photoresist formed on the second film and etching the second film.

12. The method of manufacturing of claim 11, wherein the step of lithographically aligning by the diffraction grating is performed by an LSA system; and the step of obtaining the grating pattern unit which is formed by the film layer reserved area pattern and the gap area pattern and forms the marking pattern unit is to form the grating pattern unit on the scribing channel.

13. The manufacturing method according to claim 11, wherein the step of covering the photoresist on the first film patterned with the film layer reserved area after the completion of the photolithography further comprises:

the photoresist after photoetching covers the first film between two adjacent lines of grating pattern units;

or the photoresist after the photoetching is finished covers the first film of the film layer reserved area pattern, and the step of exposing the first film of the gap area pattern further comprises the following steps:

exposing a first thin film between two adjacent lines of grating pattern units by the photoresist after photoetching;

the step of etching the first film of the pattern of the exposed gap region of the photoresist further comprises:

and etching the first film between two adjacent lines of grating pattern units exposed by the photoresist.

Technical Field

The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a photoetching plate integrated circuit.

Background

Before photoetching exposure, wafer (wafer) alignment is needed, and the precision of photoetching wafer alignment directly influences conduction between a subsequent circuit and a previous layer circuit. LSA (Laser Step Alignment) is the preferred Alignment method for NIKON lithography machines because of its high Alignment precision. However, the inventors found that the alignment using LSA in actual production may cause an alignment error.

Disclosure of Invention

In view of the above, it is desirable to provide a lithographic plate and a method for manufacturing an integrated circuit.

A reticle comprising a plurality of grating patterning units for lithographic alignment, the grating patterning units comprising:

the film layer reserved area patterns are film reserved areas in the grating pattern units, and the width of at least one film layer reserved area pattern is different from the width of the rest film layer reserved area patterns; the gap area patterns are film removing areas in the grating pattern units, the gap area patterns and the film layer reserving area patterns are arranged at intervals, and the number of the gap area patterns is the same as that of the film layer reserving area patterns and is more than or equal to 2; wherein the maximum width of the gap area pattern is less than half of the width of the grating pattern unit, and the width of the grating pattern unit is the sum of the widths of the film layer reserved area patterns and the gap area patterns.

In one embodiment, the grating pattern unit comprises 3 film layer reserved area patterns, and the width of two film layer reserved area patterns is the same.

In one embodiment, the width of one or more patterns of the reserved area of the film layer in the grating pattern units on the photoetching plate is the same as the width of the patterns of the gap area on the adjacent side.

In one embodiment, the widths of the film layer reserved area patterns in the grating pattern units on the photoetching plate are different from the widths of the adjacent gap area patterns.

In one embodiment, the grating pattern unit on the reticle comprises 4 patterns of the film retention areas, and at least two patterns of the film retention areas have different widths.

In one embodiment, the width of the film layer reserved area pattern and/or the gap area pattern in the grating pattern unit on the photoetching plate is greater than or equal to 0.5 micrometer and less than or equal to 2 micrometers.

In one embodiment, the width of the raster graphics unit is equal to 8 microns.

In one embodiment, the difference between the sum of the widths of the film layer reserved area patterns and the sum of the widths of the gap area patterns in the grating pattern units on the photoetching plate is greater than or equal to 0 micron and less than or equal to 1 micron.

The photoetching plate comprises a plurality of grating pattern units for photoetching alignment, wherein each grating pattern unit comprises a plurality of film layer reserved area patterns, each film layer reserved area pattern is a film reserved area in each grating pattern unit, and the width of at least one film layer reserved area pattern is different from the width of the rest film layer reserved area patterns; the gap area patterns are film removing areas in the grating pattern units, the gap area patterns and the film layer reserving area patterns are arranged at intervals, and the number of the gap area patterns is the same as that of the film layer reserving area patterns and is more than or equal to 2; wherein the maximum width of the gap area pattern is less than half of the width of the grating pattern unit, and the width of the grating pattern unit is the sum of the widths of the film layer reserved area patterns and the gap area patterns. Compare with the grating pattern unit on traditional photoetching version, among the grating pattern unit on the photoetching version in this application clearance area figure with retentive area figure interval arrangement, clearance area figure with the quantity that the retentive area figure is the same, and more than or equal to 2, the width that has at least one retentive area figure is different with the width that the rest retentive area figure, the maximum width of clearance area figure is less than half of the width of grating pattern unit, the fluctuation of preparation technology is less to the influence of grating pattern unit appearance on the wafer, and the appearance of grating pattern unit is changeed control and homogeneity better, is difficult for generating the grating pattern unit that fills inadequately after the follow-up technology is accomplished, can be great reduction photoetching process's rework rate, reduction in production cost.

A photoetching plate comprises a marking graphic unit for photoetching alignment, wherein the marking graphic unit comprises X-row and Y-column grating graphic units, the grating graphic units are any one of the grating graphic units, X is an odd number larger than or equal to 2, and Y is an integer larger than or equal to 2.

In one embodiment, the mark pattern units on the reticle include 5 lines and 7 columns of grating pattern units or 7 lines and 7 columns of grating pattern units, and the distance between the same side edges of two adjacent lines of grating pattern units is 20 micrometers.

The photoetching plate comprises a marking graphic unit for photoetching alignment, wherein the marking graphic unit comprises X-row and Y-column grating graphic units, the grating graphic units are any one of the grating graphic units, X is an odd number greater than or equal to 2, and Y is an integer greater than or equal to 2. Compared with the marking pattern unit on the traditional photoetching plate, the gap area patterns in the grating pattern unit forming the marking pattern unit on the photoetching plate are arranged at intervals with the film layer reserved area patterns, the number of the gap area patterns is the same as that of the film layer reserved area patterns and is more than or equal to 2, the width of at least one film layer reserved area pattern is different from that of the rest film layer reserved area patterns, the maximum width of the gap area pattern is less than half of the width of the grating pattern unit, the influence of the fluctuation of the manufacturing process on the appearance of the grating pattern unit in the marking pattern unit on the wafer is small, the appearance of the marking pattern unit is easier to control and has better uniformity, the mark pattern unit of the photoetching alignment with insufficient filling is not easy to generate after the subsequent process is completed, and the rework rate of the photoetching process can be greatly reduced, the production cost is reduced.

A method of manufacturing an integrated circuit, comprising:

a substrate is obtained, and a first thin film is formed on the substrate.

And photoetching the photoresist formed on the first film by using the photoetching plate of the mark pattern unit comprising photoetching alignment, wherein the photoresist after photoetching covers the first film of the film layer reserved region pattern, and the first film of the gap region pattern is exposed.

And etching the first film of the exposed gap area pattern of the photoresist to obtain a grating pattern unit which is formed by a film layer reserved area pattern and the gap area pattern and is used for forming a marking pattern unit, wherein the etched film layer reserved area pattern is higher than the gap area pattern, and a height difference is formed between the film layer reserved area pattern and the gap area pattern.

And forming a second film on the first film, wherein the second film on the film layer retention area pattern and the gap area pattern of the first film is influenced by the height difference, so that a diffraction grating is formed on the upper surface of the second film.

And photoetching and aligning through the diffraction grating, photoetching the photoresist formed on the second film and etching the second film.

In one embodiment, before the step of performing the photolithography alignment through the diffraction grating, the method further includes a step of performing a chemical mechanical polishing planarization process on the upper surface of the second film.

In one embodiment, the step of photolithographic alignment by the diffraction grating is performed by an LSA system; and the step of obtaining the grating pattern unit which is formed by the film layer reserved area pattern and the gap area pattern and forms the marking pattern unit is to form the grating pattern unit on the scribing channel.

In one embodiment, the step of covering the photoresist on the first film of the pattern of the reserved area of the film layer after the completion of the photolithography further comprises:

and the photoresist after photoetching covers the first film between two adjacent lines of grating pattern units.

In one embodiment, the photoresist after the photolithography is completed covers the first film of the pattern of the reserved area of the film layer, and the step of exposing the first film of the pattern of the gap area further includes:

exposing a first thin film between two adjacent lines of grating pattern units by the photoresist after photoetching;

the step of etching the first film of the pattern of the exposed gap region of the photoresist further comprises:

and etching the first film between two adjacent lines of grating pattern units exposed by the photoresist.

In one embodiment, the first film includes at least one of a semiconductor film, an insulating film, a metal film, and an antireflection layer film.

A method of manufacturing an integrated circuit, comprising: a substrate is obtained, and a first thin film is formed on the substrate. And photoetching the photoresist formed on the first film by using the photoetching plate of the mark pattern unit comprising photoetching alignment, wherein the photoresist after photoetching covers the first film of the film layer reserved region pattern, and the first film of the gap region pattern is exposed. And etching the first film of the exposed gap area pattern of the photoresist to obtain a grating pattern unit which is formed by a film layer reserved area pattern and the gap area pattern and is used for forming a marking pattern unit, wherein the etched film layer reserved area pattern is higher than the gap area pattern, and a height difference is formed between the film layer reserved area pattern and the gap area pattern. And forming a second film on the first film, wherein the second film on the film layer retention area pattern and the gap area pattern of the first film is influenced by the height difference, so that a diffraction grating is formed on the upper surface of the second film. And photoetching and aligning through the diffraction grating, photoetching the photoresist formed on the second film and etching the second film. The method comprises the steps that any photoetching plate comprising a photoetching alignment mark graphic unit is used, the mark graphic unit comprises X-row and Y-column grating graphic units, so that a gap area graph in the grating graphic unit formed by etching a first film and a film layer reserved area graph are arranged at intervals, the film layer reserved area graph is higher than the gap area graph, and a height difference is formed between the film layer reserved area graph and the gap area graph; forming a height difference; the number of the film layer reserved area patterns and the number of the gap area patterns are the same and are more than or equal to 2, the width of at least one film layer reserved area pattern is different from the width of the rest film layer reserved area patterns, the maximum width of the gap area pattern is smaller than half of the width of the grating pattern unit, the influence of the fluctuation of the manufacturing process on the appearance of the grating pattern unit on the wafer is small, the appearance of the grating pattern unit is easier to control and better in uniformity, the grating pattern unit which is not filled enough is not easy to generate after a second film is formed, the rework rate of the photoetching process can be reduced to a large extent, and the production cost is reduced.

Drawings

FIG. 1 is a top view of a typical LSA lithographic registered mark pattern unit 100;

fig. 2 is a cross-sectional view of a portion of the raster graphics unit of fig. 1 taken along the dashed line a;

FIG. 3 is a plan view of a reticle in one embodiment;

FIG. 4 is a plan view of a reticle in another embodiment;

FIG. 5 is a flow diagram of a method of fabricating an integrated circuit in one embodiment;

FIG. 6 is a top view of a pattern unit of marks on a surface of a wafer according to an embodiment;

FIG. 7 is a top view of a marking pattern unit on a surface of a wafer according to another embodiment;

fig. 8 is a cross-sectional view of a portion of the raster graphics unit of fig. 6 or 7 taken along the dashed line B or B'.

Detailed Description

To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

It will be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it can be directly on, adjacent to, connected or coupled to the other elements or layers or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.

Spatial relational terms such as "under," "below," "under," "above," "over," and the like may be used herein for convenience in describing the relationship of one element or feature to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, then elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "under" can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptors used herein interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.

Embodiments of the invention are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the invention. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments of the invention should not be limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an implanted region shown as a rectangle will typically have rounded or curved features and/or implant concentration gradients at its edges rather than a binary change from implanted to non-implanted region. Also, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the present invention.

As used herein, the term semiconductor is used in the art to distinguish between P-type and N-type impurities, and for example, P + type represents P-type with heavy doping concentration, P-type represents P-type with medium doping concentration, P-type represents P-type with light doping concentration, N + type represents N-type with heavy doping concentration, N-type represents N-type with medium doping concentration, and N-type represents N-type with light doping concentration.

The photolithography process is used as the only process for generating patterns in semiconductor manufacturing, and the stability and accuracy of the process directly affect the yield of products. For lithography, there are two most important process control items, one is strip width control, and the other is alignment control.

In the present IC circuit manufacturing process, a complete chip is usually subjected to tens to twenty times of photolithography, and in such many times of photolithography, except for the first photolithography, the remaining levels of photolithography are intended to align the pattern of the level with the pattern left by the previous level before exposure, in order to overlay the pattern on the reticle onto the existing pattern on the wafer with maximum accuracy.

The LSA alignment system is a detection alignment system for diffracted light or scattered light under a dark field, an alignment mark pattern is scanned through laser spots, and finally the diffracted light is received by a receiver, which belongs to dark field alignment. When laser spots emitted by the laser irradiate the mark pattern units aligned on the wafer by photoetching through a lens of the alignment microscope, diffraction occurs at the side walls of the mark patterns, diffracted light returns along the light path of original incident light, and the sensor only receives 1 st-order diffracted light, so that the accurate positions of the alignment mark pattern units can be obtained. The characteristics of alignment laser beam coherence determine the high sensitivity and high identification capability of the alignment system, so that the alignment system is suitable for most layers as a preferred alignment mode of the NIKON photoetching machine at present, but the LSA mode has higher requirements on the appearance of the marking pattern unit, because the change of the appearance (roughness, filling asymmetry and the like) of the marking pattern unit can interfere with the diffraction of light, and further has different influences on alignment, and random alignment errors occur. Exposure alignment directly affects alignment conduction between a subsequent circuit and a front layer circuit, so high-precision alignment is necessary, and for mass production, the appearance of an alignment mark graphic unit must be kept stable in a chip and between chips after a plurality of manufacturing processes.

The segment size in the traditional LSA photoetching alignment mark pattern unit is larger (namely the sizes of a film layer reserved area pattern and a gap area pattern in the grating pattern unit forming the photoetching alignment mark pattern are larger) and reaches 4 micrometers, and the integral uniformity of the photoetching alignment mark pattern unit is difficult to control. And after the subsequent process is finished, an under-filled marked graph unit (under-filled mark) is easily generated, and the marked graph unit has unpredictable morphology and poor stability.

However, LSA has a high requirement on the morphology of the marked graphic unit for lithography alignment, and when the morphology of the marked graphic unit is unstable, a large alignment error is generated, and in the large-scale production process of the wafer device, the manufacturing process (such as AL PVD/CVD/CMP) is always in a fluctuating state, the morphology of the marked graphic unit for LSA lithography alignment is also in an unstable state, and random alignment errors are easily caused, and the overlay accuracy is different among different chips on the same wafer, different wafers in the same batch, or different batches of wafers, thereby increasing the rework rate and the production cost of the lithography process.

As shown in fig. 1, which is a top view of a mark pattern unit 100 for typical LSA lithography alignment on a wafer, the mark pattern unit is composed of 7 columns of grating pattern units 102, wherein a distance d between the same side edges of two adjacent columns of grating pattern units 102 is 20 micrometers, a period T of the grating pattern unit in each column of grating pattern units is 8 micrometers, a duty cycle (line: space) is 1:1, and a cross-sectional view of a part of the grating pattern units along a dotted line a in fig. 1 is shown in fig. 2. A grating graphic unit comprises a film reserved area graph 104(line) and a gap area graph 106(space), the segment sizes of the line and the space in the grating graphic unit are large and reach 4 micrometers, namely the width of the segment sizes of the line and the space reaches 4 micrometers, uniformity is difficult to control, and when a thin film is formed on the surface of a wafer through subsequent chemical vapor deposition and physical vapor deposition, because the segment sizes of the line and the space are large, an under-filled mark graphic unit (under-filled mark) is easily generated after the thin film deposition process is completed, and the mark graphic unit of the type has unpredictable morphology and poor stability.

In one embodiment, there is provided a reticle including a plurality of grating patterning units for lithographic alignment, the grating patterning units comprising:

the film layer reserved area patterns are film reserved areas in the grating pattern units, and the width of at least one film layer reserved area pattern is different from the width of the rest film layer reserved area patterns; the gap area patterns are film removing areas in the grating pattern units, the gap area patterns and the film layer reserving area patterns are arranged at intervals, and the number of the gap area patterns is the same as that of the film layer reserving area patterns and is more than or equal to 2; wherein the maximum width of the gap area pattern is less than half of the width of the grating pattern unit, and the width of the grating pattern unit is the sum of the widths of the film layer reserved area patterns and the gap area patterns.

In one embodiment, the maximum width of the gap region pattern is less than 4 microns.

In one embodiment, the maximum width of the pattern of film layer retention areas is less than 4 microns.

In one embodiment, the number of raster graphics cells on a reticle is 1.

As shown in fig. 3, in one embodiment, the grating pattern unit 202 on the reticle 200 has one or more film layer reserve area patterns 204 having the same width as the gap area patterns 206 on the adjacent side.

The grating pattern unit 202 on the reticle 200 has 2 or more film layer retention area patterns 204 and 2 or more gap area patterns 206, and the number of the film layer retention area patterns 204 and the number of the gap area patterns 206 are the same. When the grating pattern unit pattern 202 on the reticle 200 has one film layer reserved area pattern 204 with the same width as the adjacent gap area pattern 206, if the film layer reserved area pattern 204 has two adjacent gap area patterns 206, the width of the film layer reserved area pattern 204 is the same as the width of one of the gap area patterns 206, and the width of the film layer reserved area pattern 204 is the same as or different from the width of the other gap area pattern 206. If the film retaining region pattern 204 has only 1 adjacent gap region pattern 206, the width of the film retaining region pattern 204 is the same as the width of the adjacent gap region pattern 206.

As shown in fig. 3, in one embodiment, the grating pattern unit 202 on the reticle 200 includes 3 film layer reserve area patterns 204, and two of the film layer reserve area patterns 204 have the same width.

As shown in FIG. 3, in one embodiment, the film retention area patterns 204 and the gap area patterns 206 in the grating pattern unit 202 on the reticle 200 are spaced apart in the width direction of the reticle 200.

In another embodiment, the film retention area patterns 204 and the gap area patterns 206 in the grating pattern unit 202 on the reticle 200 are spaced apart along the length of the reticle 200.

In one embodiment, the width of the film layer retention area patterns 204 in the raster graphics unit 202 on the reticle 200 are each different from the width of the adjacent gap area patterns 206. For example, the width of the film layer leaving area pattern 204 in the raster graphic unit 202 is a value a and a 'and the width of the gap area pattern 206 is a value b and a'; or the widths of the film layer reserved area patterns 204 and the widths of the gap area patterns 206 in the grating graphic unit 202 are all the same set of values c, d, e which are different, and the requirement is that the widths of all the film layer reserved area patterns 204 are different from the widths of the adjacent gap area patterns 206, for example, the widths of the film layer reserved area patterns 204 and the widths of the gap area patterns 206 in the grating graphic unit 202 are c, e, d, c, e, d in sequence; or the widths of the film layer reserved area patterns 204 in the grating pattern unit 202 are different from each other, and the widths of the gap area patterns 206 are different from each other by at least the width of the film layer reserved area patterns 204, and the widths of all the film layer reserved area patterns 204 are different from the widths of the adjacent gap area patterns 206, for example, the widths of the film layer reserved area patterns 204 and the widths of the gap area patterns 206 in the grating pattern unit 202 are f, h, g, f, h, i, or f, h, g, i, h, k in sequence; or the width of the film layer reserve area pattern 204 and the width of the film layer reserve area pattern 204, are other values that satisfy the requirement that the width of the film layer reserve area pattern 204 in the raster graphics unit 202 is different from the width of the adjacent gap area pattern 206.

In one embodiment, the grating pattern unit 202 on the reticle 200 includes 4 patterns 204 of film retention areas, and at least two of the patterns of film retention areas have different widths.

In one embodiment, the width of the film layer retention area pattern 204 and/or the gap area pattern 206 in the grating pattern unit 202 on the reticle 200 is greater than or equal to 0.5 microns and less than or equal to 2 microns, such as 1 micron, 1.5 microns, and the like.

In one embodiment, the widths of the film layer retention area patterns 204 and/or the gap area patterns 206 in the grating pattern unit 202 on the reticle 200 are different values greater than or equal to 0.5 microns and less than or equal to 2 microns, e.g., the widths of the film layer retention area patterns 204 and/or the gap area patterns 206 include 1.2 microns, 1.3 microns, 1.5 microns; or including 1 micron, 1.2 microns, 1.3 microns, 1.5 microns; or include 1 micron, 1.1 microns, 1.3 microns, 1.5 microns, etc.

In one embodiment, the widths of the film layer retention area patterns 204 and/or the gap area patterns 206 in the grating pattern unit 202 on the reticle 200 are the same value of 0.5 microns or more and 2 microns or less, for example, the widths of the film layer retention area patterns 204 and/or the gap area patterns 206 include 1 micron, 1.1 microns, 1.2 microns, 1.3 microns, 1.4 microns, 1.5 microns, 1.6 microns, and the like.

As shown in fig. 3, in one embodiment, the difference between the sum of the widths of the film layer retention area patterns 204 and the sum of the widths of the gap area patterns 206 in the grating pattern unit 202 on the reticle 200 is 0 microns or more and 1 micron or less.

As shown in fig. 3, in one embodiment, the sum of the widths of the film layer retention area pattern 204 and the sum of the widths of the gap area pattern 206, taken together, is equal to 8 microns, i.e., the width T1 of the raster pattern elements is 8 microns. The sum of the widths of the film layer-leaving area pattern 204 and the gap area pattern 206 (i.e., the period of the grating pattern elements) is related to the reflection direction of the 1 st order diffracted light, and thus the period of the grating pattern elements is determined by the position of the diffraction light sensor of the LSA alignment system.

In one embodiment, the total width of the film layer retention area pattern 204 in the raster graphics unit 202 is equal to the total width of the gap area pattern 206, and is 4 microns.

In one embodiment, the total width of the film layer retention area pattern 204 in the raster pattern unit pattern 202 is different from the total width of the gap area pattern 206 by 1 micron, for example, the total width of the film layer retention area pattern 204 is 5 microns and the total width of the gap area pattern 206 is 3 microns, or the total width of the film layer retention area pattern 204 is 3 microns and the total width of the gap area pattern 206 is 5 microns.

In one embodiment, the total width of the film retention area pattern 204 and the gap area pattern 206 in the grating pattern unit 202 is 4 micrometers, the number of the gap area patterns and the number of the film retention area patterns are 3, and the widths of the film retention area pattern 204 and the gap area pattern 206 in the grating pattern unit 202 are 1 micrometer, 2 micrometers, 1 micrometer, and 2 micrometers in sequence; or the widths of the film layer reserved area pattern 204 and the gap area pattern 206 in the grating pattern unit 202 are 2 micrometers, 1 micrometer, 2 micrometers, 1 micrometer and 1 micrometer in sequence; or the widths of the film layer reserved area pattern 204 and the gap area pattern 206 in the grating pattern unit 202 are 1.5 micrometers, 1 micrometer, 1.5 micrometers and 1 micrometer in sequence; or the widths of the film layer leaving area pattern 204 and the gap area pattern 206 in the grating pattern unit 202 are 1 micrometer, 1.5 micrometers, 1 micrometer, 1.5 micrometers, and 1.5 micrometers in this order.

In one embodiment, the total width of the film retention area pattern 204 and the gap area pattern 206 in the grating pattern unit 202 is 4 micrometers, the number of the gap area patterns and the number of the film retention area patterns are 4, and the widths of the film retention area pattern 204 and the gap area pattern 206 in the grating pattern unit 202 are 1 micrometer, 0.5 micrometer, 1 micrometer, 2 micrometer, and 1 micrometer in sequence; or the widths of the film layer reserved area pattern 204 and the gap area pattern 206 in the grating pattern unit 202 are 1 micron, 2 microns, 25 microns, 0.5 micron, 1 micron and 1 micron in sequence; or the widths of the film layer leaving area pattern 204 and the gap area pattern 206 in the grating pattern unit 202 are 1 micrometer, 1 micrometer in this order.

The photoetching plate comprises a plurality of grating pattern units for photoetching alignment, wherein each grating pattern unit comprises a plurality of film layer reserved area patterns, each film layer reserved area pattern is a film reserved area in each grating pattern unit, and the width of at least one film layer reserved area pattern is different from the width of the rest film layer reserved area patterns; the gap area patterns are film removing areas in the grating pattern units, the gap area patterns and the film layer reserving area patterns are arranged at intervals, and the number of the gap area patterns is the same as that of the film layer reserving area patterns and is more than or equal to 2; wherein the maximum width of the gap area pattern is less than half of the width of the grating pattern unit, and the width of the grating pattern unit is the sum of the widths of the film layer reserved area patterns and the gap area patterns. Compare with the grating pattern unit on traditional photoetching version, among the grating pattern unit on the photoetching version in this application clearance area figure with retentive area figure interval arrangement, clearance area figure with the quantity that the retentive area figure is the same, and more than or equal to 2, the width that has at least one retentive area figure is different with the width that the rest retentive area figure, the maximum width of clearance area figure is less than half of the width of grating pattern unit, the fluctuation of preparation technology is less to the influence of grating pattern unit appearance on the wafer, and the appearance of grating pattern unit is changeed control and homogeneity better, is difficult for generating the grating pattern unit that fills inadequately after the follow-up technology is accomplished, can be great reduction photoetching process's rework rate, reduction in production cost.

As shown in fig. 4, in one embodiment, a reticle is provided, comprising a mark pattern unit 302 for photolithographic alignment, the mark pattern unit 302 comprising X rows and Y columns of grating pattern units 202 as described in any of the above, X being an odd number equal to or greater than 2, and Y being an integer equal to or greater than 2.

In one embodiment, the mark pattern unit 302 on the reticle includes 5 rows and 7 columns of grating pattern units, and the distance d1 between the same side edges of two adjacent columns of grating pattern units 304 is 20 micrometers.

In one embodiment, the mark pattern unit 302 on the reticle includes 7 rows and 7 columns of grating pattern units, and the distance d1 between the same side edges of two adjacent columns of grating pattern units 304 is 20 micrometers. In other embodiments, the number of rows and columns of raster graphics units on the reticle may be set as desired, provided that X is an odd number equal to or greater than 2 and Y is an integer equal to or greater than 2.

As shown in FIG. 4, in one embodiment, the X row and Y column raster graphics cells of the mark graphics cell 302 on the reticle 300 are spaced apart along the width of the reticle 300.

In another embodiment, the X-row and Y-column grating pattern units in the mark pattern unit 302 on the reticle 300 are arranged at intervals along the length direction of the reticle 300.

The photoetching plate comprises a marking graphic unit for photoetching alignment, wherein the marking graphic unit comprises X-row and Y-column grating graphic units, the grating graphic units are any one of the grating graphic units, X is an odd number greater than or equal to 2, and Y is an integer greater than or equal to 2. Compared with the marking pattern unit on the traditional photoetching plate, the gap area patterns in the grating pattern unit forming the marking pattern unit on the photoetching plate are arranged at intervals with the film layer reserved area patterns, the number of the gap area patterns is the same as that of the film layer reserved area patterns and is more than or equal to 2, the width of at least one film layer reserved area pattern is different from that of the rest film layer reserved area patterns, the maximum width of the gap area pattern is less than half of the width of the grating pattern unit, the influence of the fluctuation of the manufacturing process on the appearance of the grating pattern unit in the marking pattern unit on the wafer is small, the appearance of the marking pattern unit is easier to control and has better uniformity, the mark pattern unit of the photoetching alignment with insufficient filling is not easy to generate after the subsequent process is completed, and the rework rate of the photoetching process can be greatly reduced, the production cost is reduced.

In one embodiment, as shown in fig. 5, there is provided a method of manufacturing an integrated circuit, comprising:

s102, a substrate is obtained, and a first thin film is formed on the substrate.

In one embodiment, the first film includes at least one of a semiconductor film, an insulating film, a metal film, and an antireflection layer film.

In one embodiment, the substrate is a substrate formed of a semiconductor element, such as a silicon substrate or a silicon germanium substrate of single crystal, polycrystalline, or amorphous structure.

In one embodiment, the substrate is a hybrid semiconductor structure substrate, such as a silicon carbide substrate, an indium antimonide substrate, an indium arsenide substrate, an indium phosphide substrate, a gallium arsenide substrate, a gallium antimonide substrate, an alloy semiconductor structure substrate, or a combination thereof.

In one embodiment, the substrate comprises a silicon-on-insulator substrate (SOI substrate).

In one embodiment, a single-layer or multi-layer structure film of an epitaxial layer film and a buried layer is further formed on the substrate.

In one embodiment, the insulating film includes various forms of grown insulating silicon dioxide films, such as BPSG, PSG, FSG, USG, TEOS, thermal oxide silicon dioxide film, wet oxide silicon dioxide film, silicon rich silicon dioxide (SRO) film, other multi-film combination films, such as combination films of USG and BPSG, combination films of USG and PSG, and the like.

In one embodiment, the semiconductor thin film includes a thin film formed of a semiconductor element, such as a polysilicon thin film.

In one embodiment, the insulating film includes a silicon nitride film, a silicon carbide film.

In one embodiment, the first film includes a multilayer structure film of an epitaxial layer film and a buried layer.

In one embodiment, the first film comprises a composite structure film composed of an anti-reflection layer and a hard mask layer.

And S104, forming photoresist on the first film to cover the first film of the film layer reserved region pattern, and exposing the photoetching pattern unit of the first film of the gap region pattern.

And photoetching the photoresist formed on the first film by using the photoetching plate of the mark pattern unit comprising photoetching alignment, wherein the photoresist after photoetching covers the first film of the film layer reserved region pattern, and the first film of the gap region pattern is exposed.

And S106, etching to obtain a grating pattern unit consisting of a film layer reserved area pattern and a gap area pattern.

And etching the first film of the exposed gap area pattern of the photoresist to obtain a grating pattern unit which is formed by a film layer reserved area pattern and the gap area pattern and is used for forming a marking pattern unit, wherein the etched film layer reserved area pattern is higher than the gap area pattern, and a height difference is formed between the film layer reserved area pattern and the gap area pattern.

In one embodiment, step S106 is to form a grating pattern unit formed by a film layer reserved area pattern and a gap area pattern on the wafer dicing street.

And S108, growing a second thin film forming the diffraction grating on the first thin film.

And forming a second film on the first film, wherein the second film on the film layer retention area pattern and the gap area pattern of the first film is influenced by the height difference, so that a diffraction grating is formed on the upper surface of the second film.

In one embodiment, the second film comprises an oxide layer film formed by chemical vapor deposition, a tungsten metal film; metal thin films formed by physical vapor deposition, such as tungsten metal thin films, aluminum metal thin films; an epitaxial thin film; and a film of a composite structure such as a titanium nitride film, an oxide titanium nitride film, or the like.

And S110, carrying out photoetching alignment through the diffraction grating, carrying out photoetching on the photoresist formed on the second film, and etching the second film.

In one embodiment, before the step of performing the photolithography alignment through the diffraction grating, the method further includes a step of performing a chemical mechanical polishing planarization process on the upper surface of the second thin film. The shape of the second film becomes smooth and stable through chemical mechanical polishing planarization treatment, and the stability of alignment is improved.

In one embodiment, the step of photolithographic alignment by the diffraction grating is performed by an LSA system.

As shown in fig. 6, in an embodiment, the step of covering the photoresist on the first film of the pattern of the reserved area of the film layer after the completion of the photolithography further includes: the photoresist after the photolithography is coated on the first film between two adjacent columns of the grating pattern units, that is, the photoresist after the photolithography is coated on the first film of the area 402 between two adjacent columns of the grating pattern units. Step S106 is performed to etch the first film of the gap area pattern exposed by the photoresist, so as to obtain a grating pattern unit formed by the film layer reserved area pattern and the gap area pattern and forming a mark pattern unit, wherein the film layer reserved area pattern obtained after etching is higher than the gap area pattern, a height difference is formed between the film layer reserved area pattern and the gap area pattern, meanwhile, the first film of the area 402 between two adjacent lines of grating pattern units is reserved, the first film of the area 402 between two adjacent lines of grating pattern units and the first film of the film layer reserved area pattern higher than the gap area pattern together form the mark pattern unit, and fig. 6 is a top view of the mark pattern unit on the wafer surface in an embodiment.

As shown in fig. 7, which is a top view of a mark pattern unit on a wafer surface, in an embodiment, a photoresist after the photolithography is completed covers the first film of the film layer reserved region pattern, and the step of exposing the first film of the gap region pattern further includes: the photoresist after the photolithography exposes the first film between two adjacent columns of grating pattern units, i.e., the photoresist after the photolithography exposes the first film of the region 502 between two adjacent columns of grating pattern units. The step of etching the first film of the pattern of the exposed gap region of the photoresist further comprises: and etching the first film between two adjacent lines of grating pattern units exposed by the photoresist. In step S106, the first film of the gap region pattern exposed by the photoresist is etched to obtain a grating pattern unit formed by the film layer reserved region pattern and the gap region pattern and forming a mark pattern unit, and the film layer reserved region pattern obtained after etching is higher than the gap region pattern, a height difference is formed between the film layer reserved region pattern and the gap region pattern, meanwhile, the first film in a region 502 between two adjacent rows of grating pattern units is etched away, and the region 502 between two adjacent rows of grating pattern units and the gap region pattern together form the mark pattern unit, as shown in fig. 7, which is a top view of the mark pattern unit on the wafer surface in an embodiment.

A cross-sectional view of a portion of the raster graphics unit of fig. 6 or 7 along the dashed line B or B' is shown in fig. 8. A raster graphic unit includes a plurality of film layer reserved area patterns 204(line) and a plurality of space area patterns 206(space), and the number of the film layer reserved area patterns 204(line) and the number of the space area patterns 206(space) in one raster are the same.

A method of manufacturing an integrated circuit, comprising: a substrate is obtained, and a first thin film is formed on the substrate. And photoetching the photoresist formed on the first film by using the photoetching plate of the mark pattern unit comprising photoetching alignment, wherein the photoresist after photoetching covers the first film of the film layer reserved region pattern, and the first film of the gap region pattern is exposed. And etching the first film of the exposed gap area pattern of the photoresist to obtain a grating pattern unit which is formed by a film layer reserved area pattern and the gap area pattern and is used for forming a marking pattern unit, wherein the etched film layer reserved area pattern is higher than the gap area pattern, and a height difference is formed between the film layer reserved area pattern and the gap area pattern. And forming a second film on the first film, wherein the second film on the film layer retention area pattern and the gap area pattern of the first film is influenced by the height difference, so that a diffraction grating is formed on the upper surface of the second film. And photoetching and aligning through the diffraction grating, photoetching the photoresist formed on the second film and etching the second film. The method comprises the steps that any photoetching plate comprising a photoetching alignment mark graphic unit is used, the mark graphic unit comprises X-row and Y-column grating graphic units, so that a gap area graph in the grating graphic unit formed by etching a first film and a film layer reserved area graph are arranged at intervals, the film layer reserved area graph is higher than the gap area graph, and a height difference is formed between the film layer reserved area graph and the gap area graph; forming a height difference; the number of the film layer reserved area patterns and the number of the gap area patterns are the same and are more than or equal to 2, the maximum width of the gap area patterns is smaller than half of the width of the grating pattern units, the influence of fluctuation of a manufacturing process on the appearance of the grating pattern units on the wafer is small, the appearance of the grating pattern units is easier to control and better in uniformity, the grating pattern units which are not filled sufficiently are not easy to generate after the second film is formed, the rework rate of a photoetching process can be reduced to a large extent, and the production cost is reduced.

The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

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