阅读说明：本技术 一种时频信号数字化锁相与传递装置 (Time-frequency signal digital phase locking and transmitting device ) 是由 孟彦春 何冬 杜二旺 孙云峰 秦晓伟 黄剑 赵明 于 2019-09-26 设计创作，主要内容包括：一种时频信号数字化锁相与传递装置,以压控晶体振荡器的输出信号为AD的采样钟,对外部时钟信号进行采样,同时压控晶体振荡器的输出信号给入FPGA,用以同步采样数据和调频调相控制,AD采样数据结果直接进入FPGA,在FPGA内部经过调频调相器生成新的调制数据信息(DDS数字正弦信号),调制数据信息经过数字鉴相器产生初始时钟和目标时钟的相差,相差数据经过二阶环路滤波器生成压控电压值,压控电压再经由DA模块电路对压控晶体振荡器进行反馈控制,最终构成闭环的以数字锁相环方式实现的星载时频信号数字化高精度锁相与低损传递装置。(A time-frequency signal digital phase-locking and transmitting device takes an output signal of a voltage-controlled crystal oscillator as an AD sampling clock to sample an external clock signal, meanwhile, the output signal of the voltage-controlled crystal oscillator is fed into an FPGA to be used for synchronous sampling data and frequency modulation phase modulation control, the AD sampling data result directly enters the FPGA, new modulation data information (DDS digital sine signal) is generated in the FPGA through a frequency modulation phase modulator, the modulation data information generates a phase difference between an initial clock and a target clock through a digital phase discriminator, the phase difference data generates a voltage-controlled voltage value through a second-order loop filter, the voltage-controlled voltage performs feedback control on the voltage-controlled crystal oscillator through a DA module circuit, and finally, a closed-loop satellite-borne time-frequency signal digital high-precision phase-locking and low-loss transmitting device realized in a digital phase-locked loop mode is formed.)

1. A time frequency signal digital phase locking and transmitting device is characterized by comprising an AD module, a frequency modulation phase modulator, a phase discriminator, a loop filter, a DA module and a voltage-controlled crystal oscillator;

the AD module receives an external initial clock, and a second clock signal output by the voltage-controlled crystal oscillator is sent to the AD module and the frequency modulation phase modulator; the AD module samples the initial clock signal according to the second clock signal and then sends a sampling result to the frequency modulation phase modulator; the frequency modulation phase modulator generates modulation data information by using sampling results of the second clock signal and the initial clock signal and sends the modulation data information to the phase discriminator; the phase discriminator obtains the phase difference between the initial clock and the second clock according to the modulation data information and then sends the phase difference to a loop filter; the loop filter generates a voltage-controlled voltage value according to the phase difference; the voltage-controlled voltage value is used for performing feedback control on the voltage-controlled crystal oscillator after passing through the DA module; and a second clock signal output by the voltage-controlled crystal oscillator is used as a target clock output by the time-frequency signal digital phase-locking and transferring device.

2. The apparatus according to claim 1, wherein the frequency modulation phase modulator comprises a DDS and a mixer; the second clock signal is sent to the mixer after passing through the DDS; the sampling result is sent to the mixer; and the frequency mixer generates modulation data information according to the sampling result and a second clock signal passing through the DDS.

3. The time-frequency signal digitization phase locking and transmitting device of claim 2, wherein the frequency modulation phase modulator has a frequency modulation accuracy better than 0.018 uHz.

4. The device for digitally phase-locking and transmitting a time-frequency signal according to any one of claims 1 to 3, wherein the phase detector obtains the phase difference between the initial clock and the second clock by using a full-phase fast Fourier transform method.

5. The apparatus according to any of claims 1 to 3, wherein the loop filter is a second-order loop filter.

6. The device for digitally phase-locking and transmitting a time-frequency signal according to any one of claims 1 to 3, wherein the DA module comprises at least two DA converters, at least two amplifying circuits, and at least one adding circuit; the number of the DA converters is equal to that of the amplifying circuits; the DA converter and the amplifying circuit respectively form a branch circuit, and a plurality of branch circuits are all output to the adding circuit.

7. A time frequency signal digital phase locking and transmitting device is characterized by comprising at least two AD modules, at least two frequency modulation phase modulators, at least two phase detectors, at least one selector, a loop filter, a DA module and a voltage-controlled crystal oscillator;

the AD modules, the frequency modulation phase modulators and the phase discriminator are equal in number; the AD module, the frequency modulation phase modulator and the phase discriminator respectively form a channel, and a plurality of channels are all output to the selector;

each AD module receives an external initial clock, and a second clock signal output by the voltage-controlled crystal oscillator is sent to each AD module and each frequency modulation phase modulator; each AD module samples the initial clock signal according to the second clock signal and then sends the sampling result to the frequency modulation phase modulator of the corresponding channel; the frequency modulation phase modulator generates modulation data information by using the second clock signal and the sampling result and then sends the modulation data information to the phase discriminator of the corresponding channel; the phase discriminator obtains the phase difference between the initial clock and the second clock according to the modulation data information and then sends the phase difference to the selector, and the selector selects the phase difference output by a certain phase discriminator and sends the phase difference to the loop filter; the loop filter generates a voltage-controlled voltage value according to the phase difference selected by the selector; the voltage-controlled voltage value is used for performing feedback control on the voltage-controlled crystal oscillator after passing through the DA module; and a second clock signal output by the voltage-controlled crystal oscillator is used as a target clock output by the time-frequency signal digital phase-locking and transferring device.

8. The apparatus according to claim 7, wherein the frequency modulation phase modulator comprises a DDS and a mixer; the second clock signal is sent to the mixer after passing through the DDS; the sampling result is sent to the mixer; and the frequency mixer generates modulation data information according to the sampling result and a second clock signal passing through the DDS.

9. The apparatus according to claim 7 or 8, wherein the phase detector uses full-phase fast fourier transform to obtain the phase difference between the initial clock and the second clock.

10. The apparatus according to claim 7 or 8, wherein the loop filter is a second-order loop filter.

11. A time frequency signal digital phase locking and transferring device is characterized by comprising an AD module, an FPGA, a DA module and a voltage controlled crystal oscillator;

the AD module is used for sampling an external initial clock according to a second clock signal output by the voltage-controlled crystal oscillator and then sending a sampling result to the FPGA; the FPGA utilizes a second clock signal output by the voltage-controlled crystal oscillator to sequentially perform digital frequency modulation and phase modulation, digital phase demodulation and digital filtering on the sampling result output by the AD module to obtain a voltage-controlled voltage value; the voltage-controlled voltage value is subjected to feedback control on the voltage-controlled crystal oscillator after passing through a DA module;

and a second clock signal output by the voltage-controlled crystal oscillator is used as a target clock output by the time-frequency signal digital phase-locking and transferring device.

Technical Field

The invention relates to a time-frequency signal digital phase locking and transmitting device, in particular to a satellite-borne time-frequency signal digital high-precision phase locking and low-loss transmitting device.

Background

The navigation satellite takes an atomic clock signal as a standard time reference signal, the nominal frequency of the atomic clock is usually 10M signal, the payload of the navigation satellite needs 10.23M signal as the reference frequency, the time frequency generation and maintenance system transmits the 10M atomic clock signal to the 10.23M reference frequency signal needed by the payload of the navigation satellite in low loss, and the 10.23M signal index is ensured to be equivalent to the atomic clock signal.

In an existing time frequency generation and holding system, two 10M atomic clock signals generate two 230K signals through a DDS (direct digital synthesizer), the two 230K signals and respective 10M signals are mixed to generate two 10.23M signals, an electronic switch selects one of the 10.23M signals as a reference signal of an analog phase-locked loop, the analog phase-locked loop locks a high voltage-stabilizing crystal oscillator to output a 10.23MHz reference signal, and when one of the 10M atomic clocks fails, the electronic switch realizes stable switching of the two 10.23M signals. And finally, providing a 10.23M reference frequency for the navigation satellite payload by the high-temperature voltage control crystal oscillator locked by the analog phase-locked loop.

The existing time frequency generation and holding system is limited by a scheme, the stable switching in the existing time frequency generation and holding system can only be realized by an electronic switch, the loss of a reference signal can occur at the moment of switching the electronic switch by a simulation phase-locked loop, the performance of the time frequency transmission is limited by the speed of the electronic switch, and the phase holding of an output signal cannot be realized; meanwhile, the navigation satellite time-frequency reference needs to be adjusted in frequency, phase and frequency drift rate, and the analog phase-locked loop scheme can be realized only by adjusting a reference signal. In addition, more analog circuits such as a frequency mixer and a filter are adopted in the original scheme, so that the flexibility of the scheme is reduced, and the performance index is greatly influenced by environmental factors.

Disclosure of Invention

The technical problem to be solved by the invention is as follows: overcomes the defects of the prior art, provides a time-frequency signal digital phase-locking and transferring device, takes the output signal of a voltage-controlled crystal oscillator (VCXO) as an AD sampling clock, sampling an external clock signal, simultaneously feeding an output signal of the voltage-controlled crystal oscillator into the FPGA, used for synchronous sampling data and frequency modulation phase modulation control, the AD sampling data result directly enters into FPGA, the novel modulation data information (DDS digital sine signal) is generated in the FPGA through a frequency modulation phase modulator, the modulation data information generates the phase difference between an initial clock and a target clock through a digital phase discriminator, the phase difference data generates a voltage-controlled voltage value through a second-order loop filter, the voltage-controlled voltage performs feedback control on a voltage-controlled crystal oscillator through a DA module circuit, and finally a closed-loop satellite-borne time-frequency signal digital high-precision phase-locked and low-loss transmission device realized in a digital phase-locked loop mode is formed.

The purpose of the invention is realized by the following technical scheme:

a time-frequency signal digital phase locking and transmitting device comprises an AD module, a frequency modulation phase modulator, a phase discriminator, a loop filter, a DA module and a voltage-controlled crystal oscillator;

the AD module receives an external initial clock, and a second clock signal output by the voltage-controlled crystal oscillator is sent to the AD module and the frequency modulation phase modulator; the AD module samples the initial clock signal according to the second clock signal and then sends a sampling result to the frequency modulation phase modulator; the frequency modulation phase modulator generates modulation data information by using sampling results of the second clock signal and the initial clock signal and sends the modulation data information to the phase discriminator; the phase discriminator obtains the phase difference between the initial clock and the second clock according to the modulation data information and then sends the phase difference to a loop filter; the loop filter generates a voltage-controlled voltage value according to the phase difference; the voltage-controlled voltage value is used for performing feedback control on the voltage-controlled crystal oscillator after passing through the DA module; and a second clock signal output by the voltage-controlled crystal oscillator is used as a target clock output by the time-frequency signal digital phase-locking and transferring device.

Preferably, the frequency modulation phase modulator comprises a DDS and a mixer; the second clock signal is sent to the mixer after passing through the DDS; the sampling result is sent to the mixer; and the frequency mixer generates modulation data information according to the sampling result and a second clock signal passing through the DDS.

Preferably, the frequency modulation precision of the frequency modulation phase modulator is better than 0.018 uHz.

Preferably, the phase detector obtains the phase difference between the initial clock and the second clock by using a full-phase fast fourier transform method.

Preferably, the loop filter is a second-order loop filter.

Preferably, the DA module comprises at least two DA converters, at least two amplifying circuits, and at least one adding circuit; the number of the DA converters is equal to that of the amplifying circuits; the DA converter and the amplifying circuit respectively form a branch circuit, and a plurality of branch circuits are all output to the adding circuit.

A time-frequency signal digital phase locking and transmitting device comprises at least two AD modules, at least two frequency modulation phase modulators, at least two phase detectors, at least one selector, a loop filter, a DA module and a voltage-controlled crystal oscillator;

the AD modules, the frequency modulation phase modulators and the phase discriminator are equal in number; the AD module, the frequency modulation phase modulator and the phase discriminator respectively form a channel, and a plurality of channels are all output to the selector;

each AD module receives an external initial clock, and a second clock signal output by the voltage-controlled crystal oscillator is sent to each AD module and each frequency modulation phase modulator; each AD module samples the initial clock signal according to the second clock signal and then sends the sampling result to the frequency modulation phase modulator of the corresponding channel; the frequency modulation phase modulator generates modulation data information by using the second clock signal and the sampling result and then sends the modulation data information to the phase discriminator of the corresponding channel; the phase discriminator obtains the phase difference between the initial clock and the second clock according to the modulation data information and then sends the phase difference to the selector, and the selector selects the phase difference output by a certain phase discriminator and sends the phase difference to the loop filter; the loop filter generates a voltage-controlled voltage value according to the phase difference selected by the selector; the voltage-controlled voltage value is used for performing feedback control on the voltage-controlled crystal oscillator after passing through the DA module; and a second clock signal output by the voltage-controlled crystal oscillator is used as a target clock output by the time-frequency signal digital phase-locking and transferring device.

Preferably, the frequency modulation phase modulator comprises a DDS and a mixer; the second clock signal is sent to the mixer after passing through the DDS; the sampling result is sent to the mixer; and the frequency mixer generates modulation data information according to the sampling result and a second clock signal passing through the DDS.

Preferably, the phase detector obtains the phase difference between the initial clock and the second clock by using a full-phase fast fourier transform method.

Preferably, the loop filter is a second-order loop filter.

A time-frequency signal digital phase locking and transferring device comprises an AD module, an FPGA, a DA module and a voltage-controlled crystal oscillator;

the AD module is used for sampling an external initial clock according to a second clock signal output by the voltage-controlled crystal oscillator and then sending a sampling result to the FPGA; the FPGA utilizes a second clock signal output by the voltage-controlled crystal oscillator to sequentially perform digital frequency modulation and phase modulation, digital phase demodulation and digital filtering on the sampling result output by the AD module to obtain a voltage-controlled voltage value; the voltage-controlled voltage value is subjected to feedback control on the voltage-controlled crystal oscillator after passing through a DA module;

and a second clock signal output by the voltage-controlled crystal oscillator is used as a target clock output by the time-frequency signal digital phase-locking and transferring device.

Compared with the prior art, the invention has the following beneficial effects:

(1) the phase discrimination method of the invention has the advantages of flexibility and high precision: in the existing digital phase-locked loop system, the realization form of the phase discriminator is various, but the phase discriminator has various limitations: or the problem of phase discrimination between analog signals cannot be directly processed, or only phase discrimination can be carried out on input signals with the same frequency or fixed frequency, or the phase discrimination precision cannot meet the transmission requirement of time-frequency signals of the navigation satellite. The invention applies the full-phase fast Fourier phase discrimination method in the phase-locked loop, realizes the direct phase extraction of the pilot frequency analog signal in a digital form by reasonably selecting the sampling bandwidth of the A/D converter and optimizing the processing algorithm, and simultaneously ensures the higher phase discrimination precision of 5e-4 order, so that the system has higher flexibility while ensuring high precision.

(2) The invention has the characteristics of digitalization, integration and expandability: the traditional satellite-borne time-frequency transmission equipment adopts an analog phase-locked loop, frequency modulation, phase modulation or frequency shift of frequency signals are mainly completed by adjusting reference signals, and an additional processing circuit is needed, so that the function and performance of the whole time-frequency transmission need to be realized by depending on more complex hardware, the hardware complexity is improved, the integration level of a system is low, and the robustness of the system is influenced. Meanwhile, the digital phase-locked loop overcomes the defects that the traditional analog phase-locked loop cannot flexibly adjust the loop parameters, has poor anti-interference performance, cannot maintain the VCXO phase and the like, and realizes the digitization and the integration of a complex analog circuit.

(3) The invention relates to high-precision generation of VCXO voltage-controlled signals: the invention adopts the parallel circuit structure of double 16bit D/A converters and the strategy of matching coarse adjustment and fine adjustment of control voltage to realize the adjustment precision superior to 18bit D/A converters, thereby not only overcoming the limitation of low precision of a single D/A converter, but also being superior to an analog phase-locked loop in the aspect of second stable index transmission and meeting the high-precision application of aerospace level.

(4) The method is realized in a digital phase-locked loop mode, avoids the physical switching of an electronic switch of a target clock signal, can realize the phase retention of an output target clock signal, and realizes the real seamless switching; the frequency modulation, phase modulation and drift rate adjustment of the target clock signal can be completed in the digital phase-locked loop, and under the same performance, an analog hardware circuit of the frequency mixer is omitted, so that the hardware cost is greatly reduced.

Drawings

FIG. 1 is a schematic diagram of a satellite-borne time-frequency signal digital high-precision phase-locked and low-loss transmission device;

FIG. 2 is a schematic diagram of the expanded satellite-borne time-frequency signal digitalized high-precision phase-locked and low-loss transmission device;

FIG. 3 is a schematic diagram of a frequency modulated phase modulator;

FIG. 4 is a schematic diagram of the composition of data preprocessing;

FIG. 5 is a loop filter discrete signal flow diagram;

fig. 6 is a diagram illustrating a hardware structure of a DA module.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The technical scheme of the invention is as follows: the output signal of VCXO is used as the sampling clock of AD, the sampling is carried out to the input signal, the sampling clock and the sampling data enter the interior of FPGA together, new modulation data information is generated after the interior of FPGA passes through the frequency modulation phase modulator, the output data information of the frequency modulation phase modulator is subjected to phase discrimination by the phase discriminator, filtering is carried out by the second-order digital filter, finally, the feedback control to VCXO is formed through the DA module, the output signal of VCXO is locked to the input signal, and the low-loss transmission of time-frequency signals is realized.

The invention realizes the low-loss transmission of time-frequency signals based on a digital loop mode, and the implementation process comprises the following steps:

step 1, reading AD sampling data under the control of an FPGA, and sending the read data and a synchronous clock to a frequency modulation phase modulator.

And 2, controlling the DDS by the frequency modulation phase modulator according to a corresponding external instruction, and mixing the output of the DDS with the sampling signal to realize frequency modulation and phase modulation of the sampling signal.

And 3, preprocessing data obtained by frequency modulation and phase modulation, wherein windowing is usually not performed, single window is added, and double windows are added. The invention adopts a form of adding double Hamming windows to carry out pretreatment. And (4) carrying out FFT algorithm on the preprocessed data, selecting a peak value and solving phase information by combining with a CORDIC algorithm.

And 4, phase information of the phase discriminator is sent to a second-order digital loop filter, parameters such as the bandwidth of the loop filter can be set according to engineering requirements, and meanwhile, real-time control can be adopted to realize variable bandwidth filtering.

And 5, controlling DA (digital to analog) to perform coarse adjustment by the filtered voltage data, realizing loop capture, and then controlling the DA module to be converted into fine adjustment, thereby realizing high-precision time-frequency transmission.