阅读说明：本技术 SiC器件的制造方法及评价方法 (Method for manufacturing and evaluating SiC device ) 是由 郭玲 于 2019-06-28 设计创作，主要内容包括：本发明提供一种能够容易地检测工艺过程中产生的缺陷的SiC器件的制造方法。本发明的一个技术方案涉及的SiC器件的制造方法包括：离子注入工序,对具有外延层的SiC外延晶片的所述外延层进行离子注入；和评价工序,在所述离子注入工序后,对所述SiC外延晶片的缺陷进行评价,所述评价工序包括：表面检查工序,进行所述SiC外延晶片的表面检查；PL检查工序,对所述SiC外延晶片的表面照射激发光,进行光致发光测定；以及判定工序,根据通过所述表面检查检测出的表面缺陷像以及通过所述PL检查工序检测出的PL缺陷像,判定所述缺陷的程度。(methods of manufacturing a SiC device according to the present invention include an ion implantation step of implanting ions into an epitaxial layer of a SiC epitaxial wafer having the epitaxial layer, and an evaluation step of evaluating defects in the SiC epitaxial wafer after the ion implantation step, the evaluation step including a surface inspection step of inspecting the surface of the SiC epitaxial wafer, a PL inspection step of measuring photoluminescence by irradiating the surface of the SiC epitaxial wafer with excitation light, and a determination step of determining the degree of the defects based on a surface defect image detected by the surface inspection and a PL defect image detected by the PL inspection step.)

A method of manufacturing an SiC device of the type , comprising:

an ion implantation step of performing ion implantation on the epitaxial layer of a SiC epitaxial wafer having the epitaxial layer; and

an evaluation step of evaluating defects of the SiC epitaxial wafer after the ion implantation step,

the evaluation step includes:

a surface inspection step of inspecting a surface of the SiC epitaxial wafer;

a PL inspection step for irradiating a region including the defect detected by the surface inspection with excitation light and performing photoluminescence measurement, after the surface inspection step; and

and a determination step of determining the degree of the defect based on the surface defect image detected by the surface inspection and the PL defect image detected by the PL inspection step.

2. The method of manufacturing the SiC device of claim 1, further comprising:

and a voltage-withstanding measurement step of applying a voltage to each of the produced SiC devices after the evaluation step to measure the voltage-withstanding.

3. The method of manufacturing the SiC device according to claim 1 or 2,

in the PL inspection step, when the ratio of the luminance S of the light-emitting portion that emits light to the light-emitting intensity N of the non-light-emitting portion that does not emit light is 4.0 or more, the defect evaluated in the evaluation step is determined to be defective.

4. The method of manufacturing the SiC device according to claim 1 or 2,

in the PL inspection step, when the ratio of the luminance S of the light-emitting portion that emits light to the light-emitting intensity N of the non-light-emitting portion that does not emit light is 2.0 or more, the defect evaluated in the evaluation step is determined to be defective.

The evaluation method of the SiC devices comprises the following steps:

a surface inspection step of inspecting the surface of the SiC epitaxial wafer;

a PL inspection step of irradiating the surface of the SiC epitaxial wafer with excitation light to perform photoluminescence measurement; and

and a determination step of determining the degree of the defect based on the surface defect image detected by the surface inspection and the PL defect image detected by the PL inspection step.

Technical Field

The present invention relates to a method for manufacturing and evaluating a SiC device. The present application claims priority based on Japanese application laid out in Japanese application No. 2018-136251, 7/19/2018, the contents of which are incorporated herein by reference.

Background

Silicon carbide (SiC) has characteristic characteristics, for example, the insulation breakdown electric field is orders of magnitude larger, the band gap is 3 times larger, and the thermal conductivity is about 3 times higher than that of silicon (Si).

However, SiC devices still have many problems to be solved.

The object is to improve the efficiency of the manufacturing process and to improve the yield . the crystal growth technique of SiC is still in progress, and therefore, many crystal defects exist in the substrate, and these crystal defects become device-critical defects that deteriorate the characteristics of the SiC device, and become a significant factor that hinders the yield.

Examples of the deterioration of the characteristics of the SiC device due to the crystal defects include a breakdown voltage defect, an oxide film breakdown, and the like. The invention described in patent document 1 includes a step of determining the position of a defective portion of a SiC epitaxial wafer. The position of the defect is determined by photoluminescence measurement. The SiC epitaxial wafer having the defect portion defined therein was subjected to withstand voltage measurement after mounting the device.

In addition to the invention described in patent document 1, an invention has been made for the purpose of improving the yield of semiconductor thin film production. Patent document 2 describes an evaluation device for predicting and estimating mobility and stress (stress) resistance of an oxide semiconductor thin film. These evaluations were performed by photoluminescence measurements.

Patent document 3 describes a defect evaluation method for determining a defect region including a 6H type stack structure in a SiC bulk (bulk) single crystal substrate. The defect evaluation was performed by photoluminescence measurement. The 6H type stack structure is known to have a defect that is a cause of current leakage (current leak).

Patent document 4 describes a defect detection method for determining the position of a crystal defect by photoluminescence measurement. In the defect detection method, the semiconductor sample is irradiated with excitation light and scanned with respect to the excitation light.

Disclosure of Invention

Technical problem to be solved by the invention

However, in the photoluminescence measurement described in patent documents 1 and 2, defects that affect the device cannot be sufficiently identified. For example, a defect that the oxide film is broken due to damage or the like cannot be found. The defect portion where the oxide film breakdown occurs becomes a cause of leakage (leak).

The photoluminescence measurement described in patent documents 3 and 4 is performed on a SiC ingot or a SiC wafer. Therefore, process defects generated in the process of forming devices on the SiC wafer cannot be determined.

The invention aims to obtain a method for manufacturing a SiC device capable of easily detecting defects generated in a process.

Means for solving the problems

The present inventors have conducted extensive studies and, as a result, have found that by comparing a surface defect image detected by performing a surface inspection with a PL defect image detected by a PL inspection step, it is possible to classify a defect caused by a breakdown voltage failure or an oxide film breakdown and a defect not caused by a breakdown voltage failure or an oxide film breakdown in the surface defect image. The present invention provides the following means to solve the above problems.

(1) A method for manufacturing a SiC device, the method including an ion implantation step of implanting ions into an epitaxial layer of a SiC epitaxial wafer having the epitaxial layer, and an evaluation step of evaluating defects in the SiC epitaxial wafer after the ion implantation step, the evaluation step including a surface inspection step of performing surface inspection of the SiC epitaxial wafer, a PL inspection step of performing photoluminescence measurement by irradiating a region including the defects detected by the surface inspection with excitation light after the surface inspection step, and a determination step of determining a degree of the defects based on a surface defect image detected by the surface inspection and a PL defect image detected by the PL inspection step.

(2) The method for manufacturing a SiC device according to the above-described aspect may further include: and a voltage-withstanding measurement step of applying a voltage to each of the produced SiC devices after the evaluation step to measure the voltage-withstanding.

(3) In the PL inspection process according to the above-described aspect, the defect evaluated in the evaluation process may be determined to be defective when the ratio of the luminance S of the light-emitting portion that emits light to the emission intensity N of the non-light-emitting portion that does not emit light is 4.0 or more.

(4) In the PL inspection process according to the above-described aspect, the defect evaluated in the evaluation process may be determined to be defective when the ratio of the luminance S of the light-emitting portion that emits light to the emission intensity N of the non-light-emitting portion that does not emit light is 2.0 or more.

(5) The method for evaluating the SiC device according to the second technical scheme comprises the following steps: a surface inspection step of inspecting the surface of the SiC epitaxial wafer; a PL inspection step of irradiating the surface of the SiC epitaxial wafer with excitation light to perform photoluminescence measurement; and a determination step of determining the degree of the defect based on the surface defect image detected by the surface inspection and the PL defect image detected by the PL inspection step.

Effects of the invention

According to the manufacturing method of the SiC device, defects generated in the process of manufacturing the SiC device can be easily detected.

Drawings

Fig. 1 is a surface inspection image of a SiC wafer before an ion implantation step (left) and a surface inspection image of a SiC epitaxial wafer at the time of the surface inspection step, and is a schematic surface view of the SiC epitaxial wafer after the ion implantation step (right).

Fig. 2 is a PL defect image obtained by observing the same position as a surface defect image (left) at a certain position on an SiC epitaxial wafer.

Fig. 3 is a PL defect image obtained by observing the same position as a surface defect image (left) at a certain position on an SiC epitaxial wafer.

Fig. 4 is a PL defect image obtained by observing the same position as a surface defect image (left) at a certain position on an SiC epitaxial wafer.

Fig. 5 is a PL inspection image obtained by observing the same position as a surface inspection image (left) at a certain position on an SiC epitaxial wafer.

Fig. 6 shows the results of measuring the gate-source leakage current Igss of each device in which the defects observed in fig. 2, 3, and 4 are present.

Fig. 7 shows the result of measuring the drain off current (cut-off) Idss of each device in which the defect observed in fig. 2, 3, and 4 exists.

Detailed Description

In the drawings used in the following description, parts that become features may be shown enlarged for the sake of convenience in order to facilitate understanding of the features of the present invention, and the dimensional ratios and the like of the respective constituent elements may be different from those in reality, and the materials, dimensions and the like exemplified in the following description are examples, and the present invention is not limited to those examples, and can be implemented by being appropriately modified within a range not changing the gist of the present invention.

Method for manufacturing SiC device "

The method for manufacturing a SiC device according to the present embodiment includes an ion implantation step and an evaluation step. Hereinafter, a method for manufacturing a SiC device will be described in detail. In this embodiment, the process of the method for manufacturing the SiC device will be described in detail for each process.

(wafer preparation Process)

The SiC substrate is first prepared, the SiC substrate is obtained by slicing a single-crystal SiC ingot, an epitaxial layer made of SiC is then laminated on the surface of the SiC substrate, and the SiC substrate on which the epitaxial layer is laminated is referred to as an SiC epitaxial wafer.

(ion implantation Process)

In the ion implantation step, an epitaxial layer of the SiC epitaxial wafer is ion-implanted, and the ion-implanted portion of the epitaxial layer is a p-type or n-type semiconductor, in the case of the p-type, aluminum, boron, or the like is ion-implanted as impurity ions into the epitaxial layer, in the case of the n-type, phosphorus, nitrogen, or the like is ion-implanted as impurity ions into the epitaxial layer, and the ion-implanted portion is, for example, a source region or a drain region of a MOSFET.

In the ion implantation process, crystal defects may occur. The crystal defect may cause a breakdown voltage failure of the SiC device.

After the ion implantation step, a carbide film formation step, an activation annealing step, an oxidation step, and an oxide film peeling step are performed.

The carbonized film forming process is performed by first coating resists on both surfaces of a wafer, then hardening the wafer, and further , by performing a high temperature treatment on the resist films coated on both surfaces of the wafer in an Ar atmosphere, the carbonized film is formed as a protective film for protecting the SiC epitaxial wafer.

In the activation annealing step, the SiC epitaxial wafer is heated at a predetermined temperature. By the activation annealing, the impurity implanted into the epitaxial layer is activated to become a carrier. In the oxidation step, both surfaces of the SiC wafer are oxidized.

The oxidation step is performed to remove the carbonized film.

In the oxide film peeling step, the formed oxide film is peeled off. The oxide film peeling step is not limited to this example, and the formed oxide film is peeled by, for example, hydrofluoric acid treatment or the like. The oxide film has poor film quality and many particles (particles) are present on the surface. By peeling off the oxide film, a high-quality SiC epitaxial wafer is obtained.

In the carbide film formation step, the activation annealing step, the oxidation step, and the oxide film peeling step, the adhesion of particles is a defect that may cause a defect in the SiC device.

In addition, the protective film may not be formed properly in the carbide film forming step. If the protective film is not formed properly, damage or the like may occur in the SiC epitaxial layer. Damage and the like also cause defects of the SiC device.

(evaluation step)

In the method for manufacturing a SiC device according to the present embodiment, the evaluation step is performed after the ion implantation step. The evaluation step includes a surface inspection step, a PL inspection step, and a determination step.

(surface inspection step)

In the surface inspection step, after the ion implantation step, defects (damage) on the surface of the SiC epitaxial wafer are detected. In the surface inspection step, the reflected light of the light incident on the surface of the SiC epitaxial wafer is measured. The surface inspection step is performed using an optical microscope, an electron microscope, a scanning probe microscope, or the like. In the surface inspection step, defects having a width of 1 μm to 1000 μm are detected. Among them, defects having a width of 10 μm to 1mm can be classified into types by optical inspection measured in the surface inspection step. Examples of the types of defects that can be classified include falling objects (downfall), carrots (carrot), large-pits (large-pit), linear defects, triangular defects, scratches, shallow marks, and pits (pit).

Fig. 1 is a view of a SiC epitaxial layer before an ion implantation step and a SiC epitaxial layer at the time of a surface inspection step, in which the surface of the same site is inspected, fig. 1 (a) is a surface image of the SiC epitaxial layer before the ion implantation step, fig. 1 (b) is a surface image of the SiC epitaxial layer measured in the surface inspection step, as shown in fig. 1 (a), no defect is observed before the ion implantation step, that is, the defect shown in fig. 1 (b) is a defect generated by a process after the ion implantation step.

The position coordinates of these defects can be determined by the surface inspection process. The entire surface of the substrate is observed with reference to, for example, an orientation flat portion of the SiC epitaxial wafer by using a surface inspection apparatus, and position coordinates of the defect are determined. In the surface inspection step, the reference for observing the SiC epitaxial wafer may be any reference.

In the method for manufacturing a SiC device and the method for evaluating a SiC device according to the present embodiment, the surface of the SiC epitaxial wafer before the ion implantation step may be subjected to surface inspection for comparison. In the surface inspection of the SiC epitaxial wafer before the ion implantation step, the same inspection as in the surface inspection step can be performed.

(PL test procedure)

In the PL inspection step, PL measurement is performed on the SiC epitaxial wafer subjected to ion implantation. In the PL inspection process, a photoluminescence inspection apparatus is used. The wavelength of the excitation light during the inspection is 270nm to 380 nm. Preferably 310nm to 365nm, more preferably 365 nm. Helium-cadmium (He-Cd) laser (λ 325nm), mercury-xenon (Hg-Xe) uv (ultra violet) lamp (λ 314nm), N₂A laser (λ 365nm) or the like is used as the excitation light.

The light receiving wavelength is preferably 420nm to 750nm, and more preferably 660 nm. The light receiving wavelength can be controlled by using a low-band-pass filter (japanese: ローパスバンドフィルタ) or the like. The low band pass filter is a filter that cuts off a wave having a specific wavelength or less. By limiting the light receiving wavelength, light emission caused by a condition other than the predetermined defect can be removed.

The PL inspection process according to the present embodiment is performed on a region including a defect detected in the surface inspection process. Fig. 2 (a), 3 (a), and 4 (a) are surface inspection images of defects. Fig. 2 (b), 3 (b), and 4 (b) are PL inspection images obtained by PL inspection of a region including a defect detected in the surface inspection step. Fig. 2 (a) and 2 (b), fig. 3 (a) and 3 (b), and fig. 4 (a) and 4 (b) are images of the same region.

In the PL inspection image shown in fig. 2 (b), bright spots appearing white exist at the same positions as the defects confirmed by the surface inspection image. The PL inspection image shown in fig. 3 (b) does not reach the PL inspection image shown in fig. 2 (b), and a bright spot appearing whitish appears at the same position as the defect confirmed by the surface inspection image. In the PL inspection image shown in fig. 4 (b), no bright spot is seen at the same position as the defect confirmed by the surface inspection image.

Generally, photoluminescence light detected by PL inspection is light generated when an electron excited from the valence band to the conduction band by excitation light returns to the valence band. Thus, light is emitted not only due to the presence of surface defects. Therefore, there are cases where strong light emission occurs as shown in fig. 2 (b) and cases where no light emission occurs as shown in fig. 4 (b).

On the contrary, even in a portion having no defect on the surface, photoluminescence was confirmed. Fig. 5 is an image of a substrate subjected to surface inspection and PL inspection. Fig. 5 (a) is a surface inspection image, and fig. 5 (b) is a PL inspection image. Although no surface defect was detected in fig. 5 (a), photoluminescence was measured as white haze (haze) in fig. 5 (b). In other words, when only PL inspection is performed, light emission due to surface defects as shown in fig. 2 (b) and light emission due to the inside of the epitaxial layer as shown in fig. 5 (b) are measured, and these light emissions cannot be distinguished from each other.

(determination step)

In the determination step, the degree of the defect is determined based on the defect image detected in the surface inspection step and the PL defect image detected in the PL inspection step.

As shown in fig. 2 to 4, even if similar defects are detected in the surface inspection process, there is a difference in what is observed in the PL inspection process. The inventors found a correlation between the difference observed in the PL inspection process and oxide film breakdown and withstand voltage failure in SiC devices.

Fig. 6 shows the result of an oxide film breakdown test performed on the defect site identified by the surface inspection process. Fig. 7 shows the results of a pressure-resistant leakage test in which a pressure-resistant leakage test was performed on a defect identified by the surface inspection process. In fig. 6 and 7, the dimple (Pit) a is a defect in which strong luminescence is observed in the PL inspection image shown in fig. 2 (B), the dimple B is a defect in which weak luminescence is observed in the PL inspection image shown in fig. 3 (B), and the dimple C is a defect in which no luminescence is observed in the PL inspection image shown in fig. 4 (B).

For the oxide film breakdown test and the withstand voltage leakage test, a metal-oxide-semiconductor field-effect transistor (MOSFET) was produced as a SiC device, and the oxide film breakdown test and the withstand voltage leakage test were performed on the MOSFET. By measuring the gate-source leakage current (Igss), it was determined whether or not the oxide film breakdown occurred in the resulting device. The drain-source voltage is short-circuited, and a gate-source voltage Vgs is applied. Voltage application was performed in two ways, 10V and 15V.

Further, the drain off current (Idss) was measured to determine whether or not the resulting device had a breakdown voltage defect. The gate-source is short-circuited, and a voltage is applied between the drain and the source. Voltage application was performed in two modes, i.e., 10V and 800V.

As shown in fig. 6 and 7, the dent a causes oxide film breakdown and breakdown failure. The dent B did not cause oxide film breakdown, but a breakdown voltage failure occurred when a voltage of 800V was applied. The dent C does not cause oxide film breakdown and withstand voltage failure. In other words, by PL-inspecting the defect identified by the surface inspection, the degree of the defect can be determined. Here, the threshold of the gate-source leakage current showing oxide film breakdown was set to 1.0X 10^-7A, the threshold of the off-state drain current exhibiting breakdown voltage was set to 1.0X 10^-3A. Further, these thresholds may be set as appropriate in accordance with the required performance.

Here, the degree of light emission in the PL inspection image may be visually analyzed from the obtained measurement image, but it is preferable to determine the degree of light emission from the contrast ratio between the defect and the normal portion in order to improve the degree of tightness. In addition, by using the contrast ratio, automation of detection becomes possible.

In the PL defect image shown in fig. 2 (b), the ratio (S/N ratio) of the luminance S of the light-emitting portion (dimple a) that emits light to the light-emitting intensity N of the non-light-emitting portion that does not emit light is 9.00527. In the PL defect image shown in fig. 3 (B), the S/N ratio of the light-emitting portion (dimple B) emitting light is 3.07779. In the PL defect image shown in fig. 4 (b), the S/N ratio of the light emitting portion (dimple C) emitting light is 1.67965.

Therefore, in the PL inspection step, the defect is preferably determined to be defective when the S/N ratio is 4.0 or more, and more preferably determined to be defective when the S/N ratio is 2.0 or more.

When the defect is judged to be defective when the S/N ratio is 4.0 or more, at least the defect causing the oxide film breakdown can be removed. Further, when the defect is judged to be defective when the S/N ratio is 2.0 or more, the defect causing the oxide film breakdown and the breakdown voltage defect can be removed.

(Gate oxide film Forming Process)

After the defective portion is identified by the above inspection, a gate oxide film formation step is performed. In the gate oxide film formation step, the SiC epitaxial wafer is heated at a predetermined temperature in an atmosphere containing oxygen, for example. By heating, both sides of the epitaxial wafer are thermally oxidized. And forming a gate electrode on the gate oxide film to obtain the SiC device.

(pressure resistance measurement step)

A voltage may be applied to each SiC device fabricated on the SiC epitaxial wafer, and steps may be performed to measure the withstand voltage, which is a voltage applied between the back pad electrode and the source pad electrode.

As described above, according to the method for evaluating a SiC device and the method for manufacturing a SiC device according to the present embodiment, it is possible to determine a fatal defect that causes oxide film breakdown and breakdown voltage failure. It is difficult to make an accurate determination only by PL inspection using photoluminescence. In contrast, in the SiC device evaluation method and the SiC device manufacturing method according to the present embodiment, by checking the surface defect image and the PL defect image, respectively, it is possible to determine a fatal defect that causes oxide film breakdown and breakdown voltage failure with higher accuracy.