Semiconductor device and method of manufacturing semiconductor device
阅读说明：本技术 半导体器件和制造半导体器件的方法 (Semiconductor device and method of manufacturing semiconductor device ) 是由 C.舍费尔 A.布雷梅瑟 B.戈勒 R.克恩 M.皮辛 R.鲁普 F.J.桑托斯罗德里格 于 2019-07-03 设计创作，主要内容包括：本发明涉及半导体器件和制造半导体器件的方法。根据本文描述的方法的实施例,提供了碳化硅衬底(700),其包括多个器件区域(650)。可以在碳化硅衬底(700)的前侧处提供前侧金属化(610)。该方法还可以包括在碳化硅衬底(700)的后侧处提供辅助结构(800)。辅助结构(800)包括多个横向分离的金属部分(810)。每个金属部分(810)与器件区域(650)之一接触。(The invention relates to a semiconductor device and a method of manufacturing the same. According to embodiments of methods described herein, a silicon carbide substrate (700) is provided that includes a plurality of device regions (650). A front-side metallization (610) may be provided at the front side of the silicon carbide substrate (700). The method may further comprise providing an auxiliary structure (800) at the backside of the silicon carbide substrate (700). The auxiliary structure (800) comprises a plurality of laterally separated metal portions (810). Each metal portion (810) is in contact with one of the device regions (650).)
1. A method of manufacturing a semiconductor device, comprising:
providing a silicon carbide substrate (700) having a plurality of device regions (650);
providing a front-side metallization (610) at a front side of a silicon carbide substrate (700); and
an auxiliary structure (800) is provided at a backside of the silicon carbide substrate (700), wherein the auxiliary structure (800) comprises a plurality of laterally separated metal portions (810), and wherein each metal portion (810) is in contact with one of the device regions (650).
2. The method according to the preceding claim, wherein the silicon carbide substrate (700) comprises lattice-shaped free areas laterally separating the device regions (650).
3. The method according to any one of the preceding claims, wherein providing an auxiliary structure (800) comprises:
providing an auxiliary structure (800), and
structurally connecting a top surface (801) of the auxiliary structure (800) with a backside surface (602) of the silicon carbide substrate (700).
4. The method of any one of the preceding claims,
the auxiliary structure (800) comprises a metal disc (809) having grid-shaped trenches (805), and wherein the grid-shaped trenches (805) extend from a top surface (801) of the auxiliary structure (800) into the metal disc (809) and laterally separate the metal portions (810) from each other.
5. The method according to any one of the preceding claims, wherein providing an auxiliary structure (800) comprises:
an auxiliary base (840) is provided having laterally spaced trenches (845) extending from the top surface (801) of the auxiliary structure (800) into the auxiliary base (840), and metal portions (810) are formed in the spaced trenches (845).
6. A method according to claim 3, wherein structurally connecting the top surface (801) of the auxiliary structure (800) with the backside surface (602) of the silicon carbide substrate (700) comprises at least one of:
sintering, diffusion welding and direct bonding.
7. The method according to any of the preceding claims, wherein providing an auxiliary structure (800) at the backside of the silicon carbide substrate (700) comprises:
forming a separation structure (820) at a backside of the silicon carbide substrate (700), wherein an opening (825) in the separation structure (820) exposes the device region (650); and
a metal portion (810) is formed in the opening (825).
8. The method of any preceding claim, further comprising:
the silicon carbide substrate (700) and the auxiliary structure (800) are divided into semiconductor dies (950), wherein each semiconductor die (950) comprises one of the device regions (650) and one of the metal portions (810).
9. A method of manufacturing a semiconductor device, comprising:
providing a silicon carbide substrate (700),
providing a front-side metallization (610) at a front side of the silicon carbide substrate (700) and a back-side metallization (620) at a back side of the silicon carbide substrate (700);
providing a metal disc (809); and
structurally connecting the metal plate (809) and the backside metallization (620).
10. The method according to the preceding claim, further comprising:
forming an auxiliary carrier (680) at the front side of the silicon carbide substrate (700) before structurally connecting the metal disc (809), and
the thickness of the silicon carbide substrate (700) is reduced after the formation of the auxiliary carrier (680) and before the structural attachment of the metal disk (809) and the backside metallization (620).
11. Method according to the preceding claim, wherein
The auxiliary carrier (680) includes a loop portion (686).
12. The method according to either of the two preceding claims, further comprising:
a front side isolation trench (705) is formed extending into the silicon carbide substrate (700) from the front side prior to forming the auxiliary carrier (680).
13. The method of any of the three preceding claims, wherein reducing the thickness of the silicon carbide substrate (700) comprises:
the layer portions of the silicon carbide substrate (700) are separated.
14. The method according to the preceding claim, wherein said separation comprises the steps of:
implanting ions into the silicon carbide substrate (700) to form an isolation region (750) in the silicon carbide substrate (700), wherein an absorption coefficient in the isolation region (750) is at least 5 times as high as an absorption coefficient in the silicon carbide substrate (700) outside the isolation region (750); and
a silicon carbide substrate (700) is irradiated with laser radiation.
15. The method of any of the five preceding claims, further comprising:
before the structural connection, a backside isolation trench (706) is formed that extends into the silicon carbide substrate (700) from the backside.
16. The method of any one of the six preceding claims,
the metal disc (809) comprises a grid-shaped trench (805) extending from a top surface (801) of the metal disc into the metal disc (809), and wherein the top surface (801) is structurally connected with the backside metallization (620).
17. A semiconductor device, comprising:
a silicon carbide body (100);
a first load electrode (310) at a front side of the silicon carbide body (100);
a second load electrode (320) at a rear side of the silicon carbide body (100);
a metal plate (340) in contact with the second load electrode (320), wherein the thickness of the metal plate (340) is at least 30 μm and at most 300 μm; and
and a load terminal (972) in contact with the metal plate (340).
18. Semiconductor device according to the preceding claim, wherein
The silicon carbide body (100) comprises a first doped region (120) and a second doped region (130), the first doped region (120) and the second doped region (130) forming a pn-junction (pn),
the first load electrode (310) is in contact with the first doped region (120), and
the second load electrode (320) is in contact with the second doped region (130).
19. The semiconductor device according to any one of the two preceding claims,
the thickness of the metal plate (340) is greater than the thickness of the silicon carbide body (100) between the first load electrode (310) and the second load electrode (320).
20. The semiconductor device of any of the three preceding claims, wherein,
the second load electrode (320) includes at least one of nickel, titanium, tantalum, and aluminum.
21. The semiconductor device of any one of the four preceding claims,
the metal plate (340) includes at least one of molybdenum and copper.
22. The semiconductor device of any one of the five preceding claims, further comprising:
a non-metallic frame structure (350) laterally surrounding the metal plate (340).
Technical Field
The present disclosure relates to a method of manufacturing a semiconductor device and a semiconductor device.
Background
Semiconductor wafers are typically available in standard wafer sizes and/or thicknesses. For example, standard wafer diameters may be 2 inches (50mm), 4 inches (100mm), or 6 inches (150 mm). For silicon carbide wafers, the standard wafer thickness may be, for example, 350 μm. Attempts have been made to reduce the final thickness of the semiconductor material to improve device characteristics. For example, in a power semiconductor device with vertical load current flow between the front side and the back side, a thinner semiconductor die (die) may result in a lower on-state resistance. Wafer singulation methods aim at dividing a wafer horizontally into multiple thin wafers to save costs, but brittle semiconductor materials can complicate the handling of semiconductor wafers that are thinner than standard wafers. The auxiliary carrier may be reversibly bonded to the front side of the semiconductor wafer to increase mechanical stability. The secondary carrier is typically removed prior to wafer dicing.
Disclosure of Invention
Embodiments of the present disclosure relate to a method of manufacturing a semiconductor device. A silicon carbide substrate is provided that includes a plurality of device regions. Further, a front-side metallization is provided at the front side of the silicon carbide substrate. An auxiliary structure is provided at the back side of the silicon carbide substrate. The auxiliary structure comprises a plurality of laterally separated metal portions. Each metal portion is in contact with one of the device regions.
Another embodiment of the present disclosure is directed to another method of manufacturing a semiconductor device. A silicon carbide substrate is provided. Further, a front-side metallization is provided at the front side of the silicon carbide substrate, and a back-side metallization is provided at the back side of the silicon carbide substrate. A metal disk is provided such that the metal disk and the backside metallization are structurally connected.
Another embodiment of the present disclosure relates to a semiconductor device. The semiconductor device includes a silicon carbide body, a first load electrode at a front side of the silicon carbide body, a second load electrode at a rear side of the silicon carbide body, and a metal plate in contact with the second load electrode. The thickness of the metal plate is at least 30 μm and at most 300 μm. The load terminal is in contact with the metal plate.
Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings.
Drawings
The accompanying drawings are included to provide a further understanding of the embodiments and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of a semiconductor device and methods of manufacturing a semiconductor device, and together with the description serve to explain the principles of the embodiments. Further embodiments are described in the following detailed description and claims.
Fig. 1 is a simplified schematic flow diagram illustrating a method of manufacturing a semiconductor device according to an embodiment;
2A-2B illustrate schematic cross-sectional views of a wafer assembly having a silicon carbide substrate with a metal portion of an auxiliary structure in contact with a device region of the silicon carbide substrate, according to an embodiment;
3A-3C show schematic cross-sectional views of a wafer assembly and auxiliary structure with a silicon carbide substrate, which relate to an auxiliary structure based on a metal disk with grid-shaped trenches, according to an embodiment;
4A-4C illustrate schematic cross-sectional views of a wafer assembly and an auxiliary structure having a silicon carbide substrate, wherein a metal portion of the auxiliary structure is formed in a trench of a non-metal auxiliary base, according to an embodiment;
5A-5C illustrate schematic vertical cross-sectional views of a wafer assembly having a silicon carbide substrate with metal portions of auxiliary structures formed in openings of matrix-like separation structures at a backside of a workpiece having a silicon carbide substrate, according to an embodiment;
6A-6J illustrate schematic vertical cross-sectional views of a wafer assembly having a silicon carbide substrate, a secondary structure, and a secondary carrier, according to another embodiment;
FIG. 7 is a simplified schematic flow chart diagram illustrating a method of manufacturing a semiconductor device according to another embodiment;
8A-8C illustrate schematic cross-sectional views of a workpiece, auxiliary structure, and wafer assembly with a silicon carbide substrate, involving an auxiliary structure comprising a flat metal disk, according to an embodiment;
9A-9D illustrate schematic cross-sectional views of a wafer assembly with a silicon carbide substrate that involve a dicing process prior to application of an auxiliary structure, in accordance with an embodiment;
figure 10 illustrates a schematic cross-sectional view of a wafer assembly according to an embodiment involving an auxiliary carrier comprising a ring portion;
fig. 11 illustrates a schematic cross-sectional view of a semiconductor die in accordance with another embodiment;
fig. 12 illustrates a schematic cross-sectional view of a silicon carbide device according to another embodiment.
Detailed Description
In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in which the silicon carbide device and method of making the silicon carbide device may be practiced. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. For example, features illustrated or described with respect to one embodiment can be used on or in conjunction with other embodiments to yield yet a further embodiment. The present disclosure is intended to encompass such modifications and variations. In particular, all features described in connection with the embodiments of the method are also disclosed for embodiments of the semiconductor device and vice versa.
The examples are described using specific language, which should not be construed as limiting the scope of the appended claims. The drawings are not to scale and are for illustrative purposes only. Corresponding elements in different figures are denoted by the same reference numerals if not otherwise stated.
The terms "having," "containing," "including," "containing," "having," and the like are open-ended and such terms indicate the presence of stated structures, elements, or features, but do not exclude additional elements or features. The articles "a," "an," and "the" are intended to include the plural as well as the singular, unless the context clearly indicates otherwise.
Furthermore, the term "on … …" should not be construed as meaning only "directly on … …". Rather, if an element is "on" (e.g., a layer is "on" another layer or "on" a substrate) another component (e.g., another layer) can be located between the two elements (e.g., another layer can be located between the layer and the substrate if the layer is "on" the substrate).
The term "electrically connected" describes a permanent low resistance connection between electrically connected elements, such as a direct contact between the relevant elements or a low resistance connection via a metal and/or heavily doped semiconductor material. The term "electrically coupled" includes that one or more intermediate elements suitable for signal and/or power transfer may be between electrically coupled elements (e.g., elements controllable to temporarily provide low resistance connection in a first state and high resistance electrical decoupling in a second state).
The figures illustrate the relative doping concentrations by indicating "-" or "+" next to the doping type "n" or "p". For example, "n-" means a doping concentration lower than that of an "n" doped region, while an "n +" doped region has a higher doping concentration than an "n" doped region. Doped regions of the same relative doping concentration do not necessarily have the same absolute doping concentration. For example, two different "n" doped regions may have the same or different absolute doping concentrations.
The ranges given for the parameters include the boundary values. For example, the range of the parameter y from a to b is understood as a ≦ y ≦ b. A parameter y having a value of at least c is understood as c.ltoreq.y, and a parameter y having a value of at most d is understood as y.ltoreq.d.
The main component of a layer or structure from a compound or alloy is such an element that the atom forms the compound or alloy. For example, nickel and silicon are the main components of nickel silicide layers, while copper and aluminum are the main components of copper aluminum alloys.
IGFETs (insulated gate field effect transistors) are voltage control devices including MOSFETs (metal oxide semiconductor FETs) and other FETs that have gate electrodes based on doped semiconductor materials and/or that have gate dielectrics that are not or not exclusively oxide based.
According to an embodiment, a method of fabricating a semiconductor device (e.g., a silicon carbide device) may include providing a semiconductor substrate, such as a silicon carbide substrate.
In the following, embodiments of the semiconductor device and embodiments of the method are explained in connection with silicon carbide as semiconductor material of the semiconductor substrate. However, the methods described herein may be adapted to provide a semiconductor device having any other semiconductor material by replacing the silicon carbide substrate with a different semiconductor substrate. For example, wide bandgap semiconductor materials (e.g., with GaN, AlN, or Ga)2O3As a main component) may be used as a semiconductor material.
Furthermore, even though the method is described in connection with a semiconductor substrate comprising only one type of semiconductor material (i.e., silicon carbide), the semiconductor substrate may comprise different types of semiconductor materials. For example, the semiconductor substrate may include an epitaxial layer of a first semiconductor material (e.g., GaN) and a semiconductor wafer of a second, different semiconductor material (e.g., Si) to which the first semiconductor material has been epitaxially grown. Additionally or alternatively, the semiconductor substrate may comprise a stack of layers of different semiconductor materials and/or different compositions of semiconductor materials. For example, in the case of an epitaxial layer of a first semiconductor material on a semiconductor wafer of a second semiconductor material, an interlayer stack (e.g., for matching the lattice constant and/or coefficient of thermal expansion of the first and second semiconductor materials) may be located between the epitaxial layer and the wafer.
The method is particularly suitable for providing semiconductor devices having semiconductor substrates of high-priced semiconductor material. Throughout this application, high-priced semiconductor materials are semiconductor materials that require high-priced semiconductor wafers and/or high-priced growth substrates to provide semiconductor devices. In this context, "high price" may mean that the semiconductor wafer and/or the growth substrate are more expensive than a silicon carbide wafer of the same size (e.g., of comparable crystal quality). Additionally or alternatively, "high price" may mean that at least 30% or at least 40% of the ultimate cost of a bare die portion (i.e., without packaging or circuitry) of a semiconductor device may be determined by the price of the semiconductor wafer and/or growth substrate.
The silicon carbide substrate may be a silicon carbide wafer that is a growth substrate onto which epitaxial material may be grown. Additionally or alternatively, the silicon carbide substrate may be an epitaxial layer. For example, the silicon carbide substrate may have been epitaxially grown on a silicon carbide wafer as a growth substrate, at least part of the silicon carbide wafer being removed after the epitaxial growth. The silicon carbide substrate may also correspond to a silicon carbide wafer, wherein the doped regions may have been introduced into the silicon carbide wafer.
The semiconductor devices fabricated using embodiments of the methods described herein may be power semiconductor devices. For example, the semiconductor device may be a field effect transistor (FET; e.g., a MOSFET or JFET), an IGBT, or a diode (e.g., a merged pin Schottky diode or a merged pin heterojunction diode), or a combination thereof.
The silicon carbide substrate may include a plurality of device regions. For example, multiple device regions may be laterally separated by a free region. In other words, the spare region may be disposed between two adjacent device regions. The vacant regions may be formed in the silicon carbide substrate, that is, may be a part of the silicon carbide substrate. The free areas may be grid-shaped, i.e. may have the shape of a grid in a top view onto the silicon carbide substrate. The free region may serve as a frame (frame) for the corresponding device region.
A frontside metallization may be provided at the frontside of the silicon carbide substrate. The front side metallization may be formed in one piece or may comprise a plurality of separate portions. The separate parts may be formed in multiple parts and/or in multiple pieces. Here and in the following, the formation of an element or of parts of said element in "multipart" form may mean that the parts of the element are connected via smaller bridges. The top surface of the "multi-part" element may be coherent, but not simply coherent. For example, a "multi-part" element may include holes and/or gaps between parts of the element. Furthermore, here and in the following, the formation of an element or of parts of said element in "multipart" may mean that the parts are not interconnected, i.e. the parts are separated from each other. The top surface of the "multipart" element may not be coherent. If the parts of an element are formed simultaneously as "multi-part" and "multi-piece", the element may comprise a first part in which the first part is formed in multiple parts and a second part in which the second part is formed in multiple parts, wherein the first part and the second part may be formed in multiple parts with respect to each other.
Each portion of the front side metallization may be assigned to the device region in a one-to-one manner. In one embodiment, front side metallization may be provided at the front side before providing the auxiliary structure at the back side.
The silicon carbide substrate and the front-side metallization may together form a workpiece, i.e. an intermediate product for further processing.
An auxiliary structure may be provided at the backside of the silicon carbide substrate. The auxiliary structure may comprise a plurality of laterally separated metal portions. The metal part may be formed in multiple parts or pieces. Each metal portion of the auxiliary structure may be in contact with one of the device regions of the silicon carbide substrate. In particular, each metal portion of the auxiliary structure may be in contact with exactly one of the device regions. The metal portions and the device regions may be allocated to each other in a one-to-one manner.
Each device region may include a plurality of differently doped regions that constitute the electrical function of the resulting semiconductor device resulting from the device region. Each device region may include the same functional circuitry (i.e., the functional circuitry may be replicated along the device region). Each device region may be connected to a front-side metallization and a back-side metallization of the finalized semiconductor device. For example, the backside metallization may comprise at least a portion of the auxiliary structure.
From each device region, the dicing process produces a single semiconductor die ("chip") that includes a block of semiconductor material in or on which a given functional circuit is fabricated. Prior to dicing, each semiconductor die forms one device region of the silicon carbide substrate.
The device regions may be arranged in a matrix. The free area may be free of such elements and structures that become an integral part of the semiconductor device. The vacant areas may include elements and structures, such as electrical test circuits and/or alignment marks, that are temporarily used during wafer-level manufacturing processes and device characterization. A portion of the free area may be consumed during the cutting process. For example, a cutting process using a mechanical saw may create a scribe line in the vacant area.
The auxiliary structure may form a rigid and/or robust and/or mechanically stabilized carrier for the silicon carbide substrate, for example during the process of application at wafer level. In the following, "mechanically stabilized" means that the silicon carbide substrate can be processed in a subsequent process step with a suitable tool without the need for an additional carrier, for example to prevent cracking or bending of the silicon carbide substrate and/or to ease the processing. In at least one method step, the auxiliary structure may be a mechanically stabilized structure only for the silicon carbide substrate. For example, the auxiliary structure may stabilize the silicon carbide substrate during and after removal of the auxiliary carrier from the front side of the silicon carbide substrate. In particular, the auxiliary structure may stabilize the silicon carbide substrate during device characterization.
Device characterization (die sort and/or electrical sort) may include electrical testing for each device region. For device characterization, the silicon carbide substrate may be mounted on a chuck, which may align the silicon carbide substrate with the electrical probes. The electrical probe may be in contact with at least the front side metallization. In general, device characterization is not possible as long as the auxiliary carrier mounted at the front side of the silicon carbide substrate covers the front side metallization. Device characterization may result in sorting from the entire silicon carbide substrate and/or at least some of the semiconductor devices of the silicon carbide substrate.
The auxiliary structure at the back side may mechanically stabilize the silicon carbide substrate without preventing the electrical probe from accessing the front side metallization. In addition, since the metal portion of the auxiliary structure is conductive, even backside metallization is electrically available for device characterization.
For example, in a vertical power semiconductor device, a load current may flow in a vertical direction through a semiconductor die between a first load electrode, which may form part of the front-side metallization, and a second load electrode, which may form part of the back-side metallization. During device characterization, the auxiliary structure mechanically stabilizes the silicon carbide substrate during probing and allows for complete functional testing of each semiconductor die on a wafer level.
Since the auxiliary structure can mechanically stabilize the silicon carbide substrate to dicing, the thickness of the silicon carbide substrate can be reduced to 180 μm or less, for example, 110 μm or less, 90 μm or less, or at most 70 μm. The final thickness may depend on the diameter of the silicon carbide substrate. For example, if the silicon carbide substrate has a diameter of 6 inches, the thickness may be reduced to below 110 μm.
Because the metal portions of the auxiliary structures can be laterally separated from one another, the auxiliary structures can be used without significantly impacting the complexity of the dicing process that separates the individual semiconductor die from the silicon carbide substrate.
The metal portion has a significantly lower ohmic resistivity than the highly doped semiconductor material, such that the metal portion can become an integral part of the finalized semiconductor device without significantly affecting device parameters, such as on-state resistance. The metal portion may reduce the occurrence of cracks and/or may reduce the risk of mechanical damage to the silicon carbide material during mechanical processing of the silicon carbide substrate, for example during dicing and/or during pick and place processes. For example, mechanical damage to the silicon carbide substrate may be due to at least a portion of the silicon carbide substrate (e.g., an edge of the silicon carbide substrate) being cut away during mechanical processing, for example, due to the silicon carbide being a brittle material.
According to an embodiment, providing the auxiliary structure may include providing the auxiliary structure and structurally connecting a top surface of the auxiliary structure with a backside surface of the silicon carbide substrate. That is, the auxiliary structure may be prefabricated. The structural connection may be a mechanical connection.
Prefabricating the auxiliary structure and then mechanically connecting the fully prefabricated auxiliary structure with the backside surface of the silicon carbide substrate allows the auxiliary structure to be formed in a separate process in a cost-effective manner. Since the edge length of the device region is typically in the range of millimeters or at least several hundred μm, the alignment of the prefabricated auxiliary structures with respect to the device region of the silicon carbide substrate may be relatively simple.
According to an embodiment, the auxiliary structure may comprise a metal disc having a trench, wherein the trench extends from the top surface into the metal disc. The metal portion may be formed by portions of the metal disk laterally separated by trenches. In general, the portions laterally separated by the trenches may be aligned with respect to the device region of the silicon carbide substrate.
The use of the word "disc" does not limit the metal disc to any particular shape. The metal disc may have an oval (e.g. circular) or polygonal (e.g. hexagonal) cross-section.
The grooves may be grid-shaped. In this case, the device regions may be separated by lattice-shaped free regions. The trench may be aligned with the free area, i.e. may at least partially overlap the free area.
The metal disc with grooves can be manufactured in a relatively simple manner, for example by moulding, etching, grinding and/or sawing. Auxiliary structures based on prefabricated metal discs may only require a relatively simple recessing process as an additional process step. For example, in addition to the dicing process that cuts the silicon carbide substrate into individual semiconductor dies, a grinding process may be added as such an additional process step. This may occur after device characterization, for example after electrical sorting.
According to an embodiment, providing the auxiliary structure may comprise providing an auxiliary base. The auxiliary base may include laterally separated grooves, wherein the grooves may extend into the auxiliary base from a top surface of the auxiliary base. The metal portions may be formed in separate trenches.
The auxiliary base may comprise or consist of a material that can be removed with high selectivity for the metal part or that can be easily cut off. Thus, embodiments may add little complexity to the cutting process. For example, the auxiliary base may include a glass material, a polymer material (e.g., a resist material), and/or crystalline silicon.
Structurally joining the top surface of the auxiliary structure with the backside surface of the silicon carbide substrate may include at least one of sintering, diffusion welding, direct bonding, reactive bonding, according to an embodiment.
In the case of direct bonding, the top surface of the auxiliary structure and the backside surface of the silicon carbide substrate are sufficiently flat, smooth and clean. The adhesion between the directly bonded auxiliary structure and the silicon carbide substrate may be based on chemical bonding, hydrogen bonding, metal bonding, ionic bonding, and/or covalent bonding between the silicon carbide substrate and the auxiliary structure.
The direct bonding may include applying a physical force pressing the silicon carbide substrate and the auxiliary structure against each other, a heat treatment of at least one of the top surface and the back-side surface at an intermediate temperature, or a combination of both (fusion bonding, thermocompression bonding, bonding by atomic rearrangement). Direct bonding may include the absence of any additional intermediate layers.
Diffusion soldering may include applying a diffusion solder material on at least one of a top surface of the auxiliary structure and a backside surface of the silicon carbide substrate. The diffusion solder may include tin and at least one other metal. For example, the diffusion solder may be lead-free and may include Sn and at least one of Ni, In, Pd, Mo, Cu, Au, and Ag.
Sintering may include applying a sintering paste at least one of a top surface of the auxiliary structure and a backside surface of the silicon carbide substrate, wherein the sintering paste may include at least one of silver and copper.
Direct bonding, diffusion bonding, and sintering may be performed at relatively low temperatures so that auxiliary structures may be provided without having a significant impact on previously formed structures in the silicon carbide substrate.
According to an embodiment, providing the auxiliary structure at the backside of the silicon carbide substrate may comprise forming a separation structure at the backside of the silicon carbide substrate (e.g. at the backside surface).
The separation structure may have a matrix-like shape. For example, the separation structure comprises an opening. The opening in the separation structure may expose the device region. The metal portion may be formed in an opening of the separation structure.
Each device region may be exposed by one opening, wherein each device region may be fully exposed, or at least 90% of each device region may be exposed.
Forming the separation structure at the backside of the silicon carbide substrate (e.g., directly on the backside surface of the silicon carbide substrate) may include an alignment process that may use alignment marks of the silicon carbide substrate or previously formed use structures in the silicon carbide substrate to align openings in the separation structure with the device region with high precision.
The separation structure may be formed of, for example, imide, resin (e.g., epoxy), or BCB (benzocyclobutene, C) by a printing process or by a photolithography process8H8) Is formed of the organic material of (1). A relatively simple process may remove the separating structure with high selectivity for the metal part or may easily cut through the separating structure, so that the auxiliary structure may only slightly affect the complexity of the cutting process.
According to an embodiment, the method may further comprise singulating (e.g., sawing and/or dicing) the silicon carbide substrate and the auxiliary structure into a plurality of semiconductor dies, wherein each semiconductor die may comprise one of the device regions and one of the metal portions. Additionally, the front-side metallization is divided into a plurality of front-side metal portions and/or may comprise a plurality of separate front-side metal portions, wherein each semiconductor die may comprise one of the front-side metal portions.
The auxiliary structure does not add significant complexity to the process of separating the silicon carbide substrate into separate semiconductor dies. The auxiliary structure may stabilize (e.g., mechanically stabilize) the silicon carbide substrate during a dicing process effective on semiconductor material and may reduce the risk of forming cracks extending from the scribe lines into the device region. The metal portion may also reduce the risk of cutting off portions of the silicon carbide crystal along the score line. The metal portion increases the thickness of the ultra-thin semiconductor device and may therefore simplify the pick and place process of, for example, picking up singulated semiconductor die from a dicing tape and placing the semiconductor die on, for example, a lead frame. The metal portion may protect the semiconductor portion of the semiconductor disc from chipping during the pick and place process.
According to another embodiment, a method of fabricating a semiconductor device may include providing a silicon carbide substrate. Further, a front-side metallization may be provided at the front side of the silicon carbide substrate and/or a back-side metallization may be provided at the back side of the silicon carbide substrate.
In a further method step, a metal disc is provided. For example, the metal disk may be provided after the front side metallization and/or the back side metallization is provided at the silicon carbide substrate. The metal disc and the backside metallization may be structurally connected. The metal disk may mechanically stabilize the silicon carbide substrate. For example, in at least one method step, the metal disk may form the only mechanically stabilizing carrier of the silicon carbide substrate. Both front side metallization and back side metallization may be used for electrical sorting and/or die sorting.
In general, in at least one embodiment of the methods described herein, providing metallization (e.g., front-side metallization and/or back-side metallization) at a silicon carbide substrate may include at least one of sputtering, electroplating, and vapor deposition of a metal or metal alloy. For example, a metallization (e.g., a front-side metallization and/or a back-side metallization) may include multiple metal layers, each formed of a metal or metal alloy, wherein directly adjacent metal layers are composed of different materials or different material compositions.
According to an embodiment, the auxiliary carrier may be formed at the front side of the silicon carbide substrate. The auxiliary carrier may be formed before structurally connecting the auxiliary structure and/or before providing the backside metallization. After the front-side metallization is provided at the front side of the silicon carbide substrate, the auxiliary carrier may be further formed.
The thickness of the silicon carbide substrate may be reduced after the formation of the auxiliary carrier and before the structural connection of the metal disk and the backside metallization. Reducing the thickness of the silicon carbide substrate may include removing portions of the silicon carbide substrate, for example, by at least one of: separation methods and mechanical removal (e.g., grinding and/or polishing). By reducing the thickness, a thin silicon carbide substrate can be obtained.
The silicon carbide substrate, the front-side metallization and the back-side metallization may together form a workpiece, i.e. an intermediate product for further processing.
The metal disks may form auxiliary structures that may mechanically stabilize the thin silicon carbide substrate after the thickness reduction and after removal of the auxiliary carrier that may stabilize the silicon carbide substrate during the thinning process prior to device characterization.
According to an embodiment, the auxiliary carrier may comprise a loop portion. The auxiliary carrier, and in particular the ring portion of the auxiliary carrier, may be bonded to the silicon carbide substrate (e.g., via backside metallization) without an adhesive layer. That is, the joint between the silicon carbide substrate and the auxiliary carrier and/or the ring portion of the auxiliary carrier may be free of an adhesive layer. For example, thermal bonding may be used for bonding without an adhesive layer.
According to an embodiment, the front-side separation trench may be formed before forming the auxiliary carrier. A front-side separation trench may extend into the silicon carbide substrate from the front side. At least the semiconductor portions of the semiconductor dies can be laterally separated from each other with the semiconductor dies remaining in an original position within the silicon carbide substrate so that the dicing process, e.g., mechanical sawing, can be better controlled.
According to an embodiment, reducing the thickness of the silicon carbide substrate may include separating layer portions of the silicon carbide substrate. Throughout this application, separating layer portions of a silicon carbide substrate may also be referred to as a "separation method". The layer sections may be reused for the fabrication of other semiconductor devices. Multiple thin silicon carbide substrates may be obtained from a single standard silicon carbide wafer.
In at least one embodiment, separating the layer portion of the silicon carbide substrate includes the step of implanting ions into the silicon carbide substrate to form a separation region in the silicon carbide substrate. The absorption coefficient in the separation region is at least 5 times, or at least 20 times as high as the absorption coefficient in the silicon carbide substrate outside the separation region, for example for the wavelength of the laser radiation to be applied to the silicon carbide substrate. The method may further include the step of irradiating the silicon carbide substrate with laser radiation.
For example, the separation method may be a laser assisted separation method. That is, the separation method may include applying laser radiation to the silicon carbide substrate, i.e., irradiating the silicon carbide substrate with the laser radiation. The laser radiation may be applied, for example, along the detached area of the silicon carbide substrate to create a thermomechanical stress along the detached area, which may facilitate and/or simplify removal of the layer portion of the silicon carbide substrate.
The ions may be a layer in the silicon carbide substrate, which may have a higher absorption coefficient for laser radiation applied to the silicon carbide substrate. Additionally or alternatively, the separation region may be defined by focusing laser radiation onto a well-defined region in the silicon carbide substrate, which well-defined region may constitute the separation region. In this context, "well-defined" may mean that the region has a thickness along the vertical direction of the silicon carbide substrate that is less than the total thickness of the silicon carbide substrate along the vertical direction. In general, the separation region may have a thickness less than a thickness of the silicon carbide substrate. The lateral extent of the separation region may be at least 90%, or at least 95%, of the lateral extent of the silicon carbide substrate. In other words, the separation region may extend laterally along substantially the entire silicon carbide substrate.
The separation region may comprise a different material and/or may have a different crystal structure, e.g., a different polytype or a different crystallinity, than the remainder of the silicon carbide substrate. The "remaining portion of the silicon carbide substrate" may be a portion of the silicon carbide substrate that is free of the separation region and surrounds the separation region. For example, the separation region may have a different bandgap (e.g., a lower bandgap) than the remainder of the silicon carbide substrate.
Alternatively, the separation region may be made of the same material as the rest of the silicon carbide substrate. In the latter case, the separation region may be defined by simply focusing the laser radiation to a well-defined region within the silicon carbide substrate.
In one example, the separation region may be created by implanting ions into a silicon carbide substrate. The ions may directly cause higher absorption, for example due to higher absorption at the ions, and/or may cause the crystal structure of the silicon carbide substrate to convert to a different polytype (e.g. from 4H-SiC to 3C-SiC) and/or a different crystallinity, such that the absorption coefficient of the laser radiation is increased in the separation region. For example, the absorption coefficient in the separation region may be at least 5 times, e.g., at least 20 times or at least 100 times as high as in the remainder of the silicon carbide substrate.
The laser radiation may be in a non-resonant regime such that the probability of single photon processes in the separation region is substantially zero and may only have to account for multi-photon processes (e.g. multi-photon absorption). For example, a non-resonant regime may be achieved if the band gap of the separation region is at least twice (typically at least ten times) the photon energy of the laser radiation. Applying laser radiation in the non-resonant regime, for example by focusing the laser radiation to well-defined areas, may result in creating perforated planes (which may correspond to the separation areas). In this case, the laser-assisted separation method may also be referred to as laser conditioning. Within the plane of the perforations, the thermo-mechanical stress may be increased compared to the rest of the silicon carbide substrate, thus simplifying separation of the silicon carbide substrate, for example, by applying mechanical and/or thermal stress to the silicon carbide substrate.
Alternatively, the laser radiation may be in a resonant regime, where single photon processes (e.g. single photon absorption) predominate, i.e. the probability of multi-photon processes is small (e.g. at least as small as one tenth of the probability of single photon processes). In the resonance regime, the band gap of the separation region may be, for example, at most ten times (typically at most two times) the photon energy of the laser radiation. The laser radiation may be absorbed in the separation region and may lead to damage of the separation region, so that no or only little mechanical and/or thermal stress is required for separating the silicon carbide substrate. In the resonant regime, the laser-assisted separation method may also be referred to as laser lift-off.
According to an embodiment, a backside isolation trench may be formed extending into the silicon carbide substrate from the backside prior to structurally connecting the auxiliary structure and the backside metallization. The backside isolation trench may further extend through the backside metallization. The separation of the semiconductor part of the semiconductor die and the dicing of the auxiliary structure may be performed independently of each other, so that each dicing process may be adapted to the requirements of the material.
According to an embodiment, the metal disc may comprise a groove extending from a top surface of the metal disc into the metal disc. The grooves may be grid-shaped. The top surface of the metal disc may be connected with the backside metallization.
The cutting process may avoid cutting through the metal disc. Instead, the cutting process may be performed as a planar recessing process such as grinding or mechanical polishing.
According to another embodiment, a semiconductor device may include a silicon carbide body. The semiconductor device also includes a first load electrode at the front side of the silicon carbide body and a second load electrode at the back side of the silicon carbide body. The metal plate may be in contact with the second load electrode. The thickness of the metal plate may be at least 30 μm, such as at least 50 μm or at least 80 μm, and at most 300 μm, such as at most 200 μm or at most 180 μm. The thickness of the metal plate may be at least 20% and at most 200% of the thickness of the (thinned) silicon carbide substrate. The load terminal may be in contact with the metal plate.
The metal plate may correspond to a metal disc or a metal part of an auxiliary structure or an auxiliary structure as described with embodiments of the method described herein.
The metal plate includes a metal or a metal alloy as a main material. For example, the metal plate is composed of a metal or a metal alloy as a main material. Here and in the following, a component "consisting of" a material or a material component "is to be interpreted such that undesired impurities of other materials may be present in the component (which is caused, for example, by manufacturing conditions).
When the semiconductor is inWhen the semiconductor die of the device is part of a wafer assembly and prior to connecting the semiconductor die to the leadframe, the metal plate may stabilize the silicon carbide body at the manufacturing stage. The metal plate further facilitates device characterization and may be used to induce mechanical strain into the silicon carbide body to improve electrical device characteristics. According to other embodiments, the semiconductor device may comprise a body from another wide bandgap material, such as gallium nitride (GaN), aluminum nitride (AlN) or gallium oxide (Ga)2O3)。
According to an embodiment, the silicon carbide body may comprise a first doped region and a second doped region, wherein the first doped region and the second doped region may form a pn junction. The first load electrode may be in contact with the first doped region. The second load electrode may be in contact with the second doped region.
According to an embodiment, the thickness of the metal plate may be greater than the thickness of the silicon carbide body between the first and second load electrodes. A thick metal plate may simplify handling of thin semiconductor devices (e.g., semiconductor devices having silicon carbide bodies thinner than 180 μm) and reduce the risk of chipping and crack formation during back-end processes.
According to an embodiment, the second load electrode may include one of nickel, titanium, tantalum, molybdenum, and aluminum, and the metal plate may include at least one of molybdenum and copper, wherein the metal plate and the second load electrode may be connected by sintering, diffusion welding, and direct bonding in a manner that does not adversely affect the previously formed structure.
According to an embodiment, a semiconductor device may include a non-metallic frame structure laterally surrounding a metal plate. The non-metallic frame structure may facilitate simple, reliable, and cost-effective separation of the semiconductor device from the wafer assembly.
In at least some embodiments of the method and/or semiconductor device, the following features (if applicable) apply, either alone or in combination:
(i) the device regions are laterally separated by free regions (in particular grid-shaped free regions);
(ii) each metal portion is in contact with exactly one of the device regions;
(iii) the auxiliary structure forms a mechanical stabilization carrier for the silicon carbide substrate;
(iv) the metal disk forms a mechanically stabilizing support for the silicon carbide substrate;
(v) the silicon carbide substrate is formed of a single piece;
(vi) the semiconductor device is a power semiconductor device;
(vii) the thickness of the silicon carbide body is at most 180 μm;
(viii) one metal portion of the auxiliary structure forms a metal plate of the semiconductor device;
(ix) a portion of the metal plate forming a metal plate of the semiconductor device;
(x) The thickness of the auxiliary structure and/or the metal part of the auxiliary structure and/or the metal disc and/or the metal plate is at least 30 μm and/or at most 300 μm.
Hereinafter, other embodiments of the method and the semiconductor device described herein are explained in detail with reference to the drawings.
Throughout the description of the figures, the term "workpiece" refers to a mixture of silicon carbide substrates having front side metallization, wherein the workpiece may include other components, such as, for example, backside metallization. It will be understood by those skilled in the art that the front-side metallization may be attached to the silicon carbide substrate before or after any other structures (e.g., the back-side metallization, auxiliary structures, and/or metal disks) are provided at the back side of the silicon carbide substrate.
Fig. 1 shows a method of manufacturing a semiconductor device. A workpiece is provided (902), which may include a silicon carbide substrate and a front side metallization at a front side of the silicon carbide substrate. The workpiece includes a plurality of device regions and free regions laterally separating the device regions. An auxiliary structure is provided at the back side of the workpiece (904). The auxiliary structure comprises a plurality of laterally separated metal portions. Each metal portion is in contact with one of the device regions.
Fig. 2A-2B relate to a method that includes forming an auxiliary structure having laterally separated
FIG. 2A shows a
The
The thickness th1 of the
The
The auxiliary carrier may be formed at the front side of the
The
For example, each
The first
The drift structure and a portion of the
The
The
The thickness th2 of the
The
Fig. 2B shows a wafer assembly comprising a
The
Center-to-center distance p2 between
The grid-shaped
In the wafer assembly of fig. 2B, the
Fig. 3A to 4C relate to an embodiment with a prefabricated
Fig. 3A shows a prefabricated
A process including at least one of direct bonding, diffusion welding, and sintering mechanically connects the top surface of the
The wafer assembly shown in fig. 3B includes the
The dicing process may separate the
Alternatively, the cutting process may include a recessing process that removes the
In fig. 4A-4C, the
Fig. 4A shows an
Metal may be deposited on the front side of the
Fig. 4B shows a wafer assembly comprising the
Fig. 4C shows the wafer assembly after removal of the
Fig. 5A to 5C illustrate the step-wise formation of an
Fig. 5A shows the
As shown in fig. 5B, the
The
Fig. 5C shows the wafer assembly after forming the
Fig. 6A-6J illustrate a method of manufacturing a semiconductor device, wherein the method combines the use of an
The
According to an embodiment, the
The first
Fig. 6A shows a
An
Figure 6B shows a
According to an embodiment related to the pre-grinding cutting method, the front-
The front-
Fig. 6C shows a front-
The
Fig. 6D shows the
For example, the thickness of the
Additionally or alternatively, the heat treatment may cause redistribution of the implanted ions, wherein small holes may be formed in the
According to another embodiment, the
Fig. 6E shows a wafer assembly with a thinned
In the case where the depth dp2 of the front-
Backside processing may include forming heavily doped
The thermal treatment may include a localized irradiation of the
In the wafer assembly shown in fig. 6F, the
According to any of the embodiments described in detail with reference to fig. 2A to 5C, an
For example, a sintering paste comprising silver and/or copper may be applied to at least one of the
The pre-sintering may temporarily stabilize the mechanical connection between the
As shown in fig. 6G, the
The laser may locally heat the
Fig. 6H shows a
Fig. 6I shows the wafer assembly ready for device characterization and dicing after the protective foil is removed. The cutting process may include a sawing process with a sawing blade or laser assisted severing by the separating
Fig. 6J shows a plurality of semiconductor dies 950 obtained from the wafer assembly of fig. 6I. Each semiconductor die 950 may include a
Fig. 7 shows a method of manufacturing a semiconductor device. A workpiece is provided (912). The workpiece may include a silicon carbide substrate, a front side metallization at a front side of the silicon carbide substrate, and a back side metallization at a back side of the silicon carbide substrate. A metal carrier (914) may be provided. The metal carrier and backside metallization may be connected 916.
Fig. 8A-8C illustrate a method of fabricating a semiconductor device in which metal pads (809) may stabilize a silicon carbide substrate during device characterization and dicing.
Fig. 8A shows a
Fig. 8B shows an
The
Fig. 8C shows a wafer assembly comprising the
Fig. 9A-9D illustrate a method of manufacturing a semiconductor device that combines
A wafer assembly may be provided having a
Fig. 9A shows an
Fig. 9B shows a
The
Fig. 9C shows a wafer assembly comprising an
Fig. 9D shows the
The semiconductor die may be severed from the wafer assembly by a process that selectively affects the
In fig. 10, the
Fig. 11 and 12 illustrate exemplary embodiments of semiconductor dies and semiconductor devices that may be fabricated using the methods described in connection with the embodiments of fig. 1, 2A-2B, 3A-3C, 4A-4C, 5A-5C, 6A-6J, 7, 8A-8C, 9A-9D, and 10. In contrast, fig. 1, 2A-2B, 3A-3C, 4A-4C, 5A-5C, 6A-6J, 7, 8A-8C, 9A-9D, and 10 illustrate exemplary embodiments of methods of fabricating semiconductor devices, which may be semiconductor devices as described herein (particularly in connection with the embodiments of fig. 11 and 12).
The semiconductor die 950 of fig. 11 may be a semiconductor die of a power semiconductor device, which may be used as a switch or rectifier in a power electronic device. For example, the power semiconductor device may be a semiconductor diode. According to an embodiment, the semiconductor die 950 may include a plurality of substantially identical transistor cells electrically arranged in parallel. For example, the semiconductor die may be a HEMT (high electron mobility transistor); IGFETs (insulated gate field effect transistors), such as MOSFETs (metal oxide semiconductor FETs); JFET (junction FET); a merged pin schottky diode (MPS diode); an IGBT (insulated gate bipolar transistor) or an MCD (MOS controlled diode) or a combination thereof.
The semiconductor die 950 may include a 4H-SiC (4H polytype of silicon carbide) based
On the first surface 101 at the front side of the
The
A portion of
Fig. 12 illustrates a semiconductor device 500 that may include a
The
Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present disclosure. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Accordingly, it is intended that this disclosure be limited only by the claims and the equivalents thereof.