阅读说明：本技术 符号同步方法与信号接收电路 (Symbol synchronization method and signal receiving circuit ) 是由 徐玉婷 于 2018-07-06 设计创作，主要内容包括：本发明的实施例提供一种符号同步方法,其包括：接收输入信号,其中所述输入信号包括多个符号；依所述符号中的第一类型符号的已知序列对所述输入信号的多个第一采样点执行互相关操作以获得多个互相关结果；累加所述互相关结果以获得所述第一类型符号的结束位置；依所述符号中的第二类型符号的长度延迟所述输入信号的多个第二采样点以执行自相关操作；以及根据所述自相关操作的操作结果修正所述结束位置。此外,本发明的实施例也提出相应的信号接收电路。(An embodiment of the present invention provides a symbol synchronization method, including: receiving an input signal, wherein the input signal comprises a plurality of symbols; performing a cross-correlation operation on a plurality of first sample points of the input signal according to a known sequence of a first type of symbol in the symbols to obtain a plurality of cross-correlation results; accumulating the cross-correlation results to obtain an end position of the first type symbol; delaying a plurality of second sampling points of the input signal according to the length of a second type symbol in the symbols to execute an autocorrelation operation; and correcting the end position according to the operation result of the autocorrelation operation. In addition, the embodiment of the invention also provides a corresponding signal receiving circuit.)

1. A symbol synchronization method, comprising:

receiving an input signal, wherein the input signal comprises a plurality of symbols;

performing a cross-correlation operation on a plurality of first sampling points of the input signal according to a known sequence of a first type symbol in the plurality of symbols to obtain a plurality of cross-correlation results;

accumulating the plurality of cross-correlation results to obtain an end position of the first type symbol;

delaying a plurality of second sampling points of the input signal according to the length of a second type symbol in the plurality of symbols to execute an autocorrelation operation; and

and correcting the end position according to the operation result of the autocorrelation operation.

2. The symbol synchronization method of claim 1, wherein the step of accumulating the plurality of cross-correlation results to obtain the end position comprises:

accumulating the plurality of cross-correlation results to obtain a plurality of accumulated results; and

the end position is obtained according to a maximum value of the plurality of accumulation results.

3. The method of claim 1, wherein the step of delaying the second samples of the input signal according to the length of the second type of symbol to perform the auto-correlation operation comprises:

performing the autocorrelation operation with X as a window length to obtain a plurality of first autocorrelation results corresponding to the plurality of second sampling points, wherein X is a positive integer; and

obtaining a first correction parameter according to a maximum value of the first autocorrelation results,

wherein the step of correcting the ending position according to the operation result of the autocorrelation operation comprises:

and correcting the end position according to the first correction parameter.

4. The symbol synchronization method of claim 3, wherein the step of correcting the end position according to the first correction parameter comprises:

and if the first difference between the first correction parameter and the end position is not equal to X, correcting the end position according to the first difference and X.

5. The method of claim 1, wherein the step of delaying the second samples of the input signal according to the length of the second type of symbol to perform the auto-correlation operation comprises:

performing the autocorrelation operation with Y as a window length to obtain a plurality of second autocorrelation results corresponding to the plurality of second sampling points, wherein Y is a positive integer; and

obtaining a second correction parameter according to the minimum value of the plurality of second autocorrelation results,

wherein the step of correcting the ending position according to the operation result of the autocorrelation operation comprises:

and correcting the end position according to the second correction parameter.

6. The symbol synchronization method of claim 5, wherein the step of correcting the end position according to the second correction parameter comprises:

and if a second difference between the second correction parameter and the end position is not equal to zero, correcting the end position according to the second difference.

7. The method of claim 3, wherein the step of delaying the second samples of the input signal according to the length of the second type of symbol to perform the auto-correlation further comprises:

performing the autocorrelation operation with Y as the window length to obtain a plurality of second autocorrelation results corresponding to the plurality of second sampling points, wherein Y is a positive integer and X is not equal to Y; and

obtaining a second correction parameter according to the minimum value of the plurality of second autocorrelation results,

wherein the step of correcting the ending position according to the first correction parameter comprises:

and correcting the ending position according to the first correction parameter and the second correction parameter.

8. The symbol synchronization method of claim 7, wherein the step of correcting the ending position according to the first correction parameter and the second correction parameter comprises:

obtaining a first difference between the first correction parameter and the end position;

obtaining a first evaluation value according to the first difference, wherein the first evaluation value reflects the precision of the first correction parameter;

obtaining a second difference between the two correction parameters and the end position;

obtaining a second evaluation value according to the second difference, wherein the second evaluation value reflects the precision of the second correction parameter; and

correcting the ending position by using one of the first correction parameter and the second correction parameter according to the first evaluation value and the second evaluation value.

9. The method of claim 1, wherein the input signal conforms to an IEEE802.11 series wireless communication standard, and the plurality of symbols belong to a preamble of the input signal.

10. The symbol synchronization method of claim 1, further comprising:

and obtaining the starting position of the signaling symbol of the input signal according to the ending position.

11. A signal receiving circuit, comprising:

a receiving circuit for receiving an input signal, wherein the input signal comprises a plurality of symbols; and

a symbol synchronization circuit, coupled to the receiving circuit, for performing a cross-correlation operation on a plurality of first samples of the input signal according to a known sequence of a first type of symbol in the plurality of symbols to obtain a plurality of cross-correlation results, and for delaying a plurality of second samples of the input signal according to a length of a second type of symbol in the plurality of symbols to perform an auto-correlation operation,

the symbol synchronization circuit is further configured to accumulate the plurality of cross-correlation results to obtain an end position of the first type symbol, and correct the end position according to an operation result of the auto-correlation operation.

12. The signal receiving circuit of claim 11 wherein the operation of the symbol synchronization circuit accumulating the plurality of cross-correlation results to obtain the end position comprises:

accumulating the plurality of cross-correlation results to obtain a plurality of accumulated results; and

the end position is obtained according to a maximum value of the plurality of accumulation results.

13. The signal receiving circuit of claim 11, wherein the symbol synchronization circuit delays the second samples of the input signal by the length of the second type of symbol to perform the auto-correlation operation comprises:

performing the autocorrelation operation with X as a window length to obtain a plurality of first autocorrelation results corresponding to the plurality of second sampling points, wherein X is a positive integer; and

obtaining a first correction parameter according to a maximum value of the first autocorrelation results,

wherein the operation of the symbol synchronization circuit to modify the ending position according to the operation result of the autocorrelation operation comprises:

and correcting the end position according to the first correction parameter.

14. The signal receiving circuit of claim 13, wherein the operation of the symbol synchronization circuit to modify the end position according to the first modification parameter comprises:

and if the first difference between the first correction parameter and the end position is not equal to X, correcting the end position according to the first difference and X.

15. The signal receiving circuit of claim 11, wherein the symbol synchronization circuit delays the second samples of the input signal by the length of the second type of symbol to perform the auto-correlation operation comprises:

performing the autocorrelation operation with Y as a window length to obtain a plurality of second autocorrelation results corresponding to the plurality of second sampling points, wherein Y is a positive integer; and

obtaining a second correction parameter according to the minimum value of the plurality of second autocorrelation results,

wherein the operation of the symbol synchronization circuit to modify the ending position according to the operation result of the autocorrelation operation comprises:

and correcting the end position according to the second correction parameter.

16. The signal receiving circuit of claim 15, wherein the operation of the symbol synchronization circuit to modify the end position according to the second modification parameter comprises:

and if a second difference between the second correction parameter and the end position is not equal to zero, correcting the end position according to the second difference.

17. The signal receiving circuit of claim 13, wherein the symbol synchronization circuit delays the second samples of the input signal by the length of the second type of symbol to perform the auto-correlation operation further comprises:

performing the autocorrelation operation with Y as the window length to obtain a plurality of second autocorrelation results corresponding to the plurality of second sampling points, wherein Y is a positive integer and X is not equal to Y; and

obtaining a second correction parameter according to the minimum value of the plurality of second autocorrelation results,

wherein the operation of the symbol synchronization circuit to modify the ending location according to the first modification parameter comprises:

and correcting the ending position according to the first correction parameter and the second correction parameter.

18. The signal receiving circuit of claim 17, wherein the symbol synchronization circuit correcting the end position based on the first correction parameter and the second correction parameter comprises:

obtaining a first difference between the first correction parameter and the end position;

obtaining a first evaluation value according to the first difference, wherein the first evaluation value reflects the precision of the first correction parameter;

obtaining a second difference between the two correction parameters and the end position;

obtaining a second evaluation value according to the second difference, wherein the second evaluation value reflects the precision of the second correction parameter; and

correcting the ending position by using one of the first correction parameter and the second correction parameter according to the first evaluation value and the second evaluation value.

19. The signal receiving circuit of claim 11, wherein the input signal conforms to IEEE802.11 series wireless communication standards, and the symbols belong to a preamble of the input signal.

20. The signal receiving circuit of claim 11, wherein the symbol synchronization circuit is further configured to obtain a start position of a signaling symbol of the input signal according to the end position.

Technical Field

The present invention relates to wireless local area network (wlan) communication technology, and more particularly, to a symbol synchronization method and a signal receiving circuit.

Background

In wireless communication technology of Wireless Local Area Networks (WLANs), a signal receiving end needs to detect a boundary position of each wireless signal from a received wireless signal so as to correctly extract data in the signal for processing. Generally, a signal receiving end may perform a cross-correlation (cross-correlation) operation or an auto-correlation (auto-correlation) operation on a signal to attempt to locate a preamble end position of the signal. However, whether a cross-correlation operation or an auto-correlation operation is used, there is a high probability that an error occurs in subsequent positioning, resulting in a decoding error.

Disclosure of Invention

The invention provides a symbol synchronization method and a signal receiving circuit, which can improve the efficiency and the accuracy of executing symbol synchronization by a signal receiving end.

An embodiment of the present invention provides a symbol synchronization method, including: receiving an input signal, wherein the input signal comprises a plurality of symbols; performing a cross-correlation operation on a plurality of first sample points of the input signal according to a known sequence of a first type of the symbols to obtain a plurality of cross-correlation results; accumulating the cross-correlation results to obtain an end position of the first type symbol; delaying a plurality of second sampling points of the input signal according to the length of a second type symbol in the symbols to execute autocorrelation operation; and correcting the end position according to the operation result of the autocorrelation operation.

The embodiment of the invention further provides a signal receiving circuit, which comprises a receiving circuit and a symbol synchronization circuit. The receiving circuit is configured to receive an input signal, wherein the input signal includes a plurality of symbols. The symbol synchronization circuit is connected to the receiving circuit and configured to perform a cross-correlation operation on a plurality of first sample points of the input signal according to a known sequence of a first type of the symbols to obtain a plurality of cross-correlation results, and to delay a plurality of second sample points of the input signal according to a length of a second type of the symbols to perform an auto-correlation operation. The symbol synchronization circuit is further configured to accumulate the cross-correlation result to obtain an end position of the first type symbol, and correct the end position according to an operation result of the auto-correlation operation.

Based on the above, after receiving the input signal, a cross-correlation operation may be performed on sample points of a plurality of symbols in the input signal according to a known sequence of symbols of the first type to obtain a plurality of cross-correlation results. By accumulating the cross-correlation results, the end position of the first type symbol can be preliminarily obtained. In addition, after receiving the input signal, the sampling point may be delayed according to the length of the second type symbol to perform an autocorrelation operation. The end position of the first type symbol may be corrected according to the operation result of the autocorrelation operation. Therefore, the accuracy of the signal receiving circuit for executing symbol synchronization on the input signal can be effectively improved.

In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.

Drawings

Fig. 1 is a schematic diagram of a signal receiving circuit according to an embodiment of the invention.

Fig. 2 is a schematic diagram illustrating a packet structure of an input signal according to an embodiment of the invention.

Fig. 3 is a flowchart illustrating a symbol synchronization method according to an embodiment of the invention.

Fig. 4A is a diagram illustrating a cross-correlation result according to an embodiment of the invention.

Fig. 4B is a diagram illustrating the cross-correlation accumulation result according to an embodiment of the invention.

Fig. 5A is a schematic diagram illustrating a correction ending position according to an embodiment of the invention.

Fig. 5B is a diagram illustrating a first autocorrelation result according to an embodiment of the invention.

Fig. 6A is a schematic diagram illustrating a correction ending position according to an embodiment of the invention.

Fig. 6B is a diagram illustrating a second autocorrelation result according to an embodiment of the invention.

Fig. 7 is a schematic diagram of a signal receiving circuit according to an embodiment of the invention.

Description of the reference numerals

10. 70: signal receiving circuit

11. 71: receiving circuit

12. 72: symbol synchronization circuit

13: processing circuit

210: leader section

211: short training symbol part

212: long training symbol part

220: signalling symbol part

230: data symbol portion

S301 to S305: step (ii) of

41. 42, 51, 61: curve line

711: antenna with a shield

712: analog-to-digital converter

713: automatic gain controller

731: cyclic prefix remover

732: serial/parallel converter

733: fast Fourier converter

734: demodulator

735: channel estimation circuit

Detailed Description

Fig. 1 is a schematic diagram of a signal receiving circuit according to an embodiment of the invention. Referring to fig. 1, the signal receiving circuit 10 may be a receiving circuit for a wireless local area network. The signal receiving circuit 10 includes a receiving circuit 11, a symbol synchronization circuit 12, and a processing circuit 13. The receiving circuit 11 is used for receiving a signal SI (also referred to as an input signal). The signal SI conforms to the IEEE802.11 series of wireless communication standards. For example, the signal SI may conform to a wireless communication standard associated with a wireless area network, such as IEEE802.11 a/n/ac. The receiving circuit 11 may perform signal receiving operations such as analog-to-digital conversion, signal amplification, gain control, filtering, and/or channel compensation on the signal SI.

The symbol synchronization circuit 12 is connected to the receiving circuit 11 to perform symbol synchronization on the signal SI output by the receiving circuit 11, so as to obtain a correct position interval of a signaling symbol and a data symbol in the signal SI, which is beneficial to performing subsequent processing such as conversion and demodulation on the signal SI.

The processing circuit 13 is connected to the symbol synchronization circuit 12 to perform other signal analysis operations on the signal SI whose symbol boundary is confirmed by the symbol synchronization circuit 12, such as Cyclic Prefix (CP) removal, serial/parallel (S/P) conversion, Fast Fourier Transform (FFT) conversion, channel estimation and demodulation (demodulation), and so on.

Fig. 2 is a schematic diagram illustrating a packet structure of an input signal according to an embodiment of the invention. Referring to fig. 2, the packet structure of the signal SI includes a preamble portion 210, a signaling symbol portion 220, and a plurality of data symbol portions 230 (only one is shown in fig. 2). Preamble section 210 is defined by the IEEE802.11a/n/ac standard. The preamble section 210 further includes a short training (short training) symbol section 211 and a long training (long training) symbol section 212. Short training symbol portion 211 includes a plurality of short training symbols S0-S9, and long training symbol portion 212 includes a guard interval (guard) GI, a long training symbol LTF1, and a long training symbol LTF 2. The signaling symbol part 220 comprises a guard interval GI and a signaling symbol SIG. Each DATA symbol portion 230 includes a guard interval GI and a DATA symbol DATA.

For the sake of convenience of the following description, the end position of the short training symbol portion 211 (i.e., the end position of the last short training symbol S9) is P (0), and the end position of the long training symbol portion 212 is P (1). From another perspective, P (0) is the starting position of the long training symbol portion 212, and P (1) is also the starting position of the signaling symbol portion 220.

Fig. 3 is a flowchart illustrating a symbol synchronization method according to an embodiment of the invention. Referring to fig. 1 and fig. 3, in step S301, the receiving circuit 11 receives the signal SI. The signal SI comprises a plurality of symbols. In step S302, the symbol synchronization circuit 12 may sequentially perform a cross-correlation operation on a plurality of samples (also referred to as first samples) of the signal SI according to a known sequence of the first type of the symbols to obtain a plurality of operation results (also referred to as cross-correlation results). The first type of symbols may be short training symbols and the known sequence is a set of fixed sequences specified by ieee802.11a/n/ac corresponding to the short training symbols for performing a cross-correlation operation on the short training symbols and is known to signal receiving circuitry 10 and may also be referred to as a local sequence.

Specifically, in step S302, when the symbol synchronization circuit 12 starts receiving the signal SI, the receiving circuit 11 or the symbol synchronization circuit 12 may start a counter to sequentially count the sampling points received at each time. Each time a data (sample) in the signal SI is received, the symbol synchronization circuit 12 may perform a cross-correlation operation with the known sequence of the short training symbols and a number of samples selected according to a window length. Taking the case of 20MHz as an example, according to the IEEE802.11 standard, the length of each short training symbol is 16 samples, so the window length can be set to 16. Therefore, when the 16 th sampling data after the counting is started is received, the symbol synchronization circuit 12 may perform a cross-correlation operation on the sampling data at the time points 1 to 16 (i.e., the 1 st to 16 th sampling points) and the known sequence of the short training symbol to obtain a cross-correlation result at the time point 16. When the 17 th sample data is received, symbol synchronization circuit 12 may perform a cross-correlation operation on the sample data at times 2-17 and the known sequence to obtain a cross-correlation result corresponding to time 17. By analogy, assuming that the cross-correlation operation is repeatedly performed 160 times (i.e., 160 samples are total for 10 short training symbols) according to the number and length of the short training symbols, 160 cross-correlation results can be obtained. If the number of received samples is less than 16, the calculation may be performed by replacing the insufficient number with 0 or performing only partial cross-correlation, which is not limited by the present invention.

In one embodiment, symbol synchronization circuit 12 may obtain the cross-correlation result according to equation (1) below. In equation (1), c (n) represents the cross-correlation result at time n, t () represents the conjugate form of the known sequence, r () represents the input signal, and D represents the number of samples for performing a cross-correlation operation, i.e., the window length, which is 16 in this example.

Fig. 4A is a diagram illustrating a cross-correlation result according to an embodiment of the invention. Referring to fig. 4A, the horizontal axis represents time, and the vertical axis represents the cross-correlation result. The curve 41 may be used to represent the cross-correlation results obtained in step S302 of fig. 3 for the 160 time instants. The cross-correlation results include peaks whose corresponding positions are considered as the boundaries of the short training symbols S0-S9 in the signal SI. However, when the signal-to-noise ratio of the signal SI is reduced, the generated peak may not be obvious enough to accurately determine the end position of the short training symbol.

Therefore, in the present embodiment, the symbol synchronization circuit 12 may accumulate the obtained plurality of cross-correlation results to highlight the peak value. In step S303, the symbol synchronization circuit 12 may accumulate the obtained plurality of cross-correlation results to further obtain a plurality of accumulation results (also referred to as cross-correlation accumulation results). In particular, symbol synchronization circuit 12 may group and accumulate the plurality of cross-correlation results by the length of the short training symbols. Taking fig. 4A as an example, the symbol synchronization circuit 12 may accumulate the cross correlation results of the 1 st, 17 th, 33 … 145 th sampling points spaced by 16 time instants to obtain a first accumulation result, and accumulate the cross correlation results of the 2 nd, 18 th, 34 … 146 th sampling points spaced by 16 time instants to obtain a second accumulation result according to the length of the short training symbol. By analogy, the symbol synchronization circuit 12 of this example can obtain 16 accumulation results. Then, the symbol synchronization circuit 12 may obtain the end position from the maximum value among the obtained plurality of accumulation results.

Fig. 4B is a diagram illustrating the cross-correlation accumulation result according to an embodiment of the invention. Referring to fig. 4B, the horizontal axis represents the group of accumulation results, and the vertical axis represents the accumulation result of the cross-correlation result. The curve 42 may be used to represent the 16 cross-correlation accumulation results obtained in step S303 of fig. 3.

According to fig. 4B, it is assumed that the accumulated result of the 14 th group has the maximum value, which represents that the positions of the time 14, 30, and 46 … 158 corresponding to the 14 th group are the boundaries of the short training symbols, respectively. The symbol synchronization circuit 12 may determine the last time 158 (i.e. 160- (16-14)) belonging to the 14 th group after the start of counting as the boundary of the last short training symbol S9 in the signal SI, i.e. the end position of the short training symbol.

It should be noted that although 10 short training symbols are taken as an example in the above embodiment to describe the method of performing 160 cross-correlation operations and accumulation to obtain the end position of the short training symbol portion 211, some of the short training symbols may be used for automatic gain control in the receiving circuit 11, so that actually only the number of sampling points less than 10 short training symbols may be used for performing symbol synchronization. The present invention is not limited to cross-correlation operations with 10 short training symbols. Those skilled in the art can perform the sample point cross-correlation operation of 6 short training symbols to obtain 96 cross-correlation results, and perform the block accumulation according to the actual requirement. Thereby, 16 accumulation results and the maximum value thereof can be obtained, and the corresponding ending position can be calculated.

It should be noted that, as shown in fig. 2, the short training symbol portion 211 includes a plurality of short training symbols S0-S9, so that the end position primarily determined by the cross-correlation operation in step S303 of fig. 3 may have an error. The embodiment of the present invention may further utilize the feature that the signal SI also includes the second type symbol, and utilize the autocorrelation operation of the second type symbol to correct the ending position obtained in step S303, so as to improve the accuracy of the determined ending position. In this example, the second type of symbol may be a long training symbol.

Returning to fig. 3, in step S304, the symbol synchronization circuit 12 delays a plurality of sampling points (also referred to as second sampling points) of the signal SI according to the length of the long training symbol to perform an auto-correlation operation. Also taking the bandwidth of 20MHz as an example, assuming that the length of the long training symbol LTF1 (or LTF2) in fig. 2 is 64 samples, the symbol synchronization circuit 12 may delay the sampling point of the signal SI by 64 time instants and perform an autocorrelation operation according to the delayed sampling point. It is noted that the aforementioned first sampling point and the second sampling point are only used for distinguishing sampling points related to different operations. That is, the samples involved in the cross-correlation operation (i.e., steps S302 and S303 of fig. 2) are collectively referred to as the first samples, and the samples involved in the auto-correlation operation (i.e., step S304 of fig. 2) are collectively referred to as the second samples, so as to avoid confusion.

In step S305, the symbol synchronization circuit 12 corrects the end position obtained in step S303 according to the operation result of the autocorrelation operation (also referred to as autocorrelation result). The end position corrected in step S305 has higher accuracy than the end position preliminarily obtained in step S303.

Although step S304 is shown in fig. 3 after step S302, the invention is not limited thereto; steps S304 and S302 may be performed simultaneously. In other words, when the symbol synchronization circuit 12 starts receiving the signal SI, the cross-correlation operation based on the short training symbol and the auto-correlation operation based on the long training symbol are performed on the sampling points at the same time, and a plurality of cross-correlation results and a plurality of auto-correlation results are generated. In other words, a part of the samples in the signal SI relates to both the cross-correlation operation and the auto-correlation operation, and the part of the samples is the first samples when used in the cross-correlation operation and the second samples when used in the auto-correlation operation.

In one embodiment, the symbol synchronization circuit 12 may obtain an operation result of the autocorrelation operation (i.e., an autocorrelation result) according to the following equation (2). In equation (2), a (n) represents the autocorrelation result at time n, and D represents the delay time. For example, D may be equal to the length of a long training symbol (e.g., 64), and D1 represents the number of samples, or window length, to perform an autocorrelation operation.

In one embodiment, every time a sampling point is received by the symbol synchronization circuit 12, i.e. D1 is the window length, D1 sampling points are selected to perform the autocorrelation operation, so as to generate the autocorrelation result corresponding to the received sampling point. In this example, D1 can be X, and X is a positive integer. The autocorrelation result of the symbol synchronization circuit 12 performing the autocorrelation operation on the basis of the X sampling points is hereinafter referred to as a first autocorrelation result. Specifically, X may be the total length of the guard interval symbol GI and one long training symbol LTF1 (or LTF2) in fig. 2, or 3/2 times, e.g., 96 points, the length of one long training symbol LTF1 (or LTF 2). Therefore, the symbol synchronization circuit 12 can delay the 1 st to 96 th sampling points by 64 times and perform the autocorrelation operation with the 65 th to 160 th sampling points to obtain the first autocorrelation result at the time 96. Similarly, the 2 nd to 97 th sampling points and the 66 th to 161 th sampling points are subjected to autocorrelation operation to obtain a first autocorrelation result at the time 97. By analogy, the symbol synchronization circuit 12 may obtain a plurality of first autocorrelation results, and determine a maximum value therefrom. The symbol synchronization circuit 12 obtains a correction parameter (also referred to as a first correction parameter) according to the maximum value of the first autocorrelation result. Then, the symbol synchronization circuit 12 may correct the end position preliminarily obtained in step S303 according to the first correction parameter.

In another embodiment, D1 is Y, and Y is a positive integer. Specifically, Y may be equal to the length of the long training symbol LTF1 (or LTF2) in fig. 2, e.g., 64 points. The autocorrelation result of the symbol synchronization circuit 12 performing the autocorrelation operation according to the Y points is hereinafter referred to as a second autocorrelation result. The symbol synchronization circuit 12 may obtain a minimum value according to the second autocorrelation results, and obtain a correction parameter (also referred to as a second correction parameter) according to the minimum value. Then, the symbol synchronization circuit 12 may correct the end position preliminarily obtained in step S303 according to the second correction parameter. In other words, in steps S304 and S305, the symbol synchronization circuit 12 may generate different correction parameters to correct the end position according to different numbers (X or Y) of sampling points selected by the autocorrelation operation.

The reason why the end position preliminarily obtained in step S303 is corrected by using the correction parameters obtained in steps S304 and S305 is that although the possible end position of each short training symbol (for example, each sampling point of the 14 th group after a plurality of sampling points are grouped according to the length of the short training symbol) can be preliminarily determined in step S303, the symbol synchronization circuit 12 cannot necessarily receive the sampling point from the first short training symbol in the signal SI, and thus cannot judge that the end position of the counted sampling point is the end position of the real short training symbol portion. Therefore, in the present embodiment, the symbol synchronization circuit 12 further uses the position relationship between the long training symbol and the short training symbol to correct and determine the end position of the last short training symbol (i.e. the short training symbol S9 in fig. 2).

Fig. 5A is a schematic diagram illustrating a correction ending position according to an embodiment of the invention. Fig. 5B is a diagram illustrating a first autocorrelation result according to an embodiment of the invention. In fig. 5B, the numerical value of the horizontal axis represents the time, and the numerical value of the vertical axis represents the first autocorrelation result.

Referring to fig. 1, fig. 5A and fig. 5B, in the present embodiment, D1 is X (e.g., 96), and the obtained first autocorrelation results are, for example, as shown by the curve 51 in fig. 5B. According to the curve 51, the first autocorrelation result corresponding to the instant 225 has a maximum value (i.e., the peak position of the curve 51). According to the characteristics of long training symbol portion 212 of the IEEE802.11a/n/ac specification, the position of the maximum of the first autocorrelation result would correspond to the end position of long training symbol LTF 1.

The symbol synchronization circuit 12 may obtain a difference (also referred to as a first difference) d1 between the positions P1 and P0. Assuming that position P0 is 158 (i.e., the end position of the preliminary determined short training symbol portion 211 in the embodiment of fig. 4B) and position P1 is 225 (i.e., the end position of the long training symbol LTF1 determined in fig. 5B), the symbol synchronization circuit 12 obtains a difference d1 of 67. It should be noted that if the difference d1 is not an integer multiple of the length of the short training symbol (16 in this example), and there is an error in determining the maximum value of the first autocorrelation result of the long training symbol, the symbol synchronization circuit 12 may adjust the difference d1 to be the closest integer multiple of 16. For example, the integer multiple of 64 nearest 67 and 16, the symbol synchronization circuit 12 may adjust the difference d1 from 67 to 4 nearest 16, i.e., 64. Then, the symbol synchronization circuit 12 may regard the difference d1 as the first correction parameter and correct the position P0 according to the difference d 1. For example, the symbol synchronization circuit 12 may determine whether the difference D1 is equal to D1 (i.e., X). If the difference D1 is not equal to D1, the symbol synchronization circuit 12 may subtract D1 from the sum of position P0 and the difference D1 to obtain a corrected end position P (0). In the present embodiment, the corrected end position P (0) is located at the time 126 (i.e., P (0) — 158+64-96 ═ 126).

Viewed from another perspective, position P0 is determined according to the maximum of curve 42 of FIG. 4B, and position P1 is determined according to the maximum of curve 51 of FIG. 5B. Thus, in an ideal situation, position P0 should be at the end of short training symbols S0S 9 (i.e., position P (0)), and position P1 should be at the end of long training symbol LTF 1. In other words, under ideal conditions, the difference D1 would be equal to D1 (i.e., X). However, in the embodiment of fig. 5A, since the symbol synchronization circuit 12 does not necessarily receive the sample point from the first short training symbol in the signal SI, resulting in the difference D1 not being equal to D1, the symbol synchronization circuit 12 can correct the position P0 to the position P (0) according to the positions P0, D1 and the difference D1, so as to obtain the end positions of the short training symbols S0 to S9 with higher accuracy.

Fig. 6A is a schematic diagram illustrating a correction ending position according to an embodiment of the invention. Fig. 6B is a diagram illustrating a second autocorrelation result according to an embodiment of the invention. In fig. 6B, the numerical value of the horizontal axis represents the time, and the numerical value of the vertical axis represents the second autocorrelation result.

Referring to fig. 1, fig. 6A and fig. 6B, in the present embodiment, D1 is Y (e.g., 64), and a plurality of second autocorrelation results are obtained, for example, as shown by the curve 61 of fig. 6B. According to curve 61, the second autocorrelation result corresponding to time 128 has a minimum value (i.e., the valley position of curve 61). According to the characteristics of the long training symbol portion 212 of the IEEE802.11a/n/ac specification, the position of the minimum value of the second autocorrelation result corresponds to the start position of the guard interval GI of the long training symbol portion 212, i.e. the end position of the short training symbol portion 211.

The symbol synchronization circuit 12 may obtain a difference (also referred to as a second difference) d2 between the positions P2 and P0. Assuming that the position P0 is 158 (i.e. the end position of the preliminary determined short training symbol portion 211 in the embodiment of fig. 4B) and the position P2 is 128 (i.e. the start position of the guard interval GI determined in fig. 6B), the symbol synchronization circuit 12 obtains a difference d2 of-30. It should be noted that, as in the embodiment shown in fig. 5A and 5B, if the difference d2 is not a multiple of 16, and there may be an error in determining the minimum value of the second autocorrelation result of the long training symbol, the symbol synchronization circuit 12 may adjust the difference d2 to be the closest integer multiple of 16. For example, the integer multiple closest to-30 and 16 has a value of-32, so that symbol synchronization circuit 12 may adjust difference d2 from-30 to-32. Then, the symbol synchronization circuit 12 may regard the difference d2 as a second correction parameter and correct the position P0 according to the difference d 2. For example, symbol synchronization circuit 12 may determine whether difference d2 is equal to zero. If the difference d2 is not equal to zero, the symbol synchronization circuit 12 may subtract the difference d2 from the position P0 to obtain a corrected end position P (0). In the present embodiment, the corrected end position P (0) is located at the time 126 (i.e., P (0) — (158 + (-32) — 126).

Viewed from another perspective, position P0 is determined according to the maximum of curve 42 of FIG. 4B, and position P2 is determined according to the minimum of curve 61 of FIG. 6B. Therefore, ideally, the positions P0 and P2 should be located at the end positions of the short training symbols S0S 9 (i.e., the position P (0)). In other words, in an ideal situation, the difference d2 would be equal to zero. However, in the embodiment of fig. 6A, since the symbol synchronization circuit 12 does not necessarily receive the sample point from the first short training symbol in the signal SI, resulting in the difference d2 not being equal to zero, the position P0 can be corrected to the position P (0) according to the position P0 and the difference d2, so as to obtain the more accurate end positions of the short training symbols S0 to S9.

In another embodiment, the symbol synchronization circuit 12 simultaneously performs the autocorrelation operations with D1 being X and D1 being Y in step S304 of fig. 3 to obtain the maximum value of the first autocorrelation result and the minimum value of the second autocorrelation result, respectively. Therefore, in step S305 of fig. 3, both the first correction parameter and the second correction parameter can be obtained and used in combination (or alternatively) to more accurately correct the end position initially obtained in step S303.

In one embodiment, after obtaining the first difference and the second difference, the symbol synchronization circuit 12 may obtain an evaluation value (also referred to as a first evaluation value) according to the first difference and obtain another evaluation value (also referred to as a second evaluation value) according to the second difference. The first evaluation value may reflect the accuracy of the first correction parameter, and the second evaluation value may reflect the accuracy of the second correction parameter. The correction of the end position may have a higher accuracy if the end position is corrected using a correction parameter with a higher accuracy. The symbol synchronization circuit 12 may correct the end position using one of the first correction parameter and the second correction parameter based on the first evaluation value and the second evaluation value. For example, the symbol synchronization circuit 12 may select a correction parameter with higher accuracy of the first and second correction parameters based on the first and second evaluation values to correct the end position preliminarily obtained in step S303 of fig. 3.

In one embodiment, when the first difference and the second difference need to be corrected, the symbol synchronization circuit 12 may obtain the first evaluation value according to a difference (also referred to as a third difference) between the first difference before correction and the first difference after correction. For example, the first evaluation value may be equal to or related to (e.g., positively correlated with) the third difference. The symbol synchronization circuit 12 may obtain the second evaluation value based on a difference (also referred to as a fourth difference) between the second difference before the correction and the second difference after the correction. For example, the second evaluation value may be equal to or related to (e.g., positively correlated with) the fourth difference. Further, the symbol synchronization circuit 12 may evaluate the accuracy of the first correction parameter based on the first evaluation value and evaluate the accuracy of the second correction parameter based on the second evaluation value.

In one embodiment, the first evaluation value is negatively related to the accuracy of the first correction parameter, and the second evaluation value is negatively related to the accuracy of the second correction parameter. Therefore, if the first evaluation value is larger than the second evaluation value, the symbol synchronization circuit 12 may determine that the accuracy of the second correction parameter is higher than that of the first correction parameter and correct the end position preliminarily obtained in step S303 of fig. 3 using the second correction parameter with higher accuracy. Alternatively, if the first evaluation value is smaller than the second evaluation value, the symbol synchronization circuit 12 may determine that the accuracy of the first correction parameter is higher than that of the second correction parameter and correct the end position preliminarily obtained at step S303 of fig. 3 using the first correction parameter with higher accuracy.

Taking fig. 5A and 6A as an example, in an embodiment, the symbol synchronization circuit 12 may obtain the first evaluation value according to a difference (i.e., a third difference, e.g., 3) between the difference d1 (i.e., 67) before the correction and the difference d1 (i.e., 64) after the correction and obtain the second evaluation value according to a difference (i.e., a fourth difference, e.g., 2) between the difference d2 (i.e., -30) before the correction and the difference d2 (i.e., -32) after the correction. In this example, the first evaluation value is larger than the second evaluation value, so the symbol synchronization circuit 12 may determine that the accuracy of the second correction parameter is higher than that of the first correction parameter and correct the position P0 using the second correction parameter with higher accuracy, as shown in the embodiment of fig. 6A. However, in another example, if the first evaluation value is smaller than the second evaluation value, the symbol synchronization circuit 12 may determine that the accuracy of the first correction parameter is higher than that of the high correction parameter and correct the position P0 using the first correction parameter with higher accuracy, as shown in the embodiment of fig. 5A.

In an embodiment, the symbol synchronization circuit 12 may perform a logical operation such as modulo (mod) on the first difference value before modification and the second difference value before modification to obtain the first evaluation value and the second evaluation value, respectively, as long as the obtained first evaluation value and the obtained second evaluation value can be used to evaluate the first correction parameter and the second correction parameter with high or low accuracy. For example, the first difference is 67 and the second difference is-30, the symbol synchronization circuit 12 may obtain the first evaluation value 3 (i.e., 67mod16 ═ 3) and the second evaluation value 2 (i.e., -30mod16 ═ 2) by taking the first difference and the second difference modulo the length 16 of the short training symbol, respectively. In this example, since 3 is greater than 2, the accuracy of the second correction parameter may be high. Therefore, the symbol synchronization circuit 12 may determine to correct the end position according to the second correction parameter.

In addition, in another embodiment, it is within the scope of the embodiment of the present invention to consider the numerical relationship between the first difference and the second difference (or the third difference and the fourth difference) and modify the ending position accordingly.

In one embodiment, after obtaining the ending position P (0) of the short training symbols S0-S9 in fig. 2, the starting position P (1) of the signaling symbol portion 220 (or the starting position of the signaling symbol SIG) can be determined according to the ending position P (0). For example, the start position P (1) may be obtained by adding the end position P (0) to the length of the long training symbol portion 212. Thus, the processing circuit 13 can perform fast fourier transform on the correct symbol interval according to the starting position P (1) of the obtained signaling symbol part 220, which is beneficial to reduce inter-symbol interference (ISI).

It should be noted that although the foregoing embodiments have been described with a bandwidth of 20MHz as an example, in the case of a bandwidth of 40MHz or 80MHz, the length of each short training symbol is known to be 32 and 64 samples, respectively, and the length of each long training symbol is known to be 128 and 256 samples, respectively. In addition, the length of the guard interval of the long training symbol is 1/2 times the length of the long training symbol, and the data of the guard interval is the same as the data of the second half of each long training symbol. Those skilled in the art should understand how to adjust the operation rules of the auto-correlation operation and the cross-correlation operation according to the above embodiments and perform the subsequent operations according to the operation results, which is not described herein again.

Fig. 7 is a schematic diagram of a signal receiving circuit according to an embodiment of the invention. Referring to fig. 7, the signal receiving circuit 70 includes a receiving circuit 71, a symbol synchronization circuit 72, and a processing circuit 73. The receiving circuit 71 may include an antenna 711, an analog-to-digital converter 712, and an automatic gain controller 713. The antenna 711 is used for receiving the signal SI. The adc 712 performs an analog-to-digital conversion on the signal SI. The automatic gain controller 713 performs automatic gain control such as amplification, filtering and/or channel compensation on the signal SI.

The symbol synchronization circuit 72 is connected to the reception circuit 71. The symbol synchronization circuit 72 is used to determine the symbol start position of the signal SI for FFT conversion to complete timing synchronization of the signal SI. The symbol synchronization circuit 72 may include a sampling circuit, a phase-locked loop (phase-locked loops) circuit, a delay-locked loop (delay-locked loops) circuit, a timing recovery (timing recovery) circuit, a buffer (buffer), a processor, and at least one of various controllers to achieve the above functions, which is not limited in the invention.

The processing circuit 73 is connected to the symbol synchronization circuit 72. Processing circuitry 73 may include a cyclic prefix remover 731, a serial/parallel converter 732, a fast fourier converter 733, a demodulator 734, and channel estimation circuitry 735. Cyclic prefix remover 731 is used to perform cyclic prefix removal on the output of symbol synchronization circuit 72. The serial/parallel converter 732 performs serial/parallel conversion on the output of the cyclic prefix remover 731. The fast fourier transformer 733 performs fast fourier transform on the output of the serial/parallel transformer 732. The demodulator 734 is configured to demodulate the output of the fast fourier transformer 733 and output a signal SO (also referred to as an output signal). The channel estimation circuit 735 is used to perform channel estimation on the output of the fast fourier transformer 733 and control the modem 734 accordingly.

In summary, the present invention can overcome the positioning error that may occur when only the cross-correlation result or the auto-correlation result of the signal is used to more accurately position the symbol end position (or the preamble end position) of the input signal, and has a better positioning effect even when the signal-to-noise ratio is low, thereby reducing the time required for repeated correction. In addition, the invention can effectively improve the efficiency of the signal receiving circuit for executing symbol synchronization to the input signal.

Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.