A kind of normally-off InAlN/GaN HMET device and preparation method thereof with p-GaN grid structure
阅读说明：本技术 一种具有p-GaN栅结构的常关型InAlN/GaN HMET器件及其制备方法 (A kind of normally-off InAlN/GaN HMET device and preparation method thereof with p-GaN grid structure ) 是由 黄义 李金鹏 陈伟中 李顺 张金沙 黄垚 于 2019-08-30 设计创作，主要内容包括：本发明涉及一种具有p-GaN栅结构的常关型InAlN/GaN HMET器件及其制备方法,属于半导体功率器件领域。本发明的器件包括衬底、GaN缓冲层、InAlN势垒层、p-GaN帽层、栅极、源极、漏极和钝化层,其中GaN缓冲层与InAlN势垒层形成异质结,可以抑制电流坍塌效应和调制沟道电场分布以提高器件的击穿电压；本发明通过使用In组份0.17的InAlN材料作为势垒层,实现了异质结的晶格匹配,增大了电子阻挡层势垒高度,因此可以减小器件的导通电阻和栅极漏电流；另外使用高介电常数材料作为钝化层,能够降低器件靠近漏极的栅极边缘处的电场峰值,提高了InAlN HEMT器件的击穿电压。(The present invention relates to a kind of normally-off InAlN/GaN HMET device and preparation method thereof with p-GaN grid structure, belongs to field of semiconductor.Device of the invention includes substrate, GaN buffer layer, InAlN barrier layer, p-GaN cap layers, grid, source electrode, drain electrode and passivation layer, wherein GaN buffer layer and InAlN barrier layer form hetero-junctions, can inhibit current collapse effect and modulate electric field distribution in channel to improve the breakdown voltage of device；By the present invention in that using the InAlN material of In component 0.17 as barrier layer, the Lattice Matching of hetero-junctions is realized, increases electronic barrier layer barrier height, therefore can reduce the conducting resistance and grid leakage current of device；In addition it uses high dielectric constant material as passivation layer, can reduce peak electric field of the device at the gate edge of drain electrode, improve the breakdown voltage of InAlN HEMT device.)
1. a kind of normally-off InAlN/GaN HMET device with p-GaN grid structure, which is characterized in that the device includes lining Bottom (101) and the InAlN/GaN hetero-junctions being set to above the substrate, the hetero-junctions by GaN buffer layer (102) with InAlN barrier layer (103) formation, the InAlN barrier layer are located above the GaN buffer layer.
2. a kind of normally-off InAlN/GaN HMET device with p-GaN grid structure, feature exist according to claim 1 In the device further includes passivation layer (108), the source electrode (106), passivation layer of sequence setting above the InAlN barrier layer (108), p-GaN cap layers (104), passivation layer (108), drain electrode (107), passivation layer (108) and be set to the p-GaN cap layers The grid (105) of surface.
3. a kind of normally-off InAlN/GaN HMET device with p-GaN grid structure, feature exist according to claim 2 In the material of the passivation layer has the dielectric constant of 7.5F/m or more, the InAlN barrier layer thickness≤6nm.
4. a kind of normally-off InAlN/GaN HMET device with p-GaN grid structure, feature exist according to claim 2 In the source electrode, drain and gate lower section are active area, are isolated area on the outside of the active area.
5. a kind of any one of Claims 1 to 4 system of the normally-off InAlN/GaN HMET device with p-GaN grid structure Preparation Method, which is characterized in that the described method comprises the following steps:
S1, GaN and InAlN material is successively grown above the substrate (101) using epitaxial growth method, formed over the substrate by The InAlN/GaN hetero-junctions that GaN buffer layer (102) and InAlN barrier layer (103) are constituted, the component of In in the InAlN material It is 0.17；
S2, on the InAlN barrier layer of the InAlN/GaN hetero-junctions carry out epitaxial growth p-GaN, with InAlN barrier layer with And the GaN buffer layer forms Lattice Matching；
S3, it is acted on by photoetching and protects area of grid in the p-GaN cap layers with photoresist, then with dry etching with shape At p-GaN cap layers；
S4, by after the photoresist lift off formed in S3 in the material of the InAlN barrier layer disposed thereon dielectric constant >=7.5F/m Material is formed passivation layer (108)；
S5, source electrode and the part except drain region are protected with photoresist, dry method quarter is then carried out above the passivation layer Ablation removes the passivation layer in source electrode and drain region, continues in source electrode and drain electrode area deposition metal, with the InAlN barrier layer Ohmic contact is formed, that is, forms source electrode (106) and drain electrode (107)；
S6, grid (105) are formed in the p-GaN cap layers disposed thereon gate metal, makes the gate metal and the p-GaN Cap layers form Schottky contacts.
6. a kind of preparation side of the normally-off InAlN/GaN HMET device with p-GaN grid structure according to claim 5 Method, which is characterized in that in source electrode and drain electrode area deposition metal using following annealing way described in S5: annealing rate 10~ 800 DEG C/min, atmosphere is N when annealing2Atmosphere.
7. a kind of preparation side of the normally-off InAlN/GaN HMET device with p-GaN grid structure according to claim 5 Method, which is characterized in that metal described in S5 uses Ti/Al/Ti/Au, and each layer of thickness is respectively 30nm, 120nm, 50nm, 100nm。
8. a kind of preparation side of the normally-off InAlN/GaN HMET device with p-GaN grid structure according to claim 5 Method, which is characterized in that gate metal described in S6 uses Ni/Au, and each layer of thickness is respectively 50nm, 300nm.
9. a kind of preparation side of the normally-off InAlN/GaN HMET device with p-GaN grid structure according to claim 5 Method, which is characterized in that the preparation method further includes utilizing the method for etching or being locally implanted ion after forming p-GaN cap layers Form the isolated area being located on the outside of active area.
10. a kind of preparation side of the normally-off InAlN/GaN HMET device with p-GaN grid structure according to claim 9 Method, which is characterized in that described to be locally implanted ion specifically: it is longitudinal be locally implanted ion filling InAlN barrier layer (103) and Active area is formed at GaN buffer layer (102) top；The etching specifically: longitudinal part removal InAlN barrier layer (103) and GaN buffer layer (102) top, realizes the mesa-isolated of active area.
Technical field
The invention belongs to field of semiconductor fields, and in particular to a kind of normally-off with p-GaN grid structure InAlN/GaN HMET device and preparation method thereof.
Background technique
Wide bandgap semiconductor gallium nitride (GaN) is used as most representational third generation semiconductor material, is after silicon (Si) Be for the first generation material of representative and with GaAs (GaAs) representative second generation semiconductor material after, fast-developing is novel Semiconductor material is led because of its critical breakdown electric field height, high mobility, high saturation drift velocity in power electronics and frequency microwave The application prospect in domain is very wide.GaN material can be formed heterogeneous with ternary-alloy material (such as AlGaN, InGaN, InAlN) It is formed at the heterojunction boundary that knot, the piezoelectric polarization of generation and spontaneous polarization can be such that GaN material is formed with its ternary-alloy material The two-dimensional electron gas (wo-dimensional electron gas, 2DEG) of high concentration, mobility and saturated velocity are all remote high In silicon.And have excellent performance with the heterogeneous high electron mobility transistor (HEMT) for becoming core production of AlGaN/GaN, it is non- Often it is suitble to production power semiconductor, at present by industry extensive concern.
AlGaN/GaN heterojunction material is always the main force of GaN base device in recent years, for AlGaN/GaN hetero-junctions, Since AlN has stronger spontaneous polarizability, but with the raising of Al component, AlGaN potential barrier quality of materials reduces, causes Surface defect increases, and lattice mismatch becomes larger, and silicon wafer warpage is caused to become larger；And AlGaN potential barrier can reach when Al component is excessively high Polarization is greatly reduced if AlGaN potential barrier thickness is more than that its critical thickness will generate stress relaxation to a critical altitude Effect limits its spontaneous polarization so Al component cannot be too high.
Since there is high concentrations at AlGaN/GaN heterojunction boundary, so conventional AlGaN/GaN HEMT is. HEMT device is in the application advantageously.Generally use the methods of etched recesses, the injection of F basal granule at present to exhaust below grid The normal pass of two-dimensional electron gas (2DEG) Lai Shixian device.But recessed gate etching process is difficult to control accurately and can bring damage, Current collapse phenomenon is presented；The injection of F basal granule is as the accuracy problem of injection brings series of stable problem.
The present invention uses p-GaN grid structure to realize the normal pass of device, since p-GaN grid structure is to this work of dry etching Skill requirement is lower, so more for feasibility in power switch application.P-GaN gate technique is by barrier layer p-type GaN cap By raising interface hetero-junctions conduction band to fermi level or more, the two-dimensional electron gas of grid lower channels is depleted, final to realize The normal pass of device.There are many similarities by novel I nAlN/GaN hetero-junctions and AlGaN/GaN, but also have its own unique excellent Point.In InAlN/GaN hetero-junctions, when In group is divided into 17%, InAlN and GaN lattice constant having the same, therefore can put The variety of problems that de- stress generates, can effectively improve device reliability.Although InAlN barrier layer is not deposited with GaN buffer layer In stress effect, therefore there is no piezoelectric polarization, but the two-dimensional electron gas surface density that spontaneous polarization generates is much higher than conventional AlGaN/GaN theoretically has bigger power output, therefore has bigger potentiality in terms of power device applications.
Summary of the invention
In view of this, one of the objects of the present invention is to provide a kind of normally-off InAlN/GaN with p-GaN grid structure HMET device；The second object of the present invention is to provide a kind of normally-off InAlN/GaN HMET device with p-GaN grid structure The preparation method of part.
In order to achieve the above objectives, the invention provides the following technical scheme:
1, a kind of normally-off InAlN/GaN HMET device with p-GaN grid structure, the device includes substrate (101) With the InAlN/GaN hetero-junctions being set to above the substrate, the hetero-junctions passes through GaN buffer layer (102) and InAlN potential barrier Layer (103) is formed, and the InAlN barrier layer is located above the GaN buffer layer.
Preferably, the device further includes passivation layer (108), the source electrode of sequence setting above the InAlN barrier layer (106), passivation layer (108), p-GaN cap layers (104), passivation layer (108), drain electrode (107), passivation layer (108) and be set to Grid (105) right above the p-GaN cap layers.
Preferably, the material of the passivation layer has the dielectric constant of 7.5F/m or more.
Preferably, the contact between the InAlN barrier layer and source electrode, drain electrode is Ohmic contact；The p-GaN cap layers with Contact between grid is Schottky contacts.
Preferably, the InAlN barrier layer thickness≤6nm.
Preferably, the source electrode, drain and gate lower section are active area, are isolated area on the outside of the active area.
2, the preparation method of above-mentioned a kind of normally-off InAlN/GaN HMET device with p-GaN grid structure, the side Method the following steps are included:
S1, GaN and InAlN material is successively grown above substrate (101) using epitaxial growth method, over the substrate shape At the InAlN/GaN hetero-junctions being made of GaN buffer layer (102) and InAlN barrier layer (103), In in the InAlN material Group is divided into 0.17；
S2, epitaxial growth p-GaN is carried out on the InAlN barrier layer of the InAlN/GaN hetero-junctions, with InAlN potential barrier Layer and the GaN buffer layer form Lattice Matching；
S3, it is acted on by photoetching and protects area of grid in the p-GaN cap layers with photoresist, then use dry etching To form p-GaN cap layers；
S4, by after the photoresist lift off formed in S3 in the InAlN barrier layer disposed thereon dielectric constant >=7.5F/m Material, formed passivation layer (108)；
S5, source electrode and the part except drain region are protected with photoresist, is then done above the passivation layer Method etching removes the passivation layer in source electrode and drain region, continues in source electrode and drain electrode area deposition metal, with the InAlN gesture Barrier layer forms Ohmic contact, that is, forms source electrode (106) and drain electrode (107)；
S6, the p-GaN cap layers disposed thereon gate metal formed grid (105), make the gate metal with it is described P-GaN cap layers form Schottky contacts.
Preferably, following annealing way: annealing rate 10 is used described in S5 in source electrode and drain electrode area deposition metal ~800 DEG C/min, atmosphere is N when annealing2Atmosphere.
Preferably, metal described in S5 uses Ti/Al/Ti/Au, and each layer of thickness is respectively 30nm, 120nm, 50nm, 100nm。
Preferably, gate metal described in S6 uses Ni/Au, and each layer of thickness is respectively 50nm, 300nm.
Preferably, the preparation method further includes utilizing the side for etching or being locally implanted ion after forming p-GaN cap layers Method forms the isolated area being located on the outside of active area.
Preferably, described to be locally implanted ion specifically: it is longitudinal be locally implanted ion filling InAlN barrier layer (103) with And active area is formed at GaN buffer layer (102) top；The etching specifically: longitudinal part removal InAlN barrier layer (103) with And GaN buffer layer (102) top, realize the mesa-isolated of active area.
The beneficial effects of the present invention are:
1, the present invention provides a kind of normally-off InAlN/GaN HMET device with p-GaN grid structure, exists in device InAlN/GaN hetero-junctions, and one layer of p-GaN cap layers are increased on the InAlN barrier layer in hetero-junctions, by raising interface More than hetero-junctions conduction band to fermi level, the two-dimensional electron gas of grid lower channels is depleted, the final Chang Guanzuo for realizing device With；Simultaneously in InAlN/GaN hetero-junctions, when In mass fraction is 17%, InAlN and GaN lattice constant having the same, therefore The variety of problems that stress generation can be got rid of, effectively improves device reliability；Additionally while InAlN barrier layer and GaN are buffered Stress effect is not present in layer, therefore does not have piezoelectric polarization, but the two-dimensional electron gas surface density that spontaneous polarization generates is much higher than normal AlGaN/GaN is advised, therefore theoretically device of the invention has bigger power output, so that having in terms of power device applications Bigger potentiality；
2, the present invention provides a kind of preparation method of normally-off InAlN/GaN HMET device with p-GaN grid structure, Preparation method is simple, feasibility is high.
Other advantages, target and feature of the invention will be illustrated in the following description to a certain extent, and And to a certain extent, based on will be apparent to those skilled in the art to investigating hereafter, Huo Zheke To be instructed from the practice of the present invention.Target of the invention and other advantages can be realized by following specification and It obtains.
Detailed description of the invention
To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention is made below in conjunction with attached drawing excellent The detailed description of choosing, in which:
Fig. 1 is the structural schematic diagram of traditional normally-off AlGaN/GaN HEMT device with p-GaN grid structure；
Fig. 2 is that a kind of barrier layer proposed by the present invention is In0.17Al0.83The normally-off with p-GaN grid structure of N The structural schematic diagram of InAlN/GaN HEMT device；
Fig. 3 is the preparation method of the InAlN/GaN HEMT device proposed by the present invention with p-GaN grid structure；
Fig. 4 is the AlGaN/GaN HEMT device (a) with different AlGaN potential barrier thickness and has different InAlN The contrast schematic diagram that the transfer characteristic of the InAlN/GaN HEMT device (a) of barrier layer thickness changes with barrier layer thickness；
Fig. 5 is the AlGaN/GaN HEMT device (a) with different AlGaN potential barrier thickness and has different InAlN The contrast schematic diagram that the output characteristics of the InAlN/GaN HEMT device (b) of barrier layer thickness changes with barrier layer thickness；
It with a thickness of the AlGaN/GaN HEMT device and InAlN barrier layer thickness of 20nm is 5nm that Fig. 6, which is AlGaN potential barrier, InAlN/GaN HEMT device output characteristics and transfer characteristic contrast schematic diagram；
It with a thickness of the AlGaN/GaN HEMT device and InAlN barrier layer thickness of 20nm is 5nm that Fig. 7, which is AlGaN potential barrier, InAlN/GaN HEMT device frequency characteristic contrast schematic diagram；
Fig. 8 is AlGaN potential barrier is with a thickness of the AlGaN/GaN HEMT device (a) of 20nm and InAlN barrier layer thickness The asynchronous breakdown characteristics of the passivation material of 300nm thickness compare diagram in the InAlN/GaN HEMT device (b) of 5nm；
Fig. 9 is when the TiO with a thickness of 300nm is being added in InAlN/GaN device2Device after passivation layer, under off state Part impact ionization rate distribution schematic diagram, wherein a, b are respectively that TiO is added2Distribution schematic diagram before and after passivation layer；
Figure 10 is when the TiO with a thickness of 300nm is being added in AlGaN/GaN device2Device after passivation layer, under off state Part impact ionization rate distribution schematic diagram, wherein a, b are respectively that TiO is added2Distribution schematic diagram before and after passivation layer；
Figure 11 is when fixed AlGaN potential barrier is 5nm with a thickness of 20nm and InAlN barrier layer thickness, different TiO2Under passivation layer thickness, AlGaN/GaN HEMT device (a) and the breakdown characteristics comparison of InAlN/GaN HEMT device (b) are shown It is intended to；
Figure 12 is that TiO is being added when fixed AlGaN potential barrier is 5nm with a thickness of 20nm and InAlN barrier layer thickness2 AlGaN/GaN HEMT device (a) and InAlN/GaN HEMT device (b) channel before and after passivation layer, under off state Locate the contrast schematic diagram of field distribution；
Wherein: 101- substrate, 102-GaN buffer layer, 103-InAlN barrier layer, 104-p-GaN cap layers, 105- grid, 106- source electrode, 107- drain electrode, 108- high dielectric constant material passivation layer, 109-AlGaN barrier layer.
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from Various modifications or alterations are carried out under spirit of the invention.It should be noted that diagram provided in following embodiment is only to show Meaning mode illustrates basic conception of the invention, and in the absence of conflict, the feature in following embodiment and embodiment can phase Mutually combination.