阅读说明：本技术 一种宽带高效率j类功率放大器的设计方法 (A kind of design method of broadband high-efficiency J power-like amplifier ) 是由 陈世昌 曾毛宁 徐魁文 赵鹏 王高峰 于 2019-08-23 设计创作，主要内容包括：本发明公开一种宽带高效率J类功率放大器的设计方法,该功率放大器包括输入匹配网络、功率放大器、输出匹配网络、栅极偏置网络、漏极供电网络。本发明提出了一个新的目标函数,能够同时控制基波阻抗和二次谐波阻抗；提出了二维度优化方法,传输线的宽度和长度都作为优化变量,在工作频带内合成的基波阻抗和二次谐波阻抗都接近且随着目标阻抗值的变化而变化,这样增加了匹配的灵活度、增强了匹配的效果,能更好地增强J类功率放大器的宽带特性和效率特性。本发明在高效率宽带功率放大器应用背景下,针对宽带高效率设计方法需求,具有结构简单、设计步骤流程化、适用性更加广泛的优点。(The present invention discloses a kind of design method of broadband high-efficiency J power-like amplifier, which includes input matching network, power amplifier, output matching network, gate bias network, drain electrode supply network.The invention proposes a new objective functions, can control impedance of fundamental frequency and second harmonic impedance simultaneously；Propose two-dimensions optimization method, the width and length of transmission line are all used as optimized variable, the impedance of fundamental frequency synthesized in working band and second harmonic impedance all approach and change with the variation of target impedance value, matched flexibility ratio is increased in this way, enhances matched effect, can preferably enhance the broadband character and efficiency characteristic of J power-like amplifier.The present invention is under high efficiency wideband power amplifer application background, for broadband high-efficiency design method demand, has the advantages that simple structure, design procedure procedure, applicability are more extensive.)

1. a kind of design method of broadband high-efficiency J power-like amplifier, broadband high-efficiency J power-like amplifier includes input Matching network 1, power amplifier 2, output matching network 3, gate bias network 4, drain electrode supply network 5；

The input matching network 1 includes the first series transmission lines 11, the second series transmission lines 12, the third series connection being linked in sequence Transmission line 14, the 4th series transmission lines 15；One end of one end of first parallel connection short circuit transmission line 13 and the second series transmission lines 12, (i.e. the first parallel connection short circuit transmission line 13, the second series transmission lines 12, third series connection pass for one end connection of third series transmission lines 14 Defeated line 14 is in parallel), the other end of the first parallel connection short circuit transmission line 13 is connect with gate bias network 4；First series transmission lines 11 Input terminal of the one end as input matching network 1, the other end connect with the other end of the second series transmission lines 12；4th series connection Output end of the one end of transmission line 15 as input matching network 1, the other end are connect with the other end of third series transmission lines 14； The output end of the input matching network 1 is connect with the grid of power amplifier 2；

The output matching network 3 includes the 5th series transmission lines 31 being linked in sequence, the 6th series transmission lines 34；Second is in parallel One end of short-circuited transmission line 32 and one end of the 5th series transmission lines 31, the 6th series transmission lines 34 one end, third is in parallel opens One end of road transmission line 33 connects (i.e. the second parallel connection short circuit transmission line 32, the 5th series transmission lines 31, the 6th series transmission lines 34, third parallel connection open circuited transmission line 33 is in parallel), the other end of the second parallel connection short circuit transmission line 32 is connect with drain electrode supply network 5； The other end of third parallel connection open circuited transmission line 33 is opened a way；The other end of 5th series transmission lines 31 is as output matching network 3 Input terminal, output end of the other end of the 6th series transmission lines 34 as output matching network 3；The output matching network 3 it is defeated Enter end to connect with the drain electrode of power amplifier 2；

The gate bias network 4 includes grid power supply V_GS, 3 shunt capacitance C41-C43；Wherein grid power supply V_GSOne end connection First parallel connection short circuit transmission line 13, the other end and one end of shunt capacitance C41, one end of shunt capacitance C42, shunt capacitance C43 One end connection, the other end of shunt capacitance C41, C42, C43 is all grounded；

The drain electrode supply network 5 includes grid power supply V_DS, 3 shunt capacitance C51-C53；Wherein drain power V_DSOne end connection Second parallel connection short circuit transmission line 32, the other end and one end of shunt capacitance C51, one end of shunt capacitance C52, shunt capacitance C53 The other end of connection, shunt capacitance C51, C52, C53 is all grounded；

The input terminal of the input matching network 1 and the output end of output matching network 3 are connected a coupled capacitor C6；

It is characterized in that this method is specifically:

Step 1 passes through the progress harmonic load traction of ADS software according to the device model of power amplifier 2 according to design objective Emulation obtains the input impedance target value Z of power amplifier 2 in working band_opt,,s, impedance of fundamental frequency target value Z_opt,1With two Subharmonic impedance target value Z_opt,2；

Step 2, debugging output matching network 3

S21, the structure for selecting and determining output matching network 3；

S22, according to by formula (1)-(3) it is found that the abcd matrix of each transmission line in output matching network 3, due to ABCD square Battle array has factorial characteristic, then the total abcd matrix of output matching network 3 can be by this respective ABCD square of four sections of transmission lines Battle array factorial obtains；

The abcd matrix of series transmission lines (a) is

Wherein θ is the electrical length of transmission line；

The abcd matrix of open circuited transmission line (b) in parallel is

The abcd matrix of parallel connection short circuit transmission line (c) is

Z in formula_eIt is the characteristic impedance of transmission line, lambda definition is

F is working frequency in formula, and the length of transmission line is λ/8, f_eIt is the cutoff frequency of transmission line；

The total abcd matrix of output matching network 3 is

Z in formula₃₁、Z₃₂、Z₃₃And Z₃₄It is the characteristic impedance of transmission line 31,32,33 and 34 and as optimized variable respectively,

λ₃₁、λ₃₂、λ₃₃And λ₃₄λ is calculated by formula (4)₃₁=jtan (2 π f/8/f₃₁), λ₃₂=jtan (2 π f/8/f₃₂), λ₃₃=jtan (2 π f/8/f₃₃), λ₃₄=jtan (2 π f/8/f₃₄), f is working band in formula, and the length of every section of transmission line is λ/8, f₃₁、f₃₂、f₃₃And f₃₄It is respectively the cutoff frequency of transmission line 31,32,33 and 34 and constitutes two-dimensions as optimized variable Optimization；

S23, S parameter matrix is converted by the total abcd matrix of output matching network 3 obtained in previous step S22:

Δ=A in formula_glb+B_glb+C_glb+D_glb, Z₀For load impedance；For single-ended matching network, that is, load impedance etc. In Z₀, then the impedance of fundamental frequency Z that output matching network 3 synthesizes_in,1The second harmonic impedance Z of (λ) and synthesis_in,2(λ) passes through formula (7) known to:

S24, the impedance of fundamental frequency Z synthesized in step S23 is calculated_in,1Impedance of fundamental frequency target value Z obtained in (λ) and step S1_opt,1 Difference DELTA Z between (λ)_diff,1:

N is the sum that frequency point is chosen in working band, λ in formula_iIt is i-th of frequency point in working band；

Similarly, the second harmonic impedance Z of synthesis can be calculated_in,2(λ) and the second harmonic impedance target value Z obtained_opt,2(λ) Between difference DELTA Z_diff,2:

In order to realize while controlling the design of impedance of fundamental frequency and second harmonic impedance, now introduces two factor alphas and β constitutes one newly Objective function:

minΔZ_output=α Δ Z_diff,1+β·ΔZ_diff,2 (10)

Min Δ Z in formula_outputIt is the mesh that the difference between the difference between output end impedance of fundamental frequency and second harmonic impedance is constituted Scalar functions, α and β are positive real numbers, and strictly meet alpha+beta=1；

S25, minimum value optimization is carried out to output end objective function (10) obtained above, solves characteristic impedance Z₃₁、Z₃₂、Z₃₃ And Z₃₄And cutoff frequency f₃₁、f₃₂、f₃₃And f₃₄, and then determine the dimensional parameters in output matching network 3；

Step 3 debugs input matching network 1, similarly step 2；

Step 4, debugging gate bias network 4, drain electrode supply network 5

Gate bias network 4 and drain electrode supply network 5 provide bias voltage for power amplifier transistor, by power amplifier crystalline substance Body pipe is biased to B class；

Input matching network 1 is connect with gate bias network 4, the first parallel connection short circuit transmission line 13 is made to generate short-circuit condition；It will Output matching network 3 is connect with drain electrode supply network 5, and the second parallel connection short circuit transmission line 32 is made to generate short-circuit condition；It again will input Matching network 1, power amplifier 2 and output matching network 3 connect, and obtain final broadband high-efficiency J power-like amplifier.

2. a kind of design method of broadband high-efficiency J power-like amplifier as described in claim 1, it is characterised in that power is put Big device 2 is B class high efficiency power amplifier.

3. a kind of design method of broadband high-efficiency J power-like amplifier as described in claim 1, it is characterised in that power is put Big device 2 is using independent transistors.

4. a kind of design method of broadband high-efficiency J power-like amplifier as described in claim 1, it is characterised in that input Distribution network 1 and the microstrip line characteristic-impedance range of output matching network 3 are 12.5 Ω to 100 Ω, and the range of cutoff frequency is 1GHz to 16GHz.

5. a kind of design method of broadband high-efficiency J power-like amplifier as described in claim 1, it is characterised in that load resistance Anti- Z₀=50 Ω.

6. a kind of design method of broadband high-efficiency J power-like amplifier as described in claim 1, it is characterised in that step 2 The objective function α that difference between difference and second harmonic impedance between middle 3 impedance of fundamental frequency of output matching network is constituted is close 1。

7. a kind of design method of broadband high-efficiency J power-like amplifier as claimed in claim 6, it is characterised in that step 2 The objective function α that difference between difference and second harmonic impedance between middle 3 impedance of fundamental frequency of output matching network is constituted= 0.7, β=0.3.

8. a kind of design method of broadband high-efficiency J power-like amplifier as described in claim 1, it is characterised in that step 2 The objective function α that difference between difference and second harmonic impedance between middle 2 impedance of fundamental frequency of input matching network is constituted is close 1。

9. a kind of design method of broadband high-efficiency J power-like amplifier as claimed in claim 8, it is characterised in that step 2 The He of objective function α=1 that difference between difference and second harmonic impedance between middle 2 impedance of fundamental frequency of input matching network is constituted β=0.

Technical field

The present invention relates to the frequency microwave communications field more particularly to a kind of designs of broadband high-efficiency J power-like amplifier Method.

Background technique

With the fast development of wireless communication technique, the connection between various electronic equipments also becomes more closely.In order to Meet increasingly increased high-speed broadband data service demand, and also to reduce the operation cost of communication base station, multimode is made more The communication system of formula has been widely used.This makes originally limited frequency spectrum resource become more nervous, and modulated signal Bandwidth also become more and more wider, especially upcoming 5G communication system will need bigger bandwidth, these demands are all right More stringent requirements are proposed for the bandwidth of wireless communication system.As the important component of wireless communication system, power amplifier Broadband character also become measure power amplifier important indicator.

Another important indicator of power amplifier is efficiency characteristic.As the part most consumed energy in wireless communication system, The improved efficiency of power amplifier, for reducing the energy consumption of whole system, extending the runing time of equipment and mitigating heat dissipation dress The pressure set suffers from important influence, is especially advocating energy-saving and environment-friendly today, is even more having great significance.Therefore, The power amplifier that broadband character and higher efficiency can be taken into account has become the hot subject of current power amplifier field.

One of the conventional design method of broadband high-efficiency power amplifier is exactly the design of J power-like amplifier, J class at present Power amplifier can realize high efficiency in a very big bandwidth.The characteristics of broadband high-efficiency J power-like amplifier is one As be biased in AB class or B quasi-mode；Impedance of fundamental frequency and second harmonic impedance are controlled, it is assumed that high order three times or more is humorous Wave short circuit, and impedance of fundamental frequency contains induction reactance ingredient, and pure capacitive reactance is presented in second harmonic impedance；Voltage and current waveform is all presented half Sine wave, and their waveform is not overlapped in the time domain.

The conventional design method of broadband high-efficiency J power-like amplifier is the fundamental wave in Yu Xianxuanding broadband at centre frequency Impedance and second harmonic impedance first carry out second harmonic impedance matching as matched target value, then on this basis again into The matching of row impedance of fundamental frequency.This separately processing impedance of fundamental frequency and the design method of second harmonic impedance not only increase complexity, And it is unfavorable for the design of miniaturization.In addition, another design method of broadband high-efficiency J power-like amplifier is to utilize real frequency Technology is designed.The characteristics of real interpolation is can will to be closed in a very big bandwidth with S parameter come profile matching network At impedance value close to target value.But real interpolation also has disadvantage, only this optimized variable of the width of transmission line, is being distributed In formula parameter, the matching network of synthesis is typically all cascaded structure, and all transmission lines are also generally all isometric structures. This reduces matched flexibility ratios and matched effect.

For deficiency present in currently available technology, it is really necessary to be studied, to provide a kind of broadband high-efficiency J class The solution of power amplifier.

Summary of the invention

In view of this, being mentioned the purpose of the present invention is to provide a kind of design method of broadband high-efficiency J power-like amplifier A new objective function is gone out, impedance of fundamental frequency and second harmonic impedance can be controlled simultaneously.Two-dimensions optimization method is proposed, The width and length of transmission line are all used as optimized variable, and matching network is not all cascaded structure, nor Isometric structure.It is this to set Meter method increases matched flexibility ratio, enhances matched effect.

In order to overcome the drawbacks of the prior art, the invention adopts the following technical scheme:

A kind of broadband high-efficiency J power-like amplifier, including input matching network 1, power amplifier 2, output pair net Network 3, gate bias network 4, drain electrode supply network 5.

The input matching network 1 includes the first series transmission lines 11 being linked in sequence, the second series transmission lines 12, third Series transmission lines 14, the 4th series transmission lines 15.One end of first parallel connection short circuit transmission line 13 and the second series transmission lines 12 One end, third series transmission lines 14 one end connect (i.e. the first parallel connection short circuit transmission line 13, the second series transmission lines 12, third Series transmission lines 14 are in parallel), the other end of the first parallel connection short circuit transmission line 13 is connect with gate bias network 4；First series connection passes Input terminal of the one end of defeated line 11 as input matching network 1, the other end are connect with the other end of the second series transmission lines 12；The Output end of the one end of four series transmission lines 15 as input matching network 1, the other end are another with third series transmission lines 14 End connection；The output end of the input matching network 1 is connect with the grid of power amplifier 2.

The output matching network 3 includes the 5th series transmission lines 31 being linked in sequence, the 6th series transmission lines 34.Second One end of parallel connection short circuit transmission line 32 and one end of the 5th series transmission lines 31, one end of the 6th series transmission lines 34, third are simultaneously The one end for joining open circuited transmission line 33 connects (i.e. the second parallel connection short circuit transmission line 32, the 5th series transmission lines 31, the 6th series-connected transmission Line 34, third parallel connection open circuited transmission line 33 are in parallel), the other end and drain electrode supply network 5 of the second parallel connection short circuit transmission line 32 connect It connects.The other end of third parallel connection open circuited transmission line 33 is opened a way.The other end of 5th series transmission lines 31 is as output matching network 3 Input terminal, output end of the other end of the 6th series transmission lines 34 as output matching network 3；The output matching network 3 Input terminal is connect with the drain electrode of power amplifier 2.

Preferably, power amplifier 2 is basic amplifier, B class high efficiency power amplifier form can be used.More It is preferred that amplifier uses independent transistors.

Preferably, the gate bias network 4 includes grid power supply V_GS, 3 shunt capacitance C41-C43.Wherein grid electricity Source V_GSOne end connects the first parallel connection short circuit transmission line 13, one end of the other end and shunt capacitance C41, shunt capacitance C42 one end, One end of shunt capacitance C43 connects, and the other end of shunt capacitance C41, C42, C43 are all grounded.

Preferably, the drain electrode supply network 5 includes grid power supply V_DS, 3 shunt capacitance C51-C53.Wherein drain electrode electricity Source V_DSOne end connects the second parallel connection short circuit transmission line 32, one end of the other end and shunt capacitance C51, shunt capacitance C52 one end, The other end of shunt capacitance C53 connection, shunt capacitance C51, C52, C53 is all grounded.

The input terminal of above-mentioned input matching network 1 is the input terminal of broadband high-efficiency J power-like amplifier, output matching The output end of network 3 is the output end of broadband high-efficiency J power-like amplifier.

The input terminal of the input matching network 1 and the output end of output matching network 3 are connected a coupled capacitor C6.

The design method of above-mentioned broadband high-efficiency J power-like amplifier is specific as follows:

Step 1 passes through ADS software progress harmonic load according to the device model of power amplifier 2 according to design objective Traction simulation obtains the input impedance target value Z of power amplifier 2 in working band_opt,s, impedance of fundamental frequency target value Z_opt,1 With second harmonic impedance target value Z_opt,2。

Step 2, debugging output matching network 3

S21, the structure for selecting and determining output matching network 3；

S22, by the abcd matrix of each transmission line in the available output matching network 3 in formula (1)-(3), due to ABCD Matrix has factorial characteristic, then the total abcd matrix of output matching network 3 can be by this four sections of respective ABCD of transmission line Matrix factorial obtains.

The abcd matrix of series transmission lines (a) is

Wherein θ is the electrical length of transmission line；J is expressed as complex variable

The abcd matrix of open circuited transmission line (b) in parallel is

The abcd matrix of parallel connection short circuit transmission line (c) is

Z in formula_eIt is the characteristic impedance of transmission line, lambda definition is

F is working frequency in formula, and the length of transmission line is λ/8, f_eIt is the cutoff frequency of transmission line.

The total abcd matrix of output matching network 3 is

Z in formula₃₁、Z₃₂、Z₃₃And Z₃₄It is the characteristic impedance of transmission line 31,32,33 and 34 and as optimized variable respectively, λ₃₁、λ₃₂、λ₃₃And λ₃₄λ is calculated by formula (4)₃₁=jtan (2 π f/8/f₃₁), λ₃₂=jtan (2 π f/8/f₃₂), λ₃₃ =jtan (2 π f/8/f₃₃), λ₃₄=jtan (2 π f/8/f₃₄), f is working band in formula, the length of every section of transmission line be λ/ 8, f₃₁、f₃₂、f₃₃And f₃₄Be respectively the cutoff frequency of transmission line 31,32,33 and 34 and as optimized variable constitute two-dimensions it is excellent Change.

It may be noted that needing to be arranged characteristic impedance Z for the convenience that actual circuit is processed₃₁、Z₃₂、Z₃₃And Z₃₄Range is 12.5 Ω to 100 Ω, cutoff frequency f₃₁、f₃₂、f₃₃And f₃₄Range be 1GHz to 16GHz.

S23, S parameter matrix is converted by the total abcd matrix of output matching network 3 obtained in previous step S22:

Δ=A in formula_glb+B_glb+C_glb+D_glb, Z₀=50 Ω are load impedance.For single-ended matching network, also It is that load impedance is equal to Z₀, then the impedance of fundamental frequency Z that output matching network 3 synthesizes_in,1The second harmonic impedance of (λ) and synthesis Z_in,2(λ) can be calculated with formula (7),

S24, the impedance of fundamental frequency Z synthesized in step S23 is calculated_in,1Impedance of fundamental frequency target value obtained in (λ) and step S1 Z_opt,1Difference DELTA Z between (λ)_diff,1:

N is the sum that frequency point is chosen in working band, λ in formula_iIt is i-th of frequency point in working band.

Similarly, the second harmonic impedance Z of synthesis can be calculated_in,2(λ) and the second harmonic impedance target value obtained Z_opt,2Difference DELTA Z between (λ)_diff,2

In order to realize design that is proposed by the present invention while controlling impedance of fundamental frequency and second harmonic impedance, now introducing two is Number α and β constitutes a new objective function

minΔZ_output=α Δ Z_diff,1+β·ΔZ_diff,2(10)

Min Δ Z in formula_outputIt is the difference composition between the difference between output end impedance of fundamental frequency and second harmonic impedance Objective function, α and β are positive real numbers, and strictly meet alpha+beta=1.If the impedance of fundamental frequency of synthesis and the impedance of fundamental frequency of acquisition Deviation between target value will lead to bigger output performance and deteriorate compared to the deviation between second harmonic impedance, then α is answered This is closer to 1, and otherwise β should be closer to 1.

S25, using known optimization algorithm, such as Levenberg-Marquardt (arranging literary Burger Marquart algorithm) excellent Change algorithm, minimum value optimization is carried out to output end objective function (10) obtained above, solves characteristic impedance Z₃₁、Z₃₂、Z₃₃With Z₃₄And cutoff frequency f₃₁、f₃₂、f₃₃And f₃₄Numerical value, if the number of iterations reach threshold value or meet minimal error require if basis The dielectric-slab used is converted into actual dimensional parameters, that is, determines 3 structure of output matching network.If being unsatisfactory for minimal error requirement And the number of iterations be not up to threshold value then the number of iterations add 1 after go to step S21, reselect and determine output matching network 3 Structure, iteration operating procedure S22-S25, until the number of iterations is completed or minimal error is required to meet.

Step 3, debugging input matching network 1

S31, the structure for selecting and determining input matching network 1；

S32, according to the ABCD square of each transmission line in the available input matching network 1 in formula in step 2 (1)-(3) Battle array, since abcd matrix has factorial characteristic, then the total abcd matrix of input matching network 1 can be obtained by, such as formula (11)

Z in formula₁₁、Z₁₂、Z₁₃、Z₁₄And Z₁₅It is the characteristic impedance of transmission line 11,12,13,14 and 15 and as excellent respectively Change variable, λ₁₁、λ₁₂、λ₁₃、λ₁₄And λ₁₅λ is calculated by formula (4)₁₁=jtan (2 π f/8/f₁₁), λ₁₂=jtan (2 π f/8/f₁₂), λ₁₃=jtan (2 π f/8/f₁₃), λ₁₄=jtan (2 π f/8/f₁₄), λ₁₅=jtan (2 π f/8/f₁₅), in formula F is working band, and the length of every section of transmission line is λ/8, f₁₁、f₁₂、f₁₃、f₁₄And f₁₅It is 11,12,13,14 and of transmission line respectively 15 cutoff frequency and as optimized variable constitute two-dimensions optimization.

It may be noted that needing to be arranged characteristic impedance Z for the convenience that actual circuit is processed₁₁、Z₁₂、Z₁₃、Z₁₄And Z₁₅Range It is 12.5 Ω to 100 Ω, cutoff frequency f₁₁、f₁₂、f₁₃、f₁₄And f₁₅Range be 1GHz to 16GHz.

S33, S is converted by the total abcd matrix of input matching network 1 obtained in previous step S32 using formula (6) Parameter matrix.For single-ended matching network, that is, source impedance is equal to Z₀, then the input that input matching network 1 synthesizes Impedance Z_in,s(λ) can be calculated by formula (7).

S34, the input impedance Z synthesized in step S33 is calculated_in,sInput impedance target value obtained in (λ) and step S1 Z_opt,sBetween difference DELTA Z_diff,s:

N is the sum that frequency point is chosen in working band, λ in formula_iIt is i-th of frequency point in working band.

Influence due to input mating end second harmonic impedance to power amplifier overall performance is little, so not considering in input terminal Second harmonic impedance.α=1 in this way, β=0 have just obtained input terminal objective function

minΔZ_input=Δ Z_diff,s (13)

S35, using known optimization algorithm, such as Levenberg-Marquardt (arranging literary Burger Marquart algorithm) excellent Change algorithm, minimum value optimization is carried out to input terminal objective function (13) obtained above, solves characteristic impedance Z₁₁、Z₁₂、Z₁₃、 Z₁₄And Z₁₅And cutoff frequency f₁₁、f₁₂、f₁₃、f₁₄And f₁₅Numerical value, wanted if the number of iterations reaches threshold value or meets minimal error Rooting is converted into actual dimensional parameters according to the dielectric-slab used, that is, determines 1 structure of input matching network.If being unsatisfactory for minimum miss Difference requires and the number of iterations be not up to threshold value then the number of iterations add 1 after go to S31, reselect and determine input matching network 1 Structure；Iteration operating procedure S32-S35, until the number of iterations is completed or minimal error is required to meet.

Step 4, debugging gate bias network 4, drain electrode supply network 5

Gate bias network 4 and drain electrode supply network 5 provide bias voltage for power amplifier transistor, by power amplification Device transistor biasing is to B class.

Input matching network 1 is connect with gate bias network 4, the first parallel connection short circuit transmission line 13 is made to generate short-circuit shape State；Output matching network 3 is connect with drain electrode supply network 5, the second parallel connection short circuit transmission line 32 is made to generate short-circuit condition；Again will Input matching network 1, power amplifier 2 and output matching network 3 connect, and obtain final broadband high-efficiency J class power amplification Device.

The beneficial effects of the present invention are: providing a kind of design method of broadband high-efficiency J power-like amplifier.

(1) it is more widely applied: proposing a new objective function, impedance of fundamental frequency and second harmonic can be controlled simultaneously Impedance, so design method is simple, features simple structure is more widely applied.

(2) bandwidth characteristic and efficiency characteristic are good: proposing two-dimensions optimization method, width and length all conducts of transmission line Optimized variable, matching network are not all cascaded structure, nor Isometric structure.The resistance synthesized under each frequency point in working band Anti- value (including impedance of fundamental frequency and second harmonic impedance) can be realized high efficiency in a big broadband closer to target value, This design method increases matched flexibility ratio, enhances matched effect, and bandwidth characteristic and efficiency characteristic are good.

(3) design procedure procedure: The present invention gives detailed design flow diagrams and the complete derivation of equation, so that wide The characteristics of design method with high efficiency J power-like amplifier is programmed with, procedure, facilitates beginner or senior research Person can obtain certain help from the present invention.

Detailed description of the invention

Fig. 1 is broadband high-efficiency J power-like amplifier circuit diagram of the invention.

Fig. 2 (a)-(c) is three kinds of basic transmission line structures used in the present invention.

Fig. 3 is the design flow diagram for the broadband high-efficiency J power-like amplifier that the present invention provides.

Fig. 4 (a) be output matching network 3 synthesize impedance of fundamental frequency value in broadband with the result of variations of target value.

Fig. 4 (b) be output matching network 3 synthesize second harmonic impedance value in broadband with the result of variations of target value.

Fig. 5 is the rail of the impedance of fundamental frequency value and second harmonic impedance value of the synthesis of output matching network 3 on Smith chart Mark.

Fig. 6 be this input matching network 1 synthesize input impedance value in broadband with the result of variations of target value.

Fig. 7 is the J power-like amplifier realized output voltage, current waveform at 3.5GHz of the invention.

Fig. 8 is to utilize big signal simulation result schematic diagram of the ADS software in 2.8~3.8GHz.

Specific embodiment

It is below specific implementation of the invention and technical scheme of the present invention will be further described in conjunction with attached drawing, but this Invention is not limited to these examples.

In view of the defects existing in the prior art, applicant has found under study for action, existing broadband high-efficiency J class power amplification The conventional design method of device is impedance of fundamental frequency in preselect broadband at centre frequency and second harmonic impedance as matched Target value first carries out second harmonic impedance matching, then carries out impedance of fundamental frequency matching again on this basis.It is this separately to handle base Wave impedance and the design method of second harmonic impedance not only increase complexity, and are unfavorable for the design of miniaturization.In addition, wide Another design method with high efficiency J power-like amplifier is designed using real interpolation.The characteristics of real interpolation is With S parameter come profile matching network, can in a very big bandwidth by the impedance value of synthesis close to target value.But real frequency skill Art also has disadvantage, only this optimized variable of the width of transmission line, and in distributed parameters, the matching network of synthesis is generally all It is cascaded structure, and all transmission lines are also generally all isometric structures.This reduces matched flexibility ratio and The effect matched.

In order to solve the defects of prior art, the invention proposes a kind of designs of broadband high-efficiency J power-like amplifier Method.

The structural schematic diagram of the broadband high-efficiency J power-like amplifier designed as shown in Figure 1 for the present invention, comprising: input Matching network 1, power amplifier 2, output matching network 3, gate bias network 4, drain electrode supply network 5.

Fig. 2 gives three kinds of basic transmission lines used in input matching network 1 and output matching network 3 in the present invention Structure, (a) series transmission lines, (b) open circuited transmission line in parallel and (c) parallel connection short circuit transmission line.Wherein gone here and there in input matching network 1 Joining transmission line (a) is the first series transmission lines 11, the second series transmission lines 12, third series transmission lines 14, the 4th series-connected transmission Line 15；Parallel connection short circuit transmission line (c) is the first parallel connection short circuit transmission line 13；

Series transmission lines (a) are the 5th series transmission lines 31, the 6th series transmission lines 34 in output matching network 3；It is in parallel Open circuited transmission line (b) is third parallel connection open circuited transmission line 33；Parallel connection short circuit transmission line (c) is the second parallel connection short circuit transmission line 32；

Each transmission line has a specific abcd matrix:

The abcd matrix of series transmission lines (a) is

Wherein θ is the electrical length of transmission line；J is expressed as complex variable；

The abcd matrix of open circuited transmission line (b) in parallel is

The abcd matrix of parallel connection short circuit transmission line (c) is

Z in formula_eIt is the characteristic impedance of transmission line, lambda definition is

F is working frequency in formula, and the length of transmission line is λ/8, f_eIt is the cutoff frequency of transmission line.

In view of any feature impedance is Z_e, the length of transmission line is λ/8, cutoff frequency f_eTransmission line, its width By characteristic impedance Z_eIt determines；By formula (4) it is found that the length of transmission line and cutoff frequency f_eIt is related, thus the width of transmission line and Length is equivalent to the characteristic impedance Z of transmission line as optimized variable_eWith cutoff frequency f_eTwo-dimensions are constituted as optimized variable Optimisation technique.

The output matching network 3 is designed using following methods, is realized especially by following steps:

Step S1: selecting and determining the structure of output matching network 3, according to the device model of transistor, passes through ADS software Harmonic load traction simulation is carried out, the impedance of fundamental frequency target value Z of power amplifier 2 is obtained in working band_opt,1With it is secondary humorous Wave impedance target value Z_opt,2。

Step S2: according to by formula (1)-(3) it is found that the transmission line 31,32,33 and 34 in output matching network 3 has One specific abcd matrix, since abcd matrix has factorial characteristic, then the total abcd matrix of output matching network 3 can To be obtained by this respective abcd matrix factorial of four sections of transmission lines.The total abcd matrix of output matching network 3 is

Z in formula₃₁、Z₃₂、Z₃₃And Z₃₄It is the characteristic impedance of transmission line 31,32,33 and 34 and as optimized variable respectively, λ₃₁、λ₃₂、λ₃₃And λ₃₄It is calculated by formula (4), wherein λ₃₁=jtan (2 π f/8/f₃₁), λ₃₂=jtan (2 π f/8/ f₃₂), λ₃₃=jtan (2 π f/8/f₃₃), λ₃₄=jtan (2 π f/8/f₃₄), f is working band in formula, every section of transmission line Length is λ/8, f₃₁、f₃₂、f₃₃And f₃₄It is respectively the cutoff frequency of transmission line 31,32,33 and 34 and is constituted as optimized variable Two-dimensions optimization.

It may be noted that needing to be arranged characteristic impedance Z for the convenience that actual circuit is processed₃₁、Z₃₂、Z₃₃And Z₃₄Range is 12.5 Ω to 100 Ω, cutoff frequency f₃₁、f₃₂、f₃₃And f₃₄Range be 1GHz to 16GHz.

Step S3: converting S parameter matrix for the total abcd matrix of output matching network 3 obtained in previous step S2, Conversion formula is

Δ=A in formula_glb+B_glb+C_glb+D_glb, Z₀=50 Ω are load impedance.For single-ended matching network, also It is that load impedance is equal to Z₀, then the impedance of fundamental frequency Z that output matching network 3 synthesizes_in,1The second harmonic impedance of (λ) and synthesis Z_in,2(λ) can use formula (7) and (8) to calculate respectively,

Step S4: the impedance of fundamental frequency Z synthesized in step S3 is calculated_in,1Impedance of fundamental frequency target obtained in (λ) and step S1 Value Z_opt,1Difference DELTA Z between (λ)_diff,1

N is the sum that frequency point is chosen in working band, λ in formula_iIt is i-th of frequency point in working band.

Similarly, the second harmonic impedance Z of synthesis can be calculated_in,2(λ) and the second harmonic impedance target value obtained Z_opt,2Difference DELTA Z between (λ)_diff,2

In order to realize design that is proposed by the present invention while controlling impedance of fundamental frequency and second harmonic impedance, now introducing two is Number α and β constitutes a new objective function

minΔZ_output=α Δ Z_diff,1+β·ΔZ_diff,2(11)

Min Δ Z in formula_outputIt is the difference composition between the difference between output end impedance of fundamental frequency and second harmonic impedance Objective function, α and β are positive real numbers, and strictly meet alpha+beta=1.If the impedance of fundamental frequency of synthesis and the impedance of fundamental frequency of acquisition Deviation between target value will lead to bigger output performance and deteriorate compared to the deviation between second harmonic impedance, then α is answered This is closer to 1, and otherwise β should be closer to 1.

Step S5: known optimization algorithm, such as Levenberg-Marquardt (arranging literary Burger Marquart algorithm) are applied Optimization algorithm carries out minimum value optimization to output end objective function (10) obtained above, solves and meets minimal error requirement Characteristic impedance Z₃₁、Z₃₂、Z₃₃And Z₃₄And cutoff frequency f₃₁、f₃₂、f₃₃And f₃₄Numerical value, such output matching network 3 just by It decides, actual size is then converted into according to the dielectric-slab used, the ruler in output matching network 3 as shown in figure 1 Very little parameter.

The input matching network 1, can realize according to the following steps:

Step S1, the structure for selecting and determining input matching network 1 passes through ADS software according to the device model of transistor Carry out source traction simulation obtains the input impedance target value Z of power amplifier 2 in working band_opt,s。

Step S2, according to the ABCD square of each transmission line in the available input matching network 1 in above-mentioned formula (1)-(3) Battle array, since abcd matrix has factorial characteristic, then the total abcd matrix of input matching network 1 can be obtained by, such as formula (11)

Z in formula₁₁、Z₁₂、Z₁₃、Z₁₄And Z₁₅It is the characteristic impedance of transmission line 11,12,13,14 and 15 and as excellent respectively Change variable, λ₁₁、λ₁₂、λ₁₃、λ₁₄And λ₁₅λ is calculated by formula (4)₁₁=jtan (2 π f/8/f₁₁), λ₁₂=jtan (2 π f/8/f₁₂), λ₁₃=jtan (2 π f/8/f₁₃), λ₁₄=jtan (2 π f/8/f₁₄), λ₁₅=jtan (2 π f/8/f₁₅), in formula F is working band, and the length of every section of transmission line is λ/8, f₁₁、f₁₂、f₁₃、f₁₄And f₁₅It is 11,12,13,14 and of transmission line respectively 15 cutoff frequency and as optimized variable constitute two-dimensions optimization.

It may be noted that needing to be arranged characteristic impedance Z for the convenience that actual circuit is processed₁₁、Z₁₂、Z₁₃、Z₁₄And Z₁₅Range It is 12.5 Ω to 100 Ω, cutoff frequency f₁₁、f₁₂、f₁₃、f₁₄And f₁₅Range be 1GHz to 16GHz.

Step S3, the total abcd matrix of input matching network 1 obtained in previous step S2 is turned using above-mentioned formula (6) Turn to S parameter matrix.For single-ended matching network, that is, source impedance is equal to Z₀, then what input matching network 1 synthesized Input impedance Z_in,s(λ) can be calculated by above-mentioned formula (7).

Step S4, the input impedance Z synthesized in step S3 is calculated_in,sInput impedance target obtained in (λ) and step S1 Value Z_opt,sBetween difference DELTA Z_diff,s:

N is the sum that frequency point is chosen in working band, λ in formula_iIt is i-th of frequency point in working band.

Influence due to input mating end second harmonic impedance to power amplifier overall performance is little, so not considering in input terminal Second harmonic impedance.α=1 in this way, β=0 have just obtained input terminal objective function

minΔZ_input=Δ Z_diff,s(14)

Step S5, using known optimization algorithm, such as Levenberg-Marquardt (arranging literary Burger Marquart algorithm) Optimization algorithm carries out minimum value optimization to input terminal objective function (13) obtained above, solves characteristic impedance Z₁₁、Z₁₂、 Z₁₃、Z₁₄And Z₁₅And cutoff frequency f₁₁、f₁₂、f₁₃、f₁₄And f₁₅Numerical value, such input matching network 1 is just determined , actual size is then converted into according to the dielectric-slab used, the dimensional parameters in input matching network 1 as shown in figure 1.

The microwave power amplifier is well known independent crystal tube power amplifier, and load impedance is 50 Europe.

The gate bias network 4 and drain electrode supply network 5 provide bias voltage for power amplifier transistor, by power Amplifier transistor bias is to B class.

Input matching network 1 is connect with gate bias network 4, the first parallel connection short circuit transmission line 13 is made to generate short-circuit shape State；Output matching network 3 is connect with drain electrode supply network 5, the second parallel connection short circuit transmission line 32 is made to generate short-circuit condition；Again will Input matching network 1, power amplifier 2 and output matching network 3 connect, and obtain final broadband high-efficiency J class power amplification Device.

An example is set forth below:

Design method is proposed by verifying, it is one wide based on a 10WCGH40010F GaN HEMT transistor design Band high efficiency J power-like amplifier, working band is 2.8~3.8GHz, and the plate of selection is Rogers4350B, and thickness is 0.762mm, dielectric constant 3.48, copper thickness 1oz.

The model of load transistor in ADS software, establishes load balance factor and source pulliung circuit, then chooses 2.8GHz, 3.0GHz, 3.2GHz, 3.4GHz, 3.6GHz, 3.8GHz represent the frequency response of entire working band, obtain further according to step S1 Impedance of fundamental frequency target value Z of the transistor under this six frequency points_opt,1, second harmonic impedance target value Z_opt,2With input impedance mesh Scale value Z_opt,s, as shown in table 1.

Table 1: the impedance target value that pulliung circuit obtains

The characteristic impedance of each section of transmission line and cutoff frequency in output matching network 3 are initialized, they become as optimization Amount, the detailed design cycle provided according to Fig. 3 optimize.It needs to refer to down, fundamental wave resistance in the design of J power-like amplifier It is anti-that output performance is influenced more greatly compared to second harmonic impedance, so α=0.7 and β=0.3 in this example.It is last in this way The characteristic impedance and cutoff frequency of each section of transmission line has been determined in output matching network 3, and has been converted according to the parameter of dielectric-slab For the size of actual transmissions line.As shown in table 2 below.

Table 2: the dimension of microstrip line in second transmission line

Similarly, input matching network 1 is also designed according to the method described above, only second harmonic impedance in input matching Performance is influenced less compared to exporting in matching, so here for second harmonic without processing, α=1 and β=0.This Sample has finally determined in input matching network 1 characteristic impedance and cutoff frequency of each section of transmission line, and according to the ginseng of dielectric-slab Number is converted into the size of actual transmissions line.As shown in table 3 below.

Table 3: the size of transmission line in input matching network

In gate bias network 4, V_GS=-2.8V, drain supply network 5 in, V_DS=28V.

Fig. 4 (a) be output matching network 3 synthesize impedance of fundamental frequency value in working band with the impedance of fundamental frequency target of acquisition The result of variations of value, it is evident that the impedance of fundamental frequency value and target value of synthesis are very close to and with target value in working band Variation.Fig. 4 (b) be output matching network 3 synthesize impedance of fundamental frequency value in working band with the impedance of fundamental frequency target value of acquisition Result of variations, it is evident that the impedance of fundamental frequency value and target value of synthesis are very close to and as target value becomes in working band Change.There is a little error, is on the one hand another aspect J class power caused by the simulation model of transistor and the error of realistic model Amplifier possesses biggish design space, these deviations influence very little to output performance very much, can ignore.

Fig. 5 is impedance of fundamental frequency and second harmonic the impedance track in Smith's original image that output matching network 3 synthesizes.It can be with The impedance operator of obvious discovery J power-like amplifier: impedance of fundamental frequency includes induction reactance ingredient, and second harmonic impedance is approximate pure appearance It is anti-, meet the impedance feature of J power-like amplifier.

Fig. 6 be input matching network 1 synthesize input impedance in working band with the input impedance target value of acquisition Result of variations, it is evident that the input of synthesis and target value are very close to and as target value changes in working band.

Fig. 7 is drain voltage, current waveform of the broadband high-efficiency J power-like amplifier at 3.5GHz of design, can be with It was found that voltage, current waveform are all approximate semisinusoidal waveforms, and voltage, current waveform are not overlapped, and meet J class power amplification The characteristics of device.

Fig. 8 is the big signal results that the broadband high-efficiency J power-like amplifier of design emulates in ADS.2.8~ In 3.8GHz bandwidth, power added efficiency (PAE) has been above 70%, and all in 40dBm or more, gain is also above output power 11dB。

The above description of the embodiment is only used to help understand the method for the present invention and its core ideas.It should be pointed out that pair For those skilled in the art, without departing from the principle of the present invention, the present invention can also be carried out Some improvements and modifications, these improvements and modifications also fall within the scope of protection of the claims of the present invention.To these embodiments A variety of modifications are it will be apparent that General Principle defined herein can be for those skilled in the art It is realized in other embodiments in the case where not departing from the spirit or scope of the present invention.Therefore, the present invention is not intended to be limited to These embodiments shown in the application, and be to fit to consistent with principle disclosed in the present application and features of novelty widest Range.