阅读说明：本技术 一种cpu和gpu数据交互的方法、装置、设备及可读介质 (Method, device and equipment for data interaction between CPU and GPU and readable medium ) 是由 高波 于 2021-07-16 设计创作，主要内容包括：本发明提供了一种CPU和GPU数据交互的方法、装置、设备及可读介质,该方法包括：将CPU和GPU通过嵌入在全局共享LLC中的全局一致性控制器连接在一起；响应于CPU和/或GPU的本地一致性控制器接收到数据交互的请求,判断本地一致性控制器是否能够完成请求；响应于本地一致性控制器不能够完成请求,将请求转发到全局一致性控制器；全局一致性控制器将接收到的请求发送到另一个设备的本地一致性控制器完成一致性请求。通过使用本发明的方案,能够解决GPU获取CPU缓存的数据块时都必须从CPU中检索的问题,能够提高数据处理速度。(The invention provides a method, a device, equipment and a readable medium for data interaction between a CPU and a GPU, wherein the method comprises the following steps: connecting a CPU and a GPU together through a global consistency controller embedded in a global shared LLC; responding to a request of data interaction received by a local consistency controller of a CPU and/or a GPU, and judging whether the local consistency controller can complete the request; in response to the local coherence controller being unable to complete the request, forwarding the request to the global coherence controller; the global coherence controller sends the received request to a local coherence controller of another device to complete the coherence request. By using the scheme of the invention, the problem that the GPU needs to retrieve the data block cached by the CPU when acquiring the data block can be solved, and the data processing speed can be improved.)

1. A method for data interaction between a CPU and a GPU is characterized by comprising the following steps:

connecting a CPU and a GPU together through a global consistency controller embedded in a global shared LLC;

responding to a request of data interaction received by a local consistency controller of a CPU and/or a GPU, and judging whether the local consistency controller can complete the request;

in response to a local coherence controller being unable to complete a request, forwarding a request to the global coherence controller;

the global coherence controller sends the received request to a local coherence controller of another device to fulfill the coherence request.

2. The method of claim 1, wherein the request for data interaction comprises CPU write data, CPU read data, GPU write data, and GPU read data.

3. The method of claim 2, further comprising:

in response to receiving a request for a CPU to write first data, the CPU sends an Upg request for the first data to a local coherency controller of the CPU;

a local coherence controller of the CPU forwards the Upg request to the global coherence controller;

the global consistency controller responds to the Ack to a local consistency controller of the CPU;

the CPU's local coherency controller responds to the Ack to update the first data to the CPU's local cache.

4. The method of claim 3, wherein forwarding requests to the global coherence controller comprises: in response to receiving a request for the GPU to read the first data, the GPU sends a GetV request for the first data to a local L2 controller of the GPU; the local L2 controller of the GPU forwards the GetV request to a global consistency controller;

the global coherence controller sending the received request to a local coherence controller of another device to complete a coherence request includes: the global consistency controller judges whether the data block of the first data is in a modification state in the CPU; in response to the data block of the first data being in a modified state in the CPU, the global consistency controller sending a Fwd-GetS request to a local consistency controller of the CPU; the local coherence controller of the CPU forwards the Fwd-GetS request to L1 of the CPU containing the data block of the first data; the L1 of the CPU forwards a data block containing the first data to the global consistency controller through a local consistency controller of the CPU; the global coherency controller forwards a data block including the first data into a GPU.

5. The method of claim 2, wherein forwarding requests to the global coherence controller comprises: in response to receiving a request for the GPU to write the second data, the GPU sends a GetO request to a local L2 controller of the GPU; the local L2 controller of the GPU forwards the GetO request to the global coherency controller;

the global coherence controller sending the received request to a local coherence controller of another device to complete a coherence request includes: judging whether the second data is cached in the CPU or not; in response to the second data being cached in the CPU, the global consistency controller sends an invalid data request to a local consistency controller of the CPU; and after the second data cache in the CPU is invalid, the global consistency controller sends the second data to the GPU.

6. The method of claim 5, wherein forwarding requests to the global coherence controller comprises: in response to receiving a request for reading the second data by the CPU, the CPU sends a GetS request to a local consistency controller of the CPU; the local consistency controller of the CPU forwards the GetS request to a global consistency controller;

the global coherence controller sending the received request to a local coherence controller of another device to complete a coherence request includes: judging whether the data block of the second data is in the GPU; in response to the data block of the second data being in the GPU, the global coherency controller sending a request to write back a dirty block to a local L2 controller of the GPU; the GPU's local L2 controller sends a request to write back dirty blocks to the GPU's local L1 controller; the local L1 controller of the GPU writes the second data and the dirty blocks back to the local L2 controller of the GPU; the local L2 controller of the GPU writes the second data and dirty blocks back to the global coherency controller; the global coherency controller forwards the second data and the dirty block to the CPU.

7. The method of claim 5, further comprising:

and responding to the second data not cached in the CPU, the GPU reads the second data from the memory and writes the second data into a cache of the GPU.

8. An apparatus for CPU and GPU data interaction with coherency domains, the apparatus comprising:

a connection module configured to connect the CPU and the GPU together through a global coherency controller embedded in a global shared LLC;

the judging module is configured to respond to a request of data interaction received by a local consistency controller of the CPU and/or the GPU and judge whether the local consistency controller can complete the request;

a forwarding module configured to forward a request to the global coherence controller in response to a local coherence controller being unable to complete a request;

a sending module configured to send the received request to a local consistency controller of another device by the global consistency controller to complete a consistency request.

9. A computer device, comprising:

at least one processor; and

a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of the method of any one of claims 1 to 7.

10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 7.

Technical Field

The field relates to the field of computers, and more particularly to a method, device, equipment and readable medium for data interaction of a CPU and a GPU.

Background

Today's servers contain not only traditional CPUs (central processing units) but also a variety of accelerators, the most prominent of which is the Graphics Processor (GPU). The CPU and GPU may be tightly integrated, sharing the same physical memory, each CPU and GPU may have multiple cores, each core may have a private L1 cache (level one cache) and a shared L2 cache (level 2 cache). How to keep the cache of the CPU and the GPU consistent under the shared memory system is one of the important design considerations. One simple way to achieve CPU-GPU coherency in a multichip system is to selectively cache GPUs. Any data mapped to CPU memory is not cached in the GPU. In addition, data currently cached in the CPU in the GPU memory is not cached in the GPU. To implement this strategy, the GPU maintains a coarse-grained remote directory for recording the data currently cached by the CPU. This coarse-grained region is inserted into the remote directory each time the CPU accesses a GPU memory block. If the GPU is caching this cache line, then this cache line will be flushed. Any location in the remote directory is not cached in the GPU. However, the simple scheme described above may incur a significant penalty because any location in the CPU that is cached must be retrieved from the CPU.

Disclosure of Invention

In view of this, embodiments of the present invention provide a method, an apparatus, a device, and a readable medium for data interaction between a CPU and a GPU, which can solve the problem that a GPU needs to retrieve a data block cached by the CPU from the CPU when acquiring the data block, and can improve data processing speed.

In view of the above, an aspect of the embodiments of the present invention provides a method for data interaction between a CPU and a GPU, including the following steps:

connecting a CPU and a GPU together through a global consistency controller embedded in a global shared LLC;

responding to a request of data interaction received by a local consistency controller of a CPU and/or a GPU, and judging whether the local consistency controller can complete the request;

in response to the local coherence controller being unable to complete the request, forwarding the request to the global coherence controller;

the global coherence controller sends the received request to a local coherence controller of another device to complete the coherence request.

According to one embodiment of the invention, the request for data interaction includes CPU write data, CPU read data, GPU write data, and GPU read data.

According to an embodiment of the invention, the method further comprises:

in response to receiving a request for the CPU to write the first data, the CPU sends an Upg request for the first data to a local coherency controller of the CPU;

the local coherence controller of the CPU forwards the Upg request to the global coherence controller;

the global consistency controller responds to the Ack to a local consistency controller of the CPU;

the CPU's local coherency controller responds to the Ack to update the first data to the CPU's local cache.

According to one embodiment of the invention, forwarding requests to the global coherence controller comprises: in response to receiving a request for the GPU to read the first data, the GPU sends a GetV request for the first data to a local L2 controller of the GPU; the local L2 controller of the GPU forwards the GetV request to the global consistency controller;

the global coherence controller sending the received request to a local coherence controller of another device to complete a coherence request includes: the global consistency controller judges whether a data block of the first data is in a modification state in the CPU; responding to the condition that the data block of the first data is in a modification state in the CPU, and sending an Fwd-GetS request to a local consistency controller of the CPU by the global consistency controller; the CPU's local coherence controller forwards the Fwd-GetS request to the CPU's L1 containing the data block of the first data; the L1 of the CPU forwards the data block containing the first data to the global consistency controller through the local consistency controller of the CPU; the global coherency controller forwards a data block containing the first data into the GPU.

According to one embodiment of the invention, forwarding requests to the global coherence controller comprises: in response to receiving a request for the GPU to write the second data, the GPU sends a GetO request to a local L2 controller of the GPU; the local L2 controller of the GPU forwards the GetO request to the global coherency controller;

the global coherence controller sending the received request to a local coherence controller of another device to complete a coherence request includes: judging whether the second data is cached in the CPU; responding to the second data cached in the CPU, the global consistency controller sends an invalid data request to a local consistency controller of the CPU; and after the second data cache in the CPU is invalid, the global consistency controller sends the second data to the GPU.

According to one embodiment of the invention, forwarding requests to the global coherence controller comprises: in response to receiving a request for reading the second data by the CPU, the CPU sends a GetS request to a local consistency controller of the CPU; the local consistency controller of the CPU forwards the GetS request to the global consistency controller;

the global coherence controller sending the received request to a local coherence controller of another device to complete a coherence request includes: judging whether the data block of the second data is in the GPU; in response to the data block of the second data being in the GPU, the global coherency controller sending a request to write back the dirty block to a local L2 controller of the GPU; the GPU's local L2 controller sends a request to write back dirty blocks to the GPU's local L1 controller; the local L1 controller of the GPU writes the second data and the dirty blocks back to the local L2 controller of the GPU; the local L2 controller of the GPU writes the second data and dirty blocks back to the global coherency controller; the global coherency controller forwards the second data and the dirty block to the CPU.

According to an embodiment of the present invention, further comprising:

and responding to the second data not cached in the CPU, the GPU reads the second data from the memory and writes the second data into the cache of the GPU.

In another aspect of the embodiments of the present invention, there is also provided an apparatus for data interaction between a CPU and a GPU, the apparatus including:

a connection module configured to connect the CPU and the GPU together through a global coherency controller embedded in a global shared LLC;

the judging module is configured to respond to a request of data interaction received by a local consistency controller of the CPU and/or the GPU and judge whether the local consistency controller can complete the request;

a forwarding module configured to forward the request to the global coherence controller in response to the local coherence controller being unable to complete the request;

and the sending module is configured to send the received request to a local consistency controller of another device by the global consistency controller to complete the consistency request.

In another aspect of an embodiment of the present invention, there is also provided a computer apparatus including:

at least one processor; and

a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of any of the methods described above.

In another aspect of the embodiments of the present invention, there is also provided a computer-readable storage medium storing a computer program, which when executed by a processor implements the steps of any one of the above-mentioned methods.

The invention has the following beneficial technical effects: according to the method for data interaction between the CPU and the GPU, the CPU and the GPU are connected together through a global consistency controller embedded in a global shared LLC; responding to a request of data interaction received by a local consistency controller of a CPU and/or a GPU, and judging whether the local consistency controller can complete the request; in response to the local coherence controller being unable to complete the request, forwarding the request to the global coherence controller; the technical scheme that the global consistency controller sends the received request to the local consistency controller of another device to complete the consistency request can solve the problem that the GPU needs to retrieve from the CPU when acquiring the data block cached by the CPU, and can improve the data processing speed.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.

FIG. 1 is a schematic flow chart diagram of a method of CPU and GPU data interaction with coherency domains in accordance with one embodiment of the present invention;

FIG. 2 is a schematic diagram of a heterogeneous system block diagram with multiple cache coherency domains, according to one embodiment of the invention;

FIG. 3 is a schematic diagram of an apparatus for CPU and GPU data interaction with coherency domains according to one embodiment of the present invention;

FIG. 4 is a schematic diagram of a computer device according to one embodiment of the present invention;

fig. 5 is a schematic diagram of a computer-readable storage medium according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.

In view of the above, a first aspect of the embodiments of the present invention provides an embodiment of a method for data interaction between a CPU and a GPU. Fig. 1 shows a schematic flow diagram of the method.

As shown in fig. 1, the method may include the steps of:

s1 connects the CPU and GPU together through a global coherency controller embedded in a global shared LLC (last level cache).

The CPU implements MSI directory protocol, the GPU implements LRCC protocol (namely GPU is responsible for disabling own cache block), the global consistency controller is used for processing consistency requests initiated by a local consistency controller of the equipment, the local consistency controllers of the CPU and the GPU are connected with the global consistency controller through a protocol bridge, and the protocol bridge is used as a translation between interfaces of the local consistency controller and the global consistency controller, plays a role in selecting proper global consistency requests to send to the global consistency controller and properly interpreting global consistency responses to the local consistency controller.

S2, responding to the request of data interaction received by the local consistency controller of the CPU and/or the GPU, judging whether the local consistency controller can complete the request.

The request of data interaction comprises CPU write data, CPU read data, GPU write data and GPU read data, and if the request of data interaction is received, a local consistency controller in the equipment is tried to complete the request.

S3 forwards the request to the global coherence controller in response to the local coherence controller being unable to complete the request.

S4 the global coherence controller sends the received request to a local coherence controller of another device to complete the coherence request.

If a request that cannot be fully satisfied locally is forwarded to the global coherence controller via the protocol bridge, the global coherence controller forwards the request to the local coherence controllers of the other devices. After servicing the forwarded request, the local controller responds to the global coherence controller, which in turn forwards the response to the requester, see the system block diagram of FIG. 2.

The technical scheme of the invention uses the protocol bridge as the translation between the interfaces of the local consistency controller and the global consistency controller, undertakes to select a proper global consistency request to send to the global consistency controller, properly explains the role of the global consistency response to the local consistency controller, processes the consistency request initiated by the local consistency controller of the equipment through the global consistency controller, maintains the cache consistency of the CPU and the GPU heterogeneous system through a hierarchical consistency protocol, solves the problem that the GPU must be retrieved from the CPU when acquiring the data block cached by the CPU, and improves the data processing speed.

By the technical scheme of the invention, the problem that the GPU needs to retrieve the data block cached by the CPU when acquiring the data block can be solved, and the data processing speed can be improved.

In a preferred embodiment of the present invention, the request for data interaction includes CPU write data, CPU read data, GPU write data, and GPU read data.

In a preferred embodiment of the invention, the method further comprises:

in response to receiving a request for the CPU to write the first data, the CPU sends an Upg request (update request) for the first data to a local coherency controller of the CPU;

the local coherence controller of the CPU forwards the Upg request to the global coherence controller;

the global consistency controller responds to Ack (acknowledge character) to the local consistency controller of the CPU;

the CPU's local coherency controller responds to the Ack to update the first data to the CPU's local cache. Although the first data is cached in the GPU, the global coherency controller does not need to forward the Upg request to the GPU because the LRCC protocol on the GPU ensures that the first data will be self-invalidated.

In a preferred embodiment of the present invention, forwarding requests to the global coherence controller comprises: in response to receiving a request for the GPU to read the first data, the GPU sends a GetV request for the first data (a request for valid data) to a local L2 controller of the GPU; the local L2 controller of the GPU forwards the GetV request to the global consistency controller;

the global coherence controller sending the received request to a local coherence controller of another device to complete a coherence request includes: the global consistency controller judges whether a data block of the first data is in a modification state in the CPU; in response to the data block of the first data being in a modified state in the CPU, the global coherence controller sends a Fwd-GetS request (forward request for shared data) to a local coherence controller of the CPU; the CPU's local coherence controller forwards the Fwd-GetS request to the CPU's L1 containing the data block of the first data; the L1 of the CPU forwards the data block containing the first data to the global consistency controller through the local consistency controller of the CPU; the global coherency controller forwards a data block containing the first data into the GPU.

In a preferred embodiment of the present invention, forwarding requests to the global coherence controller comprises: in response to receiving a request for the GPU to write the second data, the GPU issues a GetO request (request for ownership) to the local L2 controller of the GPU; the local L2 controller of the GPU forwards the GetO request to the global coherency controller;

the global coherence controller sending the received request to a local coherence controller of another device to complete a coherence request includes: judging whether the second data is cached in the CPU; responding to the second data cached in the CPU, the global consistency controller sends an invalid data request to a local consistency controller of the CPU; and after the second data cache in the CPU is invalid, the global consistency controller sends the second data to the GPU.

In a preferred embodiment of the present invention, forwarding requests to the global coherence controller comprises: in response to receiving a request for the CPU to read the second data, the CPU sends a GetS request (request to share data) to a local coherence controller of the CPU; the local consistency controller of the CPU forwards the GetS request to the global consistency controller;

the global coherence controller sending the received request to a local coherence controller of another device to complete a coherence request includes: judging whether the data block of the second data is in the GPU; in response to the data block of the second data being in the GPU, the global coherency controller sending a request to write back the dirty block to a local L2 controller of the GPU; the GPU's local L2 controller sends a request to write back dirty blocks to the GPU's local L1 controller; the local L1 controller of the GPU writes the second data and the dirty blocks back to the local L2 controller of the GPU; the local L2 controller of the GPU writes the second data and dirty blocks back to the global coherency controller; the global coherency controller forwards the second data and the dirty block to the CPU.

In a preferred embodiment of the present invention, the method further comprises:

and responding to the second data not cached in the CPU, the GPU reads the second data from the memory and writes the second data into the cache of the GPU.

By the technical scheme of the invention, the problem that the GPU needs to retrieve the data block cached by the CPU when acquiring the data block can be solved, and the data processing speed can be improved.

It should be noted that, as will be understood by those skilled in the art, all or part of the processes in the methods of the above embodiments may be implemented by instructing relevant hardware through a computer program, and the above programs may be stored in a computer-readable storage medium, and when executed, the programs may include the processes of the embodiments of the methods as described above. The storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), or the like. The embodiments of the computer program may achieve the same or similar effects as any of the above-described method embodiments.

Furthermore, the method disclosed according to an embodiment of the present invention may also be implemented as a computer program executed by a CPU, and the computer program may be stored in a computer-readable storage medium. The computer program, when executed by the CPU, performs the above-described functions defined in the method disclosed in the embodiments of the present invention.

In view of the above object, according to a second aspect of the embodiments of the present invention, there is provided an apparatus for data interaction between a CPU and a GPU, as shown in fig. 3, the apparatus 200 includes:

a connection module configured to connect the CPU and the GPU together through a global coherency controller embedded in a global shared LLC;

the judging module is configured to respond to a request of data interaction received by a local consistency controller of the CPU and/or the GPU and judge whether the local consistency controller can complete the request;

a forwarding module configured to forward the request to the global coherence controller in response to the local coherence controller being unable to complete the request;

and the sending module is configured to send the received request to a local consistency controller of another device by the global consistency controller to complete the consistency request.

In view of the above object, a third aspect of the embodiments of the present invention provides a computer device. Fig. 4 is a schematic diagram of an embodiment of a computer device provided by the present invention. As shown in fig. 4, an embodiment of the present invention includes the following means: at least one processor S21; and a memory S22, the memory S22 storing computer instructions S23 executable on the processor, the instructions when executed by the processor implementing the method of:

connecting a CPU and a GPU together through a global consistency controller embedded in a global shared LLC;

responding to a request of data interaction received by a local consistency controller of a CPU and/or a GPU, and judging whether the local consistency controller can complete the request;

in response to the local coherence controller being unable to complete the request, forwarding the request to the global coherence controller;

the global coherence controller sends the received request to a local coherence controller of another device to complete the coherence request.

In a preferred embodiment of the present invention, the request for data interaction includes CPU write data, CPU read data, GPU write data, and GPU read data.

In a preferred embodiment of the present invention, determining whether the local consistency controller is capable of completing the request in response to the local consistency controller of the CPU and/or the GPU receiving the request for data interaction comprises:

in response to receiving a request for the CPU to write the first data, the CPU sends an Upg request for the first data to a local coherency controller of the CPU;

the local coherence controller of the CPU forwards the Upg request to the global coherence controller;

the global consistency controller responds to the Ack to a local consistency controller of the CPU;

the CPU's local coherency controller responds to the Ack to update the first data to the CPU's local cache.

In a preferred embodiment of the invention, the method further comprises:

in response to receiving a request for the GPU to read the first data, the GPU sends a GetV request for the first data to a local L2 controller of the GPU;

the local L2 controller of the GPU forwards the GetV request to the global consistency controller;

the global consistency controller judges whether a data block of the first data is in a modification state in the CPU;

responding to the condition that the data block of the first data is in a modification state in the CPU, and sending an Fwd-GetS request to a local consistency controller of the CPU by the global consistency controller;

the CPU's local coherence controller forwards the Fwd-GetS request to the CPU's L1 containing the data block of the first data;

the L1 of the CPU forwards the data block containing the first data to the global consistency controller through the local consistency controller of the CPU;

the global coherency controller forwards a data block containing the first data into the GPU.

In a preferred embodiment of the present invention, forwarding requests to the global coherence controller comprises: in response to receiving a request for the GPU to write the second data, the GPU sends a GetO request to a local L2 controller of the GPU; the local L2 controller of the GPU forwards the GetO request to the global coherency controller;

the global coherence controller sending the received request to a local coherence controller of another device to complete a coherence request includes: judging whether the second data is cached in the CPU; responding to the second data cached in the CPU, the global consistency controller sends an invalid data request to a local consistency controller of the CPU; and after the second data cache in the CPU is invalid, the global consistency controller sends the second data to the GPU.

In a preferred embodiment of the present invention, forwarding requests to the global coherence controller comprises: in response to receiving a request for reading the second data by the CPU, the CPU sends a GetS request to a local consistency controller of the CPU; the local consistency controller of the CPU forwards the GetS request to the global consistency controller;

the global coherence controller sending the received request to a local coherence controller of another device to complete a coherence request includes: judging whether the data block of the second data is in the GPU; in response to the data block of the second data being in the GPU, the global coherency controller sending a request to write back the dirty block to a local L2 controller of the GPU; the GPU's local L2 controller sends a request to write back dirty blocks to the GPU's local L1 controller; the local L1 controller of the GPU writes the second data and the dirty blocks back to the local L2 controller of the GPU; the local L2 controller of the GPU writes the second data and dirty blocks back to the global coherency controller; the global coherency controller forwards the second data and the dirty block to the CPU.

In a preferred embodiment of the present invention, the method further comprises:

and responding to the second data not cached in the CPU, the GPU reads the second data from the memory and writes the second data into the cache of the GPU.

In view of the above object, a fourth aspect of the embodiments of the present invention proposes a computer-readable storage medium. FIG. 5 is a schematic diagram illustrating an embodiment of a computer-readable storage medium provided by the present invention. As shown in fig. 5, the computer readable storage medium S31 stores a computer program S32 which, when executed by a processor, performs the method as described above.

Furthermore, the methods disclosed according to embodiments of the present invention may also be implemented as a computer program executed by a processor, which may be stored in a computer-readable storage medium. Which when executed by a processor performs the above-described functions defined in the methods disclosed in embodiments of the invention.

Further, the above method steps and system elements may also be implemented using a controller and a computer readable storage medium for storing a computer program for causing the controller to implement the functions of the above steps or elements.

Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.

In one or more exemplary designs, the functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, Digital Versatile Disc (DVD), floppy disk, blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.

It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.

The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.

It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.

Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.