Multi-phase-based multi-combination power amplifier method and device

文档序号：1819568 发布日期：2021-11-09 浏览：25次中文

阅读说明：本技术 基于多相位的多合体功率放大器方法及装置 (Multi-phase-based multi-combination power amplifier method and device ) 是由成千福蔡华王光健于 2020-05-09 设计创作，主要内容包括：本申请公开了一种基于多相位的多合体功率放大器控制方法和装置,获取基带信号；根据基带信号生成两路矢量信号,两路矢量信号分别包括相位信号和幅度信号,两路矢量信号为非正交的信号；根据两路矢量信号的幅度信号的量化编码获得目标功率放大器的幅度控制信号,目标功率放大器包括主功放和辅功放,主功放和辅功放分别包括多个工作单元；根据两路矢量信号的相位信号获得目标功率放大器的相位控制信号；根据相位控制信号和幅度控制信号控制主功放和辅功放的多个工作单元输出功率信号。通过该方法能够有效解决宽带调制信号下功率放大器性能恶化的问题。(The application discloses a multi-phase-based multi-complex power amplifier control method and device, which are used for acquiring baseband signals; generating two paths of vector signals according to the baseband signals, wherein the two paths of vector signals respectively comprise phase signals and amplitude signals, and the two paths of vector signals are non-orthogonal signals; obtaining an amplitude control signal of a target power amplifier according to quantization coding of amplitude signals of the two paths of vector signals, wherein the target power amplifier comprises a main power amplifier and an auxiliary power amplifier, and the main power amplifier and the auxiliary power amplifier respectively comprise a plurality of working units; obtaining a phase control signal of the target power amplifier according to the phase signals of the two paths of vector signals; and controlling the output power signals of the working units of the main power amplifier and the auxiliary power amplifier according to the phase control signal and the amplitude control signal. The method can effectively solve the problem of performance deterioration of the power amplifier under the broadband modulation signal.)

1. A method for controlling a multi-junction power amplifier based on multiple phases, the method comprising:

obtaining a baseband signal;

generating two paths of vector signals according to the baseband signals, wherein the two paths of vector signals respectively comprise phase signals and amplitude signals, and the two paths of vector signals are non-orthogonal signals;

obtaining an amplitude control signal of a target power amplifier according to quantization coding of amplitude signals of the two paths of vector signals, wherein the target power amplifier comprises a main power amplifier and an auxiliary power amplifier, and the main power amplifier and the auxiliary power amplifier respectively comprise a plurality of working units;

obtaining a phase control signal of the target power amplifier according to the phase signals of the two paths of vector signals;

and controlling a plurality of working units of the main power amplifier and the auxiliary power amplifier to output power signals according to the phase control signal and the amplitude control signal.

2. The method of claim 1, wherein the two paths of vector signals correspond to amplitude signals (p)₁,ρ₂) The amplitude control signal obtained from the quantization coding of the amplitude signal comprises an amplitude control signal (ACW1, ACW2) of the main power amplifier and an amplitude control signal (ACW3, ACW4) of the auxiliary power amplifier.

3. The method according to claim 1 or 2, wherein the two vector signals correspond to a phase signal of (φ)_m,φ_m+1) The phase control signal obtained from the phase signal isAndwhereinFrom M non-orthogonal discrete phase bases according to said phase signalAnd selecting M as an integer larger than 1, wherein M is more than or equal to 1 and less than M, and M is an integer.

4. The method of claim 3, wherein said controlling the plurality of working unit output power signals of the main power amplifier and the auxiliary power amplifier according to the phase control signal and the amplitude control signal comprises:

according toThe phase control signalAndand the amplitude control signal (ACW1, ACW2) of the main power amplifier controls a plurality of first working units in the main power amplifier to output power signals, wherein the first working units are composed of a plurality of main power amplifier units;

according to the phase control signalAndand the amplitude control signals (ACW3, ACW4) of the auxiliary power amplifier control a plurality of second working units in the auxiliary power amplifier to output power signals, and the second working units are composed of a plurality of auxiliary power amplifier units.

5. The method of claim 4, wherein the plurality of first operating units comprises a first unit and a second unit, and wherein the controlling of the phase is based on the phase control signalAndand the amplitude control signal (ACW1, ACW2) of the main power amplifier controls a plurality of first working units in the main power amplifier, comprising:

according to phase-base signalsAndrespectively control the stationsThe initial positions of a plurality of main power amplifier unit switches in the first unit and the second unit;

and respectively controlling output power signals of a plurality of auxiliary power amplification units in the first unit and the second unit according to amplitude control signals ACW1 and ACW2 of a main power amplifier.

6. The method of claim 4, wherein the plurality of second working units comprises a third unit and a fourth unit, and wherein the controlling of the phase is based on the phase control signalAndand the amplitude control signal (ACW3, ACW4) of the auxiliary power amplifier controls a plurality of second working units in the auxiliary power amplifier, including:

according to phase-base signalsAndrespectively controlling the starting positions of a plurality of auxiliary power amplification unit switches in the third unit and the fourth unit;

and respectively controlling output power signals of a plurality of auxiliary power amplification units in the third unit and the fourth unit according to amplitude control signals ACW3 and ACW4 of auxiliary power amplifiers.

7. The method of claim 5 or 6, wherein when the amplitude signal is smaller than a first preset threshold, the controlling the output power signals of the plurality of main power amplification units in the first unit and the second unit according to the amplitude control signals ACW1 and ACW2 of the main power amplifiers comprises:

controlling a plurality of main power amplification units in the first unit and the second unit to work at a first power, wherein the first power is smaller than a second power, and the second power is the highest power in a low-voltage mode;

the controlling the output power signals of a plurality of auxiliary power amplifier units in the third unit and the fourth unit according to the amplitude control signals ACW3 and ACW4 of the auxiliary power amplifiers respectively comprises:

and controlling to close the plurality of auxiliary power amplification units in the third unit and the fourth unit.

8. The method according to any one of claims 5-7, wherein when the amplitude signal is less than a second preset threshold and not less than a first preset threshold, the controlling the output power signals of the plurality of main power amplification units in the first unit and the second unit according to the amplitude control signals ACW1 and ACW2 of the main power amplifiers comprises:

controlling a plurality of main power amplification units in the first unit and the second unit to work at the second power;

and controlling a plurality of auxiliary power amplification units in the third unit and the fourth unit to work at the first power.

9. The method according to any of claims 5-8, wherein when the amplitude signal is less than a third preset threshold and not less than a second preset threshold, the controlling the output power signals of the plurality of main power amplifier units in the first unit and the second unit according to the amplitude control signals ACW1 and ACW2 of the main power amplifier respectively comprises:

controlling a plurality of main power amplifier units in the first unit and the second unit to work at a third power, wherein the third power is greater than the second power and smaller than a fourth power, and the fourth power is the highest power in a high-voltage mode;

and controlling a plurality of auxiliary power amplification units in the third unit and the fourth unit to work at the second power.

10. The method according to any of claims 5-9, wherein said controlling the output power signals of the plurality of main power amplifier units in the first unit and the second unit according to the amplitude control signals ACW1 and ACW2 of the main power amplifier, respectively, when the amplitude signal is not less than a fourth preset threshold value, comprises:

controlling a plurality of main power amplification units in the first unit and the second unit to work at the fourth power;

and controlling a plurality of auxiliary power amplification units in the third unit and the fourth unit to work at the third power.

11. The method according to any of claims 1-10, characterized in that at least one set of the amplitude control signals (ACW1, ACW2) and (ACW3, ACW4) are different control signals.

12. The method according to any of claims 1-11, wherein after generating two-way vector signals from the baseband signal, the method further comprises:

carrying out nonlinear compensation on the two paths of vector signals to obtain an updated phase signal and an updated amplitude signal, wherein the updated phase signal is used for obtaining a phase control signal of the target power amplifier; and the updated amplitude signal is used for carrying out quantization coding to obtain an amplitude control signal of the target power amplifier.

13. An electronic device, characterized in that the device comprises a signal processing module and an amplification module connected to each other, wherein:

the signal processing module is used for acquiring a baseband signal; generating two paths of vector signals according to the baseband signals, wherein the two paths of vector signals respectively comprise phase signals and amplitude signals, and the two paths of vector signals are non-orthogonal signals;

the signal processing module is further configured to obtain an amplitude control signal of a target power amplifier according to the quantization coding of the amplitude signals of the two paths of vector signals, and obtain a phase control signal of the target power amplifier according to the phase signals of the two paths of vector signals; the target power amplifier comprises a main power amplifier and an auxiliary power amplifier, and the main power amplifier and the auxiliary power amplifier respectively comprise a plurality of working units;

and the amplifying module is used for controlling the plurality of working units of the main power amplifier and the auxiliary power amplifier to output power signals according to the phase control signal and the amplitude control signal.

14. The apparatus of claim 13, wherein the two paths of vector signals correspond to amplitude signals (p)₁,ρ₂) The amplitude control signal obtained from the quantization coding of the amplitude signal comprises an amplitude control signal (ACW1, ACW2) of the main power amplifier and an amplitude control signal (ACW3, ACW4) of the auxiliary power amplifier.

15. The apparatus according to claim 13 or 14, wherein the two vector signals correspond to a phase signal of (Φ)_m,φ_m+1) The phase control signal obtained from the phase signal isAndwhereinIs from M non-positive according to the phase signalA.c. discrete phase baseAnd selecting M as an integer larger than 1, wherein M is more than or equal to 1 and less than M, and M is an integer.

16. The apparatus of claim 15, wherein the amplification module is specifically configured to:

according to the phase control signalAndand the amplitude control signal (ACW1, ACW2) of the main power amplifier controls a plurality of first working units in the main power amplifier to output power signals, wherein the first working units are composed of a plurality of main power amplifier units;

17. The apparatus of claim 16, wherein the plurality of first working units comprises a first unit and a second unit, and wherein the amplification module is specifically configured to:

according to phase-base signalsAndrespectively controlling the starting positions of a plurality of main power amplification unit switches in the first unit and the second unit;

18. The apparatus according to claim 16, wherein the plurality of second working units includes a third unit and a fourth unit, and the amplification module is specifically configured to:

according to phase-base signalsAndrespectively controlling the starting positions of a plurality of auxiliary power amplification unit switches in the third unit and the fourth unit;

19. The apparatus according to claim 17 or 18, wherein when the amplitude signal is smaller than a first preset threshold, the amplifying module is specifically configured to:

and controlling to close the plurality of auxiliary power amplification units in the third unit and the fourth unit.

20. The apparatus according to any one of claims 17 to 19, wherein when the amplitude signal is less than a second preset threshold and not less than a first preset threshold, the amplifying module is specifically configured to:

controlling a plurality of main power amplification units in the first unit and the second unit to work at the second power;

and controlling a plurality of auxiliary power amplification units in the third unit and the fourth unit to work at the first power.

21. The apparatus according to any one of claims 17 to 20, wherein when the amplitude signal is less than a third preset threshold and not less than a second preset threshold, the amplifying module is specifically configured to:

and controlling a plurality of auxiliary power amplification units in the third unit and the fourth unit to work at the second power.

22. The apparatus according to any one of claims 17 to 21, wherein when the amplitude signal is not less than a fourth preset threshold, the amplifying module is specifically configured to:

controlling a plurality of main power amplification units in the first unit and the second unit to work at the fourth power;

and controlling a plurality of auxiliary power amplification units in the third unit and the fourth unit to work at the third power.

23. An arrangement according to any of claims 13-21, characterized in that at least one of the sets of amplitude control signals (ACW1, ACW2) and (ACW3, ACW4) is a different control signal.

24. The apparatus according to any of claims 13-23, wherein the signal processing module further comprises a mapping module configured to:

25. An electronic apparatus, wherein the apparatus comprises at least one processor coupled with at least one memory:

the at least one processor configured to execute computer programs or instructions stored in the at least one memory to cause the apparatus to perform the method of any of claims 1-12.

26. A readable storage medium storing instructions that, when executed, cause the method of any one of claims 1-12 to be implemented.

Technical Field

The present application relates to the field of communications and electronics technologies, and in particular, to a multi-phase power amplifier method and apparatus.

Background

Modern industry inherently requires high-fidelity transfer of mass information and data with high efficiency, intelligence, and low latency; on the other hand, in order to meet the requirement of future high data rate, a high-order broadband modulation signal is adopted, which results in that the transmitter power amplifier works in a deep back-off region (5 dB-20 dB) for a long time, however, the working efficiency of the traditional PA (power amplifier) in the deep back-off region is lower than about 10%, which makes the traditional power amplifier unable to meet the requirement of the future transmitter system.

In the last decade, the digital power amplifier adjusts the transconductance gm by controlling the effective grid width, so that the power of an output signal is modulated by the digital signal, the bottleneck that the output power of the traditional power amplifier is limited by the input power is overcome, and the contradiction between the efficiency and the linearity of the power amplifier is solved. The digital rectangular power amplifier, the digital polar power amplifier (including a polar Doherty digital power amplifier and a polar Class-G Doherty digital power amplifier), the multiphase technology and the like are proposed and researched, and a potential solution is provided for the digital power amplifier adapting to the broadband high-order modulation signal. However, the existing digital power amplifier still has the problem that the performance of the power amplifier such as efficiency, linearity and the like is deteriorated under a broadband modulation signal.

Disclosure of Invention

The embodiment of the application provides a multi-phase-based multi-complex power amplifier method and device, and aims to solve the problem that the efficiency, the linearity and other performances of a power amplifier are deteriorated under broadband modulation signals.

In a first aspect, a multi-phase based multi-junction power amplifier method is provided, the method comprising:

obtaining a baseband signal;

obtaining a phase control signal of the target power amplifier according to the phase signals of the two paths of vector signals;

In one possible design, the two paths of vector signals correspond to amplitude signals (rho)₁,ρ₂) The amplitude control signal obtained from the quantization coding of the amplitude signal comprises an amplitude control signal (ACW1, ACW2) of the main power amplifier and an amplitude control signal (ACW3, ACW4) of the auxiliary power amplifier.

In one possible design, the two vector signals correspond to a phase signal of (phi)_m,φ_m+1) The phase control signal obtained from the phase signal isAndwhereinFrom M non-orthogonal discrete phase bases according to said phase signalAnd selecting M as an integer larger than 1, wherein M is more than or equal to 1 and less than M, and M is an integer.

In one possible design, the controlling the output power signals of the plurality of working units of the main power amplifier and the auxiliary power amplifier according to the phase control signal and the amplitude control signal includes:

In one possible design, the plurality of first working units includes a first unit and a second unit, and the phase control signal is based on the phase control signalAndand the amplitude control signal (ACW1, ACW2) of the main power amplifier controls a plurality of first working units in the main power amplifier, comprising:

according to phase-base signalsAndrespectively controlling the starting positions of a plurality of main power amplification unit switches in the first unit and the second unit;

At one canIn one embodiment, the plurality of second working units includes a third unit and a fourth unit, and the second working units are controlled according to the phase control signalAndand the amplitude control signal (ACW3, ACW4) of the auxiliary power amplifier controls a plurality of second working units in the auxiliary power amplifier, including:

according to phase-base signalsAndrespectively controlling the starting positions of a plurality of auxiliary power amplification unit switches in the third unit and the fourth unit;

In the embodiment of the application, working units are divided for a main power amplifier and/or an auxiliary power amplifier in a target power amplifier, then output power of the working units is respectively controlled through amplitude control signals obtained through amplitude signals corresponding to two paths of non-orthogonal vector signals, and switching initial positions of the working units are respectively controlled through phase control signals corresponding to adjacent phases obtained according to the two paths of vector signals, so that the control over the target power amplifier overcomes a unit sharing technology, more precise and accurate power control is realized, and the working efficiency of the target power amplifier is improved.

In one possible design, when the amplitude signal is smaller than a first preset threshold, the controlling the output power signals of the plurality of main power amplification units in the first unit and the second unit according to the amplitude control signals ACW1 and ACW2 of the main power amplifier respectively includes:

the controlling the output power signals of the plurality of auxiliary power amplifier units in the third unit and the fourth unit according to the amplitude control signals ACW3 and ACW4 of the auxiliary power amplifier respectively comprises:

and controlling to close the plurality of auxiliary power amplification units in the third unit and the fourth unit.

In a possible design, when the amplitude signal is smaller than a second preset threshold and not smaller than a first preset threshold, the controlling the output power signals of the plurality of main power amplifier units in the first unit and the second unit according to the amplitude control signals ACW1 and ACW2 of the main power amplifier, respectively, includes:

controlling a plurality of main power amplification units in the first unit and the second unit to work at the second power;

and controlling a plurality of auxiliary power amplification units in the third unit and the fourth unit to work at the first power.

In a possible design, when the amplitude signal is smaller than a third preset threshold and not smaller than a second preset threshold, the controlling the output power signals of the plurality of main power amplifier units in the first unit and the second unit according to the amplitude control signals ACW1 and ACW2 of the main power amplifier, respectively, includes:

and controlling a plurality of auxiliary power amplification units in the third unit and the fourth unit to work at the second power.

In one possible design, when the amplitude signal is not less than a fourth preset threshold, the controlling the output power signals of the plurality of main power amplification units in the first unit and the second unit according to the amplitude control signals ACW1 and ACW2 of the main power amplifier respectively includes:

controlling a plurality of main power amplification units in the first unit and the second unit to work at the fourth power;

and controlling a plurality of auxiliary power amplification units in the third unit and the fourth unit to work at the third power.

In one possible design, at least one of the amplitude control signals (ACW1, ACW2) and (ACW3, ACW4) is a different control signal.

In the embodiment of the application, the Class-G technology is combined with the multiphase Doherty PA, so that the main power amplifier and the auxiliary power amplifier can be controlled more precisely and differentially, and the power amplifier can output at least four different powers so as to adapt to different input powers and effectively improve the amplification efficiency of the power amplifier.

In one possible design, after generating two vector signals from the baseband signal, the method further includes:

In the embodiment of the application, power amplification is performed through the Class-G multiphase Doherty PA, on one hand, a plurality of working units in the main power amplifier and the auxiliary power amplifier can be respectively controlled through a multi-phase technology, so that the control accuracy and the control diversity can be improved, the control differentiation can be further improved by combining the Class-G technology, the problem of low amplification efficiency possibly caused by a unit sharing technology is solved, and the working efficiency of the target power amplifier is improved.

In a second aspect, an electronic device is provided, the device comprising a signal processing module and an amplification module connected to each other, wherein:

In one possible design, the two vector signals correspond to a phase signal of (phi)_m,φ_m+1) The phase control signal obtained from the phase signal isAndthe device also comprises a phase module which is respectively connected with the signal processing module and the amplifying module and is used for generating M non-orthogonal discrete phase bases according to the phase signalsSelecting phaseM is an integer greater than 1, M is greater than or equal to 1 and less than M, and M is an integer.

In one possible design, the amplification module is specifically configured to:

In one possible design, the plurality of first working units includes a first unit and a second unit, and the amplifying module is specifically configured to:

according to phase-base signalsAndrespectively controlling the starting positions of a plurality of main power amplification unit switches in the first unit and the second unit;

In one possible design, the plurality of second working units includes a third unit and a fourth unit, and the amplifying module is specifically configured to:

according to phase-base signalsAndrespectively controlling the starting positions of a plurality of auxiliary power amplification unit switches in the third unit and the fourth unit;

In a possible design, when the amplitude signal is smaller than a first preset threshold, the amplifying module is specifically configured to:

and controlling to close the plurality of auxiliary power amplification units in the third unit and the fourth unit.

In a possible design, when the amplitude signal is smaller than a second preset threshold and not smaller than a first preset threshold, the amplifying module is specifically configured to:

controlling a plurality of main power amplification units in the first unit and the second unit to work at the second power;

and controlling a plurality of auxiliary power amplification units in the third unit and the fourth unit to work at the first power.

In a possible design, when the amplitude signal is smaller than a third preset threshold and not smaller than a second preset threshold, the amplifying module is specifically configured to:

and controlling a plurality of auxiliary power amplification units in the third unit and the fourth unit to work at the second power.

In a possible design, when the amplitude signal is not less than a fourth preset threshold, the amplifying module is specifically configured to:

controlling a plurality of main power amplification units in the first unit and the second unit to work at the fourth power;

and controlling a plurality of auxiliary power amplification units in the third unit and the fourth unit to work at the third power.

In one possible design, at least one of the amplitude control signals (ACW1, ACW2) and (ACW3, ACW4) is a different control signal.

In one possible design, the signal processing module further includes a mapping module to:

In a third aspect, an electronic device is provided, the device comprising at least one processor coupled with at least one memory:

the at least one processor is configured to execute computer programs or instructions stored in the at least one memory to cause the apparatus to perform the method according to any of the first aspect.

The device may be a terminal or a chip included in the terminal. The functions of the electronic device may be implemented by hardware, or may be implemented by hardware executing corresponding software, where the hardware or software includes one or more modules corresponding to the functions.

In a fourth aspect, an embodiment of the present application provides a chip system, including: a processor coupled to a memory for storing a program or instructions that, when executed by the processor, cause the system-on-chip to implement the method of the first aspect or any of the possible implementations of the first aspect.

Optionally, the system-on-chip further comprises an interface circuit for interacting code instructions to the processor.

Optionally, the number of processors in the chip system may be one or more, and the processors may be implemented by hardware or software. When implemented in hardware, the processor may be a logic circuit, an integrated circuit, or the like. When implemented in software, the processor may be a general-purpose processor implemented by reading software code stored in a memory.

Optionally, the memory in the system-on-chip may also be one or more. The memory may be integrated with the processor or separate from the processor, which is not limited in this application. For example, the memory may be a non-transitory processor, such as a read only memory ROM, which may be integrated with the processor on the same chip or may be separately disposed on different chips.

In a fifth aspect, embodiments of the present application provide a computer-readable storage medium, on which a computer program or instructions are stored, which, when executed, cause a computer to perform the method of the first aspect or any one of the possible implementation manners of the first aspect.

In a sixth aspect, embodiments of the present application provide a computer program product, which, when read and executed by a computer, causes the computer to execute the method in the first aspect or any possible implementation manner of the first aspect.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required to be used in the embodiments will be briefly described below.

Fig. 1 is a block diagram of a digital rectangular power amplifier system according to an embodiment of the present disclosure;

fig. 2 is a block diagram of a polar power amplifier system according to an embodiment of the present disclosure;

fig. 3A is a flowchart of a control method for a multi-phase-based multi-junction power amplifier according to an embodiment of the present disclosure;

fig. 3B is a schematic diagram of a multi-phase digital power amplifier according to an embodiment of the present disclosure;

fig. 3C is a schematic diagram of a multiphase combiner power amplifier according to an embodiment of the present disclosure;

fig. 4 is a block diagram of an electronic device according to an embodiment of the present disclosure;

fig. 5 is a block diagram of a signal processing module of an electronic device according to an embodiment of the present disclosure;

fig. 6 shows a hardware structure diagram of an electronic device in an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

The technical scheme of the embodiment of the application can be applied to various communication systems, for example: long Term Evolution (LTE) system, LTE Frequency Division Duplex (FDD) system, LTE Time Division Duplex (TDD), Universal Mobile Telecommunications System (UMTS), universal microwave access (WiMAX) communication system, satellite communication, spatial communication, fifth generation (5th generation, 5G) mobile communication system or new radio access technology (NR) or future communication system such as next generation communication technology 6G.

For the understanding of the embodiments of the present application, a digital power amplifier will be first described with reference to fig. 1 and 2.

In order to realize the digitization and integration of the radio frequency front end, a digital rectangular power amplifier is firstly proposed. Referring to fig. 1, fig. 1 is a block diagram of a digital rectangular power amplifier system according to an embodiment of the present invention, as shown in fig. 1, a baseband signal is represented by an in-phase signal (I-path signal) and a quadrature signal (Q-path signal) corresponding to the in-phase signal (I-path signal), I-path signal_BB/Q_BBRaising the signal frequency to an intermediate frequency signal I by means of a rate converter_BBUP/Q_BBUPIntermediate frequency signal I_BBUP/Q_BBUPAnd local oscillation signals are respectively input into a Radio Frequency Digital Analog Converter (RF-DAC) unit, and finally power synthesis is carried out to feed into the antenna. The digital rectangular coordinate power amplifier naturally adapts to broadband modulation signals, and the problem of signal alignment caused by bandwidth expansion does not exist. However, the I and Q signals are combined into a radio frequency vector signal, which has an inherent 3dB loss, and reduces output power and efficiency, which is more obvious in the back-off region.

The advent of digital polar power amplifiers perfectly solved the above problems. Referring to fig. 2, fig. 2 is a block diagram of a polar power amplifier system according to an embodiment of the present application, as shown in fig. 2, a digital baseband signal I_BB/Q_BBThe envelope signal rho and the phase signal theta are converted by a coordinate converter, the envelope signal rho is quantized into amplitude control words, the phase signal modulation local oscillator signal is a phase modulator and is respectively input to an RF-DAC unit to generate a radio frequency vector signal with certain power, and inherent saturation power 3dB loss during orthogonal coordinate framework vector synthesis is avoided. However, the polar-frame coordinate converter generates a severe bandwidth expansion, which causes the phase signal of the broadband modulation signal to require an off-chip phase modulator with a very wide bandwidth; meanwhile, in the RF-DAC unit, a wide bandIt is difficult to align the modulated phase signal with the amplitude signal.

According to the above description, the high-order broadband modulation signal enables the power amplifier in the transmitter to operate in the deep back-off region (5 dB-20 dB) for a long time, however, the operating efficiency of the conventional power amplifier in the deep back-off region is only about 5% -10%. In order to solve the problems of large power dissipation and low efficiency in the back-off region of the multi-phase digital power amplifier, please refer to fig. 3A, where fig. 3A is a flowchart of a control method for a multi-complex power amplifier based on multiple phases according to an embodiment of the present application, as shown in fig. 3A, the method includes the following steps:

101. obtaining a baseband signal, and generating two paths of vector signals according to the baseband signal, wherein the two paths of vector signals respectively comprise a phase signal and an amplitude signal, and the two paths of vector signals are non-orthogonal signals;

102. obtaining an amplitude control signal of a target power amplifier according to quantization coding of amplitude signals of the two paths of vector signals, wherein the target power amplifier comprises a main power amplifier and an auxiliary power amplifier, and the main power amplifier and the auxiliary power amplifier respectively comprise a plurality of working units;

103. obtaining a phase control signal of the target power amplifier according to the phase signals of the two paths of vector signals;

104. and controlling the output power signals of the working units of the main power amplifier and the auxiliary power amplifier according to the phase control signal and the amplitude control signal. The power signal here refers to a signal transmitted with power amplified by the power amplifier, and will not be described in detail below.

The original electrical signal which is sent by a signal source (information source, also called sending end) and is not modulated (spectrum shifting and converting) is a baseband signal, and the signal is characterized by low frequency, and the signal spectrum starts from the vicinity of zero frequency and has a low-pass form.

The baseband signal can be represented by I, Q signals that are 90 ° (quadrature) out of phase, and also by polar coordinates ρ, θ. Real-time signal decomposition and synthesis are carried out by utilizing baseband signal signals to generate two paths of non-orthogonal multiphase vector signals, and the corresponding phases of the two paths of non-orthogonal multiphase vector signals are respectively phi_m,φ_m+1) Corresponding amplitudes are respectively (ρ)₁,ρ₂). If the baseband signal is an I signal and a Q signal, conversion is carried out by adopting a conversion algorithm from a rectangular coordinate to a multiphase vector signal; if the baseband signal is rho and theta signals, conversion is carried out by adopting a conversion algorithm from polar coordinates to multiphase vector signals.

Referring to fig. 3B, fig. 3B is a schematic diagram of a multiphase digital power amplifier according to an embodiment of the present disclosure, as shown in fig. 3B, the digital baseband signals are respectively obtained by vector decomposition to obtain (ρ |)₁，φ_m) And (rho)₂，φ_m+1) Two sets of signals. By (ρ)₁， φ_m) And (rho)₂，φ_m+1) The working state of the power amplifier is controlled and input to the load through the matching network and the power synthesis network. Wherein phi is_mAnd phi_m+1Are adjacent phase base signals. Thus, phase modulation is translated into an on-frequency multiple-phase signal (digital phase modulation) that selects adjacent phases. The multiphase technology overcomes the problem of the limited broadband of a polar coordinate framework and the problem of 3dB loss of vector synthesis saturation power of a rectangular coordinate framework by combining the polar coordinate technology and the outphasing technology, and becomes a favorable competitor of a digital power amplifier scheme. However, limited by the cell sharing technology, the peak output power and the peak efficiency of the digital power amplifier are low, and the efficiency of the 6dB back-off is only about 15%, so that great progress space still exists.

In addition, in the prior art, the power amplifier generally operates in a backoff region of 5dB to 20dB, and in order to improve the backoff efficiency of the digital power amplifier, a multiple-complex (Doherty) technique is proposed to solve the problem of power backoff, that is, in one power amplifier, a main power amplifier (main power amplifier) and an auxiliary power amplifier (auxiliary power amplifier) are included at the same time, or called a carrier power amplifier (carrier power amplifier) and a peak power amplifier (peak power amplifier). The main power amplifier can be a power amplifier biased in class AB, and can work independently when a low-power signal is input and work together with the auxiliary power amplifier when a high-power signal is input. The auxiliary power amplifier can be a B-type or C-type power amplifier, and does not work when a low-power signal is input and works when a high-power signal is input.

Polar Doherty improves the efficiency of the digital power amplifier in the 6dB back-off region. However, the problem of poor wideband adaptability of the transmitter architecture is limited, and the current situation of low efficiency of the power amplifier under the action of the wideband high-order modulation signal still cannot be solved.

Based on this, an embodiment of the present application provides a target digital power amplifier, which includes a main power amplifier and an auxiliary power amplifier, and at least one of the auxiliary power amplifier and the main power amplifier includes two or more working units, for example, the main power amplifier includes two working units, and the auxiliary power amplifier includes one working unit; or the main power amplifier comprises one working unit, and the auxiliary power amplifier comprises two working units; the main power amplifier comprises two working units, and the auxiliary power amplifier comprises two working units. The working unit (cell) may be a set of minimum power amplifier units (unit), for example, one working unit in the main power amplifiers includes 10 main power amplifier units, each main power amplifier unit is used for amplifying carrier power, and each main power amplifier unit may have an independent power supply switch and power supply voltage control, or a plurality of main power amplifier units correspond to one common power supply switch and power supply voltage control. Other components, such as capacitors, resistors, etc., may be included in the working cell.

Referring to fig. 3C specifically, fig. 3C is a schematic diagram of a multiphase multi-complex power amplifier according to an embodiment of the present application, as shown in fig. 3C, a baseband signal, including I and Q signals or a polar coordinate signal, is processed to generate two non-orthogonal multi-phase vector signals (ρ |)₁，φ_m) And (rho)₂，φ_m+1) According to the amplitude signal (p)₁,ρ₂) The amplitude control word may be obtained by quantization coding, e.g. in terms of p₁Obtaining an amplitude control word (ACW1, ACW2) in dependence on p₂An amplitude control word (ACW3, ACW4) is obtained. The carrier power amplifier (main power amplifier) comprises two working units, namely a first unit cell0 and a second unit cell1, and the peak power amplifier (auxiliary power amplifier) comprises two working units, namely a third unit cell2 and a fourth unit cell 3. Wherein, the ACW1 and the ACW2 are used for controlling the output power of the cell0 and the cell1, and the ACW3 and the ACW4 are used for controlling the cell2 and cell 3.

The amplitude control word may be a set of encoded information. Taking the ACW1 as an example, assume that the ACW1 includes 8 bits, of which the lower three bits, i.e., the first, second and third bits, of the ACW1<2:0>Directly controlling the switch on state (on or off) of the LSB main power amplifier unit in the cell0 unit, corresponding to different output powers, ACW1<7:6>And ACW1<5:3>The switching state of a main power amplifier unit of a Most Significant Bit (MSB) in a cell0 is controlled cooperatively, and the switching state corresponds to different output powers; and the LSB can correspond to 2 at most³With 8 on states, the MSB can correspond to 2 at most⁵32 on states. For example, cell0 includes 8 LSB main power amplifier units and 32 MSB main power amplifier units, ACW1<2:0>The values of (d) and LSB switch states are shown in table 1-1:

TABLE 1-1

ACW1<2:0>Value of (A)	LSB switch state
		000	10,000,000
001	01,000,000
		010	00,100,000
011	00,010,000
		100	00,001,000
101	00,000,100
		110	00,000,010
111	00,000,001

The Power Amplifier (PA) shown in fig. 3C may preset the corresponding relationship between the value of the lower three bits of ACW1 and the LSB switch state in the cell0, and then determine the output Power of the LSB according to the obtained value of ACW 1. The LSB switch states are distinguished according to the bit value of "0" or "1" in table 1-1. Assuming that ACW1<2:0> (001), the LBS main power amplifier unit has a switch state of (01,000,000), which indicates that the second LSB main power amplifier unit in cell0 is turned on, and the other LSB main power amplifier units are turned off, and the power amplifier outputs the corresponding power. Or (01,000,000) it can also indicate that the second LSB main power amplifier unit in the cell0 is turned off, and the other LSB main power amplifier units are turned on. The second LSB master power cell may be determined based on cell id or number, or based on the order in which the cells are arranged in cell0, etc.

In the alternative, the value of ACW1<2:0> corresponds to the LSB switch state as shown in tables 1-2:

tables 1 to 2

ACW1<2:0>Value of (A)	LSB switch state
		000	00,000,000
001	01,001,000
		010	00,101,100
011	00,110,110
		100	10,111,001
101	11,100,111
		110	11,111,110
111	11,111,111

As can be seen from tables 1-2, assuming that ACW1<2:0> (001), the LBS main power release off state is (01,001,000), which indicates that any two LSB main power amplification units in cell0 are turned on, and the other LSB main power amplification units are turned off, and the power amplifier outputs the corresponding power. Or it may also indicate that any two LSB main power amplifier units in the cell0 are turned off, and the other LSB main power amplifier units are turned on. Similarly, ACW1<2:0> (000) indicates that all LSB main power amplifier units are turned on or off, and ACW1<2:0> (111) indicates that all LSB main power amplifier units are turned off or on.

Similarly, the corresponding relationship between the value of the rest bits of the ACW1 and the MSB on state in the cell0 may be set, and then the output power of the MSB may be determined according to the obtained value of the ACW 1. The ACW2, ACW3 and ACW4 can also determine the output power of the cell1, cell2 and cell3 in the same way.

In addition, as shown in FIG. 3C, the two paths of vector signals correspond to phase signals of (φ)_m，φ_m+1) According to the two phase signals, quantization coding is carried out to obtain phase control words (PCW1, PCW2), and M non-orthogonal discrete phase bases can be obtained by modulating local oscillation signalsAdjacent phases can be obtained from M non-orthogonal discrete phase bases according to a phase control word (PCW1, PCW2)Wherein M is an integer greater than 1, M is greater than or equal to 1 and less than M, and M is an integer. The phase distance between every two adjacent phases is 2 pi/M, or M non-orthogonal discrete phase bases can be divided unequally, the equal division of the distance is easy to realize, and the unequal division of the distance is flexible, so that the method has the advantages of being free from limitation in the embodiment of the application.

Select out adjacent phasesThen, a phase control signal is generatedAndwhereinUsed for controlling the switch initial positions of a plurality of main power amplification units in the cell0 and the switch initial positions of a plurality of auxiliary power amplification units in the cell2,the method is used for controlling the switch starting positions of a plurality of main power amplification units in the cell1 and the switch starting positions of a plurality of auxiliary power amplification units in the cell 3. E.g. phase control signalsRepresenting the switch starting position ratio cos (omega) in the controlled power amplifier unit₀t) controlled switch start position advance

In an optional case, the two non-orthogonal vector signals have a non-linear characteristic, so that the phase signals (phi) of the two signals which are generated can be respectively subjected to phase matching according to a non-linear mapping table_m,φ_m+1) And amplitude signal (p)₁,ρ₂) And carrying out nonlinear compensation to obtain an updated phase signal, and carrying out quantization coding by adopting the updated phase signal and the updated amplitude signal to obtain a corresponding amplitude control word and a corresponding phase control signal so as to control the memorability of the main power amplifier and the auxiliary power amplifier.

Therefore, in the embodiment of the application, working units are divided for a main power amplifier and/or an auxiliary power amplifier in a target power amplifier, then output powers of the working units are respectively controlled through amplitude control signals obtained through amplitude signals corresponding to two paths of non-orthogonal vector signals, and switching initial positions of the working units are respectively controlled through phase control signals corresponding to adjacent phases obtained according to the two paths of vector signals, so that the control over the target power amplifier overcomes a unit sharing technology, more precise and accurate power control is realized, and the working efficiency of the target power amplifier is improved.

In addition, at least one set of (ACW1, ACW2) and (ACW3, ACW4) in the above description is a different control signal, that is, at least one set of ACW1 ≠ ACW2 and ACW3 ≠ ACW4 is established. If ACW1 is ACW2 and ACW3 is ACW4, it indicates that the amplitude control words corresponding to cell0 and cell1 are the same, the amplitude control words corresponding to cell2 and cell3 are the same, the control results of the main power amplifier units in cell0 and cell1 are the same, and the control results of the auxiliary power amplifier units in cell2 and cell3 are the same, which is equivalent to that no cell division is performed on the main power amplifier and the auxiliary power amplifier, and the problem of low working power of the amplifier caused by the cell sharing technology cannot be solved.

In addition, the digital power amplifier introduces 1 bit (bit) amplitude modulation technology combined with the multi-complex technology, wherein the 1 bit amplitude modulation technology corresponds to a Class G (Class-G) power amplifier, or can be other classes of power amplifiers. And expanding the efficiency enhancement interval of the rollback region through a power supply modulation technology and an active load traction technology. When the power is backed to be 0-6dB, all Vdd powers of the main power amplifier and the auxiliary power amplifier supply power to form Vdd mode Doherty, and when the power is backed to be 6-12dB, all Vdd/2 powers of the main power amplifier and the auxiliary power amplifier supply power to form Vdd/2 mode Doherty. However, it is because the supply voltage is all switched at the same time at 6dB back-off that very large positive/negative spikes are generated, which significantly degrades the linearity of the wideband modulated signal. On the other hand, limited by performance deterioration caused by bandwidth expansion of a Polar coordinate (Polar) architecture, the Polar Class-G Doherty digital power amplifier cannot obtain high performance under a broadband modulation signal.

In the embodiment of the present application, a 1-bit amplitude modulation technique is combined with the multiphase complex PA shown in fig. 3C, where the 1-bit amplitude modulation technique takes a Class-G power amplifier as an example to form a Class-G multiphase doherty PA, a carrier power amplifier and a peak power amplifier respectively include a plurality of working units, each working unit of the carrier power amplifier includes a plurality of main power amplification units, and each working unit of the peak power amplifier includes a plurality of auxiliary power amplification units. The amplitude control signals (ACW1, ACW2) and (ACW3, ACW4) obtained according to the two paths of vector signals can also comprise fields for controlling the working modes of the main power amplification unit or the auxiliary power amplification unit in the plurality of working units, wherein the working modes comprise the working mode of Class-G.

The amplitude signals corresponding to the two paths of vector signals are rho₁And ρ₂According to rho₁The quantization coding obtains an amplitude control word (ACW1, ACW2) according to p₂An amplitude control word (ACW3, ACW4) is obtained. Rho₁Can be used for controlling the output power, rho, of the main power amplifier₂Can be used to control the output power of the auxiliary power amplifier. And, the amplitude signal is in direct proportion to the output power, and the larger the amplitude signal value is, the larger the output power is.

Under the condition that the multiphase Doherty PA supports a Class-G working mode, the magnitude of the amplitude signal also determines the working modes of the main power amplifier and the auxiliary power amplifier, and the corresponding relation among the working modes, the output power and the magnitude of the amplitude value can be determined as shown in Table 2:

TABLE 2

In the above table, "-" may be combined with "<" or ">", i.e. ≦ may be substituted for "<" and "greater than" may be substituted for "≧" respectively.

When the amplitude signal is between the first preset threshold and the second preset threshold, because the amplitude signal value is small, only a part of the main power amplifying units in the cell0 and the cell1 can be activated to operate in the low voltage mode, and the auxiliary power amplifying units in the cell2 and the cell3 are in the off state. When the amplitude signal is between the first preset threshold and the second preset threshold, the main power amplification units in the cell0 and the cell1 all work in a low voltage mode, the corresponding second output power is the maximum power in the low voltage mode, and the auxiliary power amplification units in the cell1 and the cell2 work in a partial low voltage mode. When the amplitude signal is greater than the fourth preset threshold, because the amplitude signal value is large, the first unit and the second unit are both operated in the high-voltage mode, and the corresponding fourth output power is the maximum output power in the high-voltage mode. Taking the amplitude control signal ACW1 of the cell0 as an example, assuming that the ACW1 includes 10 bits, where the low 8 bits are used to indicate the on state of the main power amplifier unit in the cell0, and the high 2 bits are used to indicate the working mode of the main power amplifier unit in the cell0, the corresponding relationship between the values of ACW1<9:8> and the working modes can be shown in table 3:

TABLE 3

ACW1<9:8>Value of (A)	Mode of operation
		00	Partial low voltage operating mode and partial shutdown mode
01	Low voltage full open mode
		10	Partial low voltage mode of operation and partial high voltage mode of operation
11	High voltage full on mode

Assuming that ACW1 is 00xxxx 110, where the low three-bit amplitude control word corresponding to LBS is 110, which indicates that the switch states corresponding to 8 LBS main power amplifier units are (00,000,010), and ACW1<9:8> is00, which indicates that the main power amplifier unit in the first unit is in the partial low voltage operating mode and the partial shutdown mode, for the 8 LBS in cell0 in table 1-1, it may be the LBS with switch state identification field 1, that is, the seventh main power amplifier unit operates in the low voltage mode, and the remaining seven main power amplifier units are shutdown; or, the seventh main power amplifying unit may be turned off, and the remaining seven main power amplifying units operate in the low voltage mode.

The main power amplifier and the auxiliary power amplifier respectively comprise two working units, and under the condition that the Class-G technology is not used, the corresponding relation between the working mode of each working unit of the main power amplifier and the working mode of each working unit of the auxiliary power amplifier is shown in a table 4-1:

TABLE 4-1

Main power amplifier working unit-working mode	Auxiliary power amplifier working unit-working mode
		Full open	Partially opened
Partially opened	Full shut-off

Similar to table 3, the operation modes of the main and auxiliary power amplifier operation units in table 4-1 may also be indicated in the form of indexes. For example, 1 bit in the amplitude control word may be used to indicate the operation mode of the working unit, a fully-on mode for the main amplifier working unit 1, a partially-on mode for 0, a fully-off mode for default, a partially-on mode for the auxiliary amplifier 1, a fully-off mode for 0, a fully-on mode for default, and so on. The main and auxiliary power amplifiers can be represented by 1 bit in a combined mode or can be represented by 1 bit in an independent mode.

According to the above description, the Class-G technology is combined with the multiphase Doherty PA, so that the power amplification is performed by the multi-channel signal control power amplification unit in different working modes, and the corresponding relationship between the working mode of each working unit of the main power amplifier and the working mode of each working unit of the auxiliary power amplifier is shown in table 4-2:

TABLE 4-2

Main power amplifier working unit-working mode	Auxiliary power amplifier working unit-working mode
		Partial low voltage mode of operationAnd a partial shutdown mode	Full shut-off
Low voltage full open mode	Partial low voltage operating mode and partial shutdown mode
		Partial low voltage mode of operation and partial high voltage mode of operation	Low voltage full open mode
High voltage full on mode	Partial low voltage mode of operation and partial high voltage mode of operation

Similar to table 3, the operation modes of the main and auxiliary power amplifier operation units in table 4-2 may also be indicated in the form of indexes. For example, 2 bits in the amplitude control word may be used to indicate the operation mode of the main power amplifier operation unit, 00 indicates a partial low voltage operation mode and a partial off mode, 01 indicates a low voltage full on mode, 10 indicates a partial low voltage operation mode and a partial high voltage operation mode, 11 indicates a high voltage full on mode, and for the operation mode of the auxiliary power amplifier operation unit, 00 indicates a full off mode, 01 indicates a partial low voltage operation mode and a partial off mode, 10 indicates a low voltage full on mode, 11 indicates a partial low voltage operation mode and a partial high voltage operation mode, and so on. The main and auxiliary power amplifiers can be represented by 2 bits in a combined mode or can be represented by 2 bits respectively.

Therefore, the Class-G technology is combined with the multiphase Doherty PA, so that the main power amplifier and the auxiliary power amplifier can be controlled more precisely and differentially, the power amplifier can output at least four different powers so as to adapt to different input powers, and the amplification efficiency of the power amplifier is effectively improved.

Fig. 4 is an electronic apparatus 400 according to an embodiment of the present disclosure, which can be used to execute the method performed by the power amplifier in the embodiment corresponding to fig. 3A to 3C, where the electronic apparatus may be a terminal device or a chip configured on the terminal device. The terminal device comprises a signal processing module 401 and an amplification module 402.

The signal processing module 401 is configured to obtain a baseband signal; generating two paths of vector signals according to the baseband signals, wherein the two paths of vector signals respectively comprise phase signals and amplitude signals, and the two paths of vector signals are non-orthogonal signals;

the signal processing module 401 is further configured to obtain an amplitude control signal of a target power amplifier according to the quantization coding of the amplitude signals of the two paths of vector signals, and obtain a phase control signal of the target power amplifier according to the phase signals of the two paths of vector signals; the target power amplifier comprises a main power amplifier and an auxiliary power amplifier, and the main power amplifier and the auxiliary power amplifier respectively comprise a plurality of working units;

the amplifying module 402 is configured to control the output power signals of the multiple working units of the main power amplifier and the auxiliary power amplifier according to the phase control signal and the amplitude control signal.

Optionally, the amplifying module 402 is specifically configured to: according to phase control signalsAndand amplitude control signals (ACW1, ACW2) of the main power amplifier control a plurality of the main power amplifiersThe first working units output power signals and consist of a plurality of main power amplification units;

Optionally, the plurality of first working units include a first unit and a second unit, and the amplifying module 402 is specifically configured to:

according to phase-base signalsAndrespectively controlling the starting positions of a plurality of main power amplification unit switches in the first unit and the second unit;

Optionally, the plurality of second working units include a third unit and a fourth unit, and the amplifying module 402 is specifically configured to:

according to phase-base signalsAndrespectively controlling the starting positions of a plurality of auxiliary power amplification unit switches in the third unit and the fourth unit;

When the amplitude signal is smaller than a first preset threshold, the amplifying module 402 is specifically configured to:

and controlling to close the plurality of auxiliary power amplification units in the third unit and the fourth unit.

Optionally, when the amplitude signal is smaller than a second preset threshold and not smaller than a first preset threshold, the amplifying module 402 is specifically configured to:

controlling a plurality of main power amplification units in the first unit and the second unit to work at the second power;

and controlling a plurality of auxiliary power amplification units in the third unit and the fourth unit to work at the first power.

Optionally, when the amplitude signal is smaller than a third preset threshold and not smaller than a second preset threshold, the amplifying module 402 is specifically configured to:

and controlling a plurality of auxiliary power amplification units in the third unit and the fourth unit to work at the second power.

Optionally, when the amplitude signal is not less than a fourth preset threshold, the amplifying module 402 is specifically configured to:

controlling a plurality of main power amplification units in the first unit and the second unit to work at the fourth power;

and controlling a plurality of auxiliary power amplification units in the third unit and the fourth unit to work at the third power.

Optionally, referring to fig. 5, fig. 5 is a block diagram of a signal processing module according to an embodiment of the present disclosure, as shown in fig. 5, the signal processing module 401 further includes a mapping module 4011, configured to:

Optionally, the signal processing module 401 further includes a conversion module 4012 and an encoding module 4013, where the conversion module 4012 is configured to obtain a baseband signal; generating two paths of vector signals according to the baseband signals; the encoding module 4013 is configured to obtain an amplitude control signal of the target power amplifier according to the quantization coding of the amplitude signals of the two paths of vector signals, and obtain a phase control signal of the target power amplifier according to the phase signals of the two paths of vector signals.

Optionally, the signal processing module 401 and the amplifying module 402 may be chips, encoders, encoding circuits, or other integrated circuits that can implement the method of the present application.

Optionally, the apparatus 400 may further comprise a storage module (not shown in the figure), which may be used for storing data and/or signaling, and which may be coupled to the signal processing module 401 and the amplifying module 402. For example, the signal processing module 401 or the amplifying module 402 may be used to read data and/or signaling in the storage module, so that the control method in the foregoing method embodiment is executed.

As shown in fig. 6, fig. 6 is a schematic diagram illustrating a hardware structure of an electronic apparatus in an embodiment of the present application. The structure of the power amplifier can refer to the structure shown in fig. 6. The electronic device 500 includes: a processor 111 and a memory 113, the processor 111 and the memory 113 being electrically coupled;

the processor 111 is configured to execute some or all of the computer program instructions in the memory, and when the computer program instructions are executed, the apparatus is enabled to perform the method according to any of the embodiments.

Optionally, a Memory 113 is further included for storing computer program instructions, and optionally, the Memory 113(Memory #1) is located inside the apparatus, the Memory 113(Memory #2) is integrated with the processor 111, or the Memory 113(Memory #3) is located outside the apparatus.

Optionally, the apparatus 500 further comprises a transceiver 112 for communicating with other devices.

It should be understood that the electronic device 500 shown in fig. 6 may be a chip or a circuit. Such as a chip or circuit that may be provided within a terminal device or electronic device. The transceiver 112 may also be a communication interface. The transceiver includes a receiver and a transmitter. Further, the electronic device 500 may also include a bus system.

The processor 111, the memory 113, and the transceiver 112 are connected via a bus system, and the processor 111 is configured to execute instructions stored in the memory 113 to control the transceiver to receive and transmit signals, so as to complete steps of the first device or the second device in the implementation method related to the present application. The memory 113 may be integrated in the processor 111 or may be provided separately from the processor 111.

As an implementation manner, the function of the transceiver 112 may be considered to be implemented by a transceiver circuit or a transceiver dedicated chip. The processor 111 may be considered to be implemented by a dedicated processing chip, processing circuitry, a processor, or a general purpose chip. The processor may be a Central Processing Unit (CPU), a Network Processor (NP), or a combination of a CPU and an NP. The processor may further include a hardware chip or other general purpose processor. The hardware chip may be an application-specific integrated circuit (ASIC), a Programmable Logic Device (PLD), or a combination thereof. The aforementioned PLDs may be Complex Programmable Logic Devices (CPLDs), field-programmable gate arrays (FPGAs), General Array Logic (GAL) and other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc., or any combination thereof. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

It will also be appreciated that the memory referred to in the embodiments of the application may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The non-volatile Memory may be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable PROM (EEPROM), or a flash Memory. The volatile Memory may be a Random Access Memory (RAM), which acts as an external cache Memory. By way of example, but not limitation, many forms of RAM are available, such as Static random access memory (Static RAM, SRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), Double Data Rate Synchronous Dynamic random access memory (DDR SDRAM), Enhanced Synchronous SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), and Direct memory bus RAM (DR RAM). It should be noted that the memory described herein is intended to comprise, without being limited to, these and any other suitable types of memory.

The embodiment of the application provides a computer storage medium, which stores a computer program, wherein the computer program comprises a program for executing the method applied to the power amplifier in the embodiment.

The present application provides a computer program product containing instructions, which when run on a computer, causes the computer to execute the method of the above embodiments for a power amplifier.

It should be understood that, in the various embodiments of the present application, the size of the serial number of each process described above does not mean that the execution sequence of each process is preceded by the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions in actual implementation, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and all the changes or substitutions should be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

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