阅读说明：本技术 包含接触窗的集成电路生产方法、机台及集成电路 (Method for producing integrated circuit containing contact window, machine table and integrated circuit ) 是由 徐忠良 瞿春辉 于 2020-05-13 设计创作，主要内容包括：本发明公开了提供一种包含接触窗的集成电路生产方法,集成电路包含衬底和沉积于衬底上的氧化层,方法包含以下步骤：步骤一,对集成电路进行转平边处理；步骤二,对集成电路进行高温烘烤处理；步骤三,对氧化层进行蚀刻处理以形成沟槽；步骤四,在沟槽中依次沉积粘结层和导电层以形成接触窗。该方法有效避免了接触窗出现高电阻现象。本发明同时提供一种执行该方法的机台以及使用该方法生产的包含接触窗的集成电路。(The invention discloses a method for producing an integrated circuit comprising a contact window, wherein the integrated circuit comprises a substrate and an oxide layer deposited on the substrate, and the method comprises the following steps: firstly, carrying out edge flattening processing on an integrated circuit; step two, carrying out high-temperature baking treatment on the integrated circuit; etching the oxide layer to form a groove; and step four, depositing a bonding layer and a conductive layer in the groove in sequence to form a contact window. The method effectively avoids the phenomenon of high resistance of the contact window. The invention also provides a machine for executing the method and an integrated circuit containing the contact window produced by using the method.)

1. A method for producing an integrated circuit comprising a contact, wherein the integrated circuit comprises a substrate and an oxide layer deposited on the substrate, the method comprising:

step one, performing edge flattening processing on the integrated circuit;

secondly, carrying out high-temperature baking treatment on the integrated circuit;

etching the oxide layer to form a groove;

and fourthly, depositing a bonding layer and a conductive layer in the groove in sequence to form a contact window.

2. The method of claim 1, wherein the oxide layer comprises an oxide layer formed by at least one of atmospheric vapor deposition and plasma deposition.

3. The method of claim 2, wherein the edge-rounding process comprises heating the integrated circuit to 200 ℃ and turning the integrated circuit to a predetermined angle.

4. The method as claimed in claim 3, wherein the trench has an aspect ratio of not less than 4, the baking temperature of the high temperature baking process is 400-450 ℃, and the baking time is 40-60 s.

5. The method of claim 4, wherein at least one of the following adjustments is made to the parameters of the high temperature bake process as the aspect ratio of the trench is increased: and raising the baking temperature and prolonging the baking time.

6. The method of claim 4, wherein the parameters of the high temperature bake process are adjusted by at least one of the following adjustments as the percentage of the oxide layer deposited by atmospheric pressure vapor deposition to the total oxide layer increases: and raising the baking temperature and prolonging the baking time.

7. The method of claim 1, wherein the substrate comprises silicon and the oxide layer comprises silicon oxide.

8. The method of claim 1, wherein the adhesion layer comprises titanium and titanium oxide, and the conductive layer comprises tungsten.

9. A tool for performing the method of any of claims 1-8, wherein the tool comprises a heating device for high temperature baking the integrated circuit.

10. An integrated circuit comprising a contact window produced using the method of any of claims 1-8.

Technical Field

The present invention relates to the field of semiconductor technology, and more particularly, to a method for manufacturing an integrated circuit including a contact, a machine for performing the method, and an integrated circuit including a contact manufactured by the method.

Background

The ILD (deposited dielectric) film in current integrated circuits is mainly a silicon dioxide layer, and the most important film stack is: atmospheric vapor deposition and/or plasma deposition plus chemical mechanical polishing. Forming a groove after exposure and etching, then depositing titanium and titanium nitride in sequence by a physical/chemical vapor deposition mode to form a contact window bonding layer, filling metal tungsten in the groove to be used as a conductive layer, and finally forming a complete contact window link by a physical mechanical grinding mode. The requirement on the resistance stability of the contact window is higher and higher, and the matching of the front and rear section process is more and more difficult to control. The scrap products often appear due to the increase of the contact resistance, so that the stability of the contact resistance of the whole batch of products is poor.

Therefore, how to ensure the stability of the contact resistance of the integrated circuit is an urgent technical problem to be solved in the field of integrated circuits.

Disclosure of Invention

In order to solve the prior art problems, the present invention provides a method for producing an integrated circuit including a contact, which effectively prevents the contact from generating a high resistance phenomenon, a machine for performing the method, and an integrated circuit including a contact produced by the method.

According to the present invention, there is provided a method of manufacturing an integrated circuit comprising a contact, the integrated circuit comprising a substrate and an oxide layer deposited on the substrate, the method comprising the steps of:

firstly, carrying out edge flattening processing on an integrated circuit;

step two, carrying out high-temperature baking treatment on the integrated circuit;

etching the oxide layer to form a groove;

and step four, depositing a bonding layer and a conductive layer in the groove in sequence to form a contact window.

According to one embodiment of the present invention, the oxide layer comprises an oxide layer formed by at least one of atmospheric vapor deposition and plasma deposition.

According to one embodiment of the present invention, the edge-rounding process comprises heating the integrated circuit to 200 ℃ and rotating it to a predetermined angle.

According to an embodiment of the present invention, the aspect ratio of the trench is not less than 4, the baking temperature of the high temperature baking process is 400-450 ℃, and the baking time is 40-60 s.

According to one embodiment of the present invention, when the aspect ratio of the trench is increased, at least one of the following adjustments is made to the parameters of the high temperature bake process: the baking temperature is increased, and the baking time is prolonged.

According to one embodiment of the invention, when the proportion of the oxide layer deposited by the atmospheric pressure vapor deposition to the total oxide layer is increased, at least one of the following adjustments is carried out on the parameters of the high-temperature baking treatment: the baking temperature is increased, and the baking time is prolonged.

In accordance with one embodiment of the present invention, the substrate comprises silicon and the oxide layer comprises silicon oxide.

According to one embodiment of the invention, the adhesion layer comprises titanium and titanium oxide and the conductive layer comprises tungsten.

According to the present invention, a tool for performing the above method is provided, the tool comprising a heating device for performing a high temperature baking process on an integrated circuit.

According to the present invention, there is provided an integrated circuit comprising a contact window produced using the above method.

Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages:

1. by adding the high-temperature baking step, the resistance increase of the contact window caused by the fact that some water vapor in the ILD silicon dioxide film is remained at the bottom of the contact window to form a thin oxygen layer and the titanium nitride cannot be separated out after deposition is avoided, and the stability of the resistance of the contact window of the integrated circuit is effectively ensured.

2. The traditional machine can be used for executing the method according to the invention only by additionally arranging a heating device for high-temperature baking, and has the advantages of convenient operation and low cost.

Drawings

FIG. 1 is a flow chart of a prior art method for producing an integrated circuit including contacts;

FIG. 2 shows a schematic diagram of an integrated circuit produced using the method of FIG. 1;

FIG. 3 is a flow chart of a method for producing an integrated circuit including a contact according to the present invention;

FIG. 4 shows a schematic diagram of an integrated circuit produced using the method of FIG. 3;

FIGS. 5a-5B illustrate EELS maps for region A and region B, respectively, of the integrated circuit of FIG. 2;

FIG. 5C shows an EELS map of the region C of the integrated circuit shown in FIG. 4.

In the figure, the position of the upper end of the main shaft,

1 substrate, 2 oxide layers, 3 bonding layers, 4 conductive layers and 5 thin oxygen layers.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail with reference to the following embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

Fig. 1 and 2 show a detailed flow of a method for producing an integrated circuit including a contact window in the related art and a schematic diagram of an integrated circuit produced by using the method, respectively. As shown in the figure, the conventional method mainly includes performing a turn-around process on an integrated circuit having a substrate 1 and an oxide layer 2, performing an etching process on the oxide layer 2 to form a trench, and sequentially depositing an adhesion layer 3 and a conductive layer 4 in the trench to form a contact window. Research shows that the thin oxygen layer 5 is formed at the bottom of the contact window because some moisture in the oxide layer 2 can not be separated out after the bonding layer 3 is deposited, and the high resistance of the thin oxygen layer 5 can directly cause the increase of the resistance of the contact window and even generate scrapped products.

Fig. 3 and 4 show a specific flow of a method for producing an integrated circuit including a contact according to the present invention and a schematic diagram of an integrated circuit produced by using the method, respectively. As shown in the drawings, the method for manufacturing an integrated circuit including a contact window according to the present application is mainly directed to an integrated circuit including a substrate 1 and an oxide layer 2 deposited on the substrate 1 by atmospheric pressure vapor deposition and/or plasma deposition, wherein the substrate 1 may include silicon, and the oxide layer 2 may include silicon oxide. The method generally comprises the steps of:

step one, carrying out edge-flattening treatment on the integrated circuit, specifically, heating the integrated circuit to 200 ℃ and rotating the integrated circuit to a preset angle so as to facilitate the subsequent steps (such as etching treatment);

step two, carrying out high-temperature baking treatment on the integrated circuit;

etching the oxide layer to form a groove;

and step four, depositing the bonding layer 3 and the conducting layer 4 in the groove in sequence to form a contact window. The bonding layer 3 can be composed of a metal titanium layer and a titanium oxide layer which are deposited in sequence, and the specific thickness of the bonding layer can be set according to the working condition; the conductive layer 4 may use metal tungsten, or other conductive materials commonly used in the art.

As the line width of integrated circuits is continuously decreased, the difficulty of water analysis increases, and the thin oxide layer 5 is more easily formed. Therefore, the method has more remarkable effect on the contact window with the ratio of the depth h to the width w of the groove, namely the depth-to-width ratio, larger than a certain threshold value. In an embodiment of the present invention, the threshold may be 4. Preferably, during the high temperature baking process, the baking temperature can be controlled within the range of 400-. Further preferably, the baking time may be set to 40-60s, wherein too short baking time is not favorable for complete moisture precipitation, and too long baking time may cause a phenomenon that the moisture completely-precipitated outlet is still continuously heated, resulting in unnecessary energy and time consumption. As the aspect ratio of the grooves increases, workers may adjust the specific parameters of the high temperature baking process by increasing the baking temperature and/or extending the baking time in order to enhance the drainage effect.

The formation of the thin oxygen layer 5 is also dependent on the water content in the oxide layer 2, which is related to the way the oxide layer 2 is formed in the oxide layer 2. It has been found that the water content in the oxide layer 2 formed by atmospheric vapor deposition is generally higher than the water content in the oxide layer 2 formed by plasma deposition. Therefore, the worker can use a higher baking temperature and/or a longer baking time for an integrated circuit in which the proportion of the oxide layer 2 to the entire oxide layer 2 by atmospheric vapor deposition is high, to ensure that moisture can be completely precipitated.

Fig. 5a-5c show EELS spectra (electron energy loss spectra) for different regions of an integrated circuit produced for different methods, respectively. The EELS spectrum can distinguish the valence state, energy state structure and other properties of elements by using different energy loss peaks, wherein the X axis represents energy loss (energy loss) and the Y axis represents intensity (intensity). Wherein the sample shown in FIG. 5a is selected from the oxide region of the integrated circuit produced by the conventional method, i.e., region A in FIG. 2, and exhibits a distinct peak within a specific energy loss range, indicating that more oxygen is present in this region; the sample shown in fig. 5B is selected from the bottom region of the contact of the integrated circuit produced by the conventional method, i.e., the region B in fig. 2, and also shows a peak in a specific energy loss range, which indicates that the oxygen element is also present in the region, and the thin oxygen layer 5 containing the oxygen element has a larger resistance value, which seriously affects the conductivity of the contact; the sample shown in fig. 5C is selected from the bottom region of the contact window of the integrated circuit produced by the method according to the invention, i.e. the region C in fig. 4, in which the integrated circuit is baked at a high temperature of 400C for 40s before the etching treatment, and has no peak in a specific energy loss range, indicating that no oxygen element is present in this region, i.e. the thin oxygen layer 5 having no oxygen element. By comparison, the integrated circuit produced by the method effectively avoids the increase of the resistance of the contact window caused by the fact that some water vapor in the ILD silicon dioxide film is remained at the bottom of the contact window to form a thin oxygen layer and titanium nitride cannot be separated out after deposition.

In another embodiment of the present invention, a new machine for performing the method of the present invention can be obtained by modifying a conventional machine, such as adding a heating device for performing a high temperature baking process on an integrated circuit, so that the stability of the contact resistance of the integrated circuit can be effectively improved without replacing the machine, which is not only low in cost but also convenient to operate.

The above examples only express embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.