阅读说明：本技术 硅基探测器的制造方法及用于其的热处理装置 (Method for manufacturing silicon-based detector and heat treatment device for silicon-based detector ) 是由 丁明正 许高博 翟琼华 傅剑宇 孙朋 殷华湘 颜刚平 田国良 李琳 张琦辉 贺晓 于 2021-07-14 设计创作，主要内容包括：本发明提供了一种硅基探测器的制造方法及用于其的热处理装置,该制造方法包括：提供经流片完成后的探测器晶圆；将所述探测器晶圆进行真空加热处理。该制造方法通过增加真空加热处理工艺,对经流片完成后的探测器晶圆进行热处理,因而能够降低探测器晶圆的暗电流,并提高其击穿电压,提高了器件性能。(The invention provides a manufacturing method of a silicon-based detector and a heat treatment device used for the same, wherein the manufacturing method comprises the following steps: providing a detector wafer after the flow sheet is finished; and carrying out vacuum heating treatment on the detector wafer. The manufacturing method carries out heat treatment on the detector wafer after the wafer flow is finished by adding a vacuum heating treatment process, so that the dark current of the detector wafer can be reduced, the breakdown voltage of the detector wafer can be improved, and the performance of a device can be improved.)

1. A method of fabricating a silicon-based probe, comprising the steps of:

providing a detector wafer after the flow sheet is finished;

and carrying out vacuum heating treatment on the detector wafer.

2. The method for manufacturing a silicon-based detector according to claim 1, wherein the temperature of the vacuum heating treatment is 100-450 ℃ and the time is 8-24 h.

3. The method for manufacturing the silicon-based detector according to claim 1, wherein the detector wafer comprises a second electrode layer, a substrate, an oxide layer, a first electrode layer and a passivation layer which are sequentially stacked from bottom to top; the shallow surface layer of the upper surface of the substrate is provided with a plurality of first doped regions, and the shallow surface layer of the lower surface of the substrate is provided with a second doped region; a plurality of grooves exposing the upper surfaces of the plurality of first doping regions are formed on the oxide layer, and the grooves are filled with the first electrode layer; the passivation layer covers the first electrode layer and the upper surface of the oxide layer, and the passivation layer is provided with a plurality of windows exposing the surface of the first electrode layer.

4. The method of claim 3, wherein the recess is in the shape of an inverted letter of a Chinese character 'ao', and the wide end of the recess is disposed away from the substrate.

5. The method of claim 3, wherein the plurality of first doping regions are respectively formed as a pixel detector region, an annular current collection region and an annular protection region; wherein the pixel detector region is located inside the annular current collection region, and the annular protection region surrounds outside the annular current collection region.

6. The method of claim 5, wherein the window is provided in a plurality corresponding to the pixel detector region and the annular current collection region.

7. A heat treatment device used in the manufacture of a silicon-based detector is characterized by comprising a heater and a heating box body matched with the heater;

the heating box body is placed in the heater, the heating box body comprises a filter and a storage rack which are arranged in the heating box body, and the storage rack is used for placing wafers to be thermally treated.

8. The heat treatment apparatus according to claim 7, wherein the heating case further comprises a heating tub wound with a heating wire; the heating barrel is arranged inside the heating box body, and the storage rack is arranged in the heating barrel.

9. The thermal processing device of claim 7, further comprising a vacuum pump and a temperature sensor and a pressure sensor for monitoring temperature and pressure, respectively, in real time; the vacuum pump is communicated with the heater or the heating box body;

the heater is preferably an oven.

10. The heat treatment device for the silicon-based detector manufacturing is characterized by comprising a heating box body, a first connecting valve, a second connecting valve and a power supply, wherein the first connecting valve, the second connecting valve and the power supply are arranged on the heating box body, and a heating plate is arranged inside the heating box body and used for heating a wafer to be subjected to heat treatment.

Technical Field

The invention relates to the technical field of semiconductor detection and manufacturing, in particular to a manufacturing method of a silicon-based detector and a heat treatment device for the silicon-based detector.

Background

The current pixel detector based on silicon-based p-i-n structure has higher gain, but the sensitivity is mainly determined by dark current and breakdown voltage.

However, obtaining a suitable dark current and breakdown voltage are greatly affected by the processing process, which puts high demands on the manufacturing process and equipment. For example, there is a need to improve oxide layer quality, reduce the amount of charge in the oxide layer, eliminate process damage, and the like.

It is now conventional to improve device performance by hydrogen alloy annealing processes, but the improvement is limited and more efficient methods are needed.

Disclosure of Invention

The invention mainly aims to provide a manufacturing method of a silicon-based detector and a heat treatment device used for the silicon-based detector.

According to one or more embodiments, a method of fabricating a silicon-based probe includes the steps of:

providing a detector wafer after the flow sheet is finished;

and carrying out vacuum heating treatment on the detector wafer.

According to one or more embodiments, a thermal processing apparatus for use in silicon-based probe fabrication includes a heater and a heating cartridge cooperating with the heater;

the heating box body is placed in the heater, the heating box body comprises a filter and a storage rack which are arranged in the heating box body, and the storage rack is used for placing wafers to be thermally treated.

According to one or more embodiments, the heat treatment device for the silicon-based detector manufacturing comprises a heating box body, a first connecting valve, a second connecting valve and a power supply, wherein the first connecting valve, the second connecting valve and the power supply are arranged on the heating box body, and a heating plate is arranged inside the heating box body and used for heating a wafer to be subjected to heat treatment.

The invention has the innovation that the vacuum heat treatment process is added to carry out heat treatment on the detector wafer after the wafer is subjected to the sheet flow, so that the dark current of the device is greatly reduced, the surface breakdown voltage of the device is improved, and the device can be partially used for replacing an alloy furnace tube to reduce the cost.

And the heat treatment device improves the uniformity of wafer heating and reduces particle pollution by introducing the heating box body, and not only can carry out a negative pressure heating process, but also can carry out a positive pressure heating process under certain pressure.

Drawings

Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:

FIGS. 1-7 are schematic flow charts illustrating a method for fabricating a silicon-based detector according to an embodiment of the present invention;

FIG. 8 is a schematic structural view of a heat treatment apparatus according to an embodiment of the present invention;

FIG. 9 is a schematic structural view of a heat treatment apparatus according to another embodiment of the present invention;

FIG. 10 is a schematic structural view of a heat treatment apparatus according to another embodiment of the present invention;

FIG. 11 is a dark current diagram of a silicon-based detector wafer fabricated by a conventional fabrication process in the prior art with 150 μm pixels 8 × 8 in parallel;

FIG. 12 is a dark current diagram of a silicon-based detector wafer fabricated in an embodiment of the present invention with 150 μm pixels 8 × 8 in parallel;

FIG. 13 is a dark current diagram of a silicon-based detector wafer fabricated by a conventional fabrication process in the prior art with parallel connection of a 50 μm pixel 8 × 8 array;

fig. 14 is a dark current diagram of a silicon-based detector wafer prepared in an embodiment of the present invention with parallel 50 μm pixel 8 × 8 arrays.

In the figure:

100. a substrate; 200. a first oxide layer; 300. a second oxide layer; 400. first doping; 500. a second doped region; 600. a first electrode layer; 700. a second electrode layer; 800. a passivation layer;

1. heating the box body; 2. a filter; 3. a rack; 4. the detector wafer after the tape-out is finished; 5. a heating barrel; 6. a first connecting valve; 7. a second connecting valve; 8. a power source; 9. heating plates;

10. a groove; 20. and (6) contacting the holes.

Detailed Description

Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

According to an embodiment of the present invention, there is provided a method for manufacturing a silicon-based probe, including the steps of:

referring to fig. 1, a substrate 100 is subjected to field oxide growth, and since the field oxide growth is performed in a furnace, a first oxide layer 200 is formed on a surface of the substrate 100, that is, on both of upper and lower surfaces of the substrate 100 opposite to each other, where the first oxide layer 200 is also referred to as a field oxide layer, so as to form the structure shown in fig. 1.

In an embodiment of the present invention, the substrate 100 may be an N-type high-resistance silicon substrate.

The first oxide layer 200 is made of silicon dioxide.

The thickness of the first oxide layer 200 may be 500 to 600nm, and may be selected according to actual needs without specific limitations.

Referring to fig. 2, a first oxide layer 200 on the upper surface of a substrate 100 is etched by a photolithography process and an etching process to form a plurality of grooves 10 on the first oxide layer 200, which are exposed from the upper surface of the substrate 100, so as to define an active region on the substrate 100, which is divided into a PIXEL detector (PIXEL) region, a ring Current Collection (CCR) region, and a ring protection (GR) region, wherein the PIXEL detector region is located inside the ring current collection region, and the ring protection region surrounds the outside of the ring current collection region.

Wherein, the etching process is a wet etching process, and the etching liquid is a mixed liquid of hydrofluoric acid and ammonium fluoride.

In the embodiment of the present invention, in the process of etching the first oxide layer 200 on the upper surface of the substrate 100 by using the etching solution, the first oxide layer 200 on the lower surface of the substrate 100 is etched and removed at the same time, so as to form the structure shown in fig. 2.

Referring to fig. 3, the substrate 100 after the groove 10 is formed is subjected to gate oxide growth, a second oxide layer 300 is formed on both the upper and lower surfaces of the substrate 100 opposite to each other, the second oxide layer 300 is also referred to as a gate oxide layer, and the second oxide layer 300 on the upper surface of the substrate 100 does not completely fill the groove 10.

In the embodiment of the invention, the material of the second oxide layer 300 is silicon dioxide.

The thickness of the second oxide layer 300 may be 100 to 200nm, and may be selected according to actual needs, and is not particularly limited.

The first oxide layer 200 and the second oxide layer 300 are made of the same material and may be referred to as oxide layers.

With continued reference to fig. 3, a plurality of first doped regions 400 are formed in a shallow surface layer of the upper surface of the substrate 100 by ion implantation; the plurality of first doping regions 400 correspond to the plurality of grooves 10 one to one, that is, the plurality of first doping regions 400 are formed in the active region defined by the plurality of grooves 10, and the plurality of first doping regions 400 are formed as a PIXEL detector (PIXEL) region, a ring Current Collector (CCR) region, and a ring protection (GR) region, respectively.

The second doping region 500 is formed at a shallow surface layer of the lower surface of the substrate 100 by ion implantation, and the doping type of the second doping region 500 is different from that of the first doping region 400.

In an embodiment of the present invention, the first doping region 400 may be a P-type doping region, and the doping ions may be boron (B), aluminum (Al), gallium (Ga), indium (In), or the like.

The second doped region 500 may be an N-type doped region, and the dopant ions may be phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), or the like.

With continued reference to fig. 3, the ion implanted first doped region 400 and the ion implanted second doped region 500 are further subjected to an annealing activation process.

Referring to fig. 4, the second oxide layer 300 on the upper surface of the substrate 100 is etched using a photolithography process and an etching process to form a plurality of contact holes 20 on the second oxide layer 300 to expose the upper surface of the substrate 100 for contact of the electrodes.

Wherein, the etching process is a wet etching process, and the etching liquid is a mixed liquid of hydrofluoric acid and ammonium fluoride.

In the embodiment of the present invention, in the process of etching the second oxide layer 300 on the upper surface of the substrate 100 by using the etching solution, the second oxide layer 300 on the lower surface of the substrate 100 is etched and removed at the same time, so as to form the structure shown in fig. 4.

Referring to fig. 5, a sputtering process is used to cover the surfaces of the contact hole 20, the groove 10 and the first oxide layer 200 to form a first metal layer (not shown); then, the first metal layer is subjected to a photolithography process and a wet etching process to remove at least a portion of the first metal layer covering the first oxide layer 200, so as to form a first electrode layer 600, also referred to as a front electrode, corresponding to the first doped region 400 and the groove 10, thereby obtaining the structure shown in fig. 5.

In the embodiment of the invention, the etching solution adopted by the wet etching process is aluminum etching solution, and is a conventional etching process.

Referring to fig. 6, a second electrode layer 700, also referred to as a back electrode, is formed by a sputtering process to cover the second doping region 500.

In the embodiment of the present invention, the first electrode layer 600 and the second electrode layer 700 are made of aluminum, but other electrode materials may be selected according to the requirement.

With continued reference to fig. 6, after the first electrode layer 600 and the second electrode layer 700 are formed, an annealing activation process is performed on the first electrode layer 600 and the second electrode layer 700.

It should be noted that the annealing activation treatment of the electrode layer may be selected according to a specific process after the passivation layer 800 is formed.

Referring to fig. 7, a passivation material is first deposited to cover the upper surface of the first oxide layer 200 and the upper surface of the first electrode layer 600 to form a passivation layer 800.

Then, the passivation layer 800 is etched by using a photolithography process and a dry etching process to form a plurality of windows exposing the upper surface of the first electrode layer 600 to expose the first electrode layer 600 for front electrical contact, and the plurality of windows may be respectively used for electrode access of the PIXEL region and the CCR region, and the GR region is covered by the passivation layer 800, so as to obtain the structure shown in fig. 7.

In an embodiment of the present invention, the material of the passivation layer 800 may be silicon nitride.

Finally, the probe wafer structure shown in fig. 7 is subjected to vacuum heat treatment using the heat treatment apparatus shown in fig. 8 to 10.

According to the invention, the quality of the oxide layer can be improved by carrying out vacuum heat treatment on the detector wafer, the dark current on the surface of the wafer is greatly reduced, and the breakdown voltage on the surface of the wafer is improved.

In the embodiment of the invention, the temperature of the vacuum heating treatment can be 100-450 ℃, and the time can be 8-24 h.

The time of the vacuum heat treatment may be appropriately increased or decreased depending on the temperature, and the two may supplement each other.

In the present invention, the performance of the probe wafer prepared by the manufacturing method in the embodiment of the present invention was tested.

As shown in fig. 11 to 14, in the case that the conventional size pixel parameter is normal, the electrical leakage of the detector wafer subjected to the heat treatment step in the present invention is smaller than that of the detector wafer not subjected to the heat treatment in the conventional process, and the electrical leakage of the small pixel is improved more remarkably.

According to an embodiment of the invention, a heat treatment device applied to the manufacturing method of the silicon-based detector is further provided, and the heat treatment device is used for carrying out heat treatment on the detector wafer after the flow sheet is finished.

Fig. 8 shows a heat treatment apparatus in an embodiment of the present invention, which includes a heater (not shown) that can be used to provide a heat source to a heating cassette body 1 in cooperation with the heater.

Under operating condition, the heating box body 1 is placed inside the heater, and the heating box body 1 is including setting up filter 2 and supporter 3 inside it, and wherein, supporter 3 is used for flowing detector wafer 4 after the piece is accomplished.

In the above embodiment, since the filter 2 is provided in the heating cartridge 1, the heating cartridge 1 can be directly put into the heater without fear of particle contamination. Therefore, by introducing the heating box body 1, the uniformity of heating of the device can be improved, particle pollution is reduced, and not only a negative pressure heating process but also a positive pressure heating process under certain pressure can be carried out.

In an embodiment of the present invention, the heat treatment apparatus further comprises a vacuum pump, and a temperature sensor and a pressure sensor for monitoring temperature and pressure, respectively, in real time; the vacuum pump is communicated with the heater or the heating box body 1, and the vacuum pump uses a turbine vacuum pump to ensure that the vacuum degree of the heating box body 1 reaches below 10 Pa.

In an embodiment of the invention, the heater may be an oven.

Fig. 9 shows another heat treatment apparatus in an embodiment of the present invention, which includes a heater (not shown) and a heating case 1 fitted with the heater, the heating case 1 including a filter 2, a supporter 3, and a heating tub 5 provided inside thereof; wherein, the heating wire (not shown) is wound on the outer side wall of the heating barrel 5, the heating barrel 5 is arranged inside the heating box body 1, and the storage rack 3 is arranged in the heating barrel 5.

In the above-described embodiment, the heating tub 5 is provided in the heating box body 1, so that the heating box body 1 has a heating function. Because the heating of a common vacuum oven is realized through heat radiation, and the silicon wafer is far away from a heat source, the temperature is not uniform, and the deviation between the actual temperature and the set temperature is large. Therefore, the heating barrel 5 is arranged in the heating box body 1, so that the uniformity can be improved, the temperature can be improved, and the problem that the conventional oven cannot be heated too high is solved; and increasing the temperature can reduce the overall heating time.

A temperature sensor and a pressure sensor for monitoring temperature and pressure in real time are further arranged in the heating box body 1 shown in fig. 9.

Fig. 10 shows another heat treatment apparatus in the embodiment of the present invention, which includes a heating box 1, and a first connection valve 6, a second connection valve 7 and a power supply 8 which are arranged on the heating box 1, wherein the first connection valve 6 can be used for connecting with a vacuum generator, the second connection valve can be used for introducing inert gas to expand the application range of the heating box, and the inert gas can be nitrogen, helium, argon, etc. The inside of heating box body 1 is provided with hot plate 9, and power 8 is connected with hot plate 9 electricity for the heating of the detector wafer 4 after the tape-out completion, and in the heat treatment operation, can directly place the detector wafer 4 after the tape-out completion on hot plate 9 and heat, hot plate 9 has heating and support function simultaneously.

A temperature sensor and a pressure sensor are further provided inside the heating box 1 shown in fig. 10 to monitor the temperature and the pressure inside the heating box 1 in real time.

The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.