阅读说明：本技术 一种图像传感器和一种消除信号偏移的方法 (Image sensor and method for eliminating signal offset ) 是由 雷述宇 于 2020-05-14 设计创作，主要内容包括：本申请提供一种图像传感器和一种消除信号偏移的方法。该传感器包括像素部,像素部包括按照矩阵状布置的多个像素电路,像素电路包括光电转换元件；像素驱动部,像素驱动部用于驱动所述像素部中的电信号进行传输,包括：第一读取模块,根据第一读取信号读出像素电路的第一信号,根据第一读取信号读取像素读出部中的第一参考信号；第二读取模块,根据第二读取信号读出像素电路的第二信号,根据第二读取信号读取像素读出部中的第二参考信号；像素读出部,像素读出部用于读取像素部中的电信号；像素读出部,根据所述第一信号,第二信号和第一参考信号,第二参考信号,输出所述第一信号与第二信号之间的差值。(The application provides an image sensor and a method for eliminating signal offset. The sensor includes a pixel portion including a plurality of pixel circuits arranged in a matrix, the pixel circuits including photoelectric conversion elements; the pixel driving part is used for driving the electric signals in the pixel part to be transmitted and comprises: a first reading module for reading out a first signal of the pixel circuit according to a first reading signal and reading a first reference signal in the pixel reading-out section according to the first reading signal; a second reading module reading a second signal of the pixel circuit according to a second reading signal, and reading a second reference signal in the pixel reading section according to the second reading signal; a pixel reading section for reading an electric signal in the pixel section; and a pixel reading section for outputting a difference between the first signal and the second signal based on the first signal, the second signal, and a first reference signal and a second reference signal.)

1. An image sensor, comprising:

a pixel section including a plurality of pixel circuits arranged in a matrix, the pixel circuits including photoelectric conversion elements;

the pixel driving part is used for driving the electric signals in the pixel part to be transmitted and comprises:

a first reading module reading out a first signal of the pixel circuit according to a first reading signal, and reading a first reference signal in the pixel readout section according to the first reading signal;

a second reading module reading out a second signal of the pixel circuit according to a second reading signal, and reading a second reference signal in the pixel readout part according to the second reading signal;

a pixel readout section for reading an electric signal in the pixel section;

the pixel readout section outputs a difference between the first signal and the second signal based on the first signal, the second signal, the first reference signal, and the second reference signal.

2. The image sensor according to claim 1, wherein the pixel readout section includes a comparison module, wherein the comparison module is provided with a reset circuit, and the reset circuit of the comparison module activates a reset function when the first reading module operates.

3. The image sensor according to claim 1 or 2, wherein the pixel readout section further includes a charge storage unit, the first signal and the second signal are stored in the first charge storage unit, and the first reference signal and the second reference signal are stored in the second charge storage unit.

4. The image sensor of any of claims 1 to 3, wherein the first reference signal is a maximum electrical signal of the ramp signal.

5. The image sensor of claim 4, wherein the second reference signal is a ramp signal.

6. A method for canceling signal offset, comprising:

reading the first signal and the first reference signal;

reading the second signal and the second reference signal;

outputting a difference between the first signal and the second signal according to the first signal, the second signal and the first reference signal, the second reference signal.

7. The method of canceling signal offset according to claim 6, wherein the first signal and the second signal are signals at different times on the same signal path.

8. The method of canceling signal offset according to claim 7, wherein the first reference signal is a maximum electrical signal of a ramp signal.

9. The method of canceling signal offset according to claim 8, wherein the second reference signal is the ramp signal.

Technical Field

The present application relates to the field of image sensors, and more particularly, to a metal oxide semiconductor image sensor.

Background

With the development of image sensor technology, an image sensor for 3D imaging technology is receiving much attention, however, in a 3D imaging circuit, a pixel unit has two charge traps, i.e., two tap structures, and depth information of a measured object, i.e., a distance to the measured object, can be obtained by demodulating electrical signals output by the two taps to make a difference, thereby forming a 3D image of the measured object.

However, the electrical signals output by the two taps have mismatch problems because different current paths are used in the image sensor, that is, the electrical signals output by the two taps have physically different signal paths, which include Source Followers (SFs), and the performance of the SFs in the different signal paths is different, that is, the SFs are not matched.

As the size of a pixel unit is smaller and smaller, the area of a source follower in each pixel is smaller and smaller, so that the problem of mismatch of SF in the pixel is more and more serious, the mismatch problem has a greater influence on the accuracy of a demodulated photo-generated signal and becomes a main factor influencing the ranging accuracy, and in addition, as the mismatch of SF tubes in the pixel presents randomness in the whole array, great pressure is brought to the post data processing.

In addition, when the distance measurement is performed, the array-level pixels need to integrate and read out photo-generated charges, and ideally, the photo-generated charges change linearly with the increase of the integration time, but the capacitance of a Floating Diffusion (FD) point in a pixel unit is nonlinear, and finally, the voltage of the integrated photo-generated charges on the capacitance also changes nonlinearly with the integration time. Therefore, the nonlinearity also causes a problem of quantization linearity in data processing of the electric signals output by the two taps.

Disclosure of Invention

In order to solve the problems in the prior art, the application provides an image sensor and a method for eliminating signal offset, and the method is used for reading an electric signal and a reference signal of a pixel circuit in the image sensor twice and outputting a difference value of the electric signals read twice in the pixel circuit so as to eliminate the problem of transistor mismatch in the pixel circuit and output an accurate signal.

In a first aspect, an image sensor is provided, including: a pixel section including a plurality of pixel circuits arranged in a matrix, the pixel circuits including photoelectric conversion elements; the pixel driving part is used for driving the electric signals in the pixel part to be transmitted and comprises: a first reading module reading out a first signal of the pixel circuit according to a first reading signal, and reading a first reference signal in the pixel readout section according to the first reading signal; a second reading module reading a second signal of the pixel circuit according to a second reading signal, and reading a second reference signal in the pixel reading section according to the second reading signal; a pixel readout section for reading an electric signal in the pixel section; the pixel readout section outputs a difference between the first signal and the second signal based on the first signal, the second signal, and the first reference signal and the second reference signal.

The output signal is a difference between the first signal and the second signal, and therefore, a deviation between the two signals caused by the devices in the pixel portion can be eliminated.

In some embodiments of the first aspect, the pixel readout section comprises a comparison module, wherein the comparison module is provided with a reset circuit, the reset circuit of the comparison module activating a reset function when the first driving section is operated.

By turning on the reset circuit of the comparison module, the deviation caused by the input device in the comparison module circuit can be further eliminated.

In some embodiments of the first aspect, the pixel readout section further comprises a charge storage unit, the first and second signals are stored in the first charge storage unit, and the first and second reference signals are stored in the second charge storage unit.

In some embodiments of the first aspect, the first reference signal is a maximum electrical signal of the ramp signal.

In some embodiments of the first aspect, the second reference signal is a ramp signal.

In a second aspect, a method for eliminating signal offset is provided, including: reading the first signal and the first reference signal; reading the second signal and the second reference signal; and outputting the difference value between the first signal and the second signal according to the first signal, the second signal and the first reference signal and the second reference signal.

The output signal is the difference between the first signal and the second signal, and thus, the deviation between the two signals can be eliminated.

In some embodiments of the second aspect, the first signal and the second signal are signals at different times on the same signal path.

In some embodiments of the second aspect, the first reference signal is a maximum electrical signal of the ramp signal and the second reference signal is the ramp signal.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.

Fig. 1 is a structural view of a conventional image sensor;

FIG. 2 is a block diagram of an image sensor provided in an embodiment of the present application;

fig. 3 is another structural diagram of an image sensor provided in an embodiment of the present application;

fig. 4 is a circuit configuration diagram of a pixel unit in a conventional image sensor;

fig. 5 is a structural diagram of a part of circuits of a pixel driving section and a pixel reading section provided in an embodiment of the present application;

fig. 6 is a timing diagram of a partial circuit of a pixel driving section and a pixel reading section provided in an embodiment of the present application;

fig. 7 is a flowchart of a method for canceling signal offset according to an embodiment of the present disclosure.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.

As shown in fig. 1, a conventional image sensor 100 includes a pixel portion 101, a pixel driving portion 102 and a pixel readout portion 103, wherein the pixel portion 101 includes pixel units arranged in an array, the pixel portion 101 is configured to receive a light signal and generate a photo-generated electrical signal, the pixel driving portion 102 is configured to drive the pixel portion 101 to read the photo-generated electrical signal, the photo-generated electrical signal is finally read out to the pixel readout portion 103, and the pixel readout portion 103 processes the received photo-generated electrical signal.

With respect to the defects existing in the conventional image sensor 100, the structure of the image sensor in the embodiment of the present application is described below with reference to fig. 2 and 3.

As shown in fig. 2, which is a structural diagram of an image sensor 200 according to an embodiment of the present disclosure, the image sensor 200 includes a pixel portion 210, a first reading module 221, a second reading module 222, and a pixel readout portion 230, and a workflow of the image sensor 200 is as follows:

first, the first reading module 221 reads a first signal in the pixel portion 210, and at the same time, the first reading module 221 reads a first reference signal in the pixel readout portion 230;

then, the second reading module 222 reads the second signal in the pixel part 210, and at the same time, the second reading module 222 reads the second reference signal in the pixel readout part 230;

finally, the pixel readout section outputs a difference between the first signal and the second signal based on the first signal, the second signal, the first reference signal, and the second reference signal.

The first signal may be a signal of a light generation current in the pixel portion 210, or may be a signal of a light generation voltage in the pixel portion 210; the first reference signal may be a maximum value of a ramp signal generated by a ramp voltage generator (not shown) in the pixel readout part 230, and the second reference signal may be a ramp signal generated by a ramp voltage generator (not shown) in the pixel readout part 230.

Alternatively, as shown in fig. 3, the pixel readout part 330 may further include a comparison module 331, and the comparison module 331 may be provided with a reset circuit, which is turned on at the same time as the first reading module 321 operates, for eliminating mismatches of some transistors in the comparator.

Alternatively, the first reading module may include a charge storage unit, which may be a capacitor or other device in an integrated circuit that can store electric charge, and correspondingly, the second reading module may also include a charge storage unit, which may be a capacitor or other device in an integrated circuit that can store electric charge.

As shown in fig. 4, the pixel portion 101 mentioned in the embodiment of the present application may include a PhotoDiode (PD) 401 for receiving a light signal and generating photo-generated charges, a transfer Gate 402 (transmission Gate, TG) for controlling transfer of the photo-generated charges in the PhotoDiode, a Floating Diffusion capacitor 404 (FD) for storing the photo-generated charges generated in the PhotoDiode, a reset transistor 403 for resetting charges in the Floating Diffusion capacitor, a selection transistor 405 for selecting whether charges of the pixel are read out by the pixel readout portion, and a source follower 406 for converting the photo-generated charges stored in the FD into a current and outputting the current to a column readout signal line VOUT in the pixel array.

That is, when a photon is incident on the photodiode 401, the photodiode 401 generates a photo-generated charge that is transferred through the transfer gate 402 onto the capacitor 404 for charge integration, and the integrated charge is amplified by the source follower 406 to form an output current.

Optionally, the pixel circuit may further include a reset transistor (not shown) for resetting the photodiode, and optionally, the readout portion in the pixel circuit may be separately read out by two taps, that is, two taps may be provided for one photodiode, each tap is connected to a different readout circuit, and the readout circuit may include the transfer gate 402, the reset transistor 403, and the selection transistor 405.

Next, with reference to fig. 5 and 6, the circuits of the pixel driving section and the pixel readout section provided in the embodiment of the present application will be described by taking an example in which the first signal is SIG1, the second signal is SIG2, the first reference signal is VRAMP _ H, the second reference signal is VRAMP, the first charge storage unit is the capacitor 5030, and the second charge storage unit is the capacitor 5031.

During the selected period of the row of the pixel array, i.e. when the SEL signal is high, the photodiode generates photo-generated charge, after the transfer gate is opened, the FD capacitor integrates the photo-generated charge, and then converts the integrated voltage into current through SF and outputs the current to the column line, as shown in fig. 5 and 6, where fig. 6 is the timing diagram of fig. 5:

s100, the switch 5010 and the switch 5011 of the first readout module in the pixel driving section are closed, the first signal SIG1 output by the pixel circuit and the first reference signal VRAMP _ H generated in the pixel readout module are read, at this time, the left plate of the capacitor 5030 is charged, that is, the capacitor 5030 samples the Vsig1 signal, that is, the voltage signal after pixel integration, which represents the number of integrated electrons at the FD point, and the left plate of the capacitor 5031 is also charged, that is, the capacitor 5030 samples the VRAMP _ H signal.

Alternatively, when switch 5040 is closed before or simultaneously with the closing of switches 5010 and 5011, the right plates of capacitor 5030 and capacitor 5031 are also charged, i.e., capacitor 5030 and capacitor 5031 sample the reference signal of the comparator.

At this time, the charges on the two capacitors 5030 and 5031 in the circuit are:

QC1＝(Vsig1+Vos-Vref)*C1；

QC2＝(VRAMP_H+Vos-Vref)*C2；

it should be noted that Vos is a mismatch voltage of the comparator in fig. 5, VRAMP _ H is a maximum value of the ramp voltage, Vref is an input reference voltage of the comparator, C1 is the capacitance of the capacitor 5030, and C2 is the capacitance of the capacitor 5031.

Then, the charge on the FD capacitor is reset, and optionally, as shown in fig. 4, the RST signal is raised to a high level for a period of time, e.g., 5us, at which time the signal on SF is output:

s200, the switch 5010, the switch 5011 and the switch 5040 shown in fig. 5 are opened, the switch 5020 and the switch 5021 are closed, at this time, the left plate of the capacitor 5030 is charged, that is, the capacitor 5030 samples the reset signal in the pixel circuit, the left plate of the capacitor 5031 is charged, that is, the capacitor 5031 samples the VRAMP signal, and it should be noted that VRAMP is a ramp signal, that is, a signal whose voltage linearly changes with time.

At this time, the charges on the two capacitors 5030 and 5031 in the circuit are:

QC1’＝(VN-(Vsig2+Vos))*C1；

QC2’＝(VN-(VRAMP+Vos))*C2；

when VRAMP is changed such that:

when VRAMP _ H + Vos- (VRAMP + Vos) ═ Vsig1+ Vos- (Vsig2+ Vos), the comparison module inverts to output Vout.

Therefore, the circuit structure completes the signal processing in the pixel portion through the two steps, namely, after the signal processing, the mismatch of SF and the mismatch of a comparator are eliminated, and finally, the difference value of the quantized signal and the signal reset voltage is output.

That is to say, through adopting the circuit that this application provided, not only can eliminate the mismatch problem of SF, can also eliminate the mismatch problem of comparison module in the quantization process, improved the precision of range finding among the prior art.

It should be noted that, because FD has a non-linearity problem when integrating the photo-generated signal, the ramp signal VRAMP in the present application may be a non-linear ramp signal that is generated by an adaptive ramp circuit and matches with the integration voltage, and therefore, the pixel driving circuit in the present application may also improve the non-linearity problem of the integration capacitance during quantization.

In addition, the present application also provides a method for eliminating signal offset, as shown in fig. 7:

s701, reading a first signal and a first reference signal, optionally, the reading may be performed through a first switch and a first sampling capacitor, the first signal may be read from the pixel portion, the first reference signal may be read from the pixel read portion, the first signal may be a signal after pixel integration, and the first reference signal may be a maximum value of the ramp signal.

S702, reading the second signal and the second reference signal, optionally, the reading may be performed by using a second switch and a second sampling capacitor, the first human signal may be read from the pixel portion, the second reference signal may be read from the pixel read portion, the second signal may be a signal after the pixel is reset, and the second reference signal may be a ramp signal.

S703, outputting a difference between the first signal and the second signal according to the first signal, the second signal, the first reference signal and the second reference signal. Optionally, the difference between the first signal and the second signal is quantized and then output. It should be noted that the first signal and the second signal may be signals at different time points on the same signal path. By this method, mismatch between the first signal and the second signal can be eliminated, and a quantized difference value can be output.

The method is applied to the image sensor provided in the foregoing embodiment, and the implementation principle and the technical effect are similar, which are not described herein again.

It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application. It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.