阅读说明：本技术 氮化物半导体外延叠层结构及其功率元件 (Nitride semiconductor epitaxial stacked structure and power element thereof ) 是由 杜尚儒 杨亚谕 刘家呈 张宗正 于 2018-02-05 设计创作，主要内容包括：本发明公开一种氮化物半导体外延叠层结构及其功率元件,该氮化物半导体外延叠层结构包含一硅基板；一含铝成核层,配置于前述硅基板上；一缓冲结构,配置于前述含铝成核层上,依序包含：一第一超晶格外延结构；一第一氮化镓系厚层,配置于前述第一超晶格外延结构上；一第二超晶格外延结构,配置于前述第一氮化镓系厚层上；及一第二氮化镓系厚层,配置于前述第二超晶格外延结构上；一通道层,配置于前述缓冲结构上；一阻挡层,配置于前述通道层上；及一二维电子气层,位于邻近前述通道层与前述阻挡层间的一界面；其中,该第一氮化镓系厚层及该第二氮化镓系厚层的总厚度大于两微米。(The invention discloses a nitride semiconductor epitaxial laminated structure and a power element thereof, wherein the nitride semiconductor epitaxial laminated structure comprises a silicon substrate; an aluminum-containing nucleation layer disposed on the silicon substrate; a buffer structure disposed on the aluminum-containing nucleation layer, sequentially comprising: a first superlattice epitaxial structure; a first GaN thick layer disposed on the first superlattice epitaxial structure; a second superlattice epitaxial structure disposed on the first GaN thick layer; and a second gallium nitride thick layer disposed on the second superlattice epitaxial structure; a channel layer configured on the buffer structure; a blocking layer configured on the channel layer; and a two-dimensional electron gas layer located adjacent to an interface between the channel layer and the barrier layer; wherein the total thickness of the first and second GaN thick layers is greater than two micrometers.)

1. A nitride semiconductor epitaxial stack structure, comprising:

a silicon substrate;

an aluminum-containing nucleation layer, which comprises aluminum in a composition ratio and is disposed on the silicon substrate;

a buffer structure disposed on the aluminum-containing nucleation layer, sequentially comprising:

a first superlattice epitaxial structure;

a first gallium nitride system layer configured on the first superlattice epitaxial structure; and

a second superlattice epitaxial structure disposed on the first gallium nitride system layer;

a channel layer configured on the buffer structure; and

a barrier layer disposed on the channel layer;

wherein the first superlattice epitaxial structure comprises a first average aluminum composition ratio, the first gallium nitride system layer comprises a first aluminum composition ratio, and the second superlattice epitaxial structure comprises a second average aluminum composition ratio;

wherein the aluminum composition ratio of the aluminum-containing nucleation layer is not less than the first average aluminum composition ratio > the first aluminum composition ratio > the second average aluminum composition ratio.

2. The nitride semiconductor epitaxial stack structure of claim 1, wherein the first superlattice epitaxial structure is alternatively stacked by a plurality of aluminum nitride superlattice layers and a plurality of aluminum gallium nitride superlattice layers; the second superlattice epitaxial structure is formed by alternately stacking a plurality of aluminum gallium nitride superlattice layers and a plurality of gallium nitride superlattice layers.

3. The nitride semiconductor epitaxial stack structure of claim 1, wherein the channel layer is a gallium nitride layer and the barrier layer is an aluminum gallium nitride layer.

4. The nitride semiconductor epitaxial stack structure of claim 1, further comprising an aluminum gallium nitride back-barrier layer between the channel layer and the buffer structure.

5. The nitride semiconductor epitaxial stack structure of claim 1, further comprising a second gallium nitride based layer on the second superlattice epitaxial structure, the second gallium nitride based layer comprising a second aluminum composition ratio, and the first aluminum composition ratio being greater than the second aluminum composition ratio.

6. The nitride semiconductor epitaxial stack structure of claim 1, wherein the first superlattice epitaxial structure and/or the second superlattice epitaxial structure each include dopants therein.

7. The nitride semiconductor epitaxial stack structure of claim 5, wherein the first gallium nitride based layer and/or the second gallium nitride based layer respectively include a dopant therein.

8. The nitride semiconductor epitaxial stack structure of any of claims 6 or 7, wherein the dopant comprises at least one of iron or carbon.

9. The nitride semiconductor epitaxial stack structure of claim 1, wherein the first gallium nitride based layer has a thickness greater than 1000 nanometers.

10. A power element, comprising:

the nitride semiconductor epitaxial stacked layer structure according to any one of claims 1 to 9; and

a source electrode, a gate electrode, and a drain electrode, or a cathode and an anode, respectively, disposed on the nitride semiconductor epitaxial stacked structure;

wherein the gate electrode is located between the source electrode and the drain electrode.

Technical Field

The present invention relates to a nitride semiconductor epitaxial stacked structure and a power device thereof, and more particularly, to a gallium nitride semiconductor epitaxial stacked structure applied to a semiconductor power device and a power device thereof.

Background

In recent years, due to the increasing demand for high frequency and high power device products, the band gap of gallium nitride (GaN) as a semiconductor material of III-V family is about 3.4eV, and the thermal conductivity is about 3.4eV>1.5W/cm, wide band gap and high thermal conductivity (easy heat dissipation) suitable for operation in high temperature and chemical corrosion resistant environments. In addition, the breakdown field of the gallium nitride material is (3 × 10)⁶V/cm), the carrier transmission speed can reach 3 multiplied by 10⁷cm/s, which makes the GaN material suitable for microwave high-power device to which high voltage can be applied without breaking. Therefore, nitride semiconductor power devices based on gallium nitride materials, such as aluminum gallium nitride/gallium nitride (AlGaN/GaN) semiconductor power devices, have high electron mobility, very fast switching speed, and device characteristics capable of operating in high frequency, high power and high temperature operating environments, and are widely used in industrial applications, including electronic products, uninterruptible power systems, automobiles, motors, wind power generation, and particularly applied to power supplies (power supplies), DC/DC converters (DC/DC converters), and DC/AC inverters (AC/DC inverters).

However, in the conventional products, a substrate material which is relatively inexpensive but has a different lattice constant and thermal expansion coefficient from the nitride semiconductor material is selected in consideration of competitiveness such as efficiency and price. Therefore, when an epitaxial layer is formed on a substrate due to the difference in lattice constant and thermal expansion coefficient between the substrate material and the nitride semiconductor material, epitaxial defects are easily generated between the epitaxial layers. When the epitaxial defect density is high, the surface flatness of the epitaxial layer tends to be lowered, and when the epitaxial defect extends to the surface of the epitaxial layer, it becomes one of the causes of cracking (crack) on the surface of the epitaxial layer. Therefore, it is not easy to form a high-quality nitride semiconductor epitaxial stacked layer structure having a low epitaxial defect density, a flat surface, less surface cracks, and/or smaller size on a substrate. Among various substrate materials, silicon substrates are widely used in nitride semiconductor epitaxial stack structure growth with a reasonable cost structure. However, growing a high-quality nitride semiconductor epitaxial stacked structure on a silicon substrate has been a problem to be solved in the art. In addition, the performance of devices such as power devices and schottky diode devices manufactured by the stacked epitaxial nitride semiconductor structure is also affected by the quality of the stacked epitaxial nitride semiconductor structure.

Referring to fig. 1, fig. 1 shows a Transmission Electron Microscope (TEM) image of a conventional nitride semiconductor epitaxial stacked structure 100 that can be used for power device fabrication. The nitride semiconductor epitaxial stacked structure 100 is formed by directly forming an aluminum nitride nucleation layer 120 on the (111) surface of a silicon substrate 110 by metal-organic chemical vapor deposition (MOCVD) along the [0001] direction, and then forming a superlattice stack 130 comprising a plurality of aluminum nitride superlattice layers 131(18 nm thick) and gallium nitride superlattice layers 132(5 nm thick) alternately stacked on the aluminum nitride nucleation layer 120 by the same MOCVD. Then, a thick layer 140 of gallium nitride with a thickness greater than 1000 nm is formed on the superlattice stack 130 by MOCVD. A barrier layer 152 is then formed thereon by MOCVD, and two-dimensional electron gas (2 DEG, not shown) is generated adjacent to the junction of the thick layer 140 of gallium nitride and the barrier layer 152.

As can be seen from fig. 1, even with the structure of the superlattice stack 130 underneath the nitride semiconductor epitaxial stack 100, many epitaxial defects 145 still form in the thick gan layer 140 and extend up to the upper half of the thick gan layer 140, even the barrier layer 152.

Disclosure of Invention

The invention relates to a nitride semiconductor epitaxial laminated structure, which comprises a silicon substrate; an aluminum-containing nucleation layer disposed on the silicon substrate; a buffer structure disposed on the aluminum-containing nucleation layer, sequentially comprising: a first superlattice epitaxial structure, a first gallium nitride system thick layer disposed on the first superlattice epitaxial structure, a second superlattice epitaxial structure disposed on the first gallium nitride system thick layer, and a second gallium nitride system thick layer disposed on the second superlattice epitaxial structure; a channel layer configured on the buffer structure; a blocking layer configured on the channel layer; and a two-dimensional electron gas layer located adjacent to an interface between the channel layer and the barrier layer; wherein the total thickness of the first and second GaN thick layers is greater than two micrometers.

A semiconductor power device comprises the nitride semiconductor epitaxial stacked structure; and a source electrode, a gate electrode, and a drain electrode, or a cathode and an anode, respectively, disposed on the nitride semiconductor epitaxial stacked structure; wherein the gate electrode is located between the source electrode and the drain electrode.

In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.

Drawings

Fig. 1 is a TEM image of a conventional nitride semiconductor epitaxial stacked structure;

FIG. 2 is a side view of a nitride semiconductor epitaxial stacked layer structure according to a first embodiment of the present invention;

fig. 3A is a partial TEM image of a conventional nitride semiconductor epitaxial stacked structure including a buffer structure portion;

fig. 3B is a TEM image of a portion of a nitride semiconductor epitaxial stacked layer structure including a buffer structure portion according to a second embodiment of the present invention;

fig. 4A to 4C are side views of a partial epitaxial stacked structure including a buffer structure portion in a nitride semiconductor epitaxial stacked structure according to third to fifth embodiments of the present invention;

fig. 5 is a top view of a power element employing a nitride semiconductor epitaxial stacked layer structure according to a sixth embodiment of the present invention;

fig. 6A is a partially enlarged top view schematically illustrating a nitride semiconductor power device cell employing a nitride semiconductor epitaxial stacked layer structure according to a sixth embodiment of the present invention;

FIG. 6B is a schematic cross-sectional view taken along line FF' of FIG. 6A;

FIG. 7 is a side view of a nitride semiconductor epitaxial stacked structure according to a sixth embodiment of the present invention;

FIG. 8 is a schematic side view of a Schottky diode element unit according to a seventh embodiment of the present invention;

FIG. 9A is a diagram showing the electrical test results of a power device test unit using a conventional nitride semiconductor epitaxial stacked structure;

fig. 9B is a diagram showing the result of electrical tests on a power device test unit using the nitride semiconductor epitaxial stacked layer structure according to the first embodiment of the present invention;

FIG. 10A is a schematic side view of a power device test unit using a conventional nitride semiconductor epitaxial stack structure;

fig. 10B is a side view schematically showing a power device test unit using the nitride semiconductor epitaxial stacked layer structure according to the first embodiment of the present invention.

Description of the symbols

60. 60': dielectric layer

70: source electrode

80: drain electrode

90: grid electrode

100. 200 and 500: nitride semiconductor epitaxial stack structure

100 ', 200': local epitaxial stack

110. 210: substrate

120. 220, and (2) a step of: nucleation layer of aluminum nitride

130: superlattice laminate

131: aluminum nitride superlattice layer

132: gallium nitride superlattice layer

140: thick layer of gallium nitride

145. 245: epitaxial defect

400: element function structure

430. 460, 490: buffer structure

410: channel layer

152. 420: barrier layer

310. 432, 461, 492: first superlattice epitaxial structure

320. 320', 431, 462, 491: a first gallium nitride based thick layer

330. 434, 463 and 494: second superlattice epitaxial structure

340. 340', 433, 464, 493: second gallium nitride based thick layer

465. 496: third superlattice epitaxial structure

466. 495: third gallium nitride based thick layer

510: cap layer

550: back barrier layer

A: anode

C: cathode electrode

E1: power element unit

E2: schottky diode element unit

E3, E4: power element test unit

O1-O4: ohmic electrode

S: power element

S70: source electrode pad

S80: drain pad

S90: grid pad

FF': cutting line

Detailed Description

The following embodiments will explain the concept of the present invention along with the accompanying drawings, in which like or similar parts are designated by the same reference numerals, and in which the shape or thickness of elements may be enlarged or reduced. It is to be noted that elements not shown or described in the drawings may be of a type known to those skilled in the art.

Referring to fig. 2, fig. 2 is a side view of a nitride semiconductor epitaxial stacked structure 200 according to a first embodiment of the present invention. The nitride semiconductor epitaxial stack 200 includes a silicon substrate 210, an aluminum nitride nucleation layer 220 formed on the silicon substrate 210, and a buffer structure 300 formed on the aluminum nitride nucleation layer 220. Wherein the buffer structure 300 comprises a first aluminum gallium nitride superlattice layer (Al) sequentially from bottom to top_x1Ga_1-x1N, thickness d₁) And a second AlGaN superlattice layer (Al)_y1Ga_1-y1N, thickness d₂) A first superlattice epitaxial structure 310 formed by two superlattice layers stacked alternately, a first gallium nitride thick layer (Al) with a thickness greater than 1000 nm_z1Ga_1-z1N)320, a third aluminum gallium nitride superlattice layer (Al)_x2Ga_1-x2N, thickness d₃) And a fourth aluminum gallium nitride superlattice layer (Al)_y2Ga_1-y2N, thickness d₄) A second superlattice epitaxial structure 330 formed by two superlattice layers stacked alternately, a second gallium nitride thick layer (Al) with a thickness greater than 1000 nm_z2Ga_1-z2N) 340. Next, an element function structure 400 is formed on the buffer structure 300. Wherein the device functional structure 400 comprises aluminum gallium nitride (Al)_aGa_1-aN)，0≤a<1 and a channel layer 410 of aluminum gallium nitride (Al)_bGa_1-bN) formed barrier layer 420, 0<b<1, and a<b. Finally, a cap layer 510 of undoped gallium nitride (u-GaN) is formed over the barrier layer 420.

In the present embodiment, the device function structure 400, such as the gan channel layer 410 and the gan barrier layer 420 of the power device, can generate a 2DEG in the vicinity of the junction thereof. Of course, in another embodiment, the functional structure of the device may also or alternatively be an active layer (not shown) of the light emitting diode device, and when the light emitting diode device injects current, the electron and the hole recombine in the active layer to generate light.

In the present embodiment, the nitride semiconductor epitaxial stacked layer structure 200 is formed with an aluminum nitride nucleation layer 220 along the [0001] direction on the (111) surface of the substrate 210. It is noted that the material of the substrate 210 is not limited to a silicon substrate, and may be a semiconductor material or an oxide material, the semiconductor material may include, for example, silicon (Si), gallium nitride (GaN), silicon carbide (SiC), gallium arsenide (GaAs), aluminum nitride (AlN), and the like, and the oxide material may include, for example, sapphire (sapphire). When differentiated by conductivity, the substrate 210 itself may be a conductive substrate including a substrate such as a Silicon (Si) substrate, a gallium nitride (GaN) substrate, or a gallium arsenide (GaAs) substrate, or an insulating substrate including a substrate such as a sapphire (sapphire) substrate, an Silicon On Insulator (SOI) substrate, or an aluminum nitride (AlN). In addition, the substrate 210 may be selectively doped with a substance to change its conductivity to form a conductive substrate or a non-conductive substrate, and in the case of a silicon (Si) substrate, it may be doped with boron (B), arsenic (As), or phosphorus (P) to make it conductive. In the present embodiment, the substrate 210 is a boron (B) -doped p-type conductive semiconductor silicon substrate (Si) with a thickness of about 175-1500 μm.

Next, the aluminum nitride nucleation layer 220 is epitaxially grown on the (111) plane of the silicon substrate 210, wherein the aluminum nitride nucleation layer 220 is grown along the [0001] direction, and has a thickness of about several tens of nanometers or several hundreds of nanometers, which can reduce the lattice difference between the substrate 210 and the upper semiconductor layer. The epitaxial growth is performed by, for example, Physical Vapor Deposition (PVD), Atomic Layer Deposition (ALD), metal-organic chemical vapor deposition (MOCVD), or molecular-beam epitaxy (MBE). The aluminum nitride nucleation layer 220 may provide better epitaxial quality for subsequently formed semiconductor epitaxial stacks, such as buffer structures, channel layers …, and the like. The material of the aluminum nitride nucleation layer 220 is, for example, a iii-v semiconductor material including aluminum nitride (AlN), gallium nitride (GaN), aluminum gallium nitride (AlGaN), or a mixture thereof, and the structure of the aluminum nitride nucleation layer 220 may be, for example, amorphous, polycrystalline, single crystal, or a mixture layer with gradually changed crystal quality. In the present embodiment, the aluminum nitride nucleation layer 220 is aluminum nitride (AlN) with a thickness of about 20 to 50nm, and is formed by MOCVD.

After the formation of the aluminum nitride nucleation layer 220, a buffer structure 300 is grown above the aluminum nitride nucleation layer 220, as described above, the buffer structure 300 can be used to reduce the lattice difference between the nucleation layer 220 and the upper channel layer 410 and the epitaxial defect density. The buffer structure 300 is fabricated in a manner similar to that described above, such as Physical Vapor Deposition (PVD), Atomic Layer Deposition (ALD), metal-organic chemical vapor deposition (MOCVD), or molecular-beam epitaxy (MBE). By the buffer structure 300, a high quality device functional structure 400 with low epitaxial defect density, flat surface, less surface cracks and/or smaller size can be formed thereon. In the present embodiment, the buffer structure 300 is composed of the following four parts and is formed by MOCVD, and the growth steps are described below.

First, a first aluminum gallium nitride superlattice layer (Al) is formed on the aluminum nitride nucleation layer 220 by MOCVD_x1Ga_{1- x1}N, thickness d₁) And a second AlGaN superlattice layer (Al)_y1Ga_1-y1N, thickness d₂) The two superlattice layers are alternately stacked to form a combined first superlattice epitaxial structure 310. Wherein, in order to avoid the excessive stress generated by the too large difference of lattice constants between the first superlattice epitaxial structure 310 and the underlying aluminum nitride nucleation layer 220, the average aluminum content of the two aluminum gallium nitride superlattice layers in the first superlattice epitaxial structure 310 is preferably within the range of 0.3 (x1 × d)₁+y1×d₂)/(d₁+d₂) Is less than or equal to 1, x1 is not equal to y 1. In addition, the thickness d of each superlattice layer in the first superlattice epitaxial structure 310₁、d₂Preferably not more than 50 nm. By the structural characteristics of the first superlattice epitaxial structure 310, stress accumulation within the bulk nitride semiconductor epitaxial stack structure 200 may be relieved and epitaxial defects originating between the silicon substrate 210 and the aluminum nitride nucleation layer 220, e.g., due to lattice mismatch or stress, may be blocked from propagating along the quasi-vertical directionExtending in the surface direction of the silicon substrate 210 to the upper portion of the nitride semiconductor epitaxial stacked structure 200, which in turn affects the quality of the upper channel layer 410, and cracks are generated if the defects continue to extend to the surface. Here, the average aluminum composition is suitably 0.3. ltoreq. (x1 XD)₁+y1×d₂)/(d₁+d₂) Less than or equal to 1, the difference of lattice constants between the aluminum nitride nucleation layer 220 and the first superlattice epitaxial structure 310 can be reduced, the stress generation during epitaxy can be reduced, and the cracks generated on the surface of the epitaxial lamination layer can also be reduced. In this embodiment, the first superlattice epitaxial structure 310 having 100 constituent layers (50 pairs) is formed by the MOCVD method, but the number of constituent layers is not limited to this number, and the preferred superlattice epitaxial structure may have 20 layers (10 pairs) to 300 layers (150 pairs); experiments in this embodiment show that when the number of constituent layers is less than 20, the superlattice epitaxial structure has a very low effect on alleviating stress accumulation and blocking epitaxial defects, and cannot prevent excessive or too large cracks from being generated in the subsequently grown semiconductor epitaxial stack layer with a sufficient thickness; when the number of constituent layers of the superlattice epitaxial structure is more than 300, the epitaxial process is time-consuming, which is not favorable for the economical manufacturing process of the entire nitride semiconductor epitaxial structure 200, and the superlattice epitaxial structure itself may cause the surface of the superlattice epitaxial structure to start to deteriorate and generate undesirable stress due to the excessively thick thickness.

In another embodiment, the first superlattice epitaxial structure 310 may be doped with an element such as carbon or iron to increase the in-layer resistance of the first superlattice epitaxial structure 310. In the present embodiment, the first superlattice epitaxial structure 310 formed by the MOCVD method is an aluminum gallium nitride layer doped with carbon impurities. The carbon-doped impurities of the present embodiment include intentional doping or unintentional doping. The preferred carbon impurity concentration range is 5X 10 when measured by Secondary Ion Mass Spectrometer (SIMS)¹⁷/cm³～1×10²⁰/cm³The range of (1). As a result of the experiment in this example, it was found that the carbon concentration is in the range of less than 5X 10¹⁷/cm³The resistance of the first superlattice epitaxial structure 310 is too low, and then the nitride semiconductor with too low resistance is usedWhen the bulk epitaxial stack structure is fabricated into a power device, the device cannot withstand the injection voltage sufficiently and cannot provide a high breakdown voltage, and the measured carbon concentration range is higher than 1 × 10²⁰/cm³At this time, the epitaxial quality of the first superlattice epitaxial structure 310 may be degraded due to the generation of epitaxial defects at an excessively high concentration.

Then, a first gallium nitride thick layer (Al) with a thickness greater than 1000 nm is formed on the first superlattice epitaxial structure 310 by MOCVD method_z1Ga_1-z1N)320, where the composition of the first gallium nitride based thick layer 320 may be, for example, pure gallium nitride or an aluminum gallium nitride layer with a low aluminum content. The addition of an appropriate aluminum element, for example, aluminum content of 0 ≦ z1 ≦ 0.05, can increase the band gap width of the first gallium nitride based thick layer 320, and when the nitride semiconductor epitaxial stacked layer structure 200 is fabricated into a power device, the device as a whole can theoretically have a high vertical operation voltage resistance, i.e., a high device breakdown voltage. Similarly, the first gan-based thick layer 320 may be doped with elements such as carbon or iron to increase the in-layer resistance of the first gan-based thick layer 320. In the present embodiment, the first gallium nitride-based thick layer 320 formed by the MOCVD method is an aluminum gallium nitride layer doped with carbon impurities. The carbon-doped impurities of the present embodiment include intentional doping or unintentional doping. The preferred carbon impurity concentration range is 5X 10 when measured by SIMS¹⁷/cm³～1×10²⁰/cm³The range of (1). The experimental results of this example show that when the carbon concentration is lower than 5 × 10¹⁷/cm³When the resistance of the first gan thick layer 320 is too low, the device cannot have sufficient capability to withstand the injected voltage and cannot provide a high breakdown voltage when the power device is fabricated using the nitride semiconductor epitaxial stacked structure with too low resistance, and the carbon concentration range obtained by the measurement is higher than 1 × 10²⁰/cm³In this case, the epitaxial defect is generated in the first GaN thick layer 320 due to the high concentration, which degrades the epitaxial quality.

Then, a third AlGaN superlattice is formed on the first GaN thick layer 320 by MOCVDLayer (A)_lx2Ga_1-x2N, thickness d₃) And a fourth aluminum gallium nitride superlattice layer (Al)_y2Ga_1-y2N, thickness d₄) And a second superlattice epitaxial structure 330 formed by alternately stacking and combining two superlattice layers. Wherein, in order to avoid the excessive stress generated by the too large difference of lattice constants between the second superlattice epitaxial structure 330 and the underlying first gallium nitride system thick layer 320, the average aluminum content of the two aluminum gallium nitride superlattice layers in the second superlattice epitaxial structure 330 is preferably within the range of 0 ≦ x (x2 × d)₃+y2×d₄)/(d₃+d₄) 0.05, x2 ≠ y2, and the thickness of each superlattice layer is preferably no more than 50 nm. Stress accumulation in the bulk nitride semiconductor epitaxial stack structure 200 is relieved by the second superlattice epitaxial structure 330 and epitaxial defects, such as lattice mismatch or stress generation, from the first gallium nitride-based thick layer 320 side can be continuously blocked and continue to extend upward along the direction perpendicular to the surface of the silicon substrate 210 as subsequent semiconductor epitaxial stacks grow. Here, the aluminum content is suitably 0. ltoreq. (x2 Xd)₃+y2×d₄)/(d₃+d₄) Less than or equal to 0.05, can reduce the difference of lattice constants between the first gallium nitride system thick layer 320 and the second superlattice epitaxial structure 330, reduce stress generation during epitaxy, and also reduce cracks generated on the surface of the epitaxial layer. In this embodiment, the second superlattice epitaxial structure 330 having 60 constituent layers (30 pairs) is formed, but the number of constituent layers is not limited to this number in practice. The preferred number of constituent layers of the superlattice epitaxial structure may be 20 (10 pairs) to 300 (150 pairs), and when the number of constituent layers is less than 20, the superlattice epitaxial structure has very low effects on relieving stress accumulation and blocking epitaxial defects, so that the subsequently grown semiconductor epitaxial stack cannot generate excessive or overlarge cracks under a sufficient thickness; when the superlattice epitaxial structure has more than 300 layers, the epitaxial process is too time-consuming, which is not favorable for the economical manufacturing process of the entire nitride semiconductor epitaxial stacked structure 200, and the fixed stacked superlattice epitaxial structure itself may cause the surface of the superlattice epitaxial structure to start to deteriorate and undesirable stress and other side effects may occur due to the excessively thick thickness.

Finally, in the second placeForming a second gallium nitride thick layer (Al) with a thickness greater than 1000 nm on the two superlattice epitaxial structures 330 by MOCVD method_z2Ga_1-z2N)340, where the composition of the second gallium nitride based thick layer 340 may be, for example, pure gallium nitride or an aluminum gallium nitride layer with a suitably low added aluminum content. Wherein, adding proper aluminum element, such as aluminum content is 0 ≦ z1 ≦ 0.05, can increase the band gap width of the second GaN thick layer 340, and when the nitride semiconductor epitaxial stacked structure 200 is subsequently fabricated into a power device, the device as a whole can theoretically have a higher vertical operation voltage resistance, i.e., a higher device breakdown voltage. In addition, the second gallium nitride-based thick layer 340 may be doped with an element such as carbon or iron to increase the in-layer resistance of the second gallium nitride-based thick layer 340. In this embodiment, the second gallium nitride-based thick layer 340 formed by the MOCVD method is an aluminum gallium nitride layer doped with carbon impurities. The carbon-doped impurities of the present embodiment include intentional doping or unintentional doping. The carbon impurity concentration range of this example was 5X 10 obtained when measured by SIMS¹⁷/cm³～1×10²⁰/cm³The range of (1). As a result of the experiments in this example, it can be found that the carbon concentration is lower than 5X 10¹⁷/cm³When the resistance of the second gan thick layer 340 is too low, the power device fabricated by the nitride semiconductor epitaxial stacked structure with too low resistance cannot have sufficient capability to withstand the injected voltage, and cannot provide a high breakdown voltage, and the carbon concentration range obtained by the measurement is higher than 1 × 10²⁰/cm³In this case, the second GaN-based thick layer 340 may have epitaxial defects due to an excessively high carbon concentration, which may degrade the epitaxial quality.

Similarly, the second superlattice epitaxial structure 330 may be doped with an element such as carbon or iron to increase the resistance of the superlattice epitaxial structure 330. In the present embodiment, the superlattice epitaxial structure 330 formed by the MOCVD method is an aluminum gallium nitride layer doped with carbon impurities. Similarly, the doped carbon impurity of the present embodiment includes intentionally doped or unintentionally doped. The preferred carbon impurity concentration range is 5X 10 when measured by SIMS¹⁷/cm³～1×10²⁰/cm³The range of (1). Through the related experiment results, it can be found that when the carbon concentration is in the range of less than 5 × 10¹⁷/cm³When the resistance of the second superlattice epitaxial structure 330 is too low, the device cannot have sufficient capability to withstand the injected voltage and cannot provide a high breakdown voltage when the power device is fabricated by using the nitride semiconductor epitaxial stacked structure with too low resistance, and the measured carbon concentration range is larger than 1 × 10²⁰/cm³The second superlattice epitaxial structure 330 may have a reduced epitaxial quality due to epitaxial defects caused by the high carbon doping concentration.

After the buffer structure 300 is completed, the device function structure 400 may then be epitaxially formed on the buffer structure 300. The above-mentioned growth methods can be referred to as the epitaxial growth methods, and are not described herein again. In the present embodiment, the device function structure 400 of the power device includes a channel layer 410 and a barrier layer 420. The channel layer 410 has a thickness of 50-500 nm, is formed on the buffer structure 300, is made of group III nitride material, and has a first band gap; the blocking layer 420 has a thickness of 10-50 nm, is formed on the channel layer 410, is made of a group III nitride material, and has a second band gap. The second band gap is larger than the first band gap, and thus, the lattice constant of the barrier layer 420 is smaller than that of the channel layer 410. Wherein the channel layer 410 may be a gallium nitride (Al) material composed of pure GaN or properly added AlGaN with low Al content_aGa_1-aN) is 0 or less than or equal to a<0.05, and barrier layer 420 comprises aluminum gallium nitride (Al)_bGa_1-bN)，0<b<1, and a<b. The channel layer 410 and the barrier layer 420 themselves form spontaneous polarization (piezoelectric polarization) and piezoelectric polarization (piezoelectric polarization) due to their different lattice constants, thereby generating two-dimensional electron gas at the heterojunction between the channel layer 410 and the barrier layer 420, as shown by the dotted line in fig. 2. In the present embodiment, the channel layer 410 and the barrier layer 420 are formed by MOCVD, wherein the channel layer 410 is made of gan, the barrier layer 420 is made of algan, and the algan is an undoped intrinsic semiconductor. The invention is not limited to this embodiment, and the blocking layer 420 and the channel layer 410 may be doped with donor impurities or acceptor impurities according to the device performance requirementThereby changing the characteristics of the semiconductor layer thereof. The position of the two-dimensional electron gas generation is not limited to the channel layer 410 shown in fig. 2 in this embodiment, and may be generated in the barrier layer 420 according to different embodiments.

In the present embodiment, in order to reduce the unnecessary stress accumulation caused by the difference of lattice constants, the material of the aluminum nitride nucleation layer 220 is a material with a higher aluminum composition ratio, such as aluminum nitride; when the material of the upper device functional structure, such as the channel layer 410, is a material with a low aluminum component ratio, such as gallium nitride; the buffer structure 300 is preferably implemented such that the al composition ratio of all or a portion of the multi-layer structure in the nitride semiconductor epitaxial stacked layer structure is between the al composition ratio of the nucleation layer 220 material and the al composition ratio of the device function layer material, and is graded along the epitaxial growth direction, wherein the al composition grading may be continuous or discontinuous. That is, for example, as shown in the present embodiment, the aluminum composition ratio of the aluminum nitride nucleation layer 220 is equal to or greater than the average aluminum composition ratio of the first superlattice epitaxial structure 310 is equal to or greater than the average aluminum composition ratio of the first gallium nitride based thick layer 320 is equal to or greater than the average aluminum composition ratio of the second superlattice epitaxial structure 330 is equal to or greater than the average aluminum composition ratio of the second gallium nitride based thick layer 340.

In another embodiment, the channel layer 410 in the nitride semiconductor epitaxial stacked layer structure may also be formed simultaneously when the second gallium nitride-based thick layer 340 is formed. That is, a second gallium nitride-based semiconductor layer (not shown) may be grown on the second superlattice epitaxial structure 330, wherein an upper half portion of the second gallium nitride-based semiconductor layer constitutes the channel layer 410, and a lower half portion of the second gallium nitride-based semiconductor layer constitutes the second gallium nitride-based thick layer 340. A barrier layer 420 is formed thereon, and a two-dimensional electron gas is generated adjacent to the junction of the barrier layer 420 and the channel layer 410.

In addition, after the growth of the barrier layer 420, the cap layer 510 may be selectively grown above the barrier layer 420 by any one of the above-mentioned growth methods, which will not be described herein. In the present embodiment, the cap layer 510 is, for example, an undoped gallium nitride semiconductor layer, and substantially covers the surface of the barrier layer 420, so as to prevent the surface of the barrier layer 420 from being degraded due to oxidation and other reactions, and improve the surface leakage current of the barrier layer 420. It is noted that, in order to maintain a good electrical contact between the electrode structure (not shown) to be formed on the surface of the nitride semiconductor epitaxial stacked structure 200 and the barrier layer 420 during the subsequent device fabrication, the thickness of the cap layer 510 in the embodiment is between 0nm and 20 nm, so that electrons can tunnel through the electrode structure between the cap layer 510.

Referring to fig. 3A and 3B, TEM images of a conventional nitride semiconductor epitaxial stacked layer structure 100 and partial epitaxial stacked layers 100 'and 200' including buffer structure portions in a nitride semiconductor epitaxial stacked layer structure (not shown) according to a second embodiment of the present invention are respectively shown. Referring to fig. 3A and 3B, in fig. 3A, the buffer structure of the local epitaxial stack 100' is composed of a superlattice stack 130 and a gallium nitride thick layer 140; in fig. 3B, the buffer structure 300 of the epi-stack 200 ' is composed of a first superlattice epitaxial structure 310, a first gallium nitride based thick layer 320 ', a second superlattice epitaxial structure 330, and a second gallium nitride based thick layer 340 '. From the image, it can be seen that the partial epitaxial stack 100' still has most of the epitaxial defects 145 extending from the superlattice stack 130 to the upper gan thick layer 140; in contrast, as shown in fig. 3B, in the second embodiment, the difference from the first embodiment is that the thickness of the first gallium nitride-based thick layer 320 'is 1.3 micrometers, and the thickness of the second gallium nitride-based thick layer 340' is 0.9 micrometers. It can be seen from the image that in the local epitaxial stack 200 ', a portion of the epitaxial defects 245 are turned or stopped in the first gan-based thick layer 320 ', another portion of the epitaxial defects 245 are stopped in the second superlattice epitaxial structure 330, and another portion of the epitaxial defects 245 are turned or stopped again in the second gan-based thick layer 340 '. Therefore, compared to the conventional local epitaxial stack 100 ' shown in fig. 3A, the local epitaxial stack 200 ' according to the second embodiment of the present invention can significantly reduce the density of epitaxial defects in the epitaxial stack, thereby reducing surface cracks of the device functional structure (not shown) to be formed subsequently, improving the epitaxial quality thereof, and enabling the power device to have higher device performance in the subsequent manufacturing process using the nitride semiconductor epitaxial stack 200 '. From the experimental results of the embodiments, it can be found that the overall thickness of the first gallium nitride-based thick layer 320 'and the second gallium nitride-based thick layer 340' has a turning or stopping contribution effect on the epitaxial defect 245 in the nitride semiconductor epitaxial stacked layer structure. As shown by the results of the first and second embodiments, the total thickness of the two gan-based thick layers should preferably be greater than two microns.

Referring to fig. 4A to 4C, there are shown partial schematic views of the nitride semiconductor epitaxial stacked layer structure according to the third to fifth embodiments of the invention, respectively illustrating side views of the partial epitaxial stacked layer structure including the buffer structures 430, 460, 490. Fig. 4A is a side view of a partial epitaxial stack structure including a buffer structure 430 according to a third embodiment of the present invention, which is different from the first embodiment in the differences between the buffer structure 430 and the buffer structure 300, and is otherwise the same as the first embodiment. In the present embodiment, the buffer structure 430 sequentially includes a first gallium nitride based thick layer 431, a first superlattice epitaxial structure 432, a second gallium nitride based thick layer 433, and a second superlattice epitaxial structure 434 on the aluminum nitride nucleation layer 220. That is, in the present embodiment, the buffer structure 430 is composed of two sets of sequentially grown GaN-based thick layers and a superlattice epitaxial structure, which is opposite to the sequence of the buffer structure 300 in the first embodiment in which the superlattice epitaxial structure is grown first and then the GaN-based thick layers are grown. Subsequently, a single-layer or multi-layer device function structure may be formed on the buffer structure 430 according to different requirements.

In order to reduce unnecessary stress accumulation caused by the difference in lattice constant, the aluminum nitride nucleation layer 220 is made of a material with a higher aluminum composition ratio, such as aluminum nitride; when the material of the upper device functional structure, such as the channel layer (not shown), is a material with a low aluminum component ratio, such as gallium nitride; the buffer structure is preferably implemented such that the al composition ratio of all or a part of the multi-layer structure in the nitride semiconductor epitaxial stacked layer structure is between the al composition ratio of the nucleation layer material and the al composition ratio of the device function layer material, and the al composition ratio is gradually changed along the epitaxial growth direction, and the gradual change can be continuous or discontinuous. That is, for example, as shown in the present embodiment, the aluminum composition ratio of the aluminum nitride nucleation layer 220 is equal to or greater than the aluminum composition ratio of the first gallium nitride-based thick layer 431 is equal to or greater than the average aluminum composition ratio of the first superlattice epitaxial structure 432 is equal to or greater than the aluminum composition ratio of the second gallium nitride-based thick layer 433 is equal to or greater than the average aluminum composition ratio of the second superlattice epitaxial structure 434.

Fig. 4B is a schematic side view of a local epitaxial stack structure including a buffer structure 460 according to a fourth embodiment of the present invention, which is different from the first embodiment in that after an aluminum nitride nucleation layer 220 is formed on a silicon substrate 210, the buffer structure 460 formed thereon is sequentially composed of a first superlattice epitaxial structure 461, a first gallium nitride thick layer 462, a second superlattice epitaxial structure 463, a second gallium nitride thick layer 464, a third superlattice epitaxial structure 465 and a third gallium nitride thick layer 466. That is, in the present embodiment, the buffer structure 460 is composed of three sets of superlattice epitaxial structures and gallium nitride-based thick layers, which are one set more than the two sets of superlattice epitaxial structures and gallium nitride-based thick layers in the first embodiment. It is noted that the spirit of the present invention is to be achieved by a buffer structure comprising two or more sets of superlattice epitaxial structures and a gan-based thick layer, and the present invention is not limited to the number of sets in the present embodiment.

In order to reduce unnecessary stress accumulation caused by the difference in lattice constant, the aluminum nitride nucleation layer 220 is made of a material with a higher aluminum composition ratio, such as aluminum nitride; when the material of the upper device functional structure, such as the channel layer (not shown), is a material with a low aluminum component ratio, such as gallium nitride; the buffer structure is preferably implemented such that the al composition ratio of all or a part of the multi-layer structure in the nitride semiconductor epitaxial stacked layer structure is between the al composition ratio of the nucleation layer material and the al composition ratio of the device function layer material, and the al composition ratio is gradually changed along the epitaxial growth direction, and the gradual change can be continuous or discontinuous. That is, for example, as shown in the present embodiment, the aluminum composition ratio of the aluminum nitride nucleation layer 220 is equal to or greater than the average aluminum composition ratio of the first superlattice epitaxial structure 461 is equal to or greater than the average aluminum composition ratio of the first gallium nitride based thick layer 462 is equal to or greater than the average aluminum composition ratio of the second superlattice epitaxial structure 463 is equal to or greater than the average aluminum composition ratio of the second superlattice epitaxial structure 464 is equal to or greater than the average aluminum composition ratio of the third superlattice epitaxial structure 465 is equal to or greater than the average aluminum composition ratio of the third superlattice epitaxial structure 466 is equal to or greater than the average aluminum composition ratio of the third superlattice epitaxial structure 465.

Fig. 4C is a schematic side view of a local epitaxial stack structure including a buffer structure 490 according to a fifth embodiment of the present invention, different from the fourth embodiment, the buffer structure 490 according to the present invention is composed of a first gallium nitride based thick layer 491, a first superlattice epitaxial structure 492, a second gallium nitride based thick layer 493, a second superlattice epitaxial structure 494, a third gallium nitride based thick layer 495, and a third superlattice epitaxial structure 496 in sequence. That is, in the present embodiment, the buffer structure 490 is composed of three sets of gan-based thick layers and superlattice epitaxial structures, which are one set more than the two sets of gan-based thick layers and superlattice epitaxial structures in the first embodiment, and the order of growing the superlattice epitaxial structures first and then growing the gan-based thick layers is opposite to that of the buffer structure 460 in the fourth embodiment. It is noted that the spirit of the present invention is to be understood that the buffer structure comprising two or more sets of the gan-based thick layers and the superlattice epitaxial structure may be implemented without limitation to the number of the sets of the embodiments.

In order to reduce unnecessary stress accumulation caused by the difference in lattice constant, the aluminum nitride nucleation layer 220 is made of a material with a higher aluminum composition ratio, such as aluminum nitride; when the material of the upper device functional structure, such as the channel layer (not shown), is a material with a low aluminum component ratio, such as gallium nitride; the buffer structure is preferably implemented such that the al composition ratio of all or a part of the multi-layer structure in the nitride semiconductor epitaxial stacked layer structure is between the al composition ratio of the nucleation layer material and the al composition ratio of the device function layer material, and the al composition ratio is gradually changed along the epitaxial growth direction, and the gradual change can be continuous or discontinuous. That is, for example, as shown in the present embodiment, the aluminum composition ratio of the aluminum nitride nucleation layer 220 is equal to or greater than the aluminum composition ratio of the first gallium nitride based thick layer 491, the average aluminum composition ratio of the first superlattice epitaxial structure 492, the average aluminum composition ratio of the second gallium nitride based thick layer 493, the average aluminum composition ratio of the second superlattice epitaxial structure 494, the average aluminum composition ratio of the third gallium nitride based thick layer 495, the average aluminum composition ratio of the third superlattice epitaxial structure 496, and the like.

Next, please refer to fig. 5, fig. 6A, fig. 6B and fig. 7. Fig. 5 is a top view of a power device S according to a sixth embodiment of the invention. The semiconductor power element S is, for example, a three-terminal element. In the present embodiment, the power device S includes a source pad S70, a drain pad S80, a gate pad S90, and at least one power device cell E1. The power element unit E1 is, for example, a Field Effect Transistor (FET), and specifically may be a high electron mobility field effect transistor (HEMT).

Fig. 6A to 6B are schematic structural diagrams illustrating a power element unit E1 in the top view of the power element S in fig. 5. For clarity of the detailed structure of the power element unit E1, fig. 6A is an enlarged top view of the power element unit E1, and fig. 6B is a cross-sectional view of the power element unit E1 along a cross-sectional line FF'. The power device unit E1 is, for example, a hemt, and includes a nitride semiconductor epitaxial stacked layer structure 500, a source electrode 70, a drain electrode 80, and a gate electrode 90 according to a sixth embodiment of the present invention. As shown in fig. 5, in the power cell E1, the source pad S70 is electrically connected to the source electrode 70, the drain pad S80 is electrically connected to the drain electrode 80, the gate pad S90 is electrically connected to the gate electrode 90, and the nitride semiconductor epitaxial stacked structure 500 is correspondingly located under the electrodes, as shown in fig. 6B.

The surface of the power device cell E1 may further be formed with a passivation layer (not shown) to cover the surfaces of the dielectric layer 60, the source electrode 70, the drain electrode 80 and the gate electrode 90, so as to prevent the electrical property of the power device cell E1 from being affected. The protective layer may be an oxide or nitride, such as an oxide, e.g., silicon oxide or aluminum oxide, or a nitride, e.g., silicon nitride or gallium nitride. The passivation layer is then etched to expose a portion of the source electrode 70, the drain electrode 80 and the gate electrode 90, i.e., a portion of the surface of the source electrode 70, the surface of the drain electrode 80 and the surface of the gate electrode 90 may be uncovered by the passivation layer, so as to increase the convenience of electrical connection with the outside. In the present invention, the locations not covered by the passivation layer may be, for example, the source pad S70, the drain pad S80, and the gate pad S90 electrically connected to the source electrode 70, the drain electrode 80, and the gate electrode 90 directly.

Fig. 7 is a side view of a nitride semiconductor epitaxial stacked structure 500 of a power device S according to a sixth embodiment of the present invention. In the present embodiment, the same reference numerals as in the first embodiment are used for the structure of the nitride semiconductor epitaxial stacked layer structure 500 similar to that in the first embodiment. It is noted that in the present embodiment, a Back Barrier layer (Back Barrier)550 is inserted between the buffer structure 300 and the channel layer 410. The back barrier layer 550 is preferably comprised of an aluminum gallium nitride layer having a higher aluminum composition ratio than the second gallium nitride based thick layer 340. When the nitride semiconductor epitaxial stacked structure 500 is subsequently fabricated into a power device, the rear blocking layer 550 has a higher band gap than the second gallium nitride based thick layer 340 in terms of the composition ratio of aluminum to provide a limited electron capability, thereby preventing electrons from entering the buffer structure 300 and being captured by the epitaxial defect in the buffer structure 300 during the operation of the device, and further preventing the two-dimensional electron gas concentration stability between the heterointerfaces during the operation of the subsequent device. That is, the degree of current collapse (current collapse) of the element during repeated operation can be reduced.

It is noted that, in the present embodiment, in order to avoid the barrier height of the high bandgap pull-up channel layer 410 of the rear barrier layer 550 further affecting the intensity of the current when the power device operates, the thickness of the rear barrier layer 550 is preferably not more than 50 nm.

In addition, as shown in fig. 6B, in the present embodiment, before forming the source electrode 70, the drain electrode 80 and the gate electrode 90, a dielectric layer 60 may be formed on the upper surface of the cap layer 510. Dielectric layer 60 may also optionally underlie gate electrode 90 (not shown). When the dielectric layer 60 is located under the gate electrode, the surface leakage current can be further reduced by selecting the dielectric layer 60 with different dielectric constants and adjusting the thickness of the dielectric layer 60, thereby further increasing the operation bias range of the gate electrode 90 and improving the device reliability. The dielectric layer 60 may be an oxide or a nitride, for example, an oxide such as silicon oxide or aluminum oxide, a nitride such as silicon nitride or aluminum nitride, or an oxynitride such as aluminum oxynitride. However, the invention is not limited thereto, and the dielectric layer 60 may not be formed in other embodiments.

In the present embodiment, as described above, the source electrode 70, the drain electrode 80 and the gate electrode 90 are formed above the nitride semiconductor epitaxial stacked layer structure 500, and the source pad S70, the drain pad S80 and the gate pad S90 extending therefrom and electrically connected thereto are used as terminals electrically connected to the outside. As shown in fig. 6B, in a side view of one power element unit E1, the source electrode 70 and the drain electrode 80 are respectively disposed on two sides of the surface of the nitride semiconductor epitaxial stacked layer structure 500, and the gate electrode 90 is disposed between the source electrode 70 and the drain electrode 80. In the present embodiment, ohmic contact between the source electrode 70 and the drain electrode 80 and the barrier layer 420 may be formed by selecting appropriate materials for the source electrode 70 and the drain electrode 80, and/or by a fabrication process (e.g., etching, thermal annealing, etc. …). Similarly, a schottky contact may be formed between the gate electrode 90 and a barrier layer (not shown) by selecting an appropriate material for the gate electrode 90. The material of the source electrode 70 and the drain electrode 80 may be selected from titanium (Ti), aluminum (Al) or a combination thereof, and the material of the gate electrode 90 may be selected from nickel (Ni), gold (Au), tungsten (W), titanium nitride (TiN) or a combination thereof, but not limited thereto.

In other embodiments, the nitride semiconductor epitaxial stacked layer structure 500 of the power device S may also be a structure in which the nitride semiconductor epitaxial stacked layer structure in other embodiments of the present invention replaces or partially replaces a buffer structure portion thereof.

FIG. 8 is a schematic side view of a Schottky diode device cell E2 according to a seventh embodiment of the present invention. The schottky diode cell E2 is fabricated using the nitride semiconductor epitaxial stack 500 in the sixth embodiment of the present invention. The present structure forms an anode a and a cathode C on the upper surface of the nitride semiconductor epitaxial stack 500, respectively, as terminals for electrical connection with the outside. Where the anode a and cathode C may be disposed on either side of the upper surface of the epitaxial stack 500, respectively, ohmic contact between the anode a and cathode C and the barrier layer may be formed by selecting appropriate anode a and cathode C materials and/or by a fabrication process (e.g., etching, thermal annealing). The material of the anode a and the cathode C may be selected from titanium (Ti), aluminum (Al) or a combination thereof.

Similarly, a dielectric layer 60' may be formed on the upper surface of the nitride semiconductor epitaxial stack 500, either before or after the anode a and the cathode C are formed. The dielectric layer 60' can further reduce the surface leakage current and improve the device reliability. The dielectric layer 60' may be an oxide or nitride, for example, an oxide such as silicon oxide or aluminum oxide, or a nitride such as silicon nitride or aluminum nitride. However, the invention is not limited thereto, and the dielectric layer may not be formed in other embodiments.

Finally, referring to fig. 9A to 9B and fig. 10A to 10B, fig. 9A to 9B are graphs showing electrical test results of horizontal leakage capability of the power device test cell E3 fabricated using the conventional nitride semiconductor epitaxial stacked structure 100 and the power device test cell E4 fabricated using the nitride semiconductor epitaxial stacked structure 200 according to the first embodiment of the present invention, respectively.

The power device test units E3 and E4 are formed by a manufacturing process of forming a plurality of the aforementioned power device test units E3 and E4 on a conventional nitride semiconductor epitaxial wafer and a nitride semiconductor epitaxial wafer (not shown) according to the first embodiment of the present invention, dividing the power device test units of the regions according to the three regions of the center, the periphery and the outer side of the semiconductor epitaxial wafer, and performing electrical tests on the plurality of power device test units E3 and E4 of the regions, respectively. As shown in fig. 9A to 9B, representative measurements of the electrical characteristics of the power devices in the regions are performed, and three different trend lines of the electrical test results can be obtained from the electrical test results in fig. 9A and 9B, respectively. Fig. 10A and 10B are schematic side views of power device test units E3 and E4, respectively, in which the power device test units are prepared by defining a plurality of power device test units in a semiconductor epitaxial wafer, and after removing the central portions of the epitaxial stacked nitride semiconductor epitaxial structures 100 and 200 including the channel layer 410, the barrier layers 152 and 420, and the cap layer 510 in each unit, ohmic electrodes O1 to O4 are formed on the surfaces of the unremoved semiconductor epitaxial stacked structures on the left and right sides, respectively.

In the test conditions, the left ohmic electrodes O1 and O3 are set to be in a Ground state (0V), and a corresponding reverse bias voltage V is applied to the other ohmic electrodes O2 and O4, as shown in abscissa of fig. 9A to 9B, the reverse bias voltage V is 0 to-1000V, and the leakage current (I in milliampere) of the buffer structure portion of the test power element test cells E3 and E4 is measured, as shown in ordinate of fig. 9A to 9B. As can be seen from FIGS. 9A-9B, the leakage current of the power device test unit E3 is about 1 × 10 when a corresponding bias voltage of-600V is applied^-6Milliamperes, the leakage current compared to power device test unit E4 is about 5X 10 when a corresponding bias voltage of-600 volts is applied^-7The milliampere is high, and a similar trend can be obtained under other reverse bias voltages, and the leakage current of the power element test unit E4 is reduced by about 0.5-1 orders compared with that of the power element test unit E3.

By means of the embodiments of the present invention, a high quality nitride semiconductor epitaxial stacked layer structure with low crystal defect density, flat epitaxial layer surface, less surface cracks and/or smaller size can be formed, and devices manufactured by the nitride semiconductor epitaxial stacked layer structure, such as power devices and schottky diode devices, can also have improved performance due to the improved quality of the semiconductor epitaxial stacked layer structure, and thus, the present invention has industrial applicability. The above-mentioned embodiments are merely illustrative of the technical spirit and features of the present invention, and the purpose thereof is to enable those skilled in the art to understand the content of the present invention and to implement the invention, so as not to limit the scope of the present invention, i.e., all equivalent changes or modifications made in the spirit of the present invention should be covered by the scope of the present invention.