阅读说明：本技术 用于以多个电压输送电力的电源组合件 (Power supply assembly for delivering power at multiple voltages ) 是由 克里斯托夫·莫里斯·蒂博 帕特里克·吉勒·马约 于 2021-05-27 设计创作，主要内容包括：一种电源组合件,包括第一电源,该第一电源包括以第一电压输送电力的第一电力轨和以第二电压输送电力的第二电力轨。该电源组合件还包括第二电源,该第二电源包括以第一电压输送电力的第三电力轨和以第二电压输送电力的第四电力轨。第一电力组合电路电连接至第一电力轨和第三电力轨。第一电力组合电路将电力以第一电压输送至负载的第一电压输入。第二电力组合电路电连接至第二电力轨和第四电力轨。第二电力组合电路将电力以第二电压输送至负载的第二电压输入。(A power supply assembly includes a first power supply including a first power rail that delivers power at a first voltage and a second power rail that delivers power at a second voltage. The power supply assembly also includes a second power supply including a third power rail that delivers power at a first voltage and a fourth power rail that delivers power at a second voltage. The first power combining circuit is electrically connected to the first power rail and the third power rail. The first power combining circuit delivers power at a first voltage to a first voltage input of a load. The second power combining circuit is electrically connected to the second power rail and the fourth power rail. The second power combining circuit delivers power at a second voltage to a second voltage input of the load.)

1. A power supply assembly comprising:

a first power supply comprising a first power rail adapted to deliver power at a first voltage and a second power rail adapted to deliver power at a second voltage;

a second power supply comprising a third power rail adapted to deliver power at the first voltage and a fourth power rail adapted to deliver power at the second voltage;

a first power combining circuit electrically connected to the first power rail of the first power source and the third power rail of the second power source, the first power combining circuit adapted to deliver power at the first voltage to a first voltage input of a load;

a second power combining circuit electrically connected to the second power rail of the first power source and the fourth power rail of the second power source, the second power combining circuit adapted to deliver power at the second voltage to a second voltage input of the load;

a first voltage comparator, the first voltage comparator comprising:

a first sense input electrically connected to the first power rail of the first power source, an

A third sense input electrically connected to the third power rail of the second power source,

the first voltage comparator is adapted to compare a voltage sensed by the first sense input with a voltage sensed by the third sense input to detect a fault in one of the first and second power supplies in response to detecting any voltage difference between the first and third sense inputs;

a second voltage comparator, the second voltage comparator comprising:

a second sense input electrically connected to the second power rail of the first power supply, an

A fourth sense input electrically connected to the fourth power rail of the second power source,

the second voltage comparator is adapted to compare a voltage sensed by the second sense input with a voltage sensed by the fourth sense input to detect a fault in one of the first power supply and the second power supply in response to detecting any voltage difference between the second sense input and the fourth sense input; and

a monitoring device operatively connected to the first voltage comparator and the second voltage comparator and adapted to report a detected fault of one of the first power supply and the second power supply.

2. The power supply assembly of claim 1, wherein the load comprises one or more servers.

3. The power supply assembly of claim 1 or 2, wherein:

the first power combining circuit includes: a first diode connecting the first power rail of the first power source to the first voltage input of the load; and a third diode connecting the third power rail of the second power source to the first voltage input of the load; and

the second power combining circuit includes: a second diode connecting the second power rail of the first power source to the second voltage input of the load; and a fourth diode connecting the fourth power rail of the second power source to the second voltage input of the load.

4. The power supply assembly of claim 1 or 2, wherein:

the first power combining circuit includes: a first emulation circuit that connects the first power rail of the first power source to the first voltage input of the load; and a third emulation circuit connecting the third power rail of the second power source to the first voltage input of the load;

the second power combining circuit includes: a second emulation circuit that connects the second power rail of the first power source to the second voltage input of the load; and a fourth emulation circuit that connects the fourth power rail of the second power source to the second voltage input of the load; and

each of the first, second, third, and fourth emulation circuits is adapted to operate as an ideal diode.

5. The power supply assembly of any one of claims 1 to 4, wherein the first power combining circuit, the second power combining circuit, the first voltage comparator, the second voltage comparator and the monitoring device are mounted on a common platform.

6. The power supply assembly of any one of claims 1 to 5, wherein:

the first and second power sources are adapted to convert power received from a Power Distribution Unit (PDU) to power delivered at the first and second voltages; and

the monitoring device is communicatively connected to the power distribution unit and adapted to send a signal to the power distribution unit to report a detected fault of one of the first and second power sources.

7. The power supply assembly of claim 1 or 2, wherein:

the first power supply further comprises a fifth power rail adapted to deliver power at a third voltage;

the second power supply further comprises a sixth power rail adapted to deliver power at the third voltage; and

the power supply combination also includes a third power combining circuit electrically connected to the fifth power rail of the first power supply and the fourth power rail of the second power supply, the second power combining circuit adapted to deliver power at a third voltage to a third voltage input of the load.

8. The power supply assembly of claim 7, wherein:

the first power supply and the second power supply are ATX power supplies;

the first voltage is 12 volts DC;

the second voltage is 3.3 volts DC; and

the third voltage is 5 volts DC.

9. The power supply assembly of claim 7 or 8, wherein:

the first power combining circuit includes: a first diode connecting the first power rail of the first power source to the first voltage input of the load; and a third diode connecting the third power rail of the second power source to the first voltage input of the load;

the second power combining circuit includes: a second diode connecting the second power rail of the first power source to the second voltage input of the load; and a fourth diode connecting the fourth power rail of the second power source to the second voltage input of the load; and

the third power combining circuit includes: a fifth diode connecting the fifth power rail of the first power source to the third voltage input of the load; and a sixth diode connecting the sixth power rail of the second power source to the third voltage input of the load.

10. The power supply assembly of claim 7 or 8, wherein:

the first power combining circuit includes: a first emulation circuit that connects the first power rail of the first power source to the first voltage input of the load; and a third emulation circuit connecting the third power rail of the second power source to the first voltage input of the load;

the second power combining circuit includes: a second emulation circuit that connects the second power rail of the first power source to the second voltage input of the load; and a fourth emulation circuit that connects the fourth power rail of the second power source to the second voltage input of the load;

the third power combining circuit includes: a fifth emulation circuit that connects the fifth power rail of the first power source to the third voltage input of the load; and a sixth emulation circuit that connects the sixth power rail of the second power source to the third voltage input of the load; and

each of the first, second, third, fourth, fifth, and sixth emulation circuits is adapted to operate as an ideal diode.

11. The power supply assembly of any one of claims 7 to 10, further comprising:

a third voltage comparator, the third voltage comparator comprising:

a fifth sense input electrically connected to the fifth power rail of the first power supply, an

A sixth sense input electrically connected to the sixth power rail of the second power source,

the third voltage comparator is adapted to compare a voltage sensed by the fifth sense input with a voltage sensed by the sixth sense input to detect a fault with one of the first and second power sources with respect to delivery of power at the third voltage;

wherein the monitoring device is further operatively connected to a third voltage comparator and the monitoring device is adapted to report a failure of one of the first and second power sources with respect to delivering power at the third voltage.

12. The power supply assembly of claim 11, wherein the first, second, third, first, second, third and monitoring devices are mounted on a common platform.

13. The power supply assembly of claim 11 or 12, wherein:

the first and second power sources are adapted to convert power received from a Power Distribution Unit (PDU) into power delivered at the first, second, and second voltages; and

the monitoring device is communicatively connected to the power distribution unit and adapted to send a signal to the power distribution unit to report a detected fault of one of the first and second power sources.

14. The power supply assembly of any of claims 1-13, wherein the load comprises a plurality of servers, the power supply assembly further comprising:

a power management unit communicatively connected to the first and second power sources and the plurality of servers, the power management unit configured to:

monitoring a combined power level of the first power source and the second power source, an

Causing at least one server of the plurality of servers to reduce power consumption of the at least one server if a combined power consumption of the plurality of servers exceeds the combined power level of the first power source and the second power source.

Technical Field

The present technology relates to power delivery arrangements. In particular, the present disclosure introduces a power supply assembly for delivering power at multiple voltages.

Background

Many devices, such as servers in a data center, need to receive power at more than one voltage. ATX has become a practical industry standard for providing servers with power at 12 volts DC, 3.3 volts DC, and 5 volts DC. In addition to servers, other equipment in a data center and other equipment in various industrial or commercial locations may require power at more than one voltage; for example, but not limiting of, electronic equipment such as disks and network devices may consume power at 5 volts, while cooling fans and water cooled pumps may consume power at 12 volts.

In large data centers, power redundancy delivery is important because many servers may be assigned to vital functions. Fig. 1 (prior art) shows an arrangement in which a server receives power from an ATX power source connected to a pair of redundant power sources. In the arrangement 100, the first power source 110 and the second power source 120 receive power from an AC power source (not shown) on their respective power inputs 112 and 122. Power rails 114 and 124 of power supplies 110 and 120 will deliver power at 12 volts DC to ATX power supply 125 (a DC-DC converter in the case of fig. 1). Power is delivered via diodes 140 and 150, both diodes 140 and 150 being connected to a single power input 129 of ATX power supply 125. ATX power supply 125 provides power to server 160. Diodes 140 and 150 ensure that power from one of power sources 110 and 120 cannot return to the other of power sources 110 and 120. The matched diodes 140 and 150 are selected to minimize any difference between their output voltages in order to prevent the majority of power being drawn (draw) from a single one of the power sources 110 and 120. Any voltage difference between the power rails 114, 124 and the power input 129 may be minimized using ideal diodes. In more detail, the power rail 126 of the ATX power supply 125 is connected to the power input 162 of the server 160 for delivering power at 12 volts. The power rail 127 of the ATX power supply 125 is connected to the power input 164 of the server 160 for delivering power at 3.3 volts. The power rail 128 of the ATX power supply 125 is connected to the power input 166 of the server 160 for delivering power at 5 volts.

In the example shown, the server 160 may consume up to 1000 watts (W), each power source 110 and 120 is capable of providing 1000 watts of power, and the ATX power source 125 is also rated for 1000 watts. Tests have shown that a large portion (e.g., 70% of the power) of the power consumed by a server, such as server 160 of fig. 1, is consumed at 12 volts. Thus, in ATX power supply 125, power rail 126 is required to support outputs of up to 700 watts.

The two power sources 110 and 120 are fully redundant and if one of them fails, the other can still meet all of the power requirements of the server 160. However, the problem to be solved is that ATX power supply 125 becomes a single point of failure in arrangement 100. If ATX power source 125 fails completely, or fails to provide power at 12 volts, 3.3 volts, or 5 volts, server 160 may become inoperable.

Another problem to be solved relates to the risk of arcing when connecting the power inputs 162, 164 and 166 of the server 160 to the power rails 126, 127 and 128 of the ATX power supply 125. An initial connection is made between the server 160 and the ATX power supply 125 by establishing physical contact between the power input and the power rail. Within a short time (typically within a few milliseconds), this physical contact is unstable and is repeatedly established, disconnected and re-established. These spurious interruptions may generate very high current spikes if power is present on all of the power rails of ATX power supply 125. Fig. 2 (prior art) shows a time sequence for activating the ATX power supply of fig. 1. The time sequence of fig. 2 is implemented in the ATX specification in view of preventing arcing from causing damage to ATX power supply 125 and/or server 160. Initially, there is no voltage on power rails 126, 127, and 128 of ATX power supply 125. The presence of a 5 volt standby power connection 170 (fig. 1) between ATX power supply 125 and server 160 allows the motherboard (not shown) of server 160 to perform a boot sequence. When the startup sequence is complete, server 160 sends a "PS _ ON" signal to ATX power supply 125 via signaling lead 172 (fig. 1). As shown in fig. 2, the signal transmitted by the server 160 ON the signaling lead 172 changes from an initial high voltage to a low voltage-thus, when at a low voltage, the PS _ ON signal is considered active. In response to the PS _ ON signal, ATX power supply 125 begins to step up the voltage ON power rails 126, 127, and 128. At time T1 (typically less than 500 milliseconds after the PS _ ON signal), the voltage at power rails 126, 127, and 128 approaches their nominal 12 volt, 3.3 volt, and 5 volt ratings (e.g., at least 95% of their nominal voltages) within time T2 of less than 20 milliseconds. After another delay T3, typically between 100 and 300 milliseconds, ATX power supply 125 issues a "PWR _ OK" (also referred to as a "power good" signal) on signaling lead 174 (fig. 1). The PWR _ OK signal has a short rise time T4, typically less than 10 milliseconds. Upon detection of the PWR _ OK signal, server 160 can now operate using all of the required power from power rails 126, 127 and 128 of ATX power supply 125.

The time series shown in fig. 2 is illustrative and may vary according to various implementations. The various times T1, T2, T3, and T4 are provided for illustration only, as they may also vary in various implementations. In any event, the time series imposes a one-to-one correspondence between a given server 160 receiving power from a dedicated ATX power source 125. This lack of flexibility in the configuration for delivering power to the server is far from ideal from both an economic and operational standpoint.

The power of thousands of servers hosted in a large data center is significant. There is a need for an economical, flexible, optimized and redundant power delivery solution.

Although the recent developments identified above may bring benefits, improvements are still needed.

The subject matter discussed in the background section should not be considered prior art merely because it was mentioned in the background section. Similarly, the problems mentioned in the background or associated with the subject matter of the background should not be considered as having been previously recognized in the prior art. The subject matter in the background section is only representative of different approaches.

Disclosure of Invention

Embodiments of the present technology have been developed based on a developer's understanding of the shortcomings associated with the prior art.

In particular, such drawbacks may include (1) eventual redundancy of ATX power supplies for providing power to servers and other loads; and/or (2) lack of flexibility in delivering power to servers and other loads.

In one aspect, various implementations of the present technology provide a power supply assembly comprising:

a first power supply comprising a first power rail adapted to deliver power at a first voltage and a second power rail adapted to deliver power at a second voltage;

a second power supply comprising a third power rail adapted to deliver power at a first voltage and a fourth power rail adapted to deliver power at a second voltage;

a first power combining circuit electrically connected to the first power rail of the first power source and the third power rail of the second power source, the first power combining circuit adapted to deliver power at a first voltage to a first voltage input of a load; and

a second power combining circuit electrically connected to the second power rail of the first power source and the fourth power rail of the second power source, the second power combining circuit adapted to deliver power at a second voltage to a second voltage input of the load.

In some implementations of the present technology, the load includes one or more servers.

In some implementations of the technology, the first power combining circuit includes: a first diode connecting the first power rail of the first power source to the first voltage input of the load and a third diode connecting the third power rail of the second power source to the first voltage input of the load; and the second power combining circuit includes: a second diode connecting the second power rail of the first power source to the second voltage input of the load, and a fourth diode connecting the fourth power rail of the second power source to the second voltage input of the load.

In some implementations of the present technology, the first power combining circuit includes: a first emulation circuit to connect a first power rail of a first power source to a first voltage input of a load and a third emulation circuit to connect a third power rail of a second power source to the first voltage input of the load; the second power combining circuit includes: a second emulation circuit to connect the second power rail of the first power source to the second voltage input of the load and a fourth emulation circuit to connect the fourth power rail of the second power source to the second voltage input of the load; and each of the first, second, third and fourth emulation circuits is adapted to operate as an ideal diode.

In some implementations of the present technology, the power supply assembly further includes: a first voltage comparator comprising a first sense input electrically connected to the first power rail of the first power source and a third sense input electrically connected to the third power rail of the second power source, the first voltage comparator adapted to compare a voltage sensed by the first sense input with a voltage sensed by the third sense input to detect a fault with one of the first and second power sources with respect to delivery of power at the first voltage; a second voltage comparator comprising a second sense input electrically connected to the second power rail of the first power source and a fourth sense input electrically connected to the fourth power rail of the second power source, the second voltage comparator adapted to compare a voltage sensed by the second sense input with a voltage sensed by the fourth sense input to detect a fault with one of the first and second power sources with respect to delivery of power at the second voltage; and a monitoring device operatively connected to the first and second voltage comparators and adapted to report a detected fault of one of the first and second power supplies.

In some implementations of the present technology, the first power combining circuit, the second power combining circuit, the first voltage comparator, the second voltage comparator, and the monitoring device are mounted on a common platform.

In some implementations of the present technology, the first power source and the second power source are adapted to convert power received from a Power Distribution Unit (PDU) to power delivered at a first voltage and a second voltage; and a monitoring device communicatively connected to the PDU and adapted to send a signal to the PDU to report a detected failure of one of the first power source and the second power source.

In some implementations of the present technology, the first power supply further includes a fifth power rail adapted to deliver power at a third voltage; the second power supply further comprises a sixth power rail adapted to deliver power at a third voltage; and the power supply assembly further comprises a third power combining circuit electrically connected to the fifth power rail of the first power supply and the fourth power rail of the second power supply, the second power combining circuit adapted to deliver power at a third voltage to the third voltage input of the load.

In some implementations of the present technology, the first power supply and the second power supply are ATX power supplies; the first voltage is 12 volts DC; the second voltage is 3.3 volts DC; and the third voltage is 5 volts DC.

In some implementations of the technology, the first power combining circuit includes: a first diode connecting the first power rail of the first power source to the first voltage input of the load and a third diode connecting the third power rail of the second power source to the first voltage input of the load; the second power combining circuit includes: a second diode connecting the second power rail of the first power source to the second voltage input of the load and a fourth diode connecting the fourth power rail of the second power source to the second voltage input of the load; and the third power combining circuit includes: a fifth diode connecting the fifth power rail of the first power source to the third voltage input of the load, and a sixth diode connecting the sixth power rail of the second power source to the third voltage input of the load.

In some implementations of the present technology, the first power combining circuit includes: a first emulation circuit to connect a first power rail of a first power source to a first voltage input of a load and a third emulation circuit to connect a third power rail of a second power source to the first voltage input of the load; the second power combining circuit includes: a second emulation circuit to connect the second power rail of the first power source to the second voltage input of the load and a fourth emulation circuit to connect the fourth power rail of the second power source to the second voltage input of the load; the third power combining circuit includes: a fifth emulation circuit to connect the fifth power rail of the first power source to the third voltage input of the load and a sixth emulation circuit to connect the sixth power rail of the second power source to the third voltage input of the load; and each of the first, second, third, fourth, fifth and sixth emulation circuits is adapted to operate as an ideal diode.

In some implementations of the present technology, the power supply assembly further includes: a first voltage comparator comprising a first sense input electrically connected to the first power rail of the first power source and a third sense input electrically connected to the third power rail of the second power source, the first voltage comparator adapted to compare a voltage sensed by the first sense input with a voltage sensed by the third sense input to detect a fault with one of the first and second power sources with respect to delivery of power at the first voltage; a second voltage comparator comprising a second sense input electrically connected to the second power rail of the first power source and a fourth sense input electrically connected to the fourth power rail of the second power source, the second voltage comparator adapted to compare a voltage sensed by the second sense input with a voltage sensed by the fourth sense input to detect a fault with one of the first and second power sources with respect to delivery of power at the second voltage; a third voltage comparator comprising a fifth sense input electrically connected to the fifth power rail of the first power supply and a sixth sense input electrically connected to the sixth power rail of the second power supply, the third voltage comparator adapted to compare a voltage sensed by the fifth sense input with a voltage sensed by the sixth sense input to detect a fault with one of the first and second power supplies with respect to delivery of power at the third voltage; and a monitoring device operatively connected to the first voltage comparator, the second voltage comparator and the third voltage comparator and adapted to report a detected fault of one of the first power supply and the second power supply.

In some implementations of the present technology, the first power combining circuit, the second power combining circuit, the third power combining circuit, the first voltage comparator, the second voltage comparator, the third voltage comparator, and the monitoring device are mounted on a common platform.

In some implementations of the present technology, the first power source and the second power source are adapted to convert power received from a Power Distribution Unit (PDU) to power delivered at a first voltage, a second voltage, and a third voltage; and a monitoring device communicatively connected to the PDU and adapted to send a signal to the PDU to report a detected failure of one of the first power source and the second power source.

In some implementations of the present technology, the load includes a plurality of servers, the power supply assembly further includes: a power management unit communicatively connected to the first and second power sources and the plurality of servers, the power management unit configured to: the combined power level of the first power source and the second power source is monitored, and at least one server of the plurality of servers is caused to reduce power consumption of the at least one server if the combined power consumption of the plurality of servers exceeds the combined power level of the first power source and the second power source.

In the context of this specification, unless specifically stated otherwise, a computer system may refer to, but is not limited to, "electronic device," "operating system," "computer-based system," "controller unit," "monitoring device," "control device," and/or any combination suitable for its task at hand.

In the context of this specification, unless explicitly stated otherwise, the expressions "computer-readable medium" and "memory" are intended to include any medium of any nature and kind, non-limiting examples of which include RAM, ROM, magnetic disks (CD-ROM, DVD, floppy disk drive, hard disk drive, etc.), USB keys, flash memory cards, solid state drives, and tape drives. Also in the context of this specification, "a" computer-readable medium and "the" computer-readable medium should not be construed as the same computer-readable medium. Rather, and where appropriate, "a" computer-readable medium and "the" computer-readable medium can also be interpreted as first and second computer-readable media.

In the context of this specification, unless explicitly stated otherwise, the words "first", "second", "third", and the like are used for the purpose of adjective only, to allow distinction between the terms they modify from one another, and not to describe any particular relationship between these terms.

Implementations of the present technology each have at least one, but not necessarily all, of the above-described objects and/or aspects. It should be appreciated that certain aspects of the present technology that have resulted from attempts to achieve the above objectives may not meet this objective and/or may meet other objectives not specifically recited herein.

Additional and/or alternative features, aspects, and advantages of implementations of the present technology will become apparent from the following description, the accompanying drawings, and the appended claims.

Drawings

For a better understanding of the present technology, as well as other aspects and further features thereof, reference is made to the following description, which is to be used in conjunction with the accompanying drawings, wherein:

FIG. 1 (Prior Art) shows an arrangement in which a server receives power from an ATX power source connected to a pair of redundant power sources;

FIG. 2 (Prior Art) shows a time sequence for activating the ATX power supply of FIG. 1;

FIG. 3 is a block diagram of a redundant power supply configuration in accordance with embodiments of the present technique;

FIG. 4 is a circuit diagram of an emulation circuit according to an embodiment;

FIG. 5 is a block diagram of another redundant power supply configuration in accordance with embodiments of the present technique;

FIG. 6 is a block diagram of yet another redundant power supply configuration in accordance with embodiments of the present technique;

FIG. 7 is a block diagram of a power management unit according to an embodiment;

fig. 8 is a block diagram illustrating some components of the power supply configurations of fig. 3 and 5, further illustrating a control circuit for hot plugging (hot plugging) of a load, according to an embodiment;

fig. 9A and 9B are sequence diagrams illustrating operations of a method for controlling power transmission to one or more servers according to an embodiment; and

fig. 10 is a block diagram of a control circuit according to an embodiment.

It should also be noted that the drawings are not drawn to scale unless explicitly stated otherwise herein.

Detailed Description

The examples and conditional language recited herein are principally intended to aid the reader in understanding the principles of the technology and are not intended to limit the scope to such specifically recited examples and conditions. It will be appreciated that those skilled in the art will be able to devise various arrangements that, although not explicitly described or shown herein, embody the principles of the technology.

Furthermore, to facilitate understanding, the following description may describe a relatively simplified implementation of the present technology. As will be appreciated by those skilled in the art, various implementations of the present technology may be of greater complexity.

In some cases, examples may also be presented that are considered helpful to modifications of the present techniques. This is done merely to aid understanding and, as such, is not intended to limit the scope of the present technology or to illustrate the scope of the present technology. These modifications are not an exhaustive list and other modifications may be made by those skilled in the art, while remaining within the scope of the present technology. Furthermore, where no example of a modification is presented, it should not be construed that no modification is possible and/or that the only manner of implementing this element of the present technology is depicted.

Moreover, all statements herein reciting principles, aspects, and implementations of the present technology, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof, whether currently known or later developed. Thus, for example, it will be appreciated by those skilled in the art that any block diagrams herein represent conceptual views of illustrative circuitry embodying the principles of the technology. Similarly, it will be appreciated that any flow charts, flow diagrams, state transition diagrams, pseudocode, and the like represent various processes which may be substantially represented in non-transitory computer readable media and so executed by a computer or processor, whether or not such computer or processor is explicitly shown.

The functions of the various elements shown in the figures, including any functional blocks labeled as "processors", may be provided through the use of dedicated hardware as well as hardware capable of executing software in association with appropriate software. When provided by a processor, the functions may be provided by a single dedicated processor, by a single shared processor, or by a plurality of individual processors, some of which may be shared. In some implementations of the present technology, the processor may be a general-purpose processor, such as a Central Processing Unit (CPU), or a special-purpose processor, such as a Digital Signal Processor (DSP). Moreover, explicit use of the term "processor" should not be construed to refer exclusively to hardware capable of executing software, and may implicitly include, without limitation, Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), Read Only Memories (ROMs) for storing software, Random Access Memories (RAMs) and non-volatile storage. Other hardware, conventional and/or custom, may also be included.

Software modules, or simply modules implied as software, may be represented herein as any combination of flowchart elements or other elements indicating execution of process steps and/or textual description. Such modules may be performed by hardware as shown, explicitly or implicitly. Further, it should be understood that a module may include, but is not limited to, computer program logic, computer program instructions, software, stacks, firmware, hardware circuits, or combinations thereof, for example, that provide the desired capabilities.

In one aspect, the power supply assembly of the present technology includes two power supplies, such as, but not limited to, two ATX power supplies, that deliver power at multiple voltages. Each power supply includes two or three power rails for delivering power at two or three different voltages. The first combinatorial circuit connects two power rails of a power supply at a first voltage to a power input of a load, such as, but not limited to, a server or a group of servers. The second combinatorial circuit connects two power rails of the power supply at a second voltage to another power input of the load. The third combinatorial circuit may connect the two power rails at the third voltage to a further power input of the load. The combining circuit may comprise diodes connecting the power rails of the two power sources at the same voltage to the respective power inputs of the load. Alternatively, the combinatorial circuit may include an emulation circuit that operates as an ideal diode to limit any voltage drop within the combinatorial circuit. The various power rails of the power supply may be individually monitored to detect any partial or complete failure of the power supply.

In another aspect, the present technology is a power assembly with heterogeneous power supplies. The power supply assembly includes two multi-voltage power supplies, such as, but not limited to, two ATX power supplies and two single voltage power supplies. Each multi-voltage power supply includes two or three power rails for delivering power at two or three different voltages. Each single voltage power supply includes a single power rail for delivering power at a first voltage. The first combined circuit connects the two power rails of the two multi-voltage power supplies at the first voltage and the two power rails of the single voltage power supply to a power input of a load, such as, but not limited to, a server or a group of servers. The second combinatorial circuit connects two power rails of the two multi-voltage power supplies at a second voltage to another power input of the load. The third combinatorial circuit may connect two power rails of the two multi-voltage power supplies at the third voltage to a further power input of the load. The combination circuit may include the following diodes: the diodes connect the power rails of the two multi-voltage power supplies at the first voltage and the power rails of the two single-voltage power supplies to the first voltage input of the load. The combination circuit may further comprise the following diodes: the diodes connect the power rails of the two multi-voltage power supplies at one or two other voltages to the respective power inputs of the load. Alternatively, the combinatorial circuit may include an emulation circuit that operates as an ideal diode to limit any voltage drop within the combinatorial circuit. The various power rails of the multi-voltage power supply and the single voltage power supply may be individually monitored to detect any partial or complete failure of any one of the power supplies.

In further aspects, methods and control circuits are provided for controlling power delivery to one or more servers. The control circuit is disposed between the power source and the one or more servers. The conventional signalling exchange between the power supply and the single server is replaced on the one hand by an equivalent signalling exchange between the power supply and the control circuit and on the other hand by an equivalent signalling exchange between the control unit and each of the one or more servers. Thus, the power supply appears to deliver power to only one server, while each server appears to receive power from a dedicated power supply.

With these basic principles in mind, we will now consider some non-limiting examples to illustrate various implementations of aspects of the present technology.

FIG. 3 is a block diagram of a redundant power supply configuration in accordance with embodiments of the present technique. As shown, the power supply assembly 200 includes two power supplies, which in the non-limiting example are ATX power supplies 130A and 130B. The ATX power sources 130A and 130B have power inputs 132A and 132B, respectively, for receiving power (e.g., AC power), such as from Power Distribution Units (PDUs) shown in subsequent figures. The two ATX power sources 130A and 130B may receive power from the same PDU or from different PDUs. ATX power supplies 130A and 130B convert the power to power delivered at three different DC voltages. It is contemplated that other multi-voltage power supplies capable of converting power to power delivered at two or more DC voltages may be present in the power supply assembly 200 instead of the ATX power supplies 130A and 130B. Although the current description of fig. 3 refers to the presence of three different voltages generated by ATX power supplies 130A and 130B, the present technique includes power supply assemblies that deliver power at two or more DC voltages.

In more detail, ATX power supply 130A has a power rail 134A that delivers power at a first voltage, a power rail 136A that delivers power at a second voltage, and a power rail 138A that delivers power at a third voltage. ATX power supply 130B has a power rail 134B that delivers power at a first voltage, a power rail 136B that delivers power at a second voltage, and a power rail 138B that delivers power at a third voltage. In the non-limiting example of fig. 3, ATX power sources 130A and 130B deliver power at 12 volts, 3.3 volts, and 5 volts on their power rails. It should be understood that in the context of the present disclosure, the first, second, and third voltages may have different values than conventional ATX power supplies. It should also be understood that the terms "first," "second," and "third" are not intended to imply any order of preference between voltages, and are not intended to be related to the relative magnitudes of the voltages.

Power combining circuit 210 is electrically connected to power rail 134A of ATX power supply 130A and power rail 134B of ATX power supply 130B. The power combining circuit 210 delivers power at a first voltage to a first voltage input of a load, such as the first voltage input 162 of a server 160 or the first voltage input 162 of a group of servers 160. Another power combining circuit 220 is electrically connected to power rail 136A of ATX power supply 130A and power rail 136B of ATX power supply 130B. The power combining circuit 220 delivers power at a second voltage to the second voltage input(s) 164 of the server(s) 160. The additional power combining circuit 230 is electrically connected to the power rail 138A of the ATX power supply 130A and to the power rail 138B of the ATX power supply 130B. The power combining circuit 230 delivers power at a third voltage to the third voltage input(s) 166 of the server(s) 160. Although fig. 3 shows that ATX power supplies 130A and 130B are each capable of providing 1000W of power, and that servers 160 may each consume 1000W of power, it should be understood that in most cases each server 160 is expected to consume much less than the nominal 1000W, and therefore the combined power consumption of servers 160 may remain within the capabilities of ATX power supplies 130A and 130B. In any event, the power ratings depicted on the various figures are for illustration only and do not limit the present disclosure. Power supplies and loads having various power ratings are contemplated.

As shown, the load may include a plurality of servers 160, each server 160 having its own input 162, 164, and 166 for receiving power at a first voltage, a second voltage, and a third voltage. Alternatively, the load may include one or more devices that collectively receive power at least at a first voltage and a second voltage. In a non-limiting example, the load may include a computer, a stack of disks or network devices that receive power at a first voltage, and a cooling fan or water cooling pump that receives power at a second voltage.

As shown, the power combining circuit 210 includes a diode 212 that connects the power rail 134A of the ATX power source 130A to the first voltage input(s) 162 of the server(s) 160. The power combining circuit 210 also includes a diode 214, the diode 214 connecting the power rail 134B of the ATX power source 130B to the first voltage input(s) 162 of the server(s) 160. Power combining circuit 220 includes a diode 222 that connects power rail 136A of ATX power source 130A to second voltage input(s) 164 of server(s) 160. Power combining circuit 220 also includes a diode 224 that connects power rail 136B of ATX power source 130B to second voltage input(s) 164 of server(s) 160. The power combining circuit 230 includes a diode 232 that connects the power rail 138A of the ATX power source 130A to the third voltage input(s) 166 of the server(s) 160. The power combining circuit 230 also includes a diode 234, the diode 234 connecting the power rail 138B of the ATX power source 130B to the third voltage input(s) 166 of the server(s) 160.

Diodes 212, 214, 222, 224, 232, and 234 may be replaced by emulation circuits, each operating as an ideal diode to limit any voltage drop in combining circuits 210, 220, and 230. FIG. 4 is a circuit diagram of a simulation circuit according to an embodiment. The simulation circuit 250 includes: an input 252 that may be connected to any of the power rails 134A, 136A, 138A, 134B, 136B, or 138B of the ATX power source 130A or 130B; and an output 254 that may be connected to any of the voltage inputs 162, 164, or 166 of the server 160. A P-channel MOSFET transistor 256 has a drain 258 connected to input 252 and a source 260 connected to output 254. The voltage comparator is formed by a pair of matched PNP transistors 262 and 264. The emitter 266 of the PNP transistor 262 is connected to the power input 252. The base 268 and collector 270 of the PNP transistor 262 are connected to a resistor 272, which resistor 272 is further connected to ground 274. An emitter 276 of PNP transistor 264 is connected to output 254. Base 278 of PNP transistor 264 is connected to base 268 and collector 270 of PNP transistor 262. The collector 280 of the PNP transistor 264 is connected to a resistor 282, the resistor 282 further connected to ground 274. The collector 280 of the PNP transistor 264 is also connected to the gate 284 of the MOSFET transistor 256.

In the simulation circuit 252, the resistors 272 and 282 have a relatively high value, for example 10K ohms, in order to limit power consumption. MOSFET transistor 256 emulates a diode, allowing current to flow from input 252 to output 254, rather than in the reverse direction. If the voltage at output 254 is different from the voltage at input 252, the voltage at the gate 284 of MOSFET transistor 256 (which is also the voltage on resistor 282) is adjusted to reduce this voltage difference. In an embodiment, the emulation circuit 250 can be integrated on a single chip because this configuration facilitates matching of the PNP transistors 262 and 264 and matching of the resistors 272 and 282. Furthermore, all components of the simulation circuit 250 may react consistently to temperature changes when integrated on a single chip.

The power supply assembly 200 is not limited to the use of diodes 212, 214, 222, 224, 232, and 234 or their replacement with the emulation circuit 250. It is contemplated that diodes 212, 214, 222, 224, 232, and 234 may be replaced with other emulation circuits that operate substantially as ideal diodes.

Returning to fig. 3, power supply assembly 200 may include a voltage comparator adapted to detect a voltage difference between the same voltage power rails of ATX power supplies 130A and 130B. In fig. 3, the voltage comparators are shown as a single multiple voltage comparator 240 for ease of illustration; however, 2 or 3 different voltage splitters may be used to compare 2 or 3 voltages on the power rails of ATX power supplies 130A and 130B.

Voltage comparator 240 includes a sense input 242A electrically connected to power rail 134A of ATX power supply 130A and a sense input 242F electrically connected to power rail 134B of ATX power supply 130B. The voltage comparator 240 compares the voltage sensed by the sense input 242A with the voltage sensed by the sense input 242F. In normal operation, no significant difference should be detected between the sense inputs 242A and 242F. If any voltage difference is detected, it may be found that one of ATX power sources 130A or 130B fails to deliver power at the first voltage. A signal may be sent by the voltage comparator 240 to the monitoring device 290 to report that one of the ATX power sources 130A or 130B appears to fail to deliver power at the first voltage. In turn, the monitoring device 290 may be communicatively connected to the PDU (or PDUs, fig. 6) that provides power to the ATX power sources 130A and 130B, and send a signal to the PDU to report the detected failure of one of the ATX power sources 130A or 130B.

Voltage comparator 240 (or a different single voltage comparator) also includes a sense input 242B electrically connected to power rail 136A of ATX power supply 130A and a sense input 242E electrically connected to power rail 136B of ATX power supply 130B. The voltage comparator 240 compares the voltage sensed by the sense input 242B and the voltage sensed by the sense input 242E to detect a final fault of one of the ATX power sources 130A or 130B with respect to delivering power at the second voltage. Likewise, voltage comparator 240 (or a different single voltage comparator) may also include a sense input 242C electrically connected to power rail 138A of ATX power supply 130A and a sense input 242D electrically connected to power rail 138B of ATX power supply 130B. The voltage comparator 240 may compare the voltage sensed by the sense input 242C and the voltage sensed by the sense input 242D to detect a final failure of one of the ATX power sources 130A or 130B with respect to delivering power at the third voltage. Thus, any failure of the ATX power source 130A or 130B to deliver power at the first voltage, the second voltage, or the voltage may be reported to the monitoring device 290, which in turn reports the detected failure to the PDU.

The PDU may be part of a power supply network (fig. 6) in the data center, with supervisory functions for monitoring power consumption and redundant power delivery to all servers 160 in the data center. As a non-limiting example, a given PDU providing power to ATX power supplies 130A and 130B may detect a drop in power consumed by power supply assembly 200. This detected drop in power consumption and information about the eventual failure of one of ATX power sources 130A and 130B may be used to provide guidance to maintenance personnel who will then repair or replace the failed power source.

In an embodiment of power supply assembly 200, power combining circuits 210 and 220 (and 230, if present), voltage comparator 240 (or a different voltage comparator), and monitoring device 290 may be mounted on a common platform (not shown), such as a single Printed Circuit Board (PCB) mounted. The two ATX power sources 130A and 130B may be connected to the common platform, which in turn may be connected to the server(s) 160, while limiting the total number of separate physical components.

Generally, a substantial portion of the power consumed by the server 160 is consumed at one of the input voltages to the server, such as, but not limited to, 70% of the power consumed at 12 volts, 12 volts being the first voltage in the example of FIG. 3. Thus, power redundancy may be provided differently for the first voltage carrying the most power than for the other voltages. To this end, FIG. 5 is a block diagram of another redundant power supply configuration in accordance with embodiments of the present technique. Power assembly 300 includes many of the components of power assembly 200 introduced in the description of fig. 2. For the sake of brevity, the description of these components is not repeated here, and the description of FIG. 5 will focus on the differences between power assemblies 300 and 200. ATX power supplies 130A and 130B may be labeled "multi-voltage power supplies" to distinguish them from the single-voltage power supplies 320A and 320B present in power supply assembly 300. Given the presence of the single voltage power supplies 320A and 302B in the power supply assembly 300, the ATX power supplies 130A and 130B may have lower power ratings than those shown in fig. 3.

In a non-limiting example where most of the power is consumed by the server 160 at the first voltage, the single voltage power supplies 320A and 302B both receive AC power on their respective power supply inputs 322A and 322B and convert that power to the first voltage, which in this example is 12 volts. The first voltage is present on the respective power rails 324A and 324B of the single voltage supplies 320A and 302B. For example, AC power may be received from the same one or more PDUs providing power to ATX power sources 130A and 130B, or from one or more other PDUs. In any event, the voltage on the power rails 324A and 324B of the single voltage power supplies 320A and 302B matches the voltage present on one of the power rails of each of the ATX power supplies 130A and 130B.

In the power supply assembly 300, diodes 212 and 214 connect the power rail 134A of the ATX power supply 130A and the power rail 134B of the ATX power supply 130B, respectively, to the first voltage input(s) 162 of the server(s) 160, the diodes 212 and 214 now being part of a power combining circuit 310, which also includes diodes 316 and 318. The diodes 316 and 318 connect the power rail 324A of the single voltage power supply 320A and the power rail 324B of the single voltage power supply 320B, respectively, to the first voltage input(s) 162 of the server(s) 160. Voltage comparator 240 (or an additional single voltage comparator) also includes a sense input 242G electrically connected to power rail 320A of single voltage power supply 320A and a sense input 242H electrically connected to power rail 324B of single voltage power supply 320B. The voltage comparator 240 compares the voltage sensed by the sense input 242G with the voltage sensed by the sense input 242H. In normal operation, no significant difference should be detected between the sense inputs 242G and 242H. If any voltage difference is detected, it can be found that one of the single voltage power supplies 320A or 320B fails to deliver power at the first voltage. The voltage comparator 240 may send a signal to the monitoring device 290 to report that one of the single voltage power supplies 320A or 320B appears to fail to deliver power at the first voltage. In turn, the monitoring device 290 may be communicatively connected to the PDU (or PDUs) that provide power to the single voltage power supply 320A or 320B and send a signal to the PDU to report the detected failure of the single voltage power supply 320A or 320B.

FIG. 6 is a block diagram of a redundant power supply network in accordance with embodiments of the present technique. The power supply network 400 may provide power at multiple voltages to a large number of servers 160 and/or other loads in a data center. Number of servers 160 may receive power from each of the plurality of power supply configurations 200 or 300. Each power supply configuration 200 or 300 may receive power from one or more Uninterruptible Power Supplies (UPSs) 410 (only one shown for simplicity) via one or more PDUs 420 (only one shown for simplicity). It should be understood that a large data center may include hundreds of UPSs 410, hundreds of PDUs 420, hundreds of power configurations 200 or 300, and thousands of servers 160.

Each UPS 410 receives power from a sector, and each UPS 410 includes a battery (not shown) to allow power to be continuously delivered in the event of a sector failure. AC power at 110VAC or 220VAC, for example, is carried on the power rail 412 of each UPS 410. Each PDU420 receives AC power at its power input 422 from a respective power rail 412 and delivers AC power at a plurality of power outputs, such as power outputs 424, 426, and 428. PDU420 may include more or less power outputs than shown in fig. 6. Power supply assembly 200 or 300 receives power from power outputs 424, 426 and 428. In each power supply assembly 200 or 300, the monitoring device 290 (fig. 3 and 5) can communicate with the corresponding PDU420 to report any detected failure of one of the ATX power supplies 130A or 130B or one of the single voltage power supplies 320A or 320B. The signaling between the monitoring device 290 and the PDU420 may be over a dedicated signaling path (not shown). Alternatively, signaling may be carried over the AC power leads connecting the power outputs 424, 426, and 428 of the PDU420 to the power supply assembly 200 or 300, for example, using a Power Line Communication (PLC) protocol.

Power supply network 400 includes at least one power management unit 430. Fig. 7 is a block diagram of a power management unit according to an embodiment. The power management unit 430 includes a processor or multiple cooperating processors (represented for simplicity as processor 432), a storage device or multiple storage devices (represented for simplicity as storage device 434), one or more input devices (represented for simplicity as input device 436), and one or more output devices (represented as output device 438). The input device 436 and the output device 438 may be combined in an input/output device. The processor 432 is operatively connected to a storage device 434, an input device 436, and an output device 438. Storage 434 may store characteristics of various power supplies, servers, and other loads of the data center. Memory device 434 may also include a non-transitory computer-readable medium for storing instructions executable by processor 432 to allow power management unit 430 to perform specified functions.

In power supply network 400, power management unit 430 may be duplicated in order to provide redundancy of its functions. Each PDU420 may detect an unexpected change, e.g., a decrease, in the power consumed by the power supply assembly 200 or 300 connected to one of its power outputs, such as power outputs 424, 426, and 428. PDU420 may forward a report received at input device 436 of power management unit 430 that includes an identification of the power output 424, 426, 428 of the power supply assembly 200 or 300 to which the power output has been detected for use in identifying the power output. The power management unit 430 may also be communicatively connected to various monitoring devices 290 via the PDU420 or via other signaling leads (not shown). The power management unit 430 may receive reports from the various monitoring devices 290 regarding detected faults of either of the ATX power sources 130A or 130B or one of the single voltage power sources 320A or 320B, which are sent to the power management unit 430 via various PDUs 420 and received at the input device 436. Given that the reports from the monitoring device 290 may identify a particular power source, and for multi-voltage power sources, the power loss at a particular voltage may be determined, they provide a finer level of detail than the reports from the PDU 420. The processor 432 may record these various reports in the storage 434 of the power management unit 430.

The processor 432 of the power management unit 430 may be programmed to determine the relative urgency associated with various faults according to: the type of power source having a fault; historical information about the reliability of various types of power supplies; the failed voltage and the level of redundancy for that voltage in a given power supply assembly 200 or 300; and the criticality of the functions supported by the one or more loads powered by the faulty power source, are stored in the storage device 434. The power management unit 430 may cause a display (not shown) connected to the output device 438 to present a report and associated relative urgency to an operator. This presentation may convey a relative urgency to handle the failed power supply. The processor 432 uses information regarding the reporting and characteristics of the various power supplies, servers, and other loads stored in the storage device 424 to assess this relative urgency. Considering, for example, the power supply assembly 300 of fig. 5, considering that the single voltage power supplies 320A and 320B may have sufficient capacity to continue to provide the majority of the required power at 12 volts to the server 160, it may be considered a low emergency situation that the ATX power supply 130A provides power at 12 volts on its power rail 134A while the ATX power supply 130A continues to deliver power at 3.3 volts and 5 volts on its power rails 136A and 138A. In the same power supply assembly 300 of fig. 5, a failure of one of the single voltage power supplies 320A and 320B may be considered a high emergency situation, as the total capacity of the remaining power supplies may not be sufficient to provide power at 12 volts to the server 160. In another example, if one of ATX power supplies 130A or 130B has sufficient capacity to supply the necessary power to server 160, a failure of the other of attx power supplies 130A or 130B to provide power to server 160 at 3.3 volts or 5 volts may be considered a moderate emergency. In yet another example, where a processor (not shown) receives power at a first voltage from power supply assembly 200 or 300 and a cooling fan (not shown) receives power at a second voltage from power supply assembly 200 or 300, a loss of power at the first voltage from one of the power supplies may be considered a high emergency situation, as a total power reduction at the first voltage may result in a total loss of functionality supported by the processor. In the same example, a loss of power at the second voltage from one of the power supplies may be considered a low emergency situation because the processor may desire to continue operating for at least some time after the cooling fan loses cooling capacity due to the total loss of power at the second voltage.

The power management unit 430 may also be communicatively connected to each of the servers 160 in the power network 400 via a signaling path 440 connected to an output device 438. In the power management unit 430, the processor 432 may monitor the combined power level of the power supplies of each of the power supply assemblies 200 or 300. For each given power supply assembly 200 or 300, if the combined power consumption of the plurality of servers 160 connected to the combined power supply exceeds the combined power level of the power supplies contained in that given power supply assembly 200 or 300, the power management unit 430 may send a command to at least one of the plurality of servers 160 to reduce its power consumption. Processor 432 may use configuration information contained in storage 434 to determine which particular server 160 may be instructed to reduce its power consumption. It may be noted that the power consumption of a given server 160 may be reduced to zero, which means that a given server 160 may be temporarily out of service.

As indicated previously in the description of fig. 1 and 2, the ATX standard implies that 5 volts of backup power is initially delivered via a connection 170 (fig. 1) existing between ATX power source 125 and server 160. This standby power allows the motherboard (not shown) of server 160 to perform a boot sequence. When the start-up sequence is complete, the server 160 sends a PS _ ON signal ON signaling lead 172 to the ATX power supply 125. Upon receiving the PS _ ON signal, ATX power supply 125 begins to step up the voltage ON power rails 126, 127, and 128, after which ATX power supply 125 issues a PWR _ OK signal ON signaling lead 174. PWR _ OK notifies server 160 that power is now available on all of its power inputs 162, 164, and 166. The server 160 may now perform its various operations. Because the sequence of fig. 2 delays the delivery of power to the server 160, the risk of arcing at the connections between the power rails 126, 127, and 128 of the ATX power supply 125 and the power inputs 162, 164, and 166 of the server 160 is greatly reduced.

However, the sequence of FIG. 2 is intended to allow a single ATX power supply 125 to provide power to a single server 160. When a single server 160 is physically connected to ATX power supply 125, there is no voltage on power rails 126, 127, and 128 of ATX power supply 125. In the context of a power supply assembly 200 or 300, one or more servers 160 may be running, and more servers 160 may be added to the same power supply assembly 200 or 300. Hot plugging of the server 160 to the ATX power supplies 130A and 130B (and to the single voltage power supplies 320A and 320B, if present) cannot be performed in a conventional manner. The newly connected server 160 will need to receive a PWR _ OK signal in order to begin using the power available at its power inputs 162, 164, 166. The ATX power supplies 130A and 130B cannot start transmitting a new PWR _ OK signal within first receiving a PS _ ON signal from the newly connected server 160. According to their configuration, when the ATX power sources 130A and 130B have supplied power to the other server 160, it may not be able to properly process the PS _ ON signal received from the newly connected server 160. Further, if the ATX power supplies 130A and 130B issue the PWR _ OK signal in response to the just-received PS _ ON signal, the other servers 160 may react incorrectly because they are not configured to receive the PWR _ OK signal when the other servers 160 are already running.

In fact, the same problem may occur in power validation with a single ATX power source 125, 130A or 130B. Hot plugging the second server 160 to the ATX power source 125, 130A or 130B may cause the same damage, if a single ATX power source 125, 130A or 130B already provides power to the first server 160, due to arcing of the ATX power source 125, 130A or 130B and/or the second server 160.

Fig. 8 is a block diagram illustrating some components of the power supply configurations of fig. 3 and 5, further illustrating a control circuit for hot plugging of a load according to an embodiment. Fig. 8 reproduces some components of the power supply assembly 200 or 300. Various components are omitted for ease of illustration; however, it should be understood that the features described in relation to the description of fig. 8 may be applicable to any of the embodiments based on fig. 3 and 5. In an embodiment, the control circuit 500 is added to the power supply assembly 200 or 300. The circuit 500 is provided to allow hot plugging of multiple servers 160 to the power supply assembly 200 or 300.

In an embodiment, connection 170' is established from one of ATX power supplies 130A or 130B to control circuit 500. The connection 170' to the control circuit 500 may be established from both the ATX power supplies 130A and 130B for redundancy purposes. When the power supply assembly 200 or 300 begins to receive power from the PDU420, the control circuit 500 begins to receive 5-volt standby power via the connection(s) 170'. Shortly thereafter, the control circuit 500 sends a PS _ ON signal to each of the ATX power supplies 130A and 130B via the respective signaling leads 172'. When they are ready to provide power on all respective power rails, ATX power supplies 130A and 130B send PWR _ OK signals to control circuit 500 via respective signaling leads 174'. When having received the PWR _ OK signal from both the ATX power sources 130A and 130, the control circuit 500 determines that power can be delivered to the server(s) 160. In configurations involving a single ATX power supply 125, 130A, or 130B, the control circuit 500 may determine that power may be delivered to the server(s) 160 after receiving a PWR _ OK signal from the single ATX power supply 125, 130A, or 130B.

Each server 160 may receive 5-volt backup power via a respective connection 170 (fig. 1) extending from one of ATX power sources 130A or 130B, or via a respective connection 170 "extending from control circuit 500. When ready, each given server 160 sends a PS _ ON signal to the control circuit 500 via a corresponding signaling lead 172 ". In response, the control circuit 500 sends a PWR _ OK signal to the given server 160 via the corresponding signaling lead 174 ".

To hot plug additional servers 160 to the power supply assembly 200 or 300 when certain servers 160 are already running, the power inputs 162, 164, and 166 of the additional servers 160 are connected to the power combining circuits 210 or 310, respectively, and to the power combining circuits 220 and 230, respectively. The additional server 160 is also connected to one of the available sources of 5 volt backup power either directly from the ATX power source 130A or 130B via a respective connection 170, or from the control circuit 500 via a respective connection 170 ". Corresponding signaling leads 172 "and 174" are connected between the additional server 160 and the control circuit 150. After the additional server 160 performs its startup sequence, the PS _ ON signal is sent to the control circuit 500 via the corresponding signaling lead 172 ″. After a short delay, e.g., 300 to 500 milliseconds, the control circuit 500 responds with a PWR _ OK signal sent over the corresponding signaling lead 174 ". The additional server 160 is now ready to receive power from the power supply assembly 200 or 300 at its power inputs 162, 164 and 166.

In the power supply assembly 200 or 300, when used with the control circuit 500, each ATX power supply 130A and 130B thus appears to provide power to a single server, while each server 160 appears to be powered by a dedicated ATX power supply. When the connection of the power inputs 162, 164 and 166 to the power combining circuit is established in a stable manner, each server 160, after receiving their respective PWR _ OK signal, starts operating using the power present on its power inputs 162, 164 and 166, thereby greatly reducing the risk of arcing.

There is no a priori limit to the number of ATX power sources 130A or 130B and the number of servers 160 that may be connected to the control circuit 500. The control circuit 500 may be implemented using hardware components or software components, or a combination thereof. For example, control circuit 500 may include a number of logic circuit elements (not shown) that are assembled to receive 5 volts standby power ON connection 170 ', receive a PWR _ OK signal ON signaling lead 174 ', and receive a PS _ ON signal ON signaling lead 172 ", the logic circuit elements also applying 5 volts standby power ON connection 70", send a PS _ ON signal ON signaling lead 172 ', and send a PWR _ OK signal ON signaling lead 174 ", the signals being received and sent in the sequence described above. In another example, the signaling leads 172, 172 ", 174' and 174" may be implemented using a bus connecting the control circuit 500 to the ATX power supplies 130A and 130B and to the server (2) 160. In examples where the servers 160 are assembled in a rack (not shown), the control circuit 500 may be mounted in a backplane (not shown) of the rack. In this case, an instance of the control circuit 500 may be mounted in the floor of each rack.

Fig. 9A and 9B are sequence diagrams illustrating operations of a method for controlling power delivery to one or more servers according to an embodiment. In fig. 9A and 9B, sequence 600 includes a plurality of operations, some of which may be performed in a variable order, some of which may be performed concurrently, and some of which may be optional. The sequence 600 may be implemented, for example, but not limited to, in the power supply assembly 200 or 300, and in particular in the control circuit 500 of fig. 8. It should be noted, however, that sequence 600 may be implemented in a combination of power having a single power source.

In an embodiment, at operation 605, the control circuit 500 is powered on by receiving backup power at an internal power input (fig. 10). At operation 610, the control circuit 500 sends a signal to a first power supply (e.g., ATX power supply 130A) indicating that the control circuit 500 is powered on. If there is more than one power supply, the control circuit 500 sends a similar signal to the second power supply (e.g., ATX power supply 130A) indicating that the control circuit 500 is powered on. Then, at operations 620 and 625, the control circuit 500 may receive signals indicating that the first power source and the second power source are ready to provide power in any order. When the first and second power sources are the ATX power sources 130A and 130B, the signal indicating that the control circuit 500 is powered ON may be a PS _ ON signal, and the signal indicating that the ATX power sources 130A and 130B are ready to supply power may be a PWR _ OK signal. Also, at operation 605, power to the control circuit 500 may be obtained from the backup power supply of one or both of the ATX power supplies 130A and 130B via connection 170'.

If the control circuit 500 supports the connection 170 ", it may turn on the internal power output (FIG. 10) to power up the server 160 at operation 630. The power output may be directly connected to a power input in the control circuit 500. In an embodiment, the control circuit 500 may wait until it has received a signal indicating that the first power supply is ready to provide power (or until it has received two signals indicating that both the first power supply and the second power supply are ready to provide power) before turning on the internal power output. It may be noted that server 160 may receive backup power from control circuit 500 via connection 170 ", or from ATX power supply 130A or 130B via connection 170". Thus, the connection 170 "may or may not be present in different embodiments.

At operation 635, the control circuit 500 may receive a signal from the server 160 indicating that the server 160 is powered on. If the server 160 is configured to receive power from the ATX power source, the signal may be a PS _ ON signal. Then, at operation 640, optionally after a time delay, for example 500 milliseconds after completing operation 635, the control circuit 500 sends a signal to the server 160 indicating that the server 160 can begin receiving power from the first power source (if only one power source is present) or from either or both of the first and second power sources. The signal indicating that the server 160 can start receiving power may be a PWR _ OK signal if the server 160 is constructed according to the ATX specification.

In the event that the server 160 receives backup power directly from one of the ATX power sources 130A or 130B via connection 170, the operation 635 of the server 160 sending a signal to the control circuit 500 indicating that it is powered on may precede the reception of the signal(s) at the control circuit 500 indicating that the first power source (or the first and second power sources) is ready to provide power. In any event, operation 640 is only performed after operations 620 (or operations 620 and 625, if applicable) and operation 635 are all performed.

It is observed that operations 605-640 may be performed while server 160 is connected to the power source(s) and to control circuit 500. Alternatively, operations 605-640 may all be performed with the server 160 having been previously physically connected to a power source. When the servers 160 are physically connected, power may or may not already be available on the power rails of the power supplies (e.g., power rails 134A, 136A, 138A, 134B, 136B, and 138B of ATX power supplies 130A and 130B). However, the power packs 200 and 300 may be intended to provide power to multiple servers 160, with some new servers 160 added to the power pack, while other servers 160 are already in operation.

After performing operation 640 in which the server 160 has been placed in operation, at operation 645, a new signal may be received at the control circuit 500. The new signal indicates that the additional server is powered on. The new signal may be a PS _ ON signal. In response, at operation 650, optionally after a time delay, e.g., 500 milliseconds after completing operation 645, the control circuit 500 sends a signal to the additional server 160 indicating that the additional server 160 may begin receiving power from the first power source (if only one power source is present) or from either or both of the first and second power sources. The signal indicating that the additional server 160 can start receiving power may be a PWR _ OK signal if the additional server 160 is constructed according to the ATX specification.

Each operation of sequence 600 may be configured to be processed by one or more processors coupled to one or more storage devices. For example, fig. 10 is a block diagram of a control circuit according to an embodiment. The control circuit 500 introduced in the description of fig. 8 may include a processor or multiple cooperating processors (represented as processor 502 for simplicity), a memory device or devices (represented as memory device 504 for simplicity), and a power input 506 to provide power to the processor 502 and other components of the control circuit 500. Power may be received at power input 506 via connection 170'.

The processor 502 is operatively connected to a number of input and output devices. These include: one or more transmit ports 508, each of the transmit ports 508 being connectable to a respective power supply (such as, but not limited to, one of the earlier introduced ATX power supplies 130A and 130B) via signaling leads 172'; and one or more receive ports 510, the receive ports 510 connected to the ATX power supplies 130A and 130B via signaling leads 174'. A pair comprising one transmit port 508 and one receive port 510 is dedicated for connection with each ATX power supply 130A or 130B. The input and output device further includes: one or more transmit ports 512, each of the transmit ports 512 being connectable to a respective server 160 via a signaling lead 174 "; and one or more receive ports 514, the receive ports 514 being connectable to respective servers 160 via signaling leads 172 ". A pair comprising one transmit port 512 and one receive port 514 is dedicated for connection with each server 160. The power output 516 may be internally connected to the power input 506 and provide backup power to initially power on one of the plurality of servers 160 via connection 170 ".

Connections 170 ' and 170 "and signaling leads 172 ', 174 ', 172" and 174 "are introduced in the description of fig. 8.

In an embodiment, a pair of transmit and receive ports 508 and 510 may be provided for each ATX power supply 130A or 130B used in conjunction with the control circuit 500 for consistency with the standard manner of connecting ATX power supplies to servers via dedicated line connections carrying PS _ ON and PWR _ OK signals. In the same embodiment, a pair of transmit and receive ports 512 and 514 may be provided for each server 160 used in conjunction with the control circuit 500. In some other embodiments, some of the transmit and receive ports may be combined in a fewer number of units.

The memory device 504 may include a non-transitory computer-readable medium for storing instructions executable by the processor 502 to perform various operations of the sequence 600. In more detail, the processor 502 may detect that the power input 506 is powered on. In response to this detection, the processor 502 causes the transmit port 508 to transmit a first signal to the ATX power supply 130A or 130B indicating that the control circuit 500 is powered on (if more than one ATX power supply is connected to the control circuit 500, the first signal is transmitted to each ATX power supply through the respective transmit port 508). Processor 502 then receives a second signal from receive port 510 indicating that ATX power source 130A or 130B is ready to provide power. The processor 502 also receives a third signal from the receive port 514 indicating that the corresponding server 160 is powered on. The plurality of servers 160 may each transmit a respective third signal received on the corresponding receive port 514. Each third signal received from a different server 160 is processed separately.

The third signal may be received before or after the second signal. In one embodiment, processor 520 may cause power output 516 to begin providing backup power to one or more connected servers 160 via connection 170 "after the second signal has been received. In this embodiment, server(s) 160 may send the third signal only after backup power is provided from power output 516. In another embodiment, the server(s) may receive backup power directly from ATX power supply 130A or 130B. In the latter embodiment, the third signal may precede or follow the second signal.

After receiving both the second signal indicating that the ATX power source 130A or 130B is ready to provide power and the third signal indicating that the server 160 is powered on, the processor 502 pairs the transmit port 512 with the receive port 514 that has received the third signal to transmit a fourth signal to the server 160 indicating that the server 160 may begin receiving power from the ATX power source 130A or 130B. The processor 502 may delay the transmission of the fourth signal to ensure a minimum time interval between receiving the third signal and transmitting the fourth signal.

Although the above implementations have been described and illustrated with reference to particular steps performed in a particular order, it will be understood that these steps may be combined, subdivided, or reordered without departing from the teachings of the present technology. At least some of these steps may be performed in parallel or in series. Accordingly, the order and grouping of the steps is not a limitation of the present technique.

It should be expressly understood that not all of the technical effects mentioned herein need be enjoyed in each and every implementation of the present technology.

Modifications and improvements to the above-described implementations of the present technology will become apparent to those skilled in the art. The foregoing description is intended to be exemplary rather than limiting. Accordingly, the scope of the present technology is intended to be limited only by the scope of the appended claims.