阅读说明：本技术 像素电路及其驱动方法以及显示面板 (Pixel circuit, driving method thereof and display panel ) 是由 冯佑雄 陈文波 于 2020-03-31 设计创作，主要内容包括：本公开实施例提供了一种像素驱动电路,被配置为驱动发光元件发光,该像素驱动电路包括：驱动子电路,被配置为产生用于使发光元件发光的电流；发光控制子电路,电连接到驱动子电路和发光元件的第一端,被配置将用于使发光元件发光的电流提供到发光元件的第一端；驱动控制子电路,电连接到驱动子电路,被配置为将数据信号提供到驱动子电路；复位子电路,电连接到驱动子电路和发光元件的第一端,并且与驱动子电路电连接于第一节点,被配置为对第一节点和发光元件的第一端进行复位；以及补偿子电路,电连接到第一节点,被配置为接收补偿控制信号,并在补偿控制信号的控制下,对第一节点的电压进行补偿。(The disclosed embodiment provides a pixel driving circuit configured to drive a light emitting element to emit light, the pixel driving circuit including: a drive sub-circuit configured to generate a current for causing the light emitting element to emit light; a light emission control sub-circuit electrically connected to the driving sub-circuit and a first end of the light emitting element, configured to supply a current for causing the light emitting element to emit light to the first end of the light emitting element; a driving control sub-circuit electrically connected to the driving sub-circuit, configured to provide a data signal to the driving sub-circuit; a reset sub-circuit electrically connected to the driving sub-circuit and the first terminal of the light emitting element, and electrically connected to the first node with the driving sub-circuit, configured to reset the first node and the first terminal of the light emitting element; and a compensation sub-circuit electrically connected to the first node, configured to receive the compensation control signal and compensate the voltage of the first node under the control of the compensation control signal.)

A pixel drive circuit configured to drive a light emitting element to emit light, the pixel drive circuit comprising:

a driving sub-circuit configured to generate a current for causing the light emitting element to emit light;

a light emission control sub-circuit electrically connected to the driving sub-circuit and the first end of the light emitting element, configured to receive a light emission control signal and supply a current for causing the light emitting element to emit light to the first end of the light emitting element under the control of the light emission control signal;

a driving control sub-circuit electrically connected to the driving sub-circuit, configured to receive a data signal and a gate driving signal, and to provide the data signal to the driving sub-circuit under the control of the gate driving signal;

a reset sub-circuit electrically connected to the driving sub-circuit and the first end of the light emitting element, and electrically connected to the first node with the driving sub-circuit, configured to receive a first reset signal and a second reset signal, and reset the first node and the first end of the light emitting element under the control of the first reset signal and the second reset signal; and

a compensation sub-circuit electrically connected to the first node, configured to receive a compensation control signal and compensate a voltage of the first node under the control of the compensation control signal.

The pixel driving circuit according to claim 1, wherein the compensation sub-circuit comprises a first transistor having a gate electrically connected to receive the compensation control signal, a first pole electrically connected to receive a first voltage signal, and a second pole electrically connected to the first node.

A pixel driving circuit according to claim 2, wherein the first transistor is a P-type transistor.

A pixel driving circuit according to claim 2 or 3, wherein the compensation control signal has a first level, the first transistor being in an off state under control of the compensation control signal.

The pixel driving circuit according to any one of claims 2 to 4, wherein a channel width-to-length ratio of the first transistor is greater than or equal to 10/3.5.

A pixel drive circuit according to any one of claims 2 to 5, wherein the drive sub-circuit comprises a drive transistor, a second transistor and a storage capacitor, wherein

The grid electrode of the driving transistor is electrically connected with the first node, the first pole of the driving transistor is electrically connected with the light-emitting control sub-circuit at the second node, and the second pole of the driving transistor is electrically connected with the light-emitting control sub-circuit at the third node;

a gate of the second transistor is electrically connected to receive the gate drive signal, a first pole of the second transistor is electrically connected to the first node, and a second pole of the second transistor is electrically connected to the third node; and

the first end of the storage capacitor is electrically connected to receive the first voltage signal, and the second end of the storage capacitor is electrically connected to the first node.

A pixel drive circuit according to claim 6, wherein the drive transistor is a P-type transistor.

A pixel drive circuit according to claim 6 or 7, wherein the channel width to length ratio of the second transistor is less than or equal to 2/3.5.

A pixel drive circuit according to any one of claims 2 to 8, wherein the drive control sub-circuit comprises a third transistor having a gate electrically connected to receive the gate drive signal, a first pole electrically connected to receive the data signal, and a second pole electrically connected to a light emission control sub-circuit at a second node.

A pixel drive circuit according to any one of claims 2 to 9, the emission control sub-circuit comprising a fourth transistor and a fifth transistor, wherein

A gate of the fourth transistor is electrically connected to receive the light emission control signal, a first pole of the fourth transistor is electrically connected to receive a first voltage signal, and a second pole of the fourth transistor and the light emission control sub-circuit are electrically connected to a second node;

a gate of the fifth transistor is electrically connected to receive the light emission control signal, a first electrode of the fifth transistor and the light emission control sub-circuit are electrically connected to a third node, and a second electrode of the fifth transistor is electrically connected to the first end of the light emitting element.

A pixel driving circuit according to any one of claims 2 to 10, wherein the reset sub-circuit comprises a sixth transistor and a seventh transistor, wherein

A gate of the sixth transistor is electrically connected to receive the first reset signal, a first pole of the sixth transistor is electrically connected to the first node, and a second pole of the sixth transistor is electrically connected to receive a reset reference signal;

a gate of the seventh transistor is electrically connected to receive the second reset signal, a first pole of the seventh transistor is electrically connected to receive the reset reference signal, and a second pole of the seventh transistor is electrically connected to a first terminal of the light emitting element.

A pixel driving circuit according to any one of claims 2 to 10, wherein the reset sub-circuit comprises a sixth transistor and a seventh transistor, wherein

A gate of the sixth transistor is electrically connected to receive the first reset signal, a first pole of the sixth transistor is electrically connected to the first node, and a second pole of the sixth transistor is electrically connected to receive a reset reference signal;

a gate of the seventh transistor is electrically connected to receive the second reset signal, a first pole of the seventh transistor is electrically connected to receive the reset reference signal, and a second pole of the seventh transistor is electrically connected to a first terminal of the light emitting element;

wherein the second reset signal is utilized as the compensation control signal.

The pixel driving circuit according to claim 11 or 12, wherein a channel width-to-length ratio of the sixth transistor is less than or equal to 2/3.5.

A display panel, comprising:

a plurality of scan lines;

a plurality of data lines crossing the plurality of scan lines; and

a plurality of pixel units arranged in a matrix at each intersection of a data line and a scan line and electrically connected to the corresponding data line and scan line, each pixel unit including a light emitting element and the pixel driving circuit according to any one of claims 1 to 12,

the data signals received by the pixel driving circuit are provided by corresponding data lines of the pixel unit, and the gate driving signals received by the pixel driving circuit are provided by corresponding scanning lines of the pixel unit.

A method of driving the pixel drive circuit of claim 1, comprising:

providing a light emitting control signal and a gate driving signal with a first level, and providing a first reset signal and a second reset signal with a second level in a first period;

providing a light emission control signal having a first level, a first reset signal and a second reset signal, and providing a gate driving signal having a second level, in a second period;

in the third period, the first reset signal, the second reset signal, and the gate driving signal are supplied with the first level, and the light emission control signal is supplied with the second level.

The method of claim 14, wherein the compensation control signal having the first level is always provided in the first, second and third periods.

The method of claim 14, wherein if the second reset signal is used as the compensation control signal, the second reset signal having the first level is always provided in the first, second, and third periods.