Radiation-resistant carbon nanotube transistor, manufacturing method and integrated circuit system

文档序号:1940425 发布日期:2021-12-07 浏览:19次 中文

阅读说明:本技术 抗辐照碳纳米管晶体管、制造方法以及集成电路系统 (Radiation-resistant carbon nanotube transistor, manufacturing method and integrated circuit system ) 是由 朱马光 肖洪山 张志勇 赵建文 彭练矛 于 2020-06-03 设计创作,主要内容包括:本公开提供了一种抗辐照碳纳米管晶体管,包括:抗辐照衬底;碳纳米管粘附层,碳纳米管粘附层形成在抗辐照衬底上;碳纳米管层,碳纳米管层形成在碳纳米管粘附层上,碳纳米管层作为沟道;以及栅介质,栅介质为至少在碳纳米管层的一部分上形成的聚合物离子液体凝胶。本公开还提供了抗辐照碳纳米管晶体管的制造方法以及集成电路系统。(The present disclosure provides an irradiation-resistant carbon nanotube transistor, including: an irradiation-resistant substrate; the carbon nano tube adhesive layer is formed on the anti-radiation substrate; the carbon nano tube layer is formed on the carbon nano tube adhesion layer and serves as a channel; and a gate dielectric, wherein the gate dielectric is a polymer ionic liquid gel formed on at least one part of the carbon nano tube layer. The disclosure also provides a method for manufacturing the radiation-resistant carbon nanotube transistor and an integrated circuit system.)

1. An irradiation resistant carbon nanotube transistor, comprising:

an irradiation-resistant substrate;

a carbon nanotube adhesion layer formed on the irradiation-resistant substrate;

a carbon nanotube layer formed on the carbon nanotube adhesive layer, the carbon nanotube layer serving as a channel; and

a gate dielectric, the gate dielectric being a polymer ionic liquid gel formed on at least a portion of the carbon nanotube layer.

2. The radiation-resistant carbon nanotube transistor of claim 1, wherein the radiation-resistant substrate is a thin film insulating material.

3. The radiation-resistant carbon nanotube transistor of claim 2, wherein the thin film insulating material is a Polyimide (PI) film, a polyethylene terephthalate (PET) film, or a polyethylene naphthalate (PEN) film.

4. The radiation-resistant carbon nanotube transistor of claim 1, wherein the carbon nanotube adhesion layer is hafnium oxide, aluminum oxide, silicon oxide, or zirconium oxide.

5. The radiation-resistant carbon nanotube transistor of claim 1, wherein a buffer layer is formed between the carbon nanotube layer and the contact interface of the polymer ionic liquid gel.

6. The radiation-resistant carbon nanotube transistor of claim 5, wherein the buffer layer is aluminum oxide or hafnium oxide.

7. The radiation-resistant carbon nanotube transistor according to claim 6, wherein the buffer layer has a thickness of 20nm or less.

8. The radiation-resistant carbon nanotube transistor of claim 1, wherein the carbon nanotube adhesion layer has a thickness of about 5 nm.

9. A method for manufacturing a radiation-resistant carbon nanotube transistor, comprising:

providing an irradiation-resistant substrate;

forming a carbon nano tube adhesion layer on the anti-radiation substrate;

forming a carbon nano tube layer on the carbon nano tube adhesion layer to serve as a channel material; and

and forming a polymer ionic liquid gel as a gate medium on at least one part of the carbon nano tube layer.

10. An integrated circuit system comprising the radiation-resistant carbon nanotube transistor of any one of claims 1 to 8 or the radiation-resistant carbon nanotube transistor manufactured by the manufacturing method of claim 1.

Technical Field

The present disclosure relates to transistor electronics, and more particularly to an anti-radiation carbon nanotube transistor, a method of manufacturing the same, and an integrated circuit system.

Background

In the traditional silicon-based integrated circuit, silicon oxide gate media, a substrate, a shallow trench isolation layer and other technologies are used, so that a plurality of trapped charges are generated when the silicon oxide gate media, the substrate, the shallow trench isolation layer and the like are irradiated by total dose, the electric leakage is increased, and the threshold voltage is drifted.

Although silicon-based integrated circuits can reduce the radiation absorption cross-section through size reduction, silicon-based is a bulk material and there is a reduction limit. The silicon-based integrated circuit reduces the thickness of the gate and reduces the trap charges by selecting a high-k gate dielectric, even a vacuum gate dielectric and the like, but the electric leakage probability can be improved and the gate efficiency can be reduced.

The silicon-based integrated circuit uses SOI technology for substrate irradiation reinforcement, but the further increase of total dose irradiation still generates a leakage channel, and the substrate reflects irradiation rays to cause secondary irradiation effect.

Since the radiation absorption cross section of two-dimensional materials (such as molybdenum sulfide, metal oxide semiconductor and the like) is small, the radiation absorption can be reduced, but the two-dimensional materials are unstable under radiation and can generate obvious defects.

Disclosure of Invention

To solve at least one of the above technical problems, the present disclosure provides an irradiation-resistant carbon nanotube transistor, a method of manufacturing the same, and an integrated circuit system.

The radiation-resistant carbon nanotube transistor, the manufacturing method and the integrated circuit system are realized by the following technical scheme.

According to an aspect of the present disclosure, there is provided an irradiation-resistant carbon nanotube transistor, including: an irradiation-resistant substrate; a carbon nanotube adhesion layer formed on the irradiation-resistant substrate; a carbon nanotube layer formed on the carbon nanotube adhesive layer, the carbon nanotube layer serving as a channel; and the gate medium is a polymer ionic liquid gel formed on at least one part of the carbon nano tube layer.

According to the radiation-resistant carbon nanotube transistor of at least one embodiment of the present disclosure, the radiation-resistant substrate is a thin film insulating material.

According to the radiation-resistant carbon nanotube transistor of at least one embodiment of the present disclosure, the thin film insulating material is a Polyimide (PI) film, a polyethylene terephthalate (PET) film, or a polyethylene naphthalate (PEN) film.

According to the radiation-resistant carbon nanotube transistor of at least one embodiment of the present disclosure, the carbon nanotube adhesion layer is hafnium oxide, aluminum oxide, silicon oxide, or zirconium oxide.

According to the radiation-resistant carbon nanotube transistor of at least one embodiment of the present disclosure, a buffer layer is formed between the contact interface of the carbon nanotube layer and the polymer ionic liquid gel.

According to the radiation-resistant carbon nanotube transistor of at least one embodiment of the present disclosure, the buffer layer is aluminum oxide or hafnium oxide.

According to the radiation-resistant carbon nanotube transistor of at least one embodiment of the present disclosure, the buffer layer has a thickness of 20nm or less.

According to the radiation-resistant carbon nanotube transistor of at least one embodiment of the present disclosure, the thickness of the carbon nanotube adhesion layer is about 5 nm.

The radiation-resistant carbon nanotube transistor according to at least one embodiment of the present disclosure further includes a gate electrode, a source electrode, and a drain electrode, wherein the source electrode and the drain electrode adopt an interdigital electrode structure.

According to another aspect of the present disclosure, there is provided a method of manufacturing a radiation-resistant carbon nanotube transistor, including: providing an irradiation-resistant substrate; forming a carbon nano tube adhesion layer on the anti-radiation substrate; forming a carbon nano tube layer on the carbon nano tube adhesion layer to serve as a channel material; and forming a polymer ionic liquid gel as a gate dielectric on at least a portion of the carbon nanotube layer.

According to the manufacturing method of the radiation-resistant carbon nanotube transistor of at least one embodiment of the present disclosure, the radiation-resistant substrate is a thin film insulating material.

According to the method of manufacturing the radiation-resistant carbon nanotube transistor of at least one embodiment of the present disclosure, the thin film insulating material is a Polyimide (PI) film, a polyethylene terephthalate (PET) film, or a polyethylene naphthalate (PEN) film.

According to the method for manufacturing the radiation-resistant carbon nanotube transistor of at least one embodiment of the present disclosure, the carbon nanotube adhesion layer is formed by depositing hafnium oxide, aluminum oxide, silicon oxide, or zirconium oxide on the radiation-resistant substrate.

According to the manufacturing method of the radiation-resistant carbon nanotube transistor, the polymer ionic liquid gel ink is prepared from the copolymer, the ionic liquid and the organic solvent, and the polymer ionic liquid gel ink is jetted on at least one part of the carbon nanotube layer to form the polymer ionic liquid gel.

According to the manufacturing method of the radiation-resistant carbon nanotube transistor of at least one embodiment of the present disclosure, the copolymer is PS-PMMA, PS-PMMA-PS, PS-PEO-PS, P (VDF-HFP), PEG-DA or SOS-N3

According to the manufacturing method of the radiation-resistant carbon nanotube transistor, the ionic liquid is [ EMIM ]]-[TFSI]、[EMIM]-[Tf2N]、[EMI]-[TCB]、[DEME]-[TFSI]、[EMIM]-[OctOSO3]Or [ BMIM]-[PF6]。

According to the method for manufacturing the radiation-resistant carbon nanotube transistor of at least one embodiment of the present disclosure, the organic solvent is preferably ethyl acetate.

According to the manufacturing method of the radiation-resistant carbon nanotube transistor, at least one part of the carbon nanotube layer is formed with polymer ionic liquid gel, and before the polymer ionic liquid gel is formed, at least one buffer layer is formed between the contact interface of the carbon nanotube layer and the polymer ionic liquid gel.

According to the method for manufacturing the radiation-resistant carbon nanotube transistor, the buffer layer is aluminum oxide or hafnium oxide.

According to yet another aspect of the present disclosure, there is provided an integrated circuit system comprising the radiation-resistant carbon nanotube transistor of any one of the above or a radiation-resistant carbon nanotube transistor manufactured by the method of manufacturing the radiation-resistant carbon nanotube transistor of any one of the above.

Drawings

The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the disclosure and together with the description serve to explain the principles of the disclosure.

Fig. 1 is a schematic structural diagram of a radiation-resistant carbon nanotube transistor according to one embodiment of the present disclosure.

Fig. 2 is a schematic structural diagram of a radiation-resistant carbon nanotube transistor according to yet another embodiment of the present disclosure.

Fig. 3 is a schematic structural diagram of a radiation-resistant carbon nanotube transistor according to yet another embodiment of the present disclosure.

Fig. 4 is a schematic illustration of the formation of an electric double layer effect in a polymer ionic liquid gel of a radiation resistant carbon nanotube transistor according to one embodiment of the present disclosure.

Fig. 5 is a transfer characteristic curve of a radiation-resistant carbon nanotube transistor (P-type ion glue carbon nanotube field effect transistor) according to one embodiment of the present disclosure.

Fig. 6 is a transfer characteristic curve for an irradiation-resistant carbon nanotube transistor (P-type ion glue carbon nanotube field effect transistor) with a buffer layer having a thickness of 5nm according to one embodiment of the present disclosure.

Fig. 7 is a transfer characteristic curve for an irradiation-resistant carbon nanotube transistor (P-type ion glue carbon nanotube field effect transistor) with a buffer layer having a thickness of 10nm according to one embodiment of the present disclosure.

Fig. 8 is a transfer characteristic curve for an irradiation-resistant carbon nanotube transistor (P-type ion glue carbon nanotube field effect transistor) with a buffer layer having a thickness of 15nm according to one embodiment of the present disclosure.

Fig. 9 is a transfer characteristic curve of an irradiation-resistant carbon nanotube transistor (P-type ion glue carbon nanotube field effect transistor) having a buffer layer with a thickness of 20nm according to one embodiment of the present disclosure.

Fig. 10 is a graph showing the variation of the current ratio and the lowest current voltage point at two ends of the irradiation-resistant carbon nanotube transistor (ionomer carbon nanotube field effect transistor) according to the thickness of the buffer layer after irradiation.

Description of the reference numerals

100 radiation-resistant carbon nanotube transistor

101 radiation-resistant substrate

102 carbon nanotube adhesion layer

103 carbon nanotube layer

104 gate dielectric

105 drain electrode

106 source electrode

107 grid

108 a buffer layer.

Detailed Description

The present disclosure will be described in further detail with reference to the drawings and embodiments. It is to be understood that the specific embodiments described herein are for purposes of illustration only and are not to be construed as limitations of the present disclosure. It should be further noted that, for the convenience of description, only the portions relevant to the present disclosure are shown in the drawings.

It should be noted that the embodiments and features of the embodiments in the present disclosure may be combined with each other without conflict. Technical solutions of the present disclosure will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.

Unless otherwise indicated, the illustrated exemplary embodiments/examples are to be understood as providing exemplary features of various details of some ways in which the technical concepts of the present disclosure may be practiced. Accordingly, unless otherwise indicated, features of the various embodiments may be additionally combined, separated, interchanged, and/or rearranged without departing from the technical concept of the present disclosure.

The use of cross-hatching and/or shading in the drawings is generally used to clarify the boundaries between adjacent components. As such, unless otherwise noted, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement for a particular material, material property, size, proportion, commonality between the illustrated components and/or any other characteristic, attribute, property, etc., of a component. Further, in the drawings, the size and relative sizes of components may be exaggerated for clarity and/or descriptive purposes. While example embodiments may be practiced differently, the specific process sequence may be performed in a different order than that described. For example, two processes described consecutively may be performed substantially simultaneously or in reverse order to that described. In addition, like reference numerals denote like parts.

When an element is referred to as being "on" or "on," "connected to" or "coupled to" another element, it can be directly on, connected or coupled to the other element or intervening elements may be present. However, when an element is referred to as being "directly on," "directly connected to" or "directly coupled to" another element, there are no intervening elements present. For purposes of this disclosure, the term "connected" may refer to physically, electrically, etc., and may or may not have intermediate components.

For descriptive purposes, the present disclosure may use spatially relative terms such as "below … …," below … …, "" below … …, "" below, "" above … …, "" above, "" … …, "" higher, "and" side (e.g., "in the sidewall") to describe one component's relationship to another (other) component as illustrated in the figures. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and/or manufacture in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "below … …" can encompass both an orientation of "above" and "below". Further, the devices may be otherwise positioned (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Furthermore, when the terms "comprises" and/or "comprising" and variations thereof are used in this specification, the presence of stated features, integers, steps, operations, elements, components and/or groups thereof are stated but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and/or groups thereof. It is also noted that, as used herein, the terms "substantially," "about," and other similar terms are used as approximate terms and not as degree terms, and as such, are used to interpret inherent deviations in measured values, calculated values, and/or provided values that would be recognized by one of ordinary skill in the art.

Fig. 1 is a schematic structural diagram of a radiation-resistant carbon nanotube transistor according to one embodiment of the present disclosure.

As shown in fig. 1, the radiation-resistant carbon nanotube transistor 100 includes: an irradiation-resistant substrate 101; a carbon nanotube adhesion layer 102, the carbon nanotube adhesion layer 102 being formed on the irradiation-resistant substrate 101; a carbon nanotube layer 103, wherein the carbon nanotube layer 103 is formed on the carbon nanotube adhesion layer 102, and the carbon nanotube layer 103 is used as a channel; and a gate dielectric 104, wherein the gate dielectric 104 is a polymer ionic liquid gel formed on at least a portion of the carbon nanotube layer 103.

The polymer ionic liquid gel can form a nanoscale double electric layer effect on the surface of the channel, so that generation of trap charges of a gate medium can be effectively reduced.

The radiation-resistant carbon nanotube transistor of the present disclosure may be referred to as an ionic gel carbon nanotube transistor, and the polymer ionic liquid gel may be referred to as an ionic gel for short.

It should be noted that the size and shape of each part in fig. 1 are merely exemplary, and do not limit the radiation-resistant carbon nanotube transistor of the present embodiment or the radiation-resistant carbon nanotube transistor of the present disclosure.

The polymer ionic liquid gel serving as the gate medium 104 can form a polymer ionic liquid gel in an aerosol ink-jet printing mode, and can form an electric double layer effect on the surface of the carbon nanotube layer 103, on one hand, the polymer ionic liquid gel serves as the gate medium and provides ultrahigh gate efficiency for the carbon nanotube transistor, and on the other hand, the electric double layer is very thin and belongs to a nanoscale, so that trapped irradiation trap charges are small, and the irradiation resistance of the carbon nanotube transistor is improved.

Figure 4 shows a schematic representation of the formation of an electric double layer effect in a polymeric ionic liquid gel (upper surface negative gate bias).

Preferably, the irradiation-resistant substrate 101 of the irradiation-resistant carbon nanotube transistor 100 of the present embodiment is a thin film insulating material.

Because the thin film insulating material is used as the substrate, the high-energy irradiation particles can penetrate through the substrate, secondary irradiation damage reflected by the substrate is avoided, and the irradiation resistance of the carbon nano tube transistor is further improved.

More preferably, the film insulating material is a Polyimide (PI) film, a polyethylene terephthalate (PET) film, or a polyethylene naphthalate (PEN) film. The film insulation materials have the characteristics of thin thickness and loose structure, trap charges are not easy to generate, irradiation rays can completely penetrate through the substrate, the reflection effect is small, and the secondary irradiation effect caused by irradiation ray reflection is reduced. It will be appreciated by those skilled in the art that the thin film insulation material of the present disclosure may also be used with thin, loose-structured films other than Polyimide (PI) films, polyethylene terephthalate (PET) films, and polyethylene naphthalate (PEN) films.

The transfer characteristics of the radiation-resistant carbon nanotube transistor (P-type ion glue carbon nanotube field effect transistor) prepared according to the present embodiment are shown in fig. 5.

In the initial state (i.e. the state before being irradiated), the subthreshold swing threshold (SS) of the P-type ionomer carbon nanotube field effect transistor is 100mV/dec (curve a in fig. 5), which proves that the ionomer gate dielectric can provide good gate control capability.

After the ionic glue carbon nanotube field effect transistor was irradiated with 560rad (Si)/s dose, 4Mrad (Si) total irradiation dose, the transfer characteristics of the device are shown in the B curve of FIG. 5.

Extreme irradiation conditions are simulated by using large irradiation dose rate, irradiation and measurement time is shortened, and the influence of fading of irradiation effect along with time is avoided. Experimental results prove that after the novel field effect transistor disclosed by the invention is irradiated by 4Mrad, the device can still normally work except slight sub-threshold swing decline and small threshold voltage drift, which is a new record of the radiation resistance of the carbon nanotube top gate field effect transistor.

Preferably, the carbon nanotube adhesion layer 102 of the radiation-resistant carbon nanotube transistor of the present embodiment is hafnium oxide, aluminum oxide, silicon oxide, or zirconium oxide. Preferably, the thickness of the carbon nanotube adhesion layer 102 is about 5 nm.

Fig. 2 is a schematic structural diagram of a radiation-resistant carbon nanotube transistor according to yet another embodiment of the present disclosure.

As shown in fig. 2, the radiation-resistant carbon nanotube transistor 100 includes: an irradiation-resistant substrate 101; a carbon nanotube adhesion layer 102, the carbon nanotube adhesion layer 102 being formed on the irradiation-resistant substrate 101; a carbon nanotube layer 103, wherein the carbon nanotube layer 103 is formed on the carbon nanotube adhesion layer 102, and the carbon nanotube layer 103 is used as a channel; a gate dielectric 104, wherein the gate dielectric 104 is a polymer ionic liquid gel formed on at least a part of the carbon nanotube layer 103; and a buffer layer 108 is formed at least between the contact interface of the carbon nanotube layer 103 and the polymer ionic liquid gel.

It should be noted that the size and shape of each part in fig. 2 are also only exemplary, and do not limit the radiation-resistant carbon nanotube transistor of the present embodiment or the radiation-resistant carbon nanotube transistor of the present disclosure.

Fig. 3 is a schematic structural diagram of a radiation-resistant carbon nanotube transistor according to yet another embodiment of the present disclosure.

As shown in fig. 3, the disposed area of the buffer layer 108 of the radiation-resistant carbon nanotube transistor 100 is larger relative to the disposed area of the buffer layer 108 of the radiation-resistant carbon nanotube transistor 100 shown in fig. 2.

By the arrangement of the buffer layer 108, the ion glue carbon nanotube transistor can have typical bipolar performance, and the minimum current point is VgsAround 0V, it is shown that it can be used as both enhancement N-type and P-type field effect transistors to build CMOS-like integrated circuits. The polarity of the transistor is adjusted by adjusting the thickness of the buffer layer.

In order to adjust the threshold of the ionic colloid carbon nanotube field effect transistor, a buffer layer 108 is formed at least between the polymer ionic liquid gel and the contact interface of the carbon nanotube layer 103 to adjust Vmin of the ionic colloid carbon nanotube field effect transistor (Vmin is the minimum point voltage of current in the transfer curve of the ionic colloid carbon nanotube field effect transistor), and an Atomic Layer Deposition (ALD) technology can be used to grow alumina or hafnium oxide with a certain thickness as the buffer layer.

In this embodiment, fig. 6 to 9 show transfer characteristic curves of an irradiation-resistant carbon nanotube transistor (P-type ionomer carbon nanotube field effect transistor) having buffer layers with different thicknesses.

The following description will be given taking alumina as an example of the buffer layer. In fig. 6 to 9, the thicknesses of the alumina buffer layers were 5nm, 10nm, 15nm, and 20nm in this order.

With reference to fig. 5 (without a buffer layer, i.e., the thickness of the alumina buffer layer is 0) and fig. 6 to 9, as the thickness of the alumina buffer layer is increased from 0 to 20nm, Vmin of the aerogel ink-jet printed ionic carbon nanotube field effect transistor is shifted to the left (from 0.6V to 0.2V), and the ratio of the left and right on-state currents of the field effect transistor approaches to 1, which indicates that the bipolar performance of the device is gradually obvious.

Comparing the transfer characteristics of the ionic glue carbon nanotube field effect transistor before and after irradiation (in fig. 5 to 9, curve a is before irradiation, curve B is after irradiation), fig. 10 shows the change of the current ratio and the lowest current voltage point at two ends of the ionic glue carbon nanotube field effect transistor after irradiation along with the thickness of the buffer layer. As can be seen from fig. 10, Vmin and bipolar of the ionomer carbon nanotube field effect transistor (anti-radiation carbon nanotube transistor) are not significantly changed after being irradiated by 4mrad (si), which shows that the introduction of the buffer layer does not lose the anti-radiation performance of the ionomer carbon nanotube transistor.

According to the method, the structure of the carbon nano tube transistor is redesigned, the grid medium and the substrate material are selected, the ion glue carbon nano tube transistor and the irradiation resistance of the integrated circuit manufactured by the ion glue carbon nano tube transistor are obviously improved, and the circuit can still normally work by irradiating 4Mrad (Si) under the condition of irradiation dose rate of 560 rad/s. The total dose exposure of 4mrad (si) corresponds to a total dose of cosmic space to the device of about 10 years.

Moreover, since the radiation-resistant carbon nanotube transistor of the present disclosure uses an ionomer gel gate dielectric, the ionomer gel is a quasi-liquid substance, and radiation damage thereof is easier to repair. Through annealing treatment at a certain temperature, the internal fluidity of the ionic glue is enhanced, positive ions and negative ions flow more easily, dissipation of trap charges trapped by irradiation induction is promoted, and meanwhile, the double electric layers of the ionic glue are balanced again, so that irradiation damage repair of the ionic glue can be realized under a milder annealing condition.

In the above embodiment, the buffer layer 108 of the radiation-resistant carbon nanotube transistor 100 is preferably made of aluminum oxide.

According to the preferred embodiment of the present disclosure, the radiation-resistant carbon nanotube transistor 100 further includes a gate 107, a source 106, and a drain 105, and the source 106 and the drain 105 adopt an interdigital electrode structure, so as to increase the width of the device and further enhance the radiation-resistant stability of the radiation-resistant carbon nanotube transistor.

For example, 5nm hafnium oxide or aluminum oxide, silicon oxide, zirconium oxide are deposited as inkjet printed carbon nanotube adhesion layers on flexible Polyimide (PI) substrates using ALD, ionic gels are used as gate dielectric, gold (Au) is used as contact electrode, and aerosol inkjet printed silver (Ag) is used as side gate electrode.

The method for manufacturing the radiation-resistant carbon nanotube transistor according to one embodiment of the present disclosure includes: providing an irradiation-resistant substrate 101; forming a carbon nanotube adhesion layer 102 on an anti-radiation substrate; forming a carbon nanotube layer 103 as a channel material on the carbon nanotube adhesion layer 102; and forming a polymer ionic liquid gel as the gate dielectric 104 on at least a portion of the carbon nanotube layer 103.

A method of fabricating a radiation-resistant carbon nanotube transistor according to still another embodiment of the present disclosure includes: providing an irradiation-resistant substrate 101; forming a carbon nanotube adhesion layer 102 on an anti-radiation substrate; forming a carbon nanotube layer 103 as a channel material on the carbon nanotube adhesion layer 102; forming a buffer layer 108 on at least a portion of the carbon nanotube layer 103; and forming a polymer ionic liquid gel as the gate dielectric 104 on at least the buffer layer 108.

In the method for manufacturing the radiation-resistant carbon nanotube transistor according to the above embodiment, the radiation-resistant substrate is a thin film insulating material.

Preferably, the film insulating material is a Polyimide (PI) film, a polyethylene terephthalate (PET) film, or a polyethylene naphthalate (PEN) film.

Preferably, in the method of manufacturing the radiation-resistant carbon nanotube transistor of the present disclosure, the carbon nanotube adhesion layer is formed by depositing hafnium oxide, aluminum oxide, silicon oxide, or zirconium oxide on the radiation-resistant substrate.

Preferably, in the method for manufacturing the radiation-resistant carbon nanotube transistor of the present disclosure, the polymer ionic liquid gel ink is prepared by the copolymer, the ionic liquid and the organic solvent, and the polymer ionic liquid gel ink is inkjet-jetted on at least a portion of the carbon nanotube layer 103 to form the polymer ionic liquid gel.

For example, the diblock copolymer PS-PMMA, the ionic liquid [ EMIM ] [ TFSI ] and ethyl acetate are mixed and stirred to prepare the ionic glue printing ink, and the copolymer PS-PMMA, the ionic liquid [ EMIM ] [ TFSI ] and the ethyl acetate are mixed according to a certain weight ratio and are stirred in a rotating mode at room temperature to obtain the ionic glue ink for aerosol ink-jet printing.

In the method for manufacturing the radiation-resistant carbon nanotube transistor, the copolymer is preferably PS-PMMA, PS-PMMA-PS, PS-PEO-PS, P (VDF-HFP), PEG-DA or SOS-N3

In the method for manufacturing the radiation-resistant carbon nanotube transistor, the ionic liquid is preferably [ EMIM]-[TFSI]、[EMIM]-[Tf2N]、[EMI]-[TCB]、[DEME]-[TFSI]、[EMIM]-[OctOSO3]Or [ BMIM]-[PF6]。

In the method for manufacturing the radiation-resistant carbon nanotube transistor of the present disclosure, the organic solvent is preferably ethyl acetate.

An integrated circuit system according to an embodiment of the present disclosure includes the radiation-resistant carbon nanotube transistor of any one of the above embodiments or the radiation-resistant carbon nanotube transistor manufactured by the method of manufacturing the radiation-resistant carbon nanotube transistor of any one of the above embodiments.

In the description herein, reference to the description of the terms "one embodiment/mode," "some embodiments/modes," "example," "specific example" or "some examples" or the like means that a particular feature, structure, material, or characteristic described in connection with the embodiment/mode or example is included in at least one embodiment/mode or example of the present disclosure. In this specification, the schematic representations of the terms used above are not necessarily intended to be the same embodiment/mode or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments/modes or examples. Furthermore, the various embodiments/aspects or examples and features of the various embodiments/aspects or examples described in this specification can be combined and combined by one skilled in the art without conflicting therewith.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present disclosure, "a plurality" means at least two, e.g., two, three, etc., unless explicitly specifically limited otherwise.

It will be understood by those skilled in the art that the foregoing embodiments are merely for clarity of illustration of the disclosure and are not intended to limit the scope of the disclosure. Other variations or modifications may occur to those skilled in the art, based on the foregoing disclosure, and are still within the scope of the present disclosure.

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