Novel positive-to-negative voltage conversion circuit in complex power domain

文档序号:1941084 发布日期:2021-12-07 浏览:15次 中文

阅读说明:本技术 在复杂电源域中的新型正电压转负电压的电压转换电路 (Novel positive-to-negative voltage conversion circuit in complex power domain ) 是由 陈光明 胡海军 夏群兵 于 2021-09-01 设计创作,主要内容包括:本发明提供了一种在复杂电源域中的新型正电压转负电压的电压转换电路,包括电平转换模块、电源切换模块和负压电荷泵开关电容阵列,电平转换模块包括多个电平转换单元,所述电平转换模块的输入端连接有正电压电源域的信号,转换为负电压电源域的信号;负电压电源域的信号输入至负压电荷泵开关电容阵列的输入端,负压电荷泵开关电容阵列输出负电压;所述电源切换模块分别与所述电平转换模块和负压电荷泵开关电容阵列连接,为所述电平转换模块提供额外的稳定电压。本发明电源切换模块主要负责在负压电荷泵启动过程中,为电平转换模块提供额外的稳定电压,解决了负压电荷泵自启动过程中负压建立不稳定的问题,显著增加了显示驱动IC的可靠性。(The invention provides a novel voltage conversion circuit for converting positive voltage into negative voltage in a complex power domain, which comprises a level conversion module, a power supply switching module and a negative voltage charge pump switch capacitor array, wherein the level conversion module comprises a plurality of level conversion units, and the input end of the level conversion module is connected with a signal of a positive voltage power domain and is converted into a signal of a negative voltage power domain; a signal of a negative voltage power supply domain is input to the input end of the negative voltage charge pump switch capacitor array, and the negative voltage charge pump switch capacitor array outputs a negative voltage; the power supply switching module is respectively connected with the level conversion module and the negative-pressure charge pump switch capacitor array, and provides extra stable voltage for the level conversion module. The power supply switching module is mainly responsible for providing additional stable voltage for the level conversion module in the starting process of the negative pressure charge pump, solves the problem of unstable negative pressure establishment in the self-starting process of the negative pressure charge pump, and obviously improves the reliability of the display drive IC.)

1. A novel voltage conversion circuit for converting positive voltage into negative voltage in a complex power domain is characterized by comprising a level conversion module, a power supply switching module and a negative voltage charge pump switch capacitor array, wherein the level conversion module comprises a plurality of level conversion units, and the input end of the level conversion module is connected with a signal of a positive voltage power domain and is converted into a signal of a negative voltage power domain; a signal of a negative voltage power supply domain is input to the input end of the negative voltage charge pump switch capacitor array, and the negative voltage charge pump switch capacitor array outputs a negative voltage; the power supply switching module is respectively connected with the level conversion module and the negative-pressure charge pump switch capacitor array, and provides extra stable voltage for the level conversion module.

2. The novel positive-to-negative voltage conversion circuit in a complex power domain as claimed in claim 1, wherein the level conversion unit comprises low voltage PMOS transistors LP1 and LP2 of the first stage, low voltage NMOS transistors LN1 and LN2, LP1 and LP2 connected to the positive voltage DVDD, LN1 and LN2 connected to ground, and common terminals of LP1, LP2, LN1 and LN2 connected to the PMOS transistor MP3 of the second stage; the second stage comprises medium-voltage PMOS tubes MP3 and MP4, medium-voltage NMOS tubes MN1, MN2, MN3 and MN4, inverters INV1 and INV2, capacitors C1 and C2, MP4 is connected with the common ends of LP2 and LN2, MP3, MN1 and MN3 are sequentially connected, MP4, MN2 and MN4 are sequentially connected, MP4 is connected with inverter INV1, INV1 is respectively connected with capacitors C1 and INV2, a capacitor C1 is connected with the common node N of MN1 and MN3, and INV2 is connected with the common node P of MN2 and MN4 through a capacitor C2; the third stage comprises medium-voltage PMOS tubes MP5 and MP6, medium-voltage NMOS tubes MN5 and MN6, inverters INV3 and INV4, MP5 and MP6 are connected with a switchable voltage Vpct, MN5 is connected with a node P, MN6 is connected with a node N, and the common ends of MP6 and MN6 are sequentially connected with INV3 and INV 4.

3. The novel positive-to-negative voltage conversion circuit in a complex power domain as claimed in claim 2, wherein the low voltage PMOS transistor and the low voltage NMOS transistor are less than or equal to 1.5V, and the medium voltage PMOS transistor and the medium voltage NMOS transistor are greater than or equal to 3V.

4. The novel positive-to-negative voltage conversion circuit in a complex power domain of claim 2, wherein the inverters INV1 and INV2 are composed of low voltage MOS transistors.

5. The novel positive-to-negative voltage conversion circuit in a complex power domain of claim 2, wherein the inverters INV3 and INV4 are composed of medium voltage MOS transistors.

6. The novel positive-to-negative voltage conversion circuit in a complex power domain as claimed in claim 1, wherein the power switching module comprises resistors R1, R2, R3 and R4 connected to an external reference voltage, a comparator CMP, a medium voltage PMOS transistor MP1 and a medium voltage NMOS transistor MN7, resistors R1 and R2 are sequentially connected, and R3 and R4 are sequentially connected to form a voltage dividing resistor string connected to the comparator CMP, and the output terminal of the comparator CMP is connected to the medium voltage PMOS transistor MP1 and the medium voltage NMOS transistor MN 7.

7. The novel positive-to-negative voltage conversion circuit in a complex power domain of claim 1, wherein the signal range of the positive voltage power domain is between 1.5V-0V.

8. The novel positive-to-negative voltage conversion circuit in a complex power domain as claimed in claim 1, wherein the signal range of the negative voltage power domain is between 0V and-8V.

Technical Field

The present invention relates to a voltage conversion circuit technology, and more particularly, to a novel voltage conversion circuit for converting positive voltage into negative voltage in a complex power domain.

Background

With the continuous development of display technology, the application scenes of products are more and more complex, the requirements on display quality are higher and higher, and the display panel has higher and higher requirements on the stability and flexibility of a display driver IC, namely, high reliability and high flexibility are required.

In the prior art, a signal of a positive voltage DVDD power domain is converted into a signal of a VSS to VSN power domain by level shifter conversion, where DVDD is 1.5V and VSN is-6V. The switched capacitor array is responsible for generating the negative voltage VSN. The existing positive pressure to negative pressure level shifter has the following functions: the signals of the DVDD-VSS power domains are converted into signals of the VSS-VSN power domains through level shifter conversion. The negative pressure is instable to establish in the self-starting process of the negative pressure charge pump, and the reliability of the display driving IC is reduced.

Disclosure of Invention

Aiming at the defects in the prior art, the invention aims to provide a novel voltage conversion circuit for converting positive voltage into negative voltage in a complex power domain, which solves the problem of unstable negative voltage establishment in the self-starting process of a negative voltage charge pump and obviously improves the reliability of a display driving IC.

In order to achieve the purpose, the invention adopts the following specific technical scheme:

a novel voltage conversion circuit for converting positive voltage into negative voltage in a complex power domain comprises a level conversion module, a power supply switching module and a negative voltage charge pump switch capacitor array, wherein the level conversion module comprises a plurality of level conversion units, and the input end of the level conversion module is connected with a signal of a positive voltage power domain and is converted into a signal of a negative voltage power domain; a signal of a negative voltage power supply domain is input to the input end of the negative voltage charge pump switch capacitor array, and the negative voltage charge pump switch capacitor array outputs a negative voltage; the power supply switching module is respectively connected with the level conversion module and the negative-pressure charge pump switch capacitor array, and provides extra stable voltage for the level conversion module.

Preferably, the level conversion unit comprises low-voltage PMOS transistors LP1 and LP2 and low-voltage NMOS transistors LN1 and LN2 of the first stage, the positive voltage DVDD is connected to LP1 and LP2, the ground is connected to LN1 and LN2, and the common end of LP1, LP2, LN1 and LN2 is connected to the PMOS transistor MP3 of the second stage; the second stage comprises medium-voltage PMOS tubes MP3 and MP4, medium-voltage NMOS tubes MN1, MN2, MN3 and MN4, inverters INV1 and INV2, capacitors C1 and C2, MP4 is connected with the common ends of LP2 and LN2, MP3, MN1 and MN3 are sequentially connected, MP4, MN2 and MN4 are sequentially connected, MP4 is connected with inverter INV1, INV1 is respectively connected with capacitors C1 and INV2, a capacitor C1 is connected with the common node N of MN1 and MN3, and INV2 is connected with the common node P of MN2 and MN4 through a capacitor C2; the third stage comprises medium-voltage PMOS tubes MP5 and MP6, medium-voltage NMOS tubes MN5 and MN6, inverters INV3 and INV4, MP5 and MP6 are connected with a switchable voltage Vpct, MN5 is connected with a node P, MN6 is connected with a node N, and the common ends of MP6 and MN6 are sequentially connected with INV3 and INV 4.

Preferably, the low-voltage PMOS tube and the low-voltage NMOS tube are less than or equal to 1.5V, and the medium-voltage PMOS tube and the medium-voltage NMOS tube are greater than or equal to 3V.

Preferably, the inverters INV1 and INV2 are composed of low voltage MOS transistors.

Preferably, the inverters INV3 and INV4 are composed of medium voltage MOS transistors.

Preferably, the power switching module is composed of resistors R1, R2, R3 and R4 connected to an external reference voltage, a comparator CMP, a medium voltage PMOS transistor MP1 and a medium voltage NMOS transistor MN7, resistors R1 and R2 are sequentially connected, R3 and R4 are sequentially connected to form a voltage dividing resistor string connected to the comparator CMP, and an output terminal of the comparator CMP is connected to the medium voltage PMOS transistor MP1 and the medium voltage NMOS transistor MN 7.

Preferably, the signal range of the positive voltage power domain is between 1.5V-0V.

Preferably, the signal range of the negative voltage power domain is between 0V and-8V.

The invention has the beneficial effects that: the power supply switching module is mainly responsible for providing extra stable voltage for the level conversion module in the starting process of the negative pressure charge pump, the level conversion module is guaranteed to work effectively and stably at the beginning of the establishment of the VSN, and when the VSN is established and stably reaches the set value of the power supply switching module, the power supply switching module switches the original stable power supply to the VSS, so that the problem of overvoltage of the MOS transistor is prevented, and the purpose of protecting the circuit is achieved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a system block diagram of a novel positive to negative voltage conversion circuit in a complex power domain in accordance with the present invention;

FIG. 2 is a schematic circuit diagram of a novel positive to negative voltage conversion circuit in a complex power domain in accordance with the present invention;

FIG. 3 is an input/output waveform of SS, -40 ℃ and low pressure condition level shifter;

FIG. 4 is an input/output waveform of the SS, -40 ℃ low pressure condition level shifter of the present invention;

FIG. 5 is a system power switching waveform diagram;

FIG. 6 is a waveform of the output voltage VSN during the start-up of a prior art negative charge pump;

fig. 7 is a waveform of the output voltage VSN during the start-up of the negative charge pump according to the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Other embodiments, which can be derived by one of ordinary skill in the art from the embodiments given herein without any creative effort, shall fall within the protection scope of the present invention.

As shown in fig. 1-7, the present invention provides a novel voltage conversion circuit for converting positive voltage into negative voltage in a complex power domain, which includes a level conversion module, a power switching module and a negative voltage charge pump switch capacitor array, where the level conversion module includes a plurality of level conversion units, and an input end of the level conversion module is connected with a signal of a positive voltage power domain and converts the signal into a signal of a negative voltage power domain; a signal of a negative voltage power supply domain is input to the input end of the negative voltage charge pump switch capacitor array, and the negative voltage charge pump switch capacitor array outputs a negative voltage; the power supply switching module is respectively connected with the level conversion module and the negative-pressure charge pump switch capacitor array, and provides extra stable voltage for the level conversion module. The signal range of the positive voltage power domain is between 1.5V-0V. The signal range of the negative voltage power supply domain is between 0V and-8V.

Preferably, the level conversion module includes a plurality of level conversion units (i.e., level shifters), where each level conversion unit includes a first-stage low-voltage PMOS transistor LP1 and LP2, and a first-stage low-voltage NMOS transistor LN1 and LN2, the first-stage low-voltage PMOS transistor LP1 and LP2 are connected to the positive voltage DVDD, the first-stage low-voltage NMOS transistor LN1 and the first-stage low-voltage NMOS transistor LN2 are grounded, and a common end of the first-stage low-voltage PMOS transistor LP1, the first-stage low-voltage NMOS transistor LP2, the first-stage low-voltage NMOS transistor LN1, and the first-stage low-voltage NMOS transistor LN2 are connected to the second-stage PMOS transistor MP 3; the second stage comprises medium-voltage PMOS tubes MP3 and MP4, medium-voltage NMOS tubes MN1, MN2, MN3 and MN4, inverters INV1 and INV2, capacitors C1 and C2, MP4 is connected with the common ends of LP2 and LN2, MP3, MN1 and MN3 are sequentially connected, MP4, MN2 and MN4 are sequentially connected, MP4 is connected with inverter INV1, INV1 is respectively connected with capacitors C1 and INV2, a capacitor C1 is connected with the common node N of MN1 and MN3, and INV2 is connected with the common node P of MN2 and MN4 through a capacitor C2; the third stage comprises medium-voltage PMOS tubes MP5 and MP6, medium-voltage NMOS tubes MN5 and MN6, inverters INV3 and INV4, MP5 and MP6 are connected with a switchable voltage Vpct, MN5 is connected with a node P, MN6 is connected with a node N, and the common ends of MP6 and MN6 are sequentially connected with INV3 and INV 4.

The level conversion module comprises a plurality of level shifters and is used for power domain conversion of different signals, the number of the level shifters is determined according to the number of signals needing to convert a power domain, the power switching module is mainly used for providing additional stable voltage for the level shifters at the beginning of VSN establishment in the starting process of the negative-pressure charge pump, and ensuring that the level shifters can also work effectively and stably at the beginning of the VSN establishment.

Preferably, the low-voltage PMOS tube and the low-voltage NMOS tube are less than or equal to 1.5V, and the medium-voltage PMOS tube and the medium-voltage NMOS tube are greater than or equal to 3V. The inverters INV1 and INV2 are composed of low-voltage MOS transistors. The inverters INV3 and INV4 are composed of medium voltage MOS transistors.

Preferably, the power switching module is composed of resistors R1, R2, R3 and R4 connected to an external reference voltage, a comparator CMP, a medium voltage PMOS transistor MP1 and a medium voltage NMOS transistor MN7, resistors R1 and R2 are sequentially connected, R3 and R4 are sequentially connected to form a voltage dividing resistor string connected to the comparator CMP, and an output terminal of the comparator CMP is connected to the medium voltage PMOS transistor MP1 and the medium voltage NMOS transistor MN 7.

The working principle of the invention is as follows:

fig. 1 is a block diagram of a system for converting positive voltage to negative voltage according to the present invention. The signals of the DVDD-VSS power domain are converted into signals of the VSS-VSN power domain through level shifter conversion, the signals of the VSS-VSN power domain control the negative-pressure charge pump switch capacitor array to generate VSN voltage, the power supply switching module samples the VSN voltage value, and the level shifter power supply voltage is switched.

Firstly, modifying the internal structure of the level shifter, and improving the stability and speed of the level shifter; secondly, a power supply switching module is added, the output voltage VSN of the negative voltage charge pump is sampled in real time, and the VSN threshold value of the level shifter power supply to be switched is set; and finally, the power supply switching module switches the power supply timely, so that the reliability problem of level shift starting and the overvoltage problem of part of MOS (metal oxide semiconductor) tubes in the level shift starting are solved.

FIG. 2 is a schematic diagram of the level shifter of the present invention. The principle diagram is mainly divided into three stages: the first stage comprises low-voltage PMOS tubes LP1 and LP2, and low-voltage NMOS tubes LN1 and LN 2. The second stage comprises medium-voltage PMOS tubes MP3 and MP4, medium-voltage NMOS tubes MN1, MN2, MN3 and MN4, inverters INV1 and INV2 composed of low-voltage MOS tubes, and capacitors C1 and C2. And the third stage comprises medium-voltage PMOS tubes MP5 and MP6, medium-voltage NMOS tubes MN5 and MN6, and inverters INV3 and INV4 consisting of medium-voltage MOS tubes.

The power domains of the first stage are DVDD-VSS, the power domains of the second stage are DVDD-VSN, the power domains of the low-voltage phase inverter are DVDD-VSS, the power domains of the third stage are Vpct-VSN, the Vpct is a switchable power supply, and the power switching module is responsible for switching.

Compared with the prior art, the source electrode of the second-stage medium voltage tube is directly driven by the second-stage low-voltage signal. An inverter INV1 and an inverter INV2 are added between the output of the first stage and the node P and the node N, capacitors C1 and C2 are added, and the power domain of the third stage is changed into a switchable power domain.

Firstly, in the deep submicron process, with the reduction of the process characteristic size, the DVDD is also continuously reduced, and the voltage of the DVDD may not be enough to drive the four stacked medium voltage tubes, so that the second stage is directly driven by the first part of low-voltage signals, the number of MOS tubes stacked in the second stage is reduced by one layer, the original four layers are changed into three layers, the requirement on the voltage of the DVDD is reduced, and the reliability of level shift starting is improved.

Second, low voltage inverters INV1 and INV2 and capacitors C1 and C2 are added between the output of the first stage and the node P and node N, respectively. In the initial starting stage of the charge pump generating the VSN, the VSN is not yet stably established, and the bias voltages VBP and VBN are not yet stably established, so that the P node and the N node of the level shifter are in unstable states. A low voltage inverter INV1 and INV2 and capacitors C1 and C2 are added between the first stage output and node P and node N, respectively. The output of the first stage drives capacitors C1 and C2 through INV1 and INV2, output signals of the first stage are coupled to a node N and a node P through capacitors C1 and C2, and low-voltage signals drive the node through the capacitors, so that the node P and the node N can be normally turned over when the VSN is not stably established, the problem that a level shifter cannot be started at the initial stage of VSN establishment is solved, and the speed of the level shifter is further improved.

And finally, a power supply switching module is added, the power supply VSS of the third level is changed into a controllable voltage source Vpct, and the Vpct is switched by the power supply switching module. At the initial stage of the VSN establishment, the voltage value is close to zero, and the third stage cannot work normally, so that the charge pump control signal cannot be effectively transmitted, and the start of the charge pump is affected. After the voltage source is stabilized at the third stage, a control signal of the charge pump can be stably and effectively transmitted, the starting reliability of the charge pump is improved, and the stability of the VSN is improved. When the VSN is boosted to the threshold value set by the power supply switching module, the power supply switching module switches the third-stage power supply voltage of the level shifter module to VSS, and the problem of overvoltage generated by a third-stage circuit is avoided.

Compared with the prior art, the method has obvious effect through simulation.

In the prior art, under typical conditions, level shifter can effectively convert level and transmit clock signals. However, under the conditions of SS, -40 ℃ and low pressure, the level shifter is already disabled, as shown in FIG. 3, the input is a clock square wave signal, the output is continuously low, and the clock signal cannot be effectively transmitted.

As shown in FIG. 4, which is the simulation result of the present invention, it can be seen from the simulation waveforms that the present invention can effectively convert the level and stabilize the transmission signal under ss, -40 deg.C and low voltage condition. From simulation results, the method solves the problem of instability and has obvious effect.

Vref is an external reference voltage, R1 and R2 are connected in series to form a voltage dividing resistor string, and Vref is divided according to a proper proportion to generate a reference voltage serving as a non-inverting input voltage of the comparator. R3 and R4 form a series voltage dividing resistor string, Vref-VSN is divided according to a proper proportion, the obtained voltage is used as the negative phase input voltage of a comparator CMP, and R1/R2> R3/R4. When the absolute value of the VSN voltage is relatively small, the negative input voltage of the comparator is greater than the positive input voltage, the output of the comparator is low, and Vpct is VDDB; when the voltage value of the VSN reaches the threshold set by R1, R2, R3, and R4, the negative input voltage of the comparator is less than the positive input voltage, the comparator output is high, Vpct is VSS, and the power switching module samples the voltage value of the VSN in real time, thereby achieving the purpose of power switching. The problem of MOS pipe excessive pressure can not appear in level shift third level has been guaranteed.

The power switching module has a high degree of flexibility, and first, the resistance values of R3 and R4 can be flexibly configured according to the voltage difference between VSN and VDDB. The ratio of R3/R4 is reduced, and the voltage absolute value of the VSN is increased when the power supply is switched; increasing the ratio of R3/R4 decreases the voltage absolute value of VSN at power switch. Furthermore, when there are power supplies of other power domains in the system, VDDB can be replaced by other power supplies, and the resistance values of R3 and R4 can be changed according to the size of the power supplies. Therefore, the power supply module can flexibly select the switchable power supply according to the system, and the difficulty in designing the negative-pressure charge pump is reduced.

After the power supply switching module is added, firstly, the stability of level shifter is increased, and at the initial stage of VSN establishment, a stable power supply is also arranged at the third stage of level shifter, so that signals of the level shifter are stably established.

And secondly, the practicability and the usability of the level shifter are improved, and the third level of the level shifter is provided with an additional power supply provided by the power supply switching module, so that the adaptability of the level shifter in different power supply domains is greatly improved. In different systems, different power supplies can be provided for the power supply switching module according to the actual conditions of the systems, and different power supplies are further provided for the third stage of the level shifter.

And thirdly, the power selection of the power selection module has high flexibility, so that the power selection of the charge pump system has higher degree of freedom, and the adaptability and the flexibility of the charge pump are greatly improved.

As shown in fig. 1, in the voltage conversion system, when the negative voltage charge pump is started and VSN is not completely established, the power supply switching module switches Vpct to VDDB, so that sufficient voltage margin can normally work at the initial stage of establishing level shifter, and when VSN is boosted to a preset value, the power supply switching module switches Vpct to VSS, thereby avoiding the overvoltage problem of level shifter.

As shown in fig. 5, in the initial stage of the start of the negative charge pump, the power switching module keeps the power supply in a state of VDDB being 1.8V, and provides a sufficient voltage margin for level shifter, so that the negative charge pump can operate stably, and the negative charge pump can boost the voltage effectively. When the negative-pressure charge pump boosts the voltage to a set threshold value (here, -3V), the power supply switching module switches the power supply of the level shifter to VSS, and the level shifter is guaranteed to have no over-voltage problem inside under the condition that the charge pump continues boosting.

According to the invention, by improving the internal structure of the level shifter, a power supply switching module is added to the system to sample the VSN voltage value in real time, the level shifter is ensured to have enough voltage margin in the initial stage, and the level shifter is ensured not to have the over-voltage problem after the start-up is completed. The improvement of two aspects of the module and the system ensures the stability of positive pressure to negative pressure and improves the speed of the whole conversion.

As shown in fig. 6, it is a waveform of the boosting process outputted by the negative voltage charge pump in the prior art.

As can be seen from FIG. 6, in the prior art, under typical condition, the voltage can be effectively boosted, the final output voltage is about-5.8V, and under SS, -40 ℃ and low-voltage condition, the final output voltage is about-1.5V, which is far from the voltage range of-4.5V to-6V normally used by the negative-voltage charge pump. The negative charge pump becomes unstable due to the change of PVT conditions.

As shown in FIG. 7, the output waveform of the improved negative charge pump can stably increase the voltage no matter the negative charge pump is typical or SS-40 ℃ under the condition of load, and the final voltage is stabilized at about-4.8V under the SS condition, which completely reaches the voltage range of-4.5V to-6V normally used by the negative charge pump.

In light of the foregoing description of the preferred embodiments of the present invention, those skilled in the art can now make various alterations and modifications without departing from the scope of the invention. The technical scope of the present invention is not limited to the contents of the specification, and must be determined according to the scope of the claims.

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