阅读说明：本技术 一种支持超低压充电的电荷泵 (Charge pump supporting ultra-low voltage charging ) 是由 胡佳俊 韩颖杰 肖哲飞 于 2021-10-08 设计创作，主要内容包括：本发明属于电源管理充电技术领域,具体的说是涉及一种支持超低压充电的电荷泵。本发明的目的是使电荷泵四个功率管驱动电源轨保持恒定设计值,不随电池电压变化而变。本发明提出一种支持低压工作的驱动设计,可以实现不管电池电压处在什么电平状态,四路功率管驱动电压保持恒定设计值,同时可以保持较高的电源转换效率。(The invention belongs to the technical field of power supply management charging, and particularly relates to a charge pump supporting ultra-low voltage charging. The invention aims to keep the driving power supply rails of four power tubes of a charge pump at a constant design value and not to change along with the voltage change of a battery. The invention provides a driving design supporting low-voltage operation, which can realize that the driving voltage of a four-way power tube keeps a constant design value no matter what level state the battery voltage is in, and can keep higher power conversion efficiency at the same time.)

1. A charge pump supporting ultra-low voltage charging comprises a first power tube, a second power tube, a third power tube and a fourth power tube, wherein the source and drain ends of the first power tube, the second power tube, the third power tube and the fourth power tube are sequentially connected, the drain electrode of the first power tube Q1 is the output voltage of a high-side voltage output end of the charge pump and is marked as V2X, and the connection point of the source electrode of the second power tube and the drain electrode of the third power tube is the output voltage of a low-side voltage output end of the charge pump and is marked as V1X; the circuit is characterized by further comprising an auxiliary power supply, a high-end driving circuit, a low-end driving circuit, a first driver, a second driver, a third driver, a fourth driver, a first switch, a second switch, a first bootstrap capacitor and a second bootstrap capacitor, wherein the output of the auxiliary power supply is connected with the input ends of the high-end driving circuit and the low-end driving circuit; the output end of the high-end driving circuit is respectively connected with one end of a first switch and the power supply end of a second driver, and the other end of the first switch is connected with one end of a first bootstrap capacitor and the power supply end of the first driver; the other end of the first bootstrap capacitor is connected with the ground end of the first driver and the source electrode of the first power tube, and the output end of the first driver is connected with the grid electrode of the first power tube; the output end of the second driver is connected with the grid electrode of the second power tube, and the ground end of the second driver is connected with the ground end of the high-end driving circuit and the source electrode of the second power tube; the output end of the low-end driving circuit is respectively connected with one end of the second switch and the power end of the fourth driver, and the other end of the second switch is connected with one end of the second bootstrap capacitor and the power end of the third driver; the other end of the second bootstrap capacitor is connected with the ground end of the third driver and the source electrode of the third power tube, and the output end of the third driver is connected with the grid electrode of the third power tube; the output end of the fourth driver is connected with the grid electrode of the fourth power tube, the ground end of the fourth driver is connected with the ground end of the low-end driving circuit and the source electrode of the fourth power tube, and the source electrode of the fourth power tube is grounded;

the high-side driving circuit provides a driving voltage relative to V1X for the first power tube and the second power tube; the high-end driving circuit comprises a first transimpedance amplifier, a variable clock circuit, an internal boosting charge pump, a first variable resistor, a first capacitor, a first current source, a second current source, a first switch tube, a first voltage stabilizing diode and a first clamping circuit; the non-inverting input end of the first transimpedance amplifier is connected with the input end of the first current source and one end of the first variable resistor, the inverting input end of the first transimpedance amplifier is connected with V1X and one end of the first capacitor, the output end of the first transimpedance amplifier is connected with the input end of the variable clock circuit, and the output end of the first current source is grounded; the output end of the variable clock circuit is connected with the input end of the internal boosting charge pump, and the output end of the internal boosting charge pump is connected with the other end of the first variable resistor, the other end of the first capacitor, the input end of the second current source and the drain electrode of the first switch tube; the output end of the second current source is connected with the cathode of the first voltage stabilizing diode and the grid of the first switching tube; the source electrode of the first light-switching tube is connected with one end of the clamping circuit, and the other end of the clamping circuit and the anode of the first voltage-stabilizing diode are connected with V1X;

the low-side driving circuit provides driving voltage relative to power ground for the third power tube and the fourth power tube; the low-end driving circuit comprises a second transimpedance amplifier, a variable clock circuit, an internal boosting charge pump, a second variable resistor, a second capacitor, a third current source, a fourth current source, a second switching tube, a second voltage stabilizing diode and a second clamping circuit; the non-inverting input end of the first transimpedance amplifier is connected with the input end of the third current source and one end of the second variable resistor, the inverting input end of the first transimpedance amplifier is connected with the power ground, the output end of the first transimpedance amplifier is connected with the input end of the variable clock circuit, and the output end of the third current source is connected with the ground; the output end of the variable clock circuit is connected with the input end of the internal boosting charge pump, and the output end of the internal boosting charge pump is connected with the other end of the first variable resistor, one end of the second capacitor, the input end of the fourth current source and the drain electrode of the second switch tube; the output end of the fourth current source is connected with the cathode of the first voltage stabilizing diode and the grid electrode of the first switching tube; the source electrode of the first switch tube is connected with one end of the clamping circuit, and the other end of the second capacitor, the other end of the clamping circuit and the anode of the first voltage stabilizing diode are connected with the power ground;

the output voltages of the high-end driving circuit and the low-end driving circuit are constant values; the inputs of the auxiliary power supply are V1X, V2X and the system power supply, the rule being that according to a set threshold voltage, the input of the auxiliary power supply is V2X when the battery voltage is above the threshold voltage, the input of the auxiliary power supply is the system power supply when the battery voltage is below the threshold voltage, and the input of the auxiliary power supply is V1X when the battery voltage is above the threshold voltage and the charge pump is operating normally.

Technical Field

The invention belongs to the technical field of power supply management charging, and particularly relates to a charge pump supporting ultra-low voltage charging.

Background

A charge-discharge topological structure based on 2S battery combination is shown in figure 1, an adapter output power VAC supplies power to a system power supply VSYS through a step-down inductive DC-DC, and simultaneously, the power is supplied to the system power supply VSYS through a BATFET switch and a power supply 1: 2 the charge pump charges the battery pack, the BATFET switch can play a role in regulating the charging current. When the adapter VAC is not on, the battery pack enters a discharge mode, the BATFET selects a configuration pass-through mode, and the battery voltage is passed through 2: 1, and supplying power to a system power supply VSYS after voltage reduction.

Under normal working conditions, the charge pump needs to maintain the relation of twice the transformation ratio between V1X and V2X, when the battery is in a dead battery state, the voltage of V2X is usually as low as about 3V, and in a limit scene, a level state lower than 2V may occur.

Generally, the drive design of the charge pump adopts a method of taking electricity from a high-voltage side V2X, and the drive power supply rail of each power switch is designed to be one-half V2X voltage, so that the purposes of reducing drive loss and improving system conversion efficiency are achieved. However, this solution has the disadvantage that when the battery voltage V2X is lower than 4V, the power supply rail of the driving voltage is synchronously lower than 2V, and the driving logic may not work normally

Disclosure of Invention

In order to solve the above problems, the present invention provides a charge pump driving design supporting low-voltage charging: the four power tube driving power rails keep a constant design value and do not change along with the change of the voltage of the battery.

Aiming at the problems, the technical scheme of the invention is as follows:

a charge pump supporting ultra-low voltage charging comprises a first power tube, a second power tube, a third power tube and a fourth power tube, wherein the source and drain ends of the first power tube, the second power tube, the third power tube and the fourth power tube are sequentially connected, the drain electrode of the first power tube Q1 is the output voltage of a high-side voltage output end of the charge pump and is V2X, and the connection point of the source electrode of the second power tube and the drain electrode of the third power tube is the output voltage of a low-side voltage output end of the charge pump and is V1X; the high-side driver circuit comprises an auxiliary power supply, a high-side driver circuit, a low-side driver circuit, a first driver, a second driver, a third driver, a fourth driver, a first switch, a second switch, a first bootstrap capacitor and a second bootstrap capacitor, wherein the output end of the auxiliary power supply is connected with the input ends of the high-side driver circuit and the low-side driver circuit; the output end of the high-end driving circuit is respectively connected with one end of a first switch and the power supply end of a second driver, and the other end of the first switch is connected with one end of a first bootstrap capacitor and the power supply end of the first driver; the other end of the first bootstrap capacitor is connected with the ground end of the first driver and the source electrode of the first power tube, and the output end of the first driver is connected with the grid electrode of the first power tube; the output end of the second driver is connected with the grid electrode of the second power tube, and the ground end of the second driver is connected with the ground end of the high-end driving circuit and the source electrode of the second power tube; the output end of the low-end driving circuit is respectively connected with one end of the second switch and the power end of the fourth driver, and the other end of the second switch is connected with one end of the second bootstrap capacitor and the power end of the third driver; the other end of the second bootstrap capacitor is connected with the ground end of the third driver and the source electrode of the third power tube, and the output end of the third driver is connected with the grid electrode of the third power tube; the output end of the fourth driver is connected with the grid electrode of the fourth power tube, the ground end of the fourth driver is connected with the ground end of the low-end driving circuit and the source electrode of the fourth power tube, and the source electrode of the fourth power tube is grounded;

the high-side driving circuit provides a driving voltage relative to V1X for the first power tube and the second power tube; the high-end driving circuit comprises a first transimpedance amplifier, a variable clock circuit, an internal boosting charge pump, a first variable resistor, a first capacitor, a first current source, a second current source, a first switch tube, a first voltage stabilizing diode and a first clamping circuit; the non-inverting input end of the first transimpedance amplifier is connected with the input end of the first current source and one end of the first variable resistor, the inverting input end of the first transimpedance amplifier is connected with V1X and one end of the first capacitor, the output end of the first transimpedance amplifier is connected with the input end of the variable clock circuit, and the output end of the first current source is grounded; the output end of the variable clock circuit is connected with the input end of the internal boosting charge pump, and the output end of the internal boosting charge pump is connected with the other end of the first variable resistor, the other end of the first capacitor, the input end of the second current source and the drain electrode of the first switch tube; the output end of the second current source is connected with the cathode of the first voltage stabilizing diode and the grid of the first switching tube; the source electrode of the first light-switching tube is connected with one end of the clamping circuit, and the other end of the clamping circuit and the anode of the first voltage-stabilizing diode are connected with V1X;

the low-side driving circuit provides driving voltage relative to power ground for the third power tube and the fourth power tube; the low-end driving circuit comprises a second transimpedance amplifier, a variable clock circuit, an internal boosting charge pump, a second variable resistor, a second capacitor, a third current source, a fourth current source, a second switching tube, a second voltage stabilizing diode and a second clamping circuit; the non-inverting input end of the first transimpedance amplifier is connected with the input end of the third current source and one end of the second variable resistor, the inverting input end of the first transimpedance amplifier is connected with the power ground, the output end of the first transimpedance amplifier is connected with the input end of the variable clock circuit, and the output end of the third current source is connected with the ground; the output end of the variable clock circuit is connected with the input end of the internal boosting charge pump, and the output end of the internal boosting charge pump is connected with the other end of the first variable resistor, one end of the second capacitor, the input end of the fourth current source and the drain electrode of the second switch tube; the output end of the fourth current source is connected with the cathode of the first voltage stabilizing diode and the grid electrode of the first switching tube; the source electrode of the first switch tube is connected with one end of the clamping circuit, and the other end of the second capacitor, the other end of the clamping circuit and the anode of the first voltage stabilizing diode are connected with the power ground;

the output voltages of the high-end driving circuit and the low-end driving circuit are constant values; the inputs of the auxiliary power supply are V1X, V2X and the system power supply, the rule being that according to a set threshold voltage, the input of the auxiliary power supply is V2X when the battery voltage is above the threshold voltage, the input of the auxiliary power supply is the system power supply when the battery voltage is below the threshold voltage, and the input of the auxiliary power supply is V1X when the battery voltage is above the threshold voltage and the charge pump is operating normally.

In the scheme of the invention, the high-end drive circuit provides a drive level relative to V1X, mainly provides a drive voltage for the power tubes Q1 and Q2, the drive level can be generated by the product of a resistor and a current source, and is output to the drive circuit after passing through a drive switch and a clamping circuit; the driving level signal generating circuit mainly comprises a trans-impedance amplifier, an internal boosting charge pump and a variable clock; the transimpedance amplifier can realize that the reference signal V1X and the modulated target drive level are subjected to differential mode amplification and then output current to modulate the clock frequency, the drive level of the internal boosting charge pump can be adjusted by changing the clock frequency, and the purpose of modulating the drive level through a voltage feedback control method is further achieved. The Q1 driving power supply is generated by a Q2 driving power supply, a bootstrap capacitor and a bootstrap control switch, when the Q2& Q4 are conducted, the Q1& Q3 are closed, the bootstrap control switch is opened, and the Q2 driving power supply charges the bootstrap capacitor; when the Q1& Q3 is turned on, the Q2& Q4 is turned off, the bootstrap switch is turned off, and the bootstrap capacitor discharges to the Q1 driving circuit; after the charging and discharging adjustment of the bootstrap capacitor is stable, the driving level of the Q1 can be basically consistent with the driving level of the Q2.

The low-end driving circuit provides a driving level relative to power ground and provides driving voltage for the power tubes Q3 and Q4, and the driving level consists of a trans-impedance amplifier, an internal boosting charge pump and a variable clock; the trans-impedance amplifier can realize the differential mode amplification of a reference power ground and a modulated target driving level and then output current to modulate the clock frequency, and the driving level of the internal boosting charge pump can be adjusted by changing the clock frequency, so that the purpose of modulating the driving level by a voltage feedback control method is achieved. The Q3 driving power supply is generated by a Q4 driving power supply, a bootstrap capacitor and a bootstrap control switch, when the Q2& Q4 are conducted, the Q1& Q3 are closed, the bootstrap control switch is opened, and the Q4 driving power supply charges the bootstrap capacitor; when the Q1& Q3 is turned on, the Q2& Q4 is turned off, the bootstrap switch is turned off, and the bootstrap capacitor discharges to the Q3 driving circuit; after the charging and discharging adjustment of the bootstrap capacitor is stable, the driving level of the Q3 can be basically consistent with the driving level of the Q4.

The internal boost charge pump can be composed of two-stage voltage-multiplying charge pump cascade, the input level can be the reference ground of the Q2 or Q4 driving power supply, and the clock logic can be selectively powered by the internal power supply VAUX. The variable adjusting clock can be composed of a group of current sources, a sampling capacitor, a reference voltage and a voltage comparator, and the output current of the trans-impedance amplifier can adjust the clock current sources.

The invention has the beneficial effects that: the invention provides a driving design supporting low-voltage operation, which can realize that the driving voltage of a four-way power tube keeps a constant design value no matter what level state the battery voltage is in, and can keep higher power conversion efficiency at the same time.

Drawings

FIG. 1 is a schematic diagram of a 2S battery charging and discharging topology;

FIG. 2 is a schematic view of a low voltage driving structure;

FIG. 3 is a power transistor Q2 driver circuit implementation;

FIG. 4 is an X3 CP circuit implementation;

FIG. 5 is a tunable clock circuit implementation;

FIG. 6 is a Q4 driver circuit implementation;

in fig. 7, (a) Q1 drive implementation; (b) q3 drive implementation.

Detailed Description

The present invention will be described in detail below with reference to the accompanying drawings.

The low-voltage driving scheme provided by the invention is designed as shown in fig. 2, a component HVDD _ REG provides a driving power supply HVDD of a power tube Q2, an auxiliary power supply VAUX provides clock power, and a driving power supply rail HVDD-V1X of the HVDD _ REG keeps a constant design value; the Q1 drive adopts a bootstrap switch design, when the power tube Q1 is switched off, the switch SW _ H is switched on, the HVDD power supply charges the bootstrap capacitor CBSTH, when the power tube Q1 is switched on, the switch SW _ H is switched off, the bootstrap capacitor discharges the Q1 drive circuit, and the power supply rail driven by the Q1 can realize the design value of HVDD-V1X; the component LVDD _ REG provides a driving power supply AVDD of the power tube Q4, the auxiliary power supply VAUX provides clock power supply, and the driving voltage AVDD of the power tube Q4 keeps a constant design value; the Q3 drive adopts the design of bootstrap switch, and when power tube Q3 switched off, switch SW _ L switched on, and drive power supply AVDD charges bootstrap capacitor CBSTL, and when power tube Q3 switched on, switch SW _ L switched off, and bootstrap capacitor CBSTL discharged Q3 drive circuit, and the power rail of Q3 drive can realize keeping invariable design value AVDD. The output of the component PWR _ SEL provides an auxiliary power VAUX that draws power from V2X when the battery voltage is above a certain design threshold, from the system power VSYS when the battery voltage is below the design threshold, and further from V1X when the battery voltage is sufficiently high and the charge pump is in a normal operating state for further efficiency enhancement.

The Q2 driving circuit (high-side driving circuit) is implemented as shown in fig. 3, and mainly comprises the following components: an operational transimpedance Amplifier (AMP) whose output current can be characterized as a differential input voltage divided by an internal constant impedance; the frequency adjustable clock CLK, the clock frequency is modulated by the output current of the operational transimpedance amplifier; a triple boost charge pump boosting the input voltage V1X to about the highest V1X +2VAUX level; closed loop drive circuit modulation principle: the operational transimpedance amplifier, the clock circuit and the X3 charge pump combination circuit may generate the internal drive power VGEN _ H,

VGEN_H＝V1X+RH*ISINK_H

it can be found from the above formula description that the Q2 driving voltage can be simply realized by adjusting the resistor RH or the current source ISINK — H, and the components VZ and clamp can serve the purpose of protecting the driving power supply.

The X3 CP circuit is realized as shown in FIG. 4, M1-M4 form a first stage charge pump, PHASE1 PHASE: CLKP1 low, CLKP2 high, M2& M3 on, M1& M4 off, VI charges capacitor CF2, and capacitor CF1 discharges VM; PHASE2 PHASE: CLKP1 high level, CLKP2 low level, M1& M4 turn on, M2& M3 close, VI charges capacitor CF1, capacitor CF2 discharges VM, clock signals CLKP1 and CLKP2 are powered by auxiliary power supply VAUX, and keep two-phase mutual exclusion logic, output voltage VM after regulation and stabilization can be characterized as nearly equal to VI + VAUX, the second stage charge pump implementation principle is completely consistent with the first stage, and final output voltage VO can be represented as VI +2 VAUX.

Fig. 5 is an adjustable clock circuit implementation, the clock clk frequency may be characterized as,

Fs＝(IB-IDIFF)/(CS*VREF)

when the driving voltage VGEN _ H is lower than V1X + RH ISINK _ H, the output current IDIFF decreases, the clock clk frequency increases, the power supply capability of the charge pump X3 CP increases, the voltage VGEN _ H increases, and finally the voltage VGEN _ H can be adjusted to be near V1X + RH ISINK _ H through loop feedback modulation.

The Q4 driver circuit (low side driver circuit) implementation is similar to the Q2 driver circuit, as shown in fig. 6, and can be implemented to modulate the driving voltage VGEN _ L around RH × ISINK _ L.

The Q1 driving circuit is as shown in fig. 7(a), Q1& Q3 is turned off, Q2& Q4 is turned on, CFP voltage is equal to V1X voltage, switch SW _ H is turned on, HVDD charges bootstrap capacitor CBSTH; q2& Q4 is turned off, Q1& Q3 is turned on, the bootstrap capacitor CBSTH discharges the Q1 driving circuit, and finally the Q1 driving power supply rail voltage BSTP-CFP is approximately equal to RH × ISINK _ H; the Q3 drive implementation principle is substantially identical to the Q1 drive implementation, and the Q3 supply rail voltage BSTN-CFN can be approximately equal to RH × ISINK — L.