阅读说明：本技术 一种半导体芯片包装盒及其包装方法 (Semiconductor chip packaging box and packaging method thereof ) 是由 周勤 于 2021-08-26 设计创作，主要内容包括：本发明属于半导体包装技术领域,具体的说是一种半导体芯片包装盒及其包装方法,包括下壳体、弹性膜和上盖；本发明中通过在下壳体的上部设置有弹性膜,且保证弹性膜保持水平,在包装时将半导体芯片放置在弹性膜上,由于弹性膜保持水平,即使半导体芯片的位置轻微的偏差,在芯片下放的过程中半导体芯片不会受到剪切力,保证芯片不会受损；由于上盖内部设置有限位海绵,进而即时半导体芯片在放置后出现轻微的位置偏差时,半导体芯片直接与限位海绵接触,使得上盖不会直接按压在半导体芯片上,进而保证在上盖的包装过程中,半导体芯片不会受到按压而受损,进而保证了包装后的半导体芯片的品质。(The invention belongs to the technical field of semiconductor packaging, in particular to a semiconductor chip packaging box and a packaging method thereof, wherein the semiconductor chip packaging box comprises a lower shell, an elastic film and an upper cover; according to the invention, the elastic film is arranged on the upper part of the lower shell, and the elastic film is ensured to be kept horizontal, and the semiconductor chip is placed on the elastic film during packaging, so that the semiconductor chip is not subjected to shearing force in the process of placing the chip down and is ensured not to be damaged even if the position of the semiconductor chip is slightly deviated due to the fact that the elastic film is kept horizontal; because the inside spacing sponge that is provided with of upper cover, and then when slight positional deviation appears in the instant semiconductor chip after placing, the direct and spacing sponge contact of semiconductor chip for the upper cover can not directly be pressed on the semiconductor chip, and then guarantees in the packaging process of upper cover, and the semiconductor chip can not receive to press and be impaired, and then has guaranteed the quality of the semiconductor chip after the packing.)

1. A semiconductor chip package, characterized by: comprises a lower shell (1), an elastic membrane (2) and an upper cover (3); the elastic membrane (2) is arranged at the upper part of the lower shell (1); the elastic membrane (2) is connected with the edge of the lower shell (1) in a heat seal way; a first cavity is formed between the elastic membrane (2) and the lower shell (1); the upper cover (3) is arranged at the upper part of the elastic membrane (2); the edge of the upper cover (3) is connected with the elastic membrane (2); a second cavity is formed between the elastic membrane (2) and the upper cover (3); a semiconductor chip is placed in the cavity II; the upper part of the semiconductor chip is provided with a limiting sponge (4); the limiting sponge (4) is fixedly connected with the upper cover (3).

2. A semiconductor chip package according to claim 1, wherein: the lower part of the limiting sponge (4) is provided with a groove (5); the semiconductor chip is positioned inside the groove (5); one side wall of the groove (5) on the limiting sponge (4) is abutted against the semiconductor chip; one side of the limiting sponge (4) is in contact with the elastic membrane (2).

3. A semiconductor chip package according to claim 2, wherein: protective gas is filled in the first cavity; the lower part of the upper cover (3) is symmetrically provided with pricker needles (6); one end of the puncture needle (6) is fixedly connected with the upper cover (3); the length of the puncture needle (6) is larger than the maximum distance between the upper cover (3) and the elastic membrane (2) when the two are connected.

4. A semiconductor chip package according to claim 3, wherein: one end of the upper cover (3) is provided with a pull ring (7); the pull ring (7) is fixedly connected with the upper cover (3); the elastic membrane (2) is positioned at one end of the pull ring (7) and is fixedly connected with the pull ring (7) after being turned over; the connection strength between the elastic membrane (2) and the upper cover (3) is greater than that between the elastic membrane (2) and the lower shell (1).

5. A semiconductor chip package according to claim 4, wherein: one side of the pull ring (7) is in contact with the top surface of the upper cover (3); the pull ring (7) is of a U-shaped structure; a raised structure (8) is arranged at the bottom of the lower shell (1); the width of the convex structure (8) is the same as that of the opening of the U-shaped structure of the pull ring (7).

6. A semiconductor chip packaging method applied to the semiconductor chip packaging box according to any one of claims 1 to 5, characterized in that:

s1: connecting the edge of the elastic membrane (2) with the lower shell (1), and filling protective gas into the first cavity in the connecting process;

s2: after the operation in S1 is completed, the chip is placed at the center position on the elastic film (2) by the packaging apparatus;

s3: on the basis of S2, the upper cover (3) is placed on the elastic film (2) through packaging equipment, and meanwhile, the chip is positioned in the groove (5);

s4: on completion of S3, pressing the upper cover (3) so that the lancet (6) pierces the elastic membrane (2); meanwhile, the upper cover (3) is connected with the periphery of the elastic film (2) to finish the packaging.

7. A semiconductor chip package according to claim 5, wherein: the protective gas is nitrogen or rare gas.

Technical Field

The invention belongs to the technical field of semiconductor packaging, and particularly relates to a semiconductor chip packaging box and a packaging method thereof.

Background

The steps involved in the production process of the semiconductor chip are various, wherein the packaging of the finished semiconductor chip is often the last step of the semiconductor production process, the completion of the chip generation is represented along with the completion of the semiconductor chip packaging process, then the packaged chip flows into an application end, if the situation of damaging the chip occurs in the packaging link, because the previous process is not checked and corrected by subsequent processes, the produced defective product often directly flows into the application end, and further the bad influence is brought to the chip production brand, even greater economic loss is brought, so the protection for preventing the chip from being damaged in the packaging process is particularly important, and the problems are also faced in the transportation and storage processes, so the function promotion of the packaged product with the chip is increased increasingly.

The metal pins are arranged on the semiconductor chip, so that the chip is conveniently connected with a circuit when the chip is used, and because the metal pins are arranged outside the semiconductor package, further, the metal leads are easily oxidized and corroded, and the semiconductor chips are usually packaged independently for convenient transportation and storage, in the packaging process, mechanical equipment is mostly adopted, so that in the packaging process, fine position deviation of the chip in the packaging process is caused by equipment failure or manual operation errors, further causing one end of the chip to be scraped or collided with one side of the packing box when the chip is placed inside the packing box, which in turn subjects the chip to shear forces during packaging (e.g., as shown in fig. 10), which in turn causes damage to the interior of the chip and, in turn, affects the quality of the finished chip.

Disclosure of Invention

In order to make up for the defects of the prior art, the invention provides a semiconductor chip packaging box and a packaging method thereof. The invention is mainly used for solving the problem that when the chip with a slightly inclined position is encountered in the packaging process of the existing packaging box, the chip is easy to collide with the packaging box, and further the chip is damaged in the packaging process.

The technical scheme adopted by the invention for solving the technical problems is as follows: a semiconductor chip package includes a lower case, an elastic film, and an upper cover; the elastic membrane is arranged on the upper part of the lower shell; the elastic membrane is connected with the edge of the lower shell in a heat seal mode; a first cavity is formed between the elastic membrane and the lower shell; the upper cover is arranged on the upper part of the elastic membrane; the edge of the upper cover is connected with the elastic membrane; a second cavity is formed between the elastic membrane and the upper cover; a semiconductor chip is placed in the cavity II; a limiting sponge is arranged in the second cavity; the limiting sponge is fixedly connected with the upper cover.

When in use, the chip is conveniently connected with a circuit, and because the metal pins are arranged outside the semiconductor package, further, the metal leads are easily oxidized and corroded, and the semiconductor chips are usually packaged independently for convenient transportation and storage, in the packaging process, mechanical equipment is mostly adopted, so that in the packaging process, fine position deviation of the chip in the packaging process is caused by equipment failure or manual operation errors, further causing one end of the chip to be scraped or collided with one side of the packing box when the chip is placed inside the packing box, so that the chip is subjected to a shearing force (such as shown in fig. 10) during the packaging process, thereby causing damage to the inside of the chip and further affecting the quality of the finished chip; therefore, in the scheme, the elastic film is arranged on the upper part of the lower shell, and the elastic film is ensured to be kept horizontal, the semiconductor chip is placed on the elastic film during packaging, and the elastic film is kept horizontal, so that even if the position of the semiconductor chip is slightly deviated during the process of placing the semiconductor chip on the elastic film by packaging equipment, the periphery of the chip cannot be blocked, the semiconductor chip is ensured not to be subjected to shearing force during the lowering process, and the chip is ensured not to be damaged during the lowering process of packaging; then, the upper cover is placed on the semiconductor chip through packaging equipment, and the limiting sponge is arranged in the upper cover, so that even if the semiconductor chip is slightly deviated after being placed, the semiconductor chip is directly contacted with the limiting sponge, the upper cover cannot be pressed on the semiconductor chip during pressing, the semiconductor chip cannot be damaged by pressing in the packaging process of the upper cover, the semiconductor chip cannot be damaged by slight deviation of the position in the whole packaging process, and the quality of the packaged semiconductor chip is ensured; meanwhile, after packaging, the semiconductor chip is clamped between the limiting sponge and the elastic film by newspaper, so that the semiconductor chip is stably packaged in the packaging box, the semiconductor chip is prevented from shaking in the packaging box in the transportation and carrying processes, the semiconductor is prevented from being damaged due to shaking, and the packaging stability of the packaging box is improved; simultaneously because elastic membrane self has elasticity, spacing sponge self also has certain elasticity simultaneously, and then embraces and press from both sides between elastic membrane and spacing sponge, and then when the packing carton received the vibrations and strikeed, spacing sponge and elastic membrane can absorb the impact of vibrations through the deformation of self, and then prevent that the vibrations from strikeing and transmitting to the chip, and then prevent that the chip is impaired, further improvement the security of packing carton.

Preferably, the lower part of the limiting sponge is provided with a groove; the semiconductor chip is positioned inside the groove; one side wall of the groove on the limiting sponge is abutted against the semiconductor chip; one side of the limiting sponge is in contact with the elastic membrane.

When the packaging box is in operation, under the condition that only one side face of the limiting sponge is in contact with the chip, and further in the transportation process, when the packaging box is subjected to severe lateral impact, the chip can slide in the horizontal direction, so that the chip can impact the upper cover part, and further the lateral impact can be caused to act on the chip in the packaging box, and further the chip is damaged due to vibration impact, and further economic loss is caused; therefore, in the scheme, the groove is formed in the limiting sponge, the semiconductor chip is arranged in the groove during packaging, one side of the limiting sponge is abutted against the elastic membrane, the groove is further sealed by the elastic membrane, the semiconductor chip in the groove is further sealed, and when the semiconductor chip is impacted laterally, the semiconductor chip is contacted with the side wall of the groove when the semiconductor chip slides horizontally, so that the semiconductor chip is prevented from being directly contacted with the upper cover, and further the impact in the horizontal direction is absorbed through the deformation of the limiting sponge in the impact process, so that the vibration impact is prevented from directly acting on the semiconductor chip, the semiconductor chip is prevented from being damaged due to vibration, and the economic loss in the transportation process is avoided; meanwhile, the limiting sponge is of a fluffy structure, so that in the packaging process, even if the semiconductor chip placing position is inclined, when one side of the semiconductor chip is contacted with the side wall of the groove, the side wall of the groove is easy to deform, the shearing force on the semiconductor chip is small, the semiconductor chip is difficult to damage, and the safety in the packaging process is guaranteed.

Preferably, the first cavity is filled with protective gas; the lower part of the upper cover is symmetrically provided with felting needles; one end of the pricking pin is fixedly connected with the upper cover; the length of the puncture needle is larger than the maximum distance between the upper cover and the elastic membrane when the upper cover and the elastic membrane are connected.

When the semiconductor packaging structure works, because the metal pins on the semiconductor chip are arranged outside the semiconductor package, the metal pins are directly contacted with air, and the metal pins are easily oxidized and corroded, the conventional method generally arranges the packaging box as a packaging bag after packaging and then carries out vacuum pumping treatment, and meanwhile, when the semiconductor chip placed for a long time is taken, the packaged semiconductor chip is baked, so that the packaging process is complicated, and the packaging cost is increased, therefore, in the scheme, the protection gas is flushed into the first cavity, the pricking pin is arranged at the lower part of the upper cover, and along with the packaging of the upper cover, one end of the pricking pin penetrates through the elastic membrane, so that the first cavity is communicated with the second cavity, the protection gas in the second cavity flows to the first cavity, and the air in the first cavity is exhausted, meanwhile, the upper cover and the elastic film are connected (can be in heat seal connection or adhesive bonding), so that the environment where the semiconductor is packaged is sealed, the inside of the semiconductor is filled with protective gas, the situation that pins on the semiconductor are oxidized in the storage process is avoided, the semiconductor chip stored for a long time after being packaged does not need to be additionally processed, the processing procedure after packaging is saved, the packaging process is simpler and more convenient, and the packaging cost is reduced.

Preferably, one end of the upper cover is provided with a pull ring; the pull ring is fixedly connected with the upper cover; the elastic membrane is positioned at one end of the pull ring and is fixedly connected with the pull ring after being turned over; the connection strength between the elastic membrane and the upper cover is greater than that between the elastic membrane and the lower shell.

When the semiconductor chip clamping device works, when the chip is used, the upper cover and the elastic membrane are required to be separated, then the internal chip can be taken out, the elastic membrane is horizontal, so that the chip is not restrained in the horizontal direction, if the upper cover is directly pulled open, the elastic membrane is compressed in the process of clamping the elastic membrane, and at the moment that the upper cover is far away from the elastic membrane, the elastic membrane is restored to the original state, so that the risk of popping the semiconductor chip is caused; therefore, in the scheme, after the elastic membrane is folded and connected with the pull ring, when the chip is needed to be used, the elastic membrane and the pull ring are pulled simultaneously, so that the elastic membrane and the upper cover are taken down together, then the upper cover is turned over, the semiconductor chip is arranged in the groove, then the elastic membrane is torn, the semiconductor chip is positioned in the groove and limited by the limiting sponge in the horizontal direction in the tearing process, and the semiconductor chip is prevented from being lost due to no constraint when being taken; simultaneously through the joint strength that is greater than between elastic membrane and the lower casing with the joint strength setting between elastic membrane and the upper cover, and then prevent at the in-process of pulling pull ring and elastic membrane, the elastic membrane is too inseparable because of with lower body coupling, and causes cracked condition, and then guarantees that the elastic membrane can follow the upper cover and separate with lower casing together, and then makes to open the packing carton simpler easy operation, and then has improved the practicality of packing carton.

Preferably, one side of the pull ring is in contact with the top surface of the upper cover; the pull ring is of a U-shaped structure; the bottom of the lower shell is provided with a convex structure; the width of the protruding structure is the same as the width of the opening of the U-shaped structure of the pull ring.

When the packaging box stacking device works, the packaging boxes are usually stacked and placed in order to save space during transportation and storage, and the packaging boxes on the upper layer easily slide down during stacking due to the fact that the surfaces of the packaging boxes are generally smooth, so that the packaging boxes are inconvenient to transport and store; consequently in this scheme, bottom through the casing under sets up the arch, set the pull ring into the U-shaped simultaneously, when the packing carton piles up, through with the protruding joint of upper packaging box in the U-shaped opening of the snap ring of lower floor's packing carton, and then make two-layer packing carton leg joint from top to bottom, and then restricted the relative movement between the packing carton of both sides, and then when transportation and storage need pile up, prevent the landing of upper packaging box, and then guaranteed the stability of packing carton in the transportation, and then make the piling up of packing carton when being convenient for transport and storing.

The invention also discloses a packaging method of the semiconductor chip, which comprises the following steps:

s1, connecting the edge of the elastic membrane with the lower shell, and filling protective gas into the first cavity in the connection process;

s2, after the operation in S1 is completed, placing the chip at the center position on the elastic film by the packaging apparatus;

s3, on the basis of S2, the upper cover is placed on the elastic film through packaging equipment, and meanwhile, the chip is located inside the groove;

s4, pressing the upper cover on the basis of completing S3, so that the puncture needle punctures the elastic membrane; and simultaneously, the upper cover is connected with the periphery of the elastic film to complete packaging.

When the device works, after the lower shell is conveyed to a proper position through equipment, the inflation needle filled with protective gas is placed in the first cavity, then the elastic film is covered on the lower shell through the equipment, the elastic film and the lower shell are connected from one end far away from the inflation needle to the direction close to the inflation needle (hot pressing or adhesive bonding can be adopted), the connection speed is reduced at the position close to the inflation needle, meanwhile, continuous inflation is carried out in the drawing process along with the drawing of the inflation needle, and the sealing between the elastic film and the lower shell is completed after the inflation needle is completely drawn out; the whole first cavity can be filled with protective gas, and the pressure in the first cavity is higher; the chip is placed on the elastic membrane through equipment, and the elastic membrane has certain elasticity, so that when the chip is in contact with the elastic membrane to impact the elastic membrane in the placing process, the elastic membrane is tender and deforms through the elastic membrane, so that impact force is absorbed, damage to the chip caused by impact when the chip is put down is avoided, and safety of the chip in the packaging process is protected; place the upper cover on the elastic membrane afterwards, because spacing sponge self has certain fluffy degree, and then when the involution upper cover, need exert pressure, and then along with the pushing down of upper cover, and then make spacing sponge and elastic membrane conflict, and then make the elastic membrane warp, and make the inside atmospheric pressure increase of a cavity, simultaneously at the in-process felting needle that presses and pass the elastic membrane, and then make a cavity and No. two cavity intercommunications, and then make the inside protective gas of a cavity enter into No. two cavity insides, make the inside air of No. two cavities get rid of simultaneously, after pressing in place, make through equipment be connected (can adopt the hot pressing to close or the gluing agent bonding) between upper cover and the elastic membrane, and then accomplish the packing of a chip.

Preferably, the protective gas is nitrogen or a noble gas.

When the packaging box works, nitrogen is colorless, tasteless and nontoxic, the chemical property of the nitrogen is very stable, and the nitrogen can only perform chemical reaction under a harsher condition, so that when the nitrogen is used as protective gas, the oxidation of chip pins can be well prevented, meanwhile, the content of the nitrogen in the air is increased, the nitrogen is easy to obtain, the production cost of the nitrogen is low, and the use cost of the packaging box is low; the rare gas refers to a simple substance of gas corresponding to all the group 0 elements on the periodic table of elements, and is also called inert gas. They are colorless and odorless monatomic gases at normal temperature and pressure, and are difficult to chemically react. The rare gas generally comprises helium (He), neon (Ne), argon (Ar), krypton (Kr) and xenon (Xe), is colorless and tasteless, has stable chemical property, is difficult to chemically react with pins of the chip, can prevent metal pins from being corroded, and can well protect the pins of the chip.

The invention has the following beneficial effects:

1. the invention arranges metal pins on the semiconductor chip, which is convenient to connect the chip and the circuit when the chip is used, and since the metal pins are arranged outside the semiconductor package, further, the metal leads are easily oxidized and corroded, and the semiconductor chips are usually packaged independently for convenient transportation and storage, in the packaging process, mechanical equipment is mostly adopted, so that in the packaging process, fine position deviation of the chip in the packaging process is caused by equipment failure or manual operation errors, further causing one end of the chip to be scraped or collided with one side of the packing box when the chip is placed inside the packing box, so that the chip is subjected to a shearing force (such as shown in fig. 10) during the packaging process, thereby causing damage to the inside of the chip and further affecting the quality of the finished chip; therefore, in the scheme, the elastic film is arranged on the upper part of the lower shell, and the elastic film is ensured to be kept horizontal, the semiconductor chip is placed on the elastic film during packaging, and the elastic film is kept horizontal, so that even if the position of the semiconductor chip is slightly deviated during the process of placing the semiconductor chip on the elastic film by packaging equipment, the periphery of the chip cannot be blocked, the semiconductor chip is ensured not to be subjected to shearing force during the lowering process, and the chip is ensured not to be damaged during the lowering process of packaging; then, the upper cover is placed on the semiconductor chip through packaging equipment, and the limiting sponge is arranged in the upper cover, so that even if the semiconductor chip is slightly deviated after being placed, the semiconductor chip is directly contacted with the limiting sponge, the upper cover cannot be pressed on the semiconductor chip during pressing, the semiconductor chip cannot be damaged by pressing in the packaging process of the upper cover, the semiconductor chip cannot be damaged by slight deviation of the position in the whole packaging process, and the quality of the packaged semiconductor chip is ensured; meanwhile, after packaging, the semiconductor chip is clamped between the limiting sponge and the elastic film by newspaper, so that the semiconductor chip is stably packaged in the packaging box, the semiconductor chip is prevented from shaking in the packaging box in the transportation and carrying processes, the semiconductor is prevented from being damaged due to shaking, and the packaging stability of the packaging box is improved; simultaneously because elastic membrane self has elasticity, spacing sponge self also has certain elasticity simultaneously, and then embraces and press from both sides between elastic membrane and spacing sponge, and then when the packing carton received the vibrations and strikeed, spacing sponge and elastic membrane can absorb the impact of vibrations through the deformation of self, and then prevent that the vibrations from strikeing and transmitting to the chip, and then prevent that the chip is impaired, further improvement the security of packing carton.

2. In the invention, under the condition that only one side surface of the limiting sponge is in contact with the chip, and further in the transportation process, when the packaging box is subjected to severe lateral impact, the chip can slide in the horizontal direction, so that the chip can impact the upper cover part, further the lateral impact can be caused to act on the chip in the packaging box, further the chip is damaged due to vibration impact, and further economic loss is caused; therefore, in the scheme, the groove is formed in the limiting sponge, the semiconductor chip is arranged in the groove during packaging, one side of the limiting sponge is abutted against the elastic membrane, the groove is further sealed by the elastic membrane, the semiconductor chip in the groove is further sealed, and when the semiconductor chip is impacted laterally, the semiconductor chip is contacted with the side wall of the groove when the semiconductor chip slides horizontally, so that the semiconductor chip is prevented from being directly contacted with the upper cover, and further the impact in the horizontal direction is absorbed through the deformation of the limiting sponge in the impact process, so that the vibration impact is prevented from directly acting on the semiconductor chip, the semiconductor chip is prevented from being damaged due to vibration, and the economic loss in the transportation process is avoided; meanwhile, the limiting sponge is of a fluffy structure, so that in the packaging process, even if the semiconductor chip placing position is inclined, when one side of the semiconductor chip is contacted with the side wall of the groove, the side wall of the groove is easy to deform, the shearing force on the semiconductor chip is small, the semiconductor chip is difficult to damage, and the safety in the packaging process is guaranteed.

3. In the invention, because the metal pins on the semiconductor chip are arranged outside the semiconductor package, the metal pins are directly contacted with air, and the metal pins are easy to be oxidized and corroded, the existing method generally arranges the packaging box into a packaging bag after packaging and then carries out vacuum pumping treatment, and simultaneously when the semiconductor chip placed for a long time is taken, the packaged semiconductor chip is baked, so that the packaging process is complicated, and the packaging cost is increased, therefore, in the scheme, the protection gas is flushed into the first cavity and the pricking pin is arranged at the lower part of the upper cover, so that one end of the pricking pin penetrates through the elastic film along with the packaging of the upper cover, so that the first cavity is communicated with the second cavity, the protection gas in the second cavity flows to the first cavity, and the air in the first cavity is exhausted, meanwhile, the upper cover and the elastic film are connected (can be in heat seal connection or adhesive bonding), so that the environment where the semiconductor is packaged is sealed, the inside of the semiconductor is filled with protective gas, the situation that pins on the semiconductor are oxidized in the storage process is avoided, the semiconductor chip stored for a long time after being packaged does not need to be additionally processed, the processing procedure after packaging is saved, the packaging process is simpler and more convenient, and the packaging cost is reduced.

4. When the chip is used, the upper cover and the elastic membrane are required to be separated, then the internal chip can be taken out, the elastic membrane is horizontal, so that the chip is not restrained in the horizontal direction, if the upper cover is directly pulled open, the elastic membrane is compressed in the process of clamping the elastic membrane, and the elastic membrane is restored to the original state at the moment that the upper cover is far away from the elastic membrane, so that the risk of ejecting the semiconductor chip exists; therefore, in the scheme, after the elastic membrane is folded and connected with the pull ring, when the chip is needed to be used, the elastic membrane and the pull ring are pulled simultaneously, so that the elastic membrane and the upper cover are taken down together, then the upper cover is turned over, the semiconductor chip is arranged in the groove, then the elastic membrane is torn, the semiconductor chip is positioned in the groove and limited by the limiting sponge in the horizontal direction in the tearing process, and the semiconductor chip is prevented from being lost due to no constraint when being taken; simultaneously through the joint strength that is greater than between elastic membrane and the lower casing with the joint strength setting between elastic membrane and the upper cover, and then prevent at the in-process of pulling pull ring and elastic membrane, the elastic membrane is too inseparable because of with lower body coupling, and causes cracked condition, and then guarantees that the elastic membrane can follow the upper cover and separate with lower casing together, and then makes to open the packing carton simpler easy operation, and then has improved the practicality of packing carton.

5. In the invention, the packaging boxes are usually stacked and placed in order to save space during transportation and storage, and the packaging boxes on the upper layer easily slide down during stacking because the surfaces of the packaging boxes are generally smooth, thereby causing inconvenience in transportation and storage of the packaging boxes; consequently in this scheme, bottom through the casing under sets up the arch, set the pull ring into the U-shaped simultaneously, when the packing carton piles up, through with the protruding joint of upper packaging box in the U-shaped opening of the snap ring of lower floor's packing carton, and then make two-layer packing carton leg joint from top to bottom, and then restricted the relative movement between the packing carton of both sides, and then when transportation and storage need pile up, prevent the landing of upper packaging box, and then guaranteed the stability of packing carton in the transportation, and then make the piling up of packing carton when being convenient for transport and storing.

Drawings

The invention will be further explained with reference to the drawings.

FIG. 1 is a schematic view of a plurality of packages according to the present invention;

FIG. 2 is a schematic view of a stack of packages according to the present invention;

FIG. 3 is a general schematic view of the package of the present invention;

FIG. 4 is a first internal view of the package of the present invention;

FIG. 5 is a second internal view of the package of the present invention;

FIG. 6 is a third internal view of the package of the present invention;

FIG. 7 is an exploded view of the package of the present invention;

FIG. 8 is a schematic view of the structure of the upper cap and lancet of the present invention;

FIG. 9 is a schematic view of the structure of the upper cover of the present invention;

FIG. 10 is a schematic view of a conventional packing box of the present invention when packing chips;

in the figure: the device comprises a lower shell 1, an elastic membrane 2, an upper cover 3, a limiting sponge 4, a groove 5, a puncture needle 6, a pull ring 7 and a convex structure 8.

Detailed Description

In order to make the technical means, the creation characteristics, the achievement purposes and the effects of the invention easy to understand, the invention is further described with the specific embodiments.

As shown in fig. 1 to 10, a semiconductor chip package includes a lower case 1, an elastic membrane 2, and an upper cover 3; the elastic membrane 2 is arranged at the upper part of the lower shell 1; the elastic membrane 2 is connected with the edge of the lower shell 1 in a heat seal mode; a first cavity is formed between the elastic membrane 2 and the lower shell 1; the upper cover 3 is arranged on the upper part of the elastic membrane 2; the edge of the upper cover 3 is connected with the elastic membrane 2; a second cavity is formed between the elastic membrane 2 and the upper cover 3; a semiconductor chip is placed in the cavity II; a limiting sponge 4 is arranged in the second cavity; the limiting sponge 4 is fixedly connected with the upper cover 3.

When in use, the chip is conveniently connected with a circuit, and because the metal pins are arranged outside the semiconductor package, further, the metal leads are easily oxidized and corroded, and the semiconductor chips are usually packaged independently for convenient transportation and storage, in the packaging process, mechanical equipment is mostly adopted, so that in the packaging process, fine position deviation of the chip in the packaging process is caused by equipment failure or manual operation errors, further causing one end of the chip to be scraped or collided with one side of the packing box when the chip is placed inside the packing box, so that the chip is subjected to a shearing force (such as shown in fig. 10) during the packaging process, thereby causing damage to the inside of the chip and further affecting the quality of the finished chip; therefore, in the scheme, the elastic film 2 is arranged on the upper part of the lower shell 1, the elastic film 2 is ensured to be kept horizontal, the semiconductor chip is placed on the elastic film 2 during packaging, and the elastic film 2 is kept horizontal, so that the semiconductor chip is not blocked around the chip even if the position of the semiconductor chip is slightly deviated in the process of placing the semiconductor chip on the elastic film 2 by packaging equipment, the semiconductor chip is not subjected to shearing force in the process of placing the semiconductor chip, and the chip is not damaged in the process of placing the semiconductor chip in the package; then, the upper cover 3 is placed on the semiconductor chip through packaging equipment, and due to the fact that the limiting sponge 4 is arranged inside the upper cover 3, even if the semiconductor chip is slightly deviated after being placed, the semiconductor chip is directly contacted with the limiting sponge 4, the upper cover 3 cannot be pressed on the semiconductor chip during pressing, and therefore the semiconductor chip cannot be damaged due to pressing in the packaging process of the upper cover 3, the semiconductor chip cannot be damaged due to slight deviation in the whole packaging process, and the quality of the packaged semiconductor chip is guaranteed; meanwhile, after packaging, the semiconductor chip is clamped between the limiting sponge 4 and the elastic film 2 by newspaper, so that the semiconductor chip is stably packaged in the packaging box, the semiconductor chip is prevented from shaking in the packaging box in the transportation and carrying processes, the semiconductor is prevented from being damaged due to shaking, and the packaging stability of the packaging box is improved; simultaneously because elastic membrane 2 self has elasticity, spacing sponge 4 self also has certain elasticity simultaneously, and then embraces and press from both sides between elastic membrane 2 and spacing sponge 4, and then when the packing carton received the vibrations and assault, spacing sponge 4 and elastic membrane 2 can be through the impact of the deformation absorption vibrations of self, and then prevent that the vibrations from assaulting and transmitting to the chip on, and then prevent that the chip is impaired, further improvement the security of packing carton.

As shown in fig. 4 to 6, a groove 5 is formed in the lower portion of the limiting sponge 4, and the semiconductor chip is located inside the groove 5; one side wall of the groove 5 on the limiting sponge 4 is abutted against the semiconductor chip; one side of the limiting sponge 4 is in contact with the elastic membrane 2.

When the packaging box is in operation, under the condition that only one side face of the limiting sponge 4 is in contact with the chip, and further in the transportation process, when the packaging box is subjected to severe lateral impact, the chip can slide in the horizontal direction, so that the chip can impact the upper cover 3, and further the lateral impact can be caused to act on the chip in the packaging box, and further the chip is damaged due to vibration impact, and further economic loss is caused; therefore, in the scheme, the groove 5 is formed in the limiting sponge 4, when the semiconductor chip is packaged, the semiconductor chip is arranged inside the groove 5, one side of the limiting sponge 4 is abutted against the elastic membrane 2, the groove 5 is further sealed by the elastic membrane 2, the semiconductor chip in the groove 5 is further sealed, when the semiconductor chip is subjected to lateral impact, the semiconductor chip is in contact with the side wall of the groove 5 when the semiconductor chip horizontally slides, the semiconductor chip is further prevented from being in direct contact with the upper cover 3, further, in the impact process, impact in the horizontal direction is absorbed through deformation of the limiting sponge 4, further, the shock impact is prevented from directly acting on the semiconductor chip, further, the semiconductor chip is prevented from being damaged due to shock, and further, economic loss in the transportation process is avoided; simultaneously because spacing sponge 4 itself is fluffy structure, and then at the in-process of packing, even semiconductor chip places the position and appears the skew, when leading to semiconductor chip one side and recess 5's lateral wall contact, recess 5 lateral wall can produce the deformation easily, and then the shearing force that receives on to the semiconductor chip is less, and then also be difficult to cause semiconductor chip's damage, and then has guaranteed the security in the packaging process.

As shown in fig. 4 to 8, the first cavity is filled with a protective gas; the lower part of the upper cover 3 is symmetrically provided with felting needles 6; one end of the pricking pin 6 is fixedly connected with the upper cover 3; the length of the puncture needle 6 is larger than the maximum distance between the upper cover 3 and the elastic membrane 2 when the two are connected.

In the scheme, protective gas is injected into the first cavity, the pricking pin 6 is arranged at the lower part of the upper cover 3, and then one end of the pricking pin 6 passes through the elastic membrane 2 along with the packaging of the upper cover 3, so that the first cavity is communicated with the second cavity, the protective gas in the second cavity flows to the first cavity, and further the air in the first cavity is removed, meanwhile, the upper cover 3 and the elastic film 2 are connected (can be in heat seal connection or adhesive bonding), so that the environment where the semiconductor is packaged is sealed, the inside of the semiconductor is filled with protective gas, the situation that pins on the semiconductor are oxidized in the storage process is avoided, the semiconductor chip stored for a long time after being packaged does not need to be additionally processed, the processing procedure after being packaged is saved, the packaging process is simpler and more convenient, and the packaging cost is reduced.

As shown in fig. 4 to 8, one end of the upper cover 3 is provided with a pull ring 7; the pull ring 7 is fixedly connected with the upper cover 3; the elastic membrane 2 is positioned at one end of the pull ring 7 and is fixedly connected with the pull ring 7 after being turned over; the connection strength between the elastic membrane and the upper cover 3 is greater than the connection strength between the elastic membrane 2 and the lower housing 1.

When the semiconductor chip clamping device works, when the chip is used, the upper cover 3 and the elastic membrane 2 need to be separated, then the internal chip can be taken out, because the elastic membrane 2 is horizontal, the chip is not restrained in the horizontal direction, if the upper cover 3 is directly pulled away, the elastic membrane 2 is compressed in the process of clamping the elastic membrane 2, and at the moment that the upper cover 3 is far away from the elastic membrane 2, the elastic membrane 2 is restored to the original state, and then the risk of popping the semiconductor chip is caused; therefore, in the scheme, after the elastic membrane 2 is folded and connected with the pull ring 7, when a chip is needed to be used, the elastic membrane 2 and the pull ring 7 are pulled simultaneously, the elastic membrane 2 and the upper cover 3 are taken down together, then the upper cover 3 is turned over, the semiconductor chip is placed in the groove 5, then the elastic membrane 2 is torn, and in the tearing process, the semiconductor chip is located in the groove 5 and limited by the limiting sponge 4 in the horizontal direction, so that the semiconductor chip is prevented from being lost due to no constraint when the semiconductor chip is taken; simultaneously through the joint strength that is greater than between elastic membrane 2 and the lower casing 1 with the joint strength setting between elastic membrane and the upper cover 3, and then prevent at the in-process of pulling pull ring 7 and elastic membrane 2, elastic membrane 2 is too inseparable because of being connected with lower casing 1, and causes the cracked condition, and then guarantees that elastic membrane 2 can follow upper cover 3 and separate with lower casing 1 together, and then makes to open the packing carton simpler easy operation, and then has improved the practicality of packing carton.

As shown in fig. 2 to 8, one side of the tab 7 is in contact with the top surface of the upper cover 3; the pull ring 7 is of a U-shaped structure; the bottom of the lower shell 1 is provided with a convex structure 8; the width of the convex structure 8 is the same as the width of the U-shaped structure opening of the pull ring 7.

When the packaging box stacking device works, the packaging boxes are usually stacked and placed in order to save space during transportation and storage, and the packaging boxes on the upper layer easily slide down during stacking due to the fact that the surfaces of the packaging boxes are generally smooth, so that the packaging boxes are inconvenient to transport and store; consequently in this scheme, bottom through casing 1 under sets up the arch, set pull ring 7 to the U-shaped simultaneously, when the packing carton piles up, through with upper packaging box's protruding joint in the U-shaped opening of the snap ring of lower floor's packing carton, and then make two-layer packing carton leg joint from top to bottom, and then restricted the relative movement between the packing carton of both sides, and then when transportation and storage need pile up, prevent upper packaging box's landing, and then guaranteed the stability of packing carton in the transportation, and then make the piling up of packing carton when being convenient for transport and storage.

The invention also discloses a packaging method of the semiconductor chip, which comprises the following steps:

s1, connecting the edge of the elastic membrane 2 with the lower shell 1, and filling protective gas into the first cavity in the connection process;

s2, after the operation in S1 is completed, the chip is placed at the center position on the elastic film 2 by the packaging apparatus;

s3, on the basis of S2, the upper cover 3 is placed on the elastic film 2 through packaging equipment, and meanwhile, the chip is located inside the groove 5;

s4, pressing the upper cover 3 on the basis of S3 being completed, so that the lancet 6 pierces the elastic membrane 2; and simultaneously, the upper cover 3 and the elastic membrane 2 are connected at the periphery to finish packaging.

When the device works, after the lower shell 1 is conveyed to a proper position through equipment, an inflation needle filled with protective gas is placed in a cavity, then the elastic film 2 is covered on the lower shell 1 through the equipment, the elastic film 2 and the lower shell 1 are connected (can be bonded by adopting hot pressing or adhesives) from one end far away from the inflation needle to the direction close to the inflation needle, the connection speed is reduced at the position close to the inflation needle, meanwhile, the continuous inflation is carried out in the drawing process along with the drawing-out of the inflation needle, and the sealing between the elastic film 2 and the lower shell 1 is completed after the inflation needle is completely drawn out; the whole first cavity can be filled with protective gas, and the pressure in the first cavity is higher; then, the chip is placed on the elastic membrane 2 through equipment, and the elastic membrane 2 has certain elasticity, so that when the chip is in contact with the elastic membrane 2 to impact the elastic membrane 2 in the placing process, the elastic membrane 2 is tender and deforms through itself to absorb the impact force, so that the damage of the chip caused by the impact when the chip is put down is avoided, and the safety of the chip in the packaging process is protected; place upper cover 3 on elastic membrane 2 afterwards, because spacing sponge 4 self has certain fluffy degree, and then when involution upper cover 3, need exert pressure, and then along with the pushing down of upper cover 3, and then make spacing sponge 4 contradict with elastic membrane 2, and then make elastic membrane 2 warp, and make the inside atmospheric pressure of a cavity increase, simultaneously at the in-process felting needle 6 of pressing pass elastic membrane 2, and then make a cavity and No. two cavity intercommunications, and then make the inside protective gas of a cavity enter into No. two cavities inside, make the inside air of No. two cavities get rid of simultaneously, after putting in place to press, make through equipment be connected (can adopt the hot pressing to close or the gluing agent bonding) between upper cover 3 and elastic membrane 2, and then accomplish the packing of a chip.

The protective gas is nitrogen or rare gas.

When the packaging box works, nitrogen is colorless, tasteless and nontoxic, the chemical property of the nitrogen is very stable, and the nitrogen can only perform chemical reaction under a harsher condition, so that when the nitrogen is used as protective gas, the oxidation of chip pins can be well prevented, meanwhile, the content of the nitrogen in the air is increased, the nitrogen is easy to obtain, the production cost of the nitrogen is low, and the use cost of the packaging box is low; the rare gas refers to a simple substance of gas corresponding to all the group 0 elements on the periodic table of elements, and is also called inert gas. They are colorless and odorless monatomic gases at normal temperature and pressure, and are difficult to chemically react. The rare gas generally comprises helium (He), neon (Ne), argon (Ar), krypton (Kr) and xenon (Xe), is colorless and tasteless, has stable chemical property, is difficult to chemically react with pins of the chip, can prevent metal pins from being corroded, and can well protect the pins of the chip.

When in use, the chip is conveniently connected with a circuit, and because the metal pins are arranged outside the semiconductor package, further, the metal leads are easily oxidized and corroded, and the semiconductor chips are usually packaged independently for convenient transportation and storage, in the packaging process, mechanical equipment is mostly adopted, so that in the packaging process, fine position deviation of the chip in the packaging process is caused by equipment failure or manual operation errors, further causing one end of the chip to be scraped or collided with one side of the packing box when the chip is placed inside the packing box, so that the chip is subjected to a shearing force (such as shown in fig. 10) during the packaging process, thereby causing damage to the inside of the chip and further affecting the quality of the finished chip; therefore, in the scheme, the elastic film 2 is arranged on the upper part of the lower shell 1, the elastic film 2 is ensured to be kept horizontal, the semiconductor chip is placed on the elastic film 2 during packaging, and the elastic film 2 is kept horizontal, so that the semiconductor chip is not blocked around the chip even if the position of the semiconductor chip is slightly deviated in the process of placing the semiconductor chip on the elastic film 2 by packaging equipment, the semiconductor chip is not subjected to shearing force in the process of placing the semiconductor chip, and the chip is not damaged in the process of placing the semiconductor chip in the package; then, the upper cover 3 is placed on the semiconductor chip through packaging equipment, and due to the fact that the limiting sponge 4 is arranged inside the upper cover 3, even if the semiconductor chip is slightly deviated after being placed, the semiconductor chip is directly contacted with the limiting sponge 4, the upper cover 3 cannot be pressed on the semiconductor chip during pressing, and therefore the semiconductor chip cannot be damaged due to pressing in the packaging process of the upper cover 3, the semiconductor chip cannot be damaged due to slight deviation in the whole packaging process, and the quality of the packaged semiconductor chip is guaranteed; meanwhile, after packaging, the semiconductor chip is clamped between the limiting sponge 4 and the elastic film 2 by newspaper, so that the semiconductor chip is stably packaged in the packaging box, the semiconductor chip is prevented from shaking in the packaging box in the transportation and carrying processes, the semiconductor is prevented from being damaged due to shaking, and the packaging stability of the packaging box is improved; meanwhile, the elastic membrane 2 has elasticity, and the limiting sponge 4 also has certain elasticity, so that the limiting sponge 4 is clamped between the elastic membrane 2 and the limiting sponge 4, when the packaging box is subjected to vibration impact, the limiting sponge 4 and the elastic membrane 2 can absorb the impact of the vibration through deformation of the limiting sponge 4 and the elastic membrane, so that the vibration impact is prevented from being transmitted to the chip, the chip is prevented from being damaged, and the safety of the packaging box is further improved; under the condition that only one side surface of the limiting sponge 4 is in contact with the chip, when the packaging box is subjected to severe lateral impact in the transportation process, the chip can slide in the horizontal direction, so that the chip can impact the upper cover 3, the lateral impact can be caused to act on the chip in the packaging box, the chip can be damaged due to vibration impact, and economic loss is further caused; therefore, in the scheme, the groove 5 is formed in the limiting sponge 4, when the semiconductor chip is packaged, the semiconductor chip is arranged inside the groove 5, one side of the limiting sponge 4 is abutted against the elastic membrane 2, the groove 5 is further sealed by the elastic membrane 2, the semiconductor chip in the groove 5 is further sealed, when the semiconductor chip is subjected to lateral impact, the semiconductor chip is in contact with the side wall of the groove 5 when the semiconductor chip horizontally slides, the semiconductor chip is further prevented from being in direct contact with the upper cover 3, further, in the impact process, impact in the horizontal direction is absorbed through deformation of the limiting sponge 4, further, the shock impact is prevented from directly acting on the semiconductor chip, further, the semiconductor chip is prevented from being damaged due to shock, and further, economic loss in the transportation process is avoided; meanwhile, the limiting sponge 4 is of a fluffy structure, so that in the packaging process, even if the placing position of the semiconductor chip is inclined, when one side of the semiconductor chip is contacted with the side wall of the groove 5, the side wall of the groove 5 is easy to deform, the shearing force on the semiconductor chip is small, the semiconductor chip is difficult to damage, and the safety in the packaging process is further ensured; because the metal pins on the semiconductor chip are arranged outside the semiconductor package, the metal pins are directly contacted with air, and the metal pins are easy to be oxidized and corroded, the existing method generally arranges the packaging box into a packaging bag after packaging and then carries out vacuum pumping treatment, and simultaneously when the semiconductor chip placed for a long time is taken, the packaged semiconductor chip is baked, so that the packaging process is complicated, and the packaging cost is increased, therefore, in the scheme, the protection gas is flushed into the first cavity, the pricking pin 6 is arranged at the lower part of the upper cover 3, and then one end of the pricking pin 6 passes through the elastic membrane 2 along with the packaging of the upper cover 3, so that the first cavity is communicated with the second cavity, the protection gas in the second cavity flows to the first cavity, and then the air in the first cavity is removed, meanwhile, the upper cover 3 and the elastic film 2 are connected (can be in heat seal connection or adhesive bonding), so that the environment where the semiconductor is packaged is sealed, the inside of the semiconductor is filled with protective gas, the situation that pins on the semiconductor are oxidized in the storage process is avoided, the semiconductor chip stored for a long time after being packaged does not need to be additionally processed, the processing procedure after being packaged is saved, the packaging process is simpler and more convenient, and the packaging cost is reduced.

While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.