RC-LIGBT device of substrate integrated anti-parallel freewheeling diode
阅读说明：本技术 一种衬底集成反并联续流二极管的rc-ligbt器件 (RC-LIGBT device of substrate integrated anti-parallel freewheeling diode ) 是由 陈伟中 林徐葳 秦海峰 黄义 于 2021-09-10 设计创作，主要内容包括：本发明涉及一种衬底集成反并联续流二极管的RC-LIGBT器件,属于功率半导体技术领域。该器件包括由P+发射极、N+电子发射极、P-body、N型漂移区、缓冲层和P型集电极形成的IGBT导电区域；由P+发射极、P型衬底和N型集电极形成的PIN续流二极管导电区域。正向导通时,IGBT导电区域工作,无负阻效应且导通压降低；反向导通时,PIN续流二极管导电区域工作,提供空穴电流路径实现二极管的集成。本发明消除了传统RC-LIGBT的负阻Snapback效应,同时能够大大降低关断损耗。(The invention relates to an RC-LIGBT device with an anti-parallel freewheeling diode integrated on a substrate, belonging to the technical field of power semiconductors. The device comprises an IGBT conductive region formed by a P + emitter, an N + electron emitter, a P-body, an N-type drift region, a buffer layer and a P-type collector; and a PIN freewheeling diode conductive region formed by the P + emitter, the P-type substrate and the N-type collector. When conducting in the positive direction, the IGBT conducting area works, no negative resistance effect exists, and the conducting voltage is reduced; when the diode is reversely conducted, the conducting region of the PIN freewheeling diode works to provide a hole current path to realize the integration of the diode. The invention eliminates the negative resistance Snapback effect of the traditional RC-LIGBT and can greatly reduce turn-off loss at the same time.)
1. An RC-LIGBT device of an anti-parallel free-wheeling diode integrated on a substrate is characterized by comprising a P + emitter (1), an N + electron emitter (2), a P-body (3), an N-type drift region (4), a buffer layer (5), a P-type collector (6), an N-type collector (7), a silicon dioxide insulating layer (8), a P-type substrate (9), an emitter (10), a grid electrode (11) and a collector (12); the IGBT structure comprises a P + emitter (1), an N + electron emitter (2), a P-body (3), an N-type drift region (4), a buffer layer (5) and a P-type collector (6), wherein the IGBT conductive region is formed by the P + emitter (1), the N + electron emitter (2), the P-body (3), the buffer layer (5) and the P-type collector; the P + emitter (1), the P-type substrate (9) and the N-type collector (7) form a PIN freewheeling diode conducting region;
the P + emitter (1) and the N + electron emitter (2) are positioned below the emitter (10); the left side of the N + electron emitter (2) is tightly connected with the right side of the P + electron emitter (1), and the lower side and the right side of the N + electron emitter (2) are completely covered by the P-body (3); the left side of the P-body (3) is connected with the right side of the P + emitter (1), and the lower side of the P-body (3) is connected with the upper side of the silicon dioxide insulating layer (8) in a flush manner; the left side of the N-type drift region (4) is connected with the right side of the P-body (3), and the lower side of the N-type drift region (4) is flush with the upper side of the silicon dioxide insulating layer (8); the left side of the buffer layer (5) is connected with the right side of the N-type drift region (4) in a flush manner, and the lower side of the buffer layer (5) is connected with the upper side of the silicon dioxide insulating layer (8) in a flush manner; the left side of the P-type collector (6) is connected with the right side of the buffer layer (5), and the lower side of the P-type collector (6) is flush with the upper side of the silicon dioxide insulating layer (8); the upper side of the P-type substrate (9) is connected with the lower sides of the P + emitter (1), the silicon dioxide insulating layer (8) and the N-type collector (7) in a flush manner in sequence; the left side of the N-type collector (7) is connected with the right sides of the P-type collector (6) and the silicon dioxide insulating layer (8) in a flush manner;
when the IGBT is conducted in the forward direction, the IGBT conducting region works, and electrons are injected into the N-type drift region (4) and the buffer layer (5) from the N + electron emitter (2) through the P-body (3); meanwhile, holes are injected into the N-type drift region (4) and the buffer layer (5) by the P-type collector (6), so that the bipolar conductive mode of the IGBT is realized; when the PIN freewheeling diode is conducted reversely, a P + emitter (1) of a conductive region of the PIN freewheeling diode injects holes into a P-type substrate (9); meanwhile, the N-type collector (7) injects electrons into the P-type substrate (9), so that a PIN bipolar conduction mode is realized.
2. The substrate-integrated anti-parallel free-wheeling diode RC-LIGBT device of claim 1 further comprising a P-top (13); the upper side of the P-top (13) is flush with the upper side of the N-type drift region (4), and the left side, the lower side and the right side of the P-top (13) are completely covered by the N-type drift region (4).
3. The substrate integrated anti-parallel free-wheeling diode RC-LIGBT device of claim 1 further comprising a P-type (14); the P-type (14) is completely covered by the N-type drift region (4).
4. The substrate-integrated anti-parallel free-wheeling diode RC-LIGBT device according to claim 1, characterized in that the material of the gate (11) comprises doped polysilicon or aluminum.
5. The RC-LIGBT device with substrate integrated anti-parallel free-wheeling diode as claimed in claim 1, wherein the doping concentration of the N-type drift region (4) is 1 x 1015cm-3The doping concentration of the P-body (3) and the buffer layer (5) is 1 multiplied by 1016cm-3The doping concentration of the N-type collector (7) is 1 multiplied by 1019cm-3What is, what isThe doping concentration of the P-type substrate (9) is 1 x 1014cm-3。
6. The RC-LIGBT device with substrate integrated anti-parallel free-wheeling diode according to claim 2, characterized in that the doping concentration of P-top (13) is 1 x 1015cm-3。
7. The RC-LIGBT device with substrate integrated anti-parallel free-wheeling diode as claimed in claim 3, wherein the doping concentration of the P-type (14) is 1 x 1016cm-3。
Technical Field
The invention belongs to the technical field of power semiconductors, and relates to an RC-LIGBT device with an anti-parallel freewheeling diode integrated on a substrate.
Background
An Insulated Gate Bipolar Transistor (IGBT) is a Bipolar semiconductor power device in which a MOSFET and a BJT are combined, has the advantages of reduced on-state voltage, low driving power consumption, high operating frequency, and the like, is widely used in the fields of communication technology, new energy devices, and various consumer electronics, and is a core device of an electronic power system. Among them, the Lateral Insulated Gate Bipolar Transistor (LIGBT) is easy to integrate on Si-based, and is commonly applied in SOI-based power intelligent system, which is a typical representative of Bipolar semiconductor devices.
However, since the LIGBT has no reverse conducting capability, in practical use, it is usually necessary to connect a reverse freewheeling diode beside the LIGBT for protection. Meanwhile, in order to improve the integration degree of the device and reduce the manufacturing cost, people begin to try to integrate a protective freewheeling diode into the LIGBT, replace a P-Collector of a partial Collector of the LIGBT with an N-Collector, and integrate a P-body/N-drift/N-Collector freewheeling diode into the Transistor, so that the device becomes a Reverse-Conducting Lateral Insulated Gate Bipolar Transistor (RC-LIGBT), and the improvement not only enables the device to have Reverse conduction capability, but also greatly reduces the size of the chip and can reduce the production cost.
The conventional RC-LIGBT still has some non-negligible disadvantages in use: for example, when the Collector is in forward conduction, electrons injected into the drift region from the emitter flow out of the Collector through the N-Collector at first due to the existence of the Collector N-Collector, and only the electrons conduct at this time, which is called a unipolar conduction mode; the voltage V between the PN junction formed by the P-Collector and the N-drift region is increased along with the gradual increase of the current flowing through the P-CollectorPNWill gradually increase when VPNWhen the voltage is more than or equal to 0.7V, a PN junction is conducted, a large number of holes are injected into an N-drift region from a P-Collector, a conductance modulation effect is generated, a transistor enters a bipolar conductance mode, a voltage rebound phenomenon is generated when the voltage is reflected on a positive conduction curve, voltage and current on the curve are subjected to sudden change, namely a negative resistance effect, also called snapback effect, is generated, and the phenomenon brings a series of problems so as to influence the reliability of an RC-LIGBT device, for example, the phenomenon can cause overlarge local current, so that the device cannot normally work or even is burnt, and further the breakdown of the whole circuit is caused.
In the prior art, the following are commonly used:
1) an SSA-LIGBT (Separated short-Anode LIGBT) device expands the length of an N-type drift region on the basis of a traditional LIGBT device, and an N-type collector is arranged at the rightmost collector of the device to separate the N-type collector from a P-type collector; the collector region resistance is increased by extending the flow path of the electron current. However, the length of the drift region needs to be significantly extended, which wastes device size significantly.
2) On the basis of a traditional LIGBT device, an isolation groove is arranged on the right side of a buffer layer, and an N-type collector is arranged on the right side of the isolation groove. The structure expands an electron current path, has high requirements on the aspect ratio, and is difficult to completely eliminate the negative resistance effect.
3) The TBSA LIGBT (Trench Barrier short Anode LIGBT) device is characterized in that two isolation trenches are arranged on the right side of a buffer layer on the basis of a traditional LIGBT device, a narrow electron current path is reserved, an N-type collector is arranged on the right side of each isolation Trench, and the flow path of electron current is greatly expanded.
Therefore, in order to better promote the application of the RC-LIGBT, the existing RC-LIGBT needs to be further improved to avoid the snapback effect, so as to enhance the reliability of the RC-LIGBT device.
Disclosure of Invention
In view of the above, an object of the present invention is to provide an RC-LIGBT device with an anti-parallel freewheeling diode integrated on a substrate, which can eliminate the negative resistance Snapback effect of the conventional RC-LIGBT and can greatly reduce turn-off loss.
In order to achieve the purpose, the invention provides the following technical scheme:
an RC-LIGBT device of a substrate integrated anti-parallel free-wheeling diode comprises a P + emitter 1, an N + electron emitter 2, a P-body3, an N type drift region 4, a buffer layer 5, a P type collector 6, an N type collector 7, a silicon dioxide insulating layer 8, a P type substrate 9, an emitter 10, a grid 11 and a collector 12; the IGBT structure comprises a P + emitter 1, an N + electron emitter 2, a P-body3, an N type drift region 4, a buffer layer 5 and a P type collector 6, wherein the IGBT conductive region is formed; the P + emitter 1, the P-type substrate 9 and the N-type collector 7 form a PIN freewheeling diode conducting region;
the P + emitter 1 and the N + electron emitter 2 are positioned below the emitter 10; the left side of the N + electron emitter 2 is tightly connected with the right side of the P + emitter 1, and the lower side and the right side of the N + electron emitter 2 are completely covered by the P-body 3; the left side of the P-body3 is connected with the right side of the P + emitter 1, and the lower side of the P-body3 is connected with the upper side of the silicon dioxide insulating layer 8 in a flush manner; the left side of the N-type drift region 4 is connected with the right side of the P-body3, and the lower side of the N-type drift region 4 is flush with the upper side of the silicon dioxide insulating layer 8; the left side of the buffer layer 5 is connected with the right side of the N-type drift region 4 in a flush manner, and the lower side of the buffer layer 5 is connected with the upper side of the silicon dioxide insulating layer 8 in a flush manner; the left side of the P-type collector 6 is connected with the right side of the buffer layer 5, and the lower side of the P-type collector 6 is flush with the upper side of the silicon dioxide insulating layer 8. The upper side of the P-type substrate 9 is connected with the lower sides of the P + emitter 1, the silicon dioxide insulating layer 8 and the N-type collector 7 in a flush manner in sequence; the left side of the N-type collector 7 is flush with the right side of the P-type collector 6 and the silicon dioxide insulating layer 8.
When the IGBT is conducted in the forward direction, the IGBT conducting region works, and electrons are injected into the N-type drift region 4 and the buffer layer 5 from the N + electron emitter 2 through the P-body 3; meanwhile, holes are injected into the N-type drift region 4 and the buffer layer 5 by the P-type collector 6, and the bipolar conductive mode of the IGBT is realized. In this working state, the N + electron emitter 2 is an electron emitter, the P-body3 is an electron channel region, the gate 11 controls the opening of the electron channel, the N-type drift region 4 is an electron drift region, the buffer layer 5 is a field stop layer, and the P-type collector 6 is a hole emitter, and the above structure constitutes the IGBT bipolar device.
When the PIN freewheeling diode is conducted reversely, a P + emitter 1 of a conduction region of the PIN freewheeling diode injects holes into the P type substrate 9; meanwhile, the N-type collector 7 injects electrons into the P-type substrate 9, and a PIN bipolar conduction mode is realized. In this working state, the P + emitter 1 is the anode of the freewheeling diode, the P-type substrate 9 is the hole drift region, and the N-type collector 7 is the electron cathode, which form a PIN diode structure.
Because the IGBT and the diode respectively undertake forward conduction and reverse conduction, and the equivalent circuit is in an anti-parallel connection mode, the novel structure of the RC-LIGBT device provided by the invention finally realizes the function of substrate integrated anti-parallel freewheeling diode.
Preferably, the device further comprises P-top 13; the upper side of the P-top13 is flush with the upper side of the N-type drift region 4, and the left side, the lower side and the right side of the P-top13 are completely covered by the N-type drift region 4.
Preferably, the device further comprises P-type 14; the P-type14 is completely covered by the N-type drift region 4.
Preferably, the material of the gate 11 includes doped polysilicon or aluminum.
Preferably, the doping concentration of the N-type drift region 4 is 1 × 1015cm-3The doping concentration of the P-body3 and the buffer layer 5 is 1 multiplied by 1016cm-3The doping concentration of the N-type collector 7 is 1 multiplied by 1019cm-3The doping concentration of the P-type substrate 9 is 1 multiplied by 1014cm-3。
Preferably, the doping concentration of the P-top13 is 1 x 1015cm-3。
Preferably, the doping concentration of the P-type14 is 1 x 1016cm-3。
The invention has the beneficial effects that:
1) the P + emitter is the anode of a freewheeling diode, the P-type substrate is a hole drift region, and the N-type collector is an electron cathode, so that a PIN diode structure is formed; the PIN diode structure is isolated from the IGBT area through a silicon dioxide insulating layer and is connected in an anti-parallel mode;
2) when the device is conducted in the positive direction, the IGBT area is conducted without negative resistance effect and the conducting voltage drop is low;
4) when the device is conducted reversely, the PIN diode structure is conducted, and the P-type substrate area provides a hole current path to realize the integration of the diode;
5) the device of the invention completely eliminates the negative resistance Snapback effect of the traditional RC-LIGBT, and the turn-off loss E of the device is reduced under the same turn-on voltageoffCompared with the traditional RC-LIGBT, the method greatly reduces the cost.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the means of the instrumentalities and combinations particularly pointed out hereinafter.
Drawings
For the purposes of promoting a better understanding of the objects, aspects and advantages of the invention, reference will now be made to the following detailed description taken in conjunction with the accompanying drawings in which:
fig. 1 is a schematic structural diagram of an RC-LIGBT device provided in embodiment 1 of the present invention;
fig. 2 is a schematic structural diagram of an RC-LIGBT device provided in embodiment 2 of the present invention;
fig. 3 is a schematic structural diagram of an RC-LIGBT device provided in embodiment 3 of the present invention;
FIG. 4 is a graph comparing the forward conduction characteristics of RC-LIGBT of example 1 of the present invention with conventional LIGBT (Conv), TBSA-LIGBT, SSA-LIGBT and STB-LIGBT;
FIG. 5 is a graph comparing reverse conduction characteristics of RC-LIGBT with TBSA-LIGBT, SSA-LIGBT and STB-LIGBT in example 1 of the present invention;
FIG. 6 shows the drift region length L of RC-LIGBT, conventional LIGBT (Conv), TBSA-LIGBT, SSA-LIGBT and STB-LIGBT in embodiment 1 of the present inventionDGraph comparing the blocking characteristics at 18 μm;
FIG. 7 is a graph of the potential distribution of the RC-LIGBT of example 1 of the present invention in avalanche breakdown with conventional LIGBT (Conv), TBSA-LIGBT, SSA-LIGBT and STB-LIGBT;
FIG. 8 shows the compromise between RC-LIGBT and conventional LIGBT (Conv), TBSA-LIGBT, SSA-LIGBT and STB-LIGBT in example 1 of the present invention;
FIG. 9 is a process flow diagram of the RC-LIGBT of example 1 of the present invention;
reference numerals: the transistor comprises a 1-P + emitter, a 2-N + electron emitter, a 3-P-body, a 4-N type drift region, a 5-buffer layer, a 6-P type collector, a 7-N type collector, an 8-silicon dioxide insulating layer, a 9-P type substrate, a 10-emitter, an 11-grid, a 12-collector, a 13-P-top and a 14-P-type.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention in a schematic way, and the features in the following embodiments and examples may be combined with each other without conflict.
Wherein the showings are for the purpose of illustrating the invention only and not for the purpose of limiting the same, and in which there is shown by way of illustration only and not in the drawings in which there is no intention to limit the invention thereto; to better illustrate the embodiments of the present invention, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of an actual product; it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.
The same or similar reference numerals in the drawings of the embodiments of the present invention correspond to the same or similar components; in the description of the present invention, it should be understood that if there is an orientation or positional relationship indicated by terms such as "upper", "lower", "left", "right", "front", "rear", etc., based on the orientation or positional relationship shown in the drawings, it is only for convenience of description and simplification of description, but it is not an indication or suggestion that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and therefore, the terms describing the positional relationship in the drawings are only used for illustrative purposes, and are not to be construed as limiting the present invention, and the specific meaning of the terms may be understood by those skilled in the art according to specific situations.
Example 1:
as shown in fig. 1, the present embodiment proposes an RC-LIGBT device with an anti-parallel freewheeling diode integrated on a substrate, the device comprising: p + emitter 1, N + electron emitter 2, P-body3, N-type drift region 4, buffer layer 5, P-type collector 6, N-type collector 7, silicon dioxide insulating layer 8, P-type substrate 9, emitter 10, gate 11, and collector 12.
The RC-LIGBT device is divided into an IGBT conductive area and a PIN diode area from top to bottom, and the IGBT conductive area and the PIN diode area are separated by a silicon dioxide insulating layer 8. The IGBT conductive region is formed by arranging a P + emitter 1, an N + electron emitter 2, a P-body3, an N type drift region 4, a buffer layer 5 and a P type collector 6. The PIN diode region is formed by a P + emitter 1, a P-type substrate 9, and an N-type collector 7. The upper side of the silicon dioxide insulating layer 8 is sequentially closely connected with the lower sides of the P-body3, the N-type drift region 4, the buffer layer 5 and the P-type collector 6, the left side of the silicon dioxide insulating layer is flush with the right side of the P + emitter 1, the right side of the silicon dioxide insulating layer is flush with the left side of the N-type collector 7, and the lower side of the silicon dioxide insulating layer is flush with the upper side of the P-type substrate 9.
When conducting in the positive direction, the IGBT conducting area is conducted without negative resistance effect and the conducting voltage drop is low; when the diode is reversely conducted, the PIN diode area is conducted, and the P-type substrate area provides a hole current path to realize the integration of the diode.
The length of the N-type drift region 4 is 18 μm, the thickness is 4 μm, and the doping concentration is 1 × 1015cm-3. The buffer layer 5 has a length of 1 μm, a thickness of 4 μm, and a doping concentration of 5 × 1016cm-3. The length of the P-body3 is 2 μm, the thickness is 2 μm, and the doping concentration is 5X 1016cm-3. The P-type collector 6 has a length of 1 μm, a thickness of 4 μm, and a doping concentration of 1 × 1019cm-3. The N-type collector 7 has a length of 1 μm, a thickness of 6 μm, and a doping concentration of 1X 1019cm-3. The P-type substrate 9 has a length of 24 μm, a thickness of 9 μm, and a doping concentration of 1 × 1014cm-3. The silicon dioxide insulating layer 8 has a length of 22 μm and a thickness of 2 μm.
Example 2:
as shown in fig. 2, an RC-LIGBT device with an anti-parallel freewheeling diode integrated on a substrate according to an embodiment of the present invention can be further expanded and applied to RESURF theory and structure. FIG. 2 includes a P + emitter 1, an N + electron emitter 2, a P-body3, an N-type drift region 4, a buffer layer 5, a P-type collector 6, an N-type collector 7, a silicon dioxide insulating layer 8, a P-type substrate 9, an emitter 10, a gate 11, a collector 12, and a P-top13, which are Double RESURF structures.
The upper side of the P-top13 region is flush with the upper side of the N-type drift region 4, and the left, lower and right sides are completely covered by the N-type drift region 4. The length of the N-type drift region 4 is 18 μm, the thickness is 4 μm, and the doping concentration is 1 × 1015cm-3. The P + emitter 1, the N + electron emitter 2 are located below the emitter 10, the left side of the N + electron emitter 2 is completely covered by the P + emitter 1, and the lower and right sides are completely covered by the P-body 3. The right side of the P-body3 is next to the left side of the N-type drift region 4, the right side of the N-type drift region 4 is next to the left side of the buffer layer 5, and the right side of the buffer layer 5 is next to the left side of the P-type collector 6. The buffer layer 5 has a length of 1 μm, a thickness of 4 μm, and a doping concentration of 5 × 1016cm-3. The P-body3, the N-type drift region 4, the buffer layer 5 and the P-type collector 6 are arranged below and next to the upper side of the silicon dioxide insulating layer 8. The length of the P-body3 is 2 μm, the thickness is 2 μm, and the doping concentration is 5X 1016cm-3. The P-type collector 6 has a length of 1 μm, a thickness of 4 μm, and a doping concentration of 1 × 1019cm-3. The left side of the silicon dioxide insulating layer 8 is next to the right of the P + emitter 1 and the left side of the N-type collector 7 is next to the right of the P-type collector 6 and the silicon dioxide insulating layer 8. The silicon dioxide insulating layer 8 has a length of 22 μm and a thickness of 2 μm. The N-type collector 7 has a length of 1 μm, a thickness of 6 μm, and a doping concentration of 1X 1019cm-3. The upper side of the P-type substrate 9 is next to the lower side of the P + emitter 1, the silicon dioxide insulating layer 8 and the N-type collector 7. The P-type substrate 9 has a length of 24 μm, a thickness of 9 μm, and a doping concentration of 1 × 1014cm-3. The lower side of the collector 12 is next to the upper side of the P-type and N-type collectors 6, 7.
In the avalanche breakdown state, the P-top13 region plays a role of assisting in depleting the N-type drift region 4, so that the breakdown voltage of the device is improved. The length of the P-top13 is 15 μm, the thickness is 2 μm, and the doping concentration is 1X 1015cm-3。
Example 3:
as shown in fig. 3, a substrate-integrated anti-parallel free-wheeling diode RC-LIGBT device preferred by the embodiment of the present invention includes a P + emitter 1, an N + electron emitter 2, a P-body3, an N-type drift region 4, a buffer layer 5, a P-type collector 6, an N-type collector 7, a silicon dioxide insulating layer 8, a P-type substrate 9, an emitter 10, a gate 11, a collector 12, and a P-type 14.
The P-type14 region is completely covered by the N-type drift region 4. The length of the N-type drift region 4 is 18 μm, the thickness is 4 μm, and the doping concentration is 1 × 1015cm-3. The P + emitter 1, the N + electron emitter 2 are located below the emitter 10, the left side of the N + electron emitter 2 is completely covered by the P + emitter 1, and the lower and right sides are completely covered by the P-body 3. The right side of the P-body3 is next to the left side of the N-type drift region 4, the right side of the N-type drift region 4 is next to the left side of the buffer layer 5, and the right side of the buffer layer 5 is next to the left side of the P-type collector 6. The buffer layer 5 has a length of 1 μm, a thickness of 4 μm, and a doping concentration of 5 × 1016cm-3. The P-body3, the N-type drift region 4, the buffer layer 5, the P-type collector 6 are located immediately below the upper side of the silicon dioxide insulating layer 8. The length of the P-body3 is 2 μm, the thickness is 2 μm, and the doping concentration is 5X 1016cm-3. The P-type collector 6 has a length of 1 μm, a thickness of 4 μm, and a doping concentration of 1 × 1019cm-3. The left side of the silicon dioxide insulating layer 8 is next to the right of the P + emitter 1 and the left side of the N-type collector 7 is next to the right of the P-type collector 6 and the silicon dioxide insulating layer 8. The silicon dioxide insulating layer 8 has a length of 22 μm and a thickness of 2 μm. The N-type collector 7 has a length of 1 μm, a thickness of 6 μm, and a doping concentration of 1X 1019cm-3. The upper side of the P-type substrate 9 is next to the lower side of the P + emitter 1, the silicon dioxide insulating layer 8 and the N-type collector 7. The P-type substrate 9 has a length of 24 μm, a thickness of 9 μm, and a doping concentration of 1 × 1014cm-3. The lower side of the collector 12 is next to the upper side of the P-type and N-type collectors 6, 7.
In the avalanche breakdown state, the P-type14 region plays a role of assisting in depleting the N-type drift region 4, so that the breakdown voltage of the device is further improved. The P-type14 has a length of 12 μm, a thickness of 1.5 μm and a doping concentration of 1X 1016cm-3。
Comparison simulation experiment:
performance simulation analysis is performed on the structure of the RC-LIGBT device in example 1 as shown in fig. 1 by adopting sentaurus simulation software, and comparison analysis is performed on the structure with the conventional LIGBT and the existing LIGBT structure. In the simulation process, the RC-LIGBT device, the conventional LIGBT device, the SSA LIGBT device, the STB LIGBT device, and the TBSA LIGBT device of example 1 have the same simulation parameters, wherein the thickness of the N drift region is 4 μm, the carrier lifetime is 10 μ s, and the ambient temperature is 300K.
FIG. 4 is a graph comparing the forward conduction characteristics of RC-LIGBT (deployed), conventional LIGBT (Conv), SSA-LIGBT-, STB-LIGBT-and TBSA-LIGBT of example 1. When conducting in the forward direction, the emitter is grounded, a positive voltage of 15V is applied to the gate, and a gradually increasing positive voltage is applied to the collector. In the forward conduction stage, the SSA LIGBT shows the most obvious Snapback effect due to the short-circuit effect of the N-collector, and the delta VSBIt was 0.27V. The RC-LIGBT device and the traditional LIGBT device in the embodiment 1 have no Snapback effect. For STB LIGBT, it still has Snapback effect, Δ VSBIs 0.12V. In addition, the conventional LIGBT and the new structure RC-LIGBT have the minimum forward voltage drop, Von0.81V and 0.84V, respectively. The new structure RC-LIGBT has no Snapback phenomenon and lower conduction voltage drop.
FIG. 5 is a graph comparing reverse conduction characteristics of RC-LIGBT (deployed), SSA-LIGBT, STB-LIGBT and TBSA-LIGBT of example 1. Because of the large anode resistance of TBSA-LIGBT, it has the worst reverse conduction characteristic and reverse conduction voltage VRIt was 5.9V. The PIN of the RC-LIGBT of the embodiment 1 is conducted, the P-type substrate region provides a hole current path to realize the integration of the diode, the reverse conduction of the diode is optimal, and the reverse conduction voltage V isRIt was 0.93V.
FIG. 6 shows RC-LIGBT (deployed), conventional LIGBT (Conv), TBSA-LIGBT, SSA-LIGBT and STB-LIGBT of example 1 in the drift region length LDGraph comparing the blocking characteristics at 18 μm. The breakdown voltage of RC-LIGBT (deployed) in example 1 is 263V maximum, and the breakdown voltages of conventional LIGBT, TBSA LIGBT, SSA LIGBT and STB LIGBT are 223V, 216V, 219V and 220V, respectively.
FIG. 7 is a graph of the potential distribution of RC-LIGBT (deployed), conventional LIGBT (Conv), TBSA-LIGBT, SSA-LIGBT and STB-LIGBT of example 1 under avalanche breakdown conditions. FIG. 7(a) is RC-LIGBT (deployed) of example 1, FIG. 7(b) is conventional LIGBT, FIG. 7(c) is TBSA LIGBT, FIG. 7(d) is SSA LIGBT, and FIG. 7(e) is STB LIGBT. Only the P-type substrate in RC-LIGBT (deployed) of example 1 has a potential distribution.
Fig. 8 shows the compromise characteristics of different LIGBTs, and the RC-LIGBT (deployed) of example 1 achieves the best compromise characteristics. At conduction voltage drop VonE of RC-LIGBT of example 1 at 1.72VoffThe minimum is 0.215mJ/cm2E of conventional LIGBT (Conv)offIs 0.41mJ/cm2A 91% reduction compared to the conventional LIGBT (Conv). When E isoffIs 0.3mJ/cm2V of RC-LIGBT and conventional LIGBT (Conv) of example 1onThe on-state voltage drop of the RC-LIGBT of example 1 is reduced by 28% compared to the conventional LIGBT (Conv), 1.42V and 1.82V, respectively. Thus, the RC-LIGBT of example 1 not only achieved no Snapback effect, but also achieved VonAnd EoffThe optimal compromise characteristic is obtained.
Fig. 9 is a schematic diagram of main process steps for manufacturing the RC-LIGBT device of example 1, the main steps are as follows:
(1) using an oxidation process to oxidize a silicon dioxide film on the surface of the device, as shown in fig. 9 (a);
(2) bonding two silicon wafers together as shown in fig. 9 (b);
(3) boron ion implantation to form P-bodies, as shown in fig. 9 (c);
(4) phosphorus ion implantation forms an N + electron emitter, and boron ion implantation forms a P + emitter, as shown in fig. 9 (d);
(5) phosphorus ion implantation forms a buffer layer, as shown in fig. 9 (e);
(6) phosphorus ion implantation forms an N-type collector, as shown in fig. 9 (f);
(7) boron ion implantation forms a P-type collector, as shown in fig. 9 (g);
(8) and depositing metal at the grid electrode, the emitter electrode and the collector electrode to form electrodes, and obtaining the RC-LIGBT device with the new structure as shown in figure 9 (h).
In summary, the RC-LIGBT device with the substrate integrated with the anti-parallel freewheeling diode provided by the invention completely eliminates the negative resistance Snapback effect of the traditional RC-IGBT and has the same conduction voltage drop Von1.72V, with a turn-off loss EoffCompared with the traditional RC-IGBT, the reduction is 91%.
Finally, the above embodiments are only intended to illustrate the technical solutions of the present invention and not to limit the present invention, and although the present invention has been described in detail with reference to the preferred embodiments, it will be understood by those skilled in the art that modifications or equivalent substitutions may be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions, and all of them should be covered by the claims of the present invention.