阅读说明：本技术 管线式的谐振与非谐振切换式电容转换电路 (Pipeline resonant and non-resonant switching type capacitance conversion circuit ) 是由 刘国基 杨大勇 白忠龙 于 2021-05-20 设计创作，主要内容包括：一种管线式的谐振与非谐振切换式电容转换电路。该切换式电容转换电路包括包括：多个电容器以及多个开关,多个开关周期性地切换多个电容器；于一第一时段,多个开关控制至少二个电容器串联于第一电源与第二电源之间,且控制至少第一电容器与第二电源并联；于一第二时段,多个开关控制至少二个电容器串联于第二电源与一接地电位之间,且控制至少第二电容器与第二电源并联,藉此周期性操作而进行第一电源与第二电源之间的电源转换。(A pipeline resonant and non-resonant switching type capacitance conversion circuit. The switched capacitor switching circuit includes: a plurality of capacitors and a plurality of switches that periodically switch the plurality of capacitors; in a first time interval, the switches control at least two capacitors to be connected in series between a first power supply and a second power supply and control at least the first capacitor to be connected in parallel with the second power supply; in a second time interval, the switches control the at least two capacitors to be connected in series between the second power supply and a ground potential and control the at least second capacitor to be connected in parallel with the second power supply, thereby periodically operating to perform power conversion between the first power supply and the second power supply.)

1. A switched capacitor converter circuit for converting a first power source to a second power source or vice versa, the switched capacitor converter circuit comprising:

at least one switching converter; and

a control circuit for controlling the switching converter;

the switching converter includes:

a plurality of capacitors; and

a plurality of switches controlled by the control circuit for periodically switching the plurality of capacitors based on a switching period;

wherein in a first period of the switching cycle, the plurality of switches control at least two of the capacitors to be electrically connected in series between the first power supply and the second power supply and control at least one of the capacitors to be electrically connected in parallel with the second power supply;

wherein the plurality of switches control at least two of the capacitors to be electrically connected in series between the second power source and a ground potential and control at least one of the capacitors to be electrically connected in parallel with the second power source during a second period of the switching cycle, wherein the capacitor connected in parallel with the second power source during the first period is different from the capacitor connected in parallel with the second power source during the second period;

thereby periodically operating to perform power conversion between the first power supply and the second power supply.

2. The switched capacitor switching circuit of claim 1 wherein the plurality of capacitors comprises a first capacitor, a second capacitor, a third capacitor coupled to each other;

wherein in the first period of the switching cycle, the plurality of switches control the first capacitor and the third capacitor to be connected in series and electrically connected between the first power supply and the second power supply, and control the second capacitor and the second power supply to be connected in parallel and electrically connected;

wherein in the second period of the switching cycle, the plurality of switches control the second capacitor and the third capacitor to be connected in series and electrically connected between the second power supply and a ground potential, and control the first capacitor and the second power supply to be connected in parallel and electrically connected;

thereby periodically operating to perform power conversion between the first power supply and the second power supply.

3. The switched capacitor converter circuit of claim 2 wherein a ratio of a first voltage of the first power supply to a second voltage of the second power supply is 4.

4. The switched capacitor converter circuit of claim 3, wherein in a steady state, a ratio of the voltage across the third capacitor to the second voltage is2, a ratio of the voltage across the first capacitor to the second voltage is1, and a ratio of the voltage across the second capacitor to the second voltage is 1.

5. The switched capacitor switching circuit of claim 2 wherein the plurality of switches comprises:

a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a seventh switch, an eighth switch, a ninth switch and a tenth switch;

wherein in the first time period, the first switch, the second switch and the third switch are turned on to control the first capacitor and the third capacitor to be connected in series between the first power source and the second power source, the fourth switch and the fifth switch are turned on to control the second capacitor and the second power source to be connected in parallel, and the sixth switch to the tenth switch are turned off;

wherein in the second time period, the sixth switch, the seventh switch and the eighth switch are turned on to control the second capacitor and the third capacitor to be connected in series between the second power supply and a ground potential, and the ninth switch and the tenth switch are turned on to control the first capacitor and the second power supply to be connected in parallel;

thereby periodically operating to perform power conversion between the first power supply and the second power supply.

6. The switched capacitor converter circuit of claim 2, wherein the switched converter further comprises at least one inductor coupled to at least one current path corresponding to the plurality of capacitors, and the plurality of switches are further configured to periodically switch the coupling of the inductor to the first capacitor and/or the second capacitor such that the inductor and the first capacitor, and/or the inductor and the second capacitor, operate in a resonant mode to achieve a power conversion between the first power source and the second power source.

7. The switched capacitor switching circuit of claim 6 further comprising one of:

(1) the at least one inductor includes a first inductor and a second inductor, wherein the first capacitor is further electrically connected in direct series with the first inductor to form a first resonant tank, and the second capacitor is further electrically connected in direct series with the second inductor to form a second resonant tank;

wherein the plurality of switches further control the first resonant tank and the third capacitor to be connected in series between the first power supply and the second power supply, and further control the second resonant tank and the second power supply to be connected in parallel during the first time period;

wherein during the second time period, the switches further control the second resonant tank and the third capacitor to be connected in series between the second power supply and a ground potential, and further control the first resonant tank and the second power supply to be connected in parallel;

(2) the inductor is coupled between the second power source and a switching node;

in the first period of the switching cycle, the switches further control the first capacitor and the third capacitor to be connected in series between the first power supply and the second power supply after being connected in series with the inductor through the switching node, and control the second capacitor to be connected in parallel with the second power supply after being connected in series with the inductor through the switching node;

wherein in the second period of the switching cycle, the switches further control the second capacitor and the third capacitor to be connected in series between the second power supply and a ground potential through the switching node and the inductor, and further control the first capacitor to be connected in series with the inductor through the switching node and then connected in parallel with the second power supply; or

(3) The at least one inductor includes a third inductor coupled between the second power source and a first switching node and a fourth inductor coupled between the second power source and a second switching node;

in the first period of the switching cycle, the switches further control the first capacitor and the third capacitor to be connected in series between the first power supply and the second power supply after being connected in series with the third inductor through the first switching node, and control the second capacitor to be connected in parallel with the second power supply after being connected in series with the fourth inductor through the second switching node;

in the second period of the switching cycle, the switches also control the second capacitor and the third capacitor to be connected in series between the second power supply and a ground potential through the second switching node and the fourth inductor, and also control the first capacitor to be connected in parallel with the second power supply after being connected in series with the third inductor through the first switching node.

8. The switched capacitor switching circuit of claim 6 wherein the capacitance of the third capacitor is substantially greater than the capacitance of the first capacitor and the second capacitor, such that the first resonant frequency of the first capacitor and the inductor and the second resonant frequency of the second capacitor and the inductor are both greater than or equal to 10 times the third resonant frequency of the third capacitor and the inductor.

9. The switched capacitor converter circuit of claim 7 wherein in feature (1) a resonant current across the inductor is a full wave ac sine wave.

10. The switched capacitor converter circuit of claim 7 wherein in feature (2) or (3) a resonant current across the inductor is a full wave rectified sine wave.

11. The switched capacitor switching circuit of claim 6 wherein at least some of the switches switch when an inductor current with respect to the inductor is 0, such that at least some of the switches achieve zero current switching.

12. The switched capacitor switching circuit of claim 11 wherein the switches of the first portion are switched with a delay time after the inductor current reaches 0, thereby freewheeling the inductor current of the inductor and causing the switches of the second portion to be zero-voltage switched; or, the switches of the first part are switched in relation to the previous period when the inductor current reaches 0, so that the switches of the second part are switched at zero voltage.

13. The switched capacitor switching circuit of claim 2 wherein in a 2-fold switching mode, a portion of the switches are constantly conducting, another portion of the switches are constantly non-conducting, and another portion of the switches are configured to switch one of the second capacitor or the third capacitor based on the switching cycle such that the capacitor is connected in series between the first power source and the second power source during a first period of the switching cycle and in parallel with the second power source during a second period of the switching cycle such that a ratio of a first voltage of the first power source to a second voltage of the second power source is 2.

14. The switched capacitor converter circuit of claim 6, wherein in a 2-fold conversion mode, a portion of the switches are constantly conducting, another portion of the switches are constantly non-conducting, and another portion of the switches are configured to switch one of the second capacitor or the third capacitor based on the switching cycle such that the capacitor and the inductor are connected in series between the first power source and the second power source during a first period of the switching cycle and connected in parallel to the second power source after the capacitor and the inductor are connected in series during a second period of the switching cycle such that a ratio of a first voltage of the first power source to a second voltage of the second power source is2, wherein the inductor and the capacitor operate in resonance to achieve a power conversion between the first power source and the second power source.

15. The switched capacitor switching circuit of claim 2 wherein in a 3-fold switching mode, a portion of the switches are constantly conducting, another portion of the switches are constantly non-conducting, another portion of the switches are configured to switch the first capacitor and the third capacitor based on the switching cycle such that the first capacitor and the third capacitor are connected in series between the first power source and the second power source during a first period of the switching cycle and the first capacitor and the third capacitor are connected in parallel to the second power source during a second period of the switching cycle such that a ratio of a first voltage of the first power source to a second voltage of the second power source is 3.

16. The switched capacitor switching circuit of claim 6 wherein in a 3 times switching mode, a portion of the plurality of switches are constantly conducting, another portion of the plurality of switches are constantly non-conducting, and another portion of the plurality of switches are configured to switch the first capacitor and the third capacitor based on the switching period, so that the first capacitor and the third capacitor are connected in series between the first power source and the second power source in a first period of the switching period, and the first capacitor and the third capacitor are connected in parallel with the second power source in a second period of the switching cycle, so that the ratio of a first voltage of the first power source to a second voltage of the second power source is 3, wherein the inductor and the first capacitor, and/or the inductor and the third capacitor, operate in a resonant manner to effect power conversion between the first power source and the second power source.

17. The switched-capacitor conversion circuit of claim 6, wherein the switched converter comprises a plurality of inductors coupled to a plurality of current paths corresponding to the plurality of capacitors, the plurality of switches configured to periodically switch the coupling of the plurality of inductors to the plurality of capacitors such that the plurality of inductors and the corresponding plurality of capacitors operate in a resonant manner to achieve power conversion between the first power source and the second power source, wherein at least two of the plurality of inductors have mutual inductance with each other.

18. The switched capacitor conversion circuit of claim 17, wherein the plurality of inductors having mutual inductance with respect to each other are configured as mutual inductors or as a transformer.

19. The switched capacitor switching circuit of claim 1 wherein the at least one switching converter comprises a first switching converter and a second switching converter, wherein the first switching converter and the second switching converter are coupled in parallel with each other between the first power source and the second power source, wherein the first switching converter and the second switching converter switch the corresponding plurality of switches of each switching converter in opposite phases to each other.

20. The switched capacitor switching circuit of claim 7 wherein the at least one switching converter comprises a first switching converter and a second switching converter, wherein the first switching converter and the second switching converter are coupled in parallel with each other between the first power source and the second power source, wherein the first switching converter and the second switching converter switch the corresponding plurality of switches of each switching converter in opposite phases to each other.

21. The switched capacitor converter circuit of claim 7, wherein the switched capacitor converter circuit of feature (3) has the third inductor and the fourth inductor both operating in continuous conduction mode.

22. The switched capacitor converter circuit of claim 21, wherein a switching frequency corresponding to the switching period is lower than a resonant frequency of the third inductor and the first capacitor and/or lower than a resonant frequency of the fourth inductor and the second capacitor.

23. The switched-capacitor converter circuit of claim 6, wherein the control circuit comprises a zero-current detection circuit for generating a zero-current detection signal according to an inductor current flowing through the inductor, wherein the plurality of switches are switched to respective inverted states when the zero-current detection signal indicates that the inductor current is 0, thereby performing power conversion between the first power source and the second power source.

24. The switched capacitor converter circuit of claim 23 wherein the control circuit further comprises a delay circuit for delaying the timing of the switches switching to their respective inverted states.

25. The switched capacitor converter circuit of claim 24, wherein the zero current detection circuit comprises a zero current estimation circuit coupled to the inductor, the first capacitor and/or the second capacitor for estimating a timing of the inductor current being 0 according to a voltage difference across the inductor, a voltage difference across the first capacitor and/or a voltage difference across the second capacitor for generating the zero current detection signal.

26. The switched capacitor switching circuit of claim 25 wherein the zero current estimation circuit comprises:

the voltage detection circuit is used for generating a voltage detection signal according to the voltage difference between the two ends of the inductor so as to indicate that the voltage difference between the two ends of the inductor exceeds a first period of zero voltage;

a ramp circuit, for generating a first ramp of a ramp signal in the first time interval according to the voltage detection signal, and continuing to generate a second ramp of the ramp signal after the first time interval is ended, wherein the slopes of the first ramp and the second ramp are opposite in phase, and the absolute values of the slopes of the first ramp and the second ramp are equal; and

a comparator, for indicating the time point when the inductor current is 0 when the second slope reaches a zero current threshold, for generating the zero current detection signal.

27. The switched capacitor converter circuit of claim 25, wherein the zero current estimation circuit estimates the inductor current to be 0 according to a peak time and a valley time of the voltage difference between the two terminals of the first capacitor and/or according to a peak time and a valley time of the voltage difference between the two terminals of the second capacitor for generating the zero current detection signal.

28. The switched-capacitor conversion circuit of claim 6 wherein the at least one inductor comprises a plurality of inductors, a plurality of inductor currents corresponding to the plurality of inductors being adjusted by:

the control circuit is further configured to generate a plurality of delay times, and adjust at least one of the plurality of delay times according to a difference between an average of the plurality of inductor currents and at least one of the plurality of inductor currents, so that the plurality of inductor currents are in a fixed ratio;

wherein the plurality of inductor currents correspond to an inductor current of the first inductor and an inductor current of the second inductor, or correspond to an inductor current of the third inductor and an inductor current of the fourth inductor;

the plurality of delay times are respectively used for delaying a charging start time or a discharging start time of each of the plurality of inductors.

29. The switched capacitor switching circuit of claim 28 wherein the fixed ratio is 1: 1.

30. the switched capacitor conversion circuit of claim 6, wherein one of the plurality of capacitors further corresponds to a distribution capacitor, one of the plurality of switches further corresponds to a pre-charge transistor electrically connected between an input power source and the distribution capacitor, wherein the input power source corresponds to one of the first power source or the second power source;

the control circuit is further configured to control the conduction degree of the pre-charge transistor and the switching of the other switches in a linear feedback manner in a pre-charge mode, so as to control the electrical connection relationship between the capacitors, and pre-charge the cross voltage of at least one of the capacitors to a corresponding preset voltage when the voltage drop of the distribution capacitor is lower than a threshold voltage.

31. The switched capacitor converter circuit of claim 30 wherein the predetermined voltage is a target voltage of an output voltage corresponding to the voltage of the other of the first power source or the second power source.

32. The switched capacitor switching circuit of claim 6 further comprising a driver circuit for driving at least a portion of the plurality of switches, the driver circuit comprising:

a plurality of drivers for generating a plurality of driving signals according to the control of the control circuit, for periodically driving a part of the plurality of switches, respectively, to perform power conversion between the first power supply and the second power supply in a resonant manner; and

a power supply circuit for providing a plurality of driving power supplies corresponding to a part of the plurality of drivers, comprising:

a voltage boost circuit for generating a boost power supply according to a frequency signal, a DC voltage and an output related signal related to an output voltage, wherein the voltage of the boost power supply is related to the sum of an input voltage and the output related signal, wherein the input voltage and the output voltage respectively correspond to a first voltage of the first power supply and a second voltage of the second power supply, or respectively correspond to the second voltage and the first voltage;

a plurality of driving capacitors, wherein the voltage across each driving capacitor corresponds to the corresponding driving power supply; and

and a plurality of supply diodes coupled in series with each other in a forward direction of the supply diodes from the boost power supply, wherein a reverse terminal of each supply diode is coupled to a positive terminal of the corresponding driving power supply for charging the corresponding driving capacitor to generate the corresponding driving power supply and for blocking reverse current and reverse voltage.

33. The switched-capacitor conversion circuit as claimed in claim 32, wherein the voltage boost circuit, the corresponding driving capacitor and the corresponding supply diode form a charge pump, and when the voltage boost circuit generates the boost power, the corresponding supply diode charges the driving capacitor according to the boost power to generate the corresponding driving power, wherein a negative terminal of the driving power is coupled to the output voltage, and the corresponding driving power is related to the input voltage.

34. The switched-capacitor conversion circuit of claim 32, wherein the voltage boost circuit, the corresponding driving capacitor, the corresponding supply diode and the corresponding switch form a bootstrap circuit, when the voltage boost circuit generates the boost power, the corresponding supply diode charges the driving capacitor according to a second boost power to generate the corresponding driving power, wherein a voltage of the negative terminal of the driving power varies with the switching of the plurality of switches, a voltage of the positive terminal of the driving power also varies with the switching of the plurality of switches, and the corresponding driving power is associated with the input voltage when in a steady state, wherein the second boost power is associated with the boost power.

35. The switched capacitor switching circuit of claim 1 further comprising an upper capacitor and a plurality of upper switches, wherein the at least one switching converter comprises a first switching converter and a second switching converter; wherein the upper capacitor, the plurality of upper switches, the first switching converter and the second switching converter are coupled to each other in a basic topology;

wherein the plurality of upper layer switches control the first switching converter and the capacitor to be connected in series between the first power supply and the second power supply and control the second switching converter to be connected in parallel with the second power supply during a first period of the switching cycle;

in a second period of the switching cycle, the plurality of upper switches control the second switching converter and the capacitor to be connected in series between the second power supply and a ground potential, and control the first switching converter and the second power supply to be connected in parallel.

36. The switched capacitor switching circuit of claim 6 further comprising an upper capacitor and a plurality of upper switches, wherein the at least one switching converter comprises a first switching converter and a second switching converter; wherein the upper capacitor, the plurality of upper switches, the first switching converter and the second switching converter are coupled to each other in a basic topology;

wherein the plurality of upper layer switches control the first switching converter and the capacitor to be connected in series between the first power supply and the second power supply and control the second switching converter to be connected in parallel with the second power supply during a first period of the switching cycle;

in a second period of the switching cycle, the plurality of upper switches control the second switching converter and the capacitor to be connected in series between the second power supply and a ground potential, and control the first switching converter and the second power supply to be connected in parallel.

37. The switched capacitor conversion circuit of claim 36 wherein a ratio of a first voltage of the first power supply to a second voltage of the second power supply is 8.

38. The switched capacitor switching circuit of claim 37 further comprising a further upper capacitor, a plurality of further upper switches, a further upper first switching converter and a further upper second switching converter, wherein the further upper capacitor, the plurality of further upper switches, the further upper first switching converter and the further upper second switching converter are further coupled to each other in a recursive development corresponding to the basic topology; wherein the first switching converter of the upper layer and the second switching converter of the upper layer correspond to the switched capacitor converting circuit of the next layer recursively.

39. A power conversion system, comprising:

the switched capacitor switching circuit of claim 6;

a voltage regulator for receiving a first stage power supply and generating an output voltage, wherein the output voltage is regulated to a predetermined level; and

and the interface and control unit is used for controlling the voltage regulator to regulate the output voltage to a preset level, and the interface and control unit is used for controlling a switching frequency of the voltage regulator and/or controlling the switching frequency of the switched capacitor conversion circuit through a communication interface so as to improve the power conversion efficiency of the power conversion system.

40. The power conversion system according to claim 39, wherein the interface and control unit controls the switching frequency of the voltage regulator and the switching frequency of the switched capacitor converter circuit to be synchronous to reduce EMI of the power conversion system.

41. The power conversion system of claim 39, wherein the switched-capacitor converter circuit adjusts the switching frequency of the switched-capacitor converter circuit by adjusting respective delay times of at least some of the plurality of switches.

Technical Field

The present invention relates to a switching capacitor converting circuit, and more particularly, to a pipeline switching capacitor converting circuit and a pipeline resonant switching capacitor converting circuit.

Background

Fig. 1A to fig. 1E show schematic diagrams of several prior art switched capacitor switching circuits. As shown, 101A-101E are sequentially respectively ladder, dickson, ferberner, serial, and voltage-doubling switched capacitor converter circuits, which can selectively convert the first power source (corresponding to V1) into the second power source (corresponding to V2) or convert the second power source into the first power source by means of charge pump or capacitor voltage division.

FIG. 2A shows a circuit schematic of a prior art switched-mode resonant cavity converter. Fig. 2B shows a characteristic curve of capacitance versus voltage for a typical capacitor. As can be seen from fig. 2B, as the voltage across the capacitor increases, the equivalent capacitance decreases abruptly. The capacitance type switching conversion circuit and the switching resonant cavity converter in the prior art have the disadvantages that the voltage across the capacitor is large, the required withstand voltage and the required volume are both increased, and the electrical property requirement can be met.

In addition, the pipeline resonant and non-resonant switching capacitor converting circuit of the invention has lower voltage across the capacitor, so that the required withstand voltage and volume can be effectively reduced, and simultaneously, the resonant frequency is more stable, and the pipeline resonant switching capacitor converting circuit of the invention has better transient response due to higher effective capacitance value under the same nominal capacitance value.

Disclosure of Invention

In one aspect, the present invention provides a switched capacitor converter circuit for converting a first power source into a second power source or converting the second power source into the first power source, the switched capacitor converter circuit comprising: at least one switching converter; and a control circuit for controlling the switching converter; the switching converter includes: a plurality of capacitors; and a plurality of switches controlled by the control circuit for periodically switching the plurality of capacitors based on a switching period; wherein in a first period of the switching cycle, the plurality of switches control at least two of the capacitors to be electrically connected in series between the first power supply and the second power supply and control at least one of the capacitors to be electrically connected in parallel with the second power supply; wherein the plurality of switches control at least two of the capacitors to be electrically connected in series between the second power source and a ground potential and control at least one of the capacitors to be electrically connected in parallel with the second power source during a second period of the switching cycle, wherein the capacitor connected in parallel with the second power source during the first period is different from the capacitor connected in parallel with the second power source during the second period; thereby periodically operating to perform power conversion between the first power supply and the second power supply.

In one embodiment, the plurality of capacitors includes a first capacitor, a second capacitor, and a third capacitor coupled to each other; wherein in the first period of the switching cycle, the plurality of switches control the first capacitor and the third capacitor to be connected in series and electrically connected between the first power supply and the second power supply, and control the second capacitor and the second power supply to be connected in parallel and electrically connected; wherein in the second period of the switching cycle, the plurality of switches control the second capacitor and the third capacitor to be connected in series and electrically connected between the second power supply and a ground potential, and control the first capacitor and the second power supply to be connected in parallel and electrically connected; thereby periodically operating to perform power conversion between the first power supply and the second power supply.

In one embodiment, a ratio of a first voltage of the first power source to a second voltage of the second power source is 4.

In an embodiment, in a steady state, a ratio of the voltage across the third capacitor to the second voltage is2, a ratio of the voltage across the first capacitor to the second voltage is1, and a ratio of the voltage across the second capacitor to the second voltage is 1.

In one embodiment, the plurality of switches includes: a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a seventh switch, an eighth switch, a ninth switch and a tenth switch; wherein in the first time period, the first switch, the second switch and the third switch are turned on to control the first capacitor and the third capacitor to be connected in series between the first power source and the second power source, the fourth switch and the fifth switch are turned on to control the second capacitor and the second power source to be connected in parallel, and the sixth switch to the tenth switch are turned off; wherein in the second time period, the sixth switch, the seventh switch and the eighth switch are turned on to control the second capacitor and the third capacitor to be connected in series between the second power supply and a ground potential, and the ninth switch and the tenth switch are turned on to control the first capacitor and the second power supply to be connected in parallel; thereby periodically operating to perform power conversion between the first power supply and the second power supply.

In one embodiment, the switching converter further includes at least one inductor coupled to at least one current path corresponding to the plurality of capacitors, and the plurality of switches are further configured to periodically switch the coupling of the inductor to the first capacitor and/or the second capacitor such that the inductor and the first capacitor, and/or the inductor and the second capacitor, operate in a resonant manner to achieve power conversion between the first power source and the second power source.

In one embodiment, the switched capacitor converter circuit further includes one of: (1) the at least one inductor includes a first inductor and a second inductor, wherein the first capacitor is further electrically connected in direct series with the first inductor to form a first resonant tank, and the second capacitor is further electrically connected in direct series with the second inductor to form a second resonant tank; wherein the plurality of switches further control the first resonant tank and the third capacitor to be connected in series between the first power supply and the second power supply, and further control the second resonant tank and the second power supply to be connected in parallel during the first time period; wherein during the second time period, the switches further control the second resonant tank and the third capacitor to be connected in series between the second power supply and a ground potential, and further control the first resonant tank and the second power supply to be connected in parallel; (2) the inductor is coupled between the second power source and a switching node; in the first period of the switching cycle, the switches further control the first capacitor and the third capacitor to be connected in series between the first power supply and the second power supply after being connected in series with the inductor through the switching node, and control the second capacitor to be connected in parallel with the second power supply after being connected in series with the inductor through the switching node; wherein in the second period of the switching cycle, the switches further control the second capacitor and the third capacitor to be connected in series between the second power supply and a ground potential through the switching node and the inductor, and further control the first capacitor to be connected in series with the inductor through the switching node and then connected in parallel with the second power supply; or (3) the at least one inductor comprises a third inductor and a fourth inductor, wherein the third inductor is coupled between the second power source and a first switching node, and the fourth inductor is coupled between the second power source and a second switching node; in the first period of the switching cycle, the switches further control the first capacitor and the third capacitor to be connected in series between the first power supply and the second power supply after being connected in series with the third inductor through the first switching node, and control the second capacitor to be connected in parallel with the second power supply after being connected in series with the fourth inductor through the second switching node; in the second period of the switching cycle, the switches also control the second capacitor and the third capacitor to be connected in series between the second power supply and a ground potential through the second switching node and the fourth inductor, and also control the first capacitor to be connected in parallel with the second power supply after being connected in series with the third inductor through the first switching node.

In one embodiment, the capacitance of the third capacitor is much larger than the capacitance of the first capacitor and the second capacitor, so that the first resonant frequency of the first capacitor and the inductor and the second resonant frequency of the second capacitor and the inductor are both higher than or equal to 10 times the third resonant frequency of the third capacitor and the inductor.

In one embodiment, in the feature (1), a resonant current of the inductor is a full-wave ac sine wave.

In one embodiment, in the feature (2) or (3), a resonant current of the inductor is a full-wave rectified sine wave.

In one embodiment, at least a portion of the switches are switched when an inductor current of the inductor is 0, such that zero current switching is achieved by at least a portion of the switches.

In one embodiment, the switches of the first portion are switched with a delay time after the inductor current reaches 0, so that the inductor current of the inductor continues to flow, and the switches of the second portion are switched at zero voltage; or, the switches of the first part are switched in relation to the previous period when the inductor current reaches 0, so that the switches of the second part are switched at zero voltage.

In one embodiment, in a 2-fold conversion mode, a part of the switches are constantly turned on, another part of the switches are constantly turned off, and another part of the switches are used for switching one of the second capacitor or the third capacitor based on the switching cycle, so that the capacitor is connected in series between the first power source and the second power source in a first period of the switching cycle, and the capacitor is connected in parallel to the second power source in a second period of the switching cycle, so that a ratio of a first voltage of the first power source to a second voltage of the second power source is 2.

In one embodiment, in a 2-fold switching mode, a part of the switches are constantly turned on, another part of the switches are constantly turned off, and another part of the switches are used for switching one of the second capacitor or the third capacitor based on the switching cycle, so that the capacitor and the inductor are connected in series between the first power source and the second power source in a first period of the switching cycle, and are connected in parallel to the second power source after the capacitor and the inductor are connected in series in a second period of the switching cycle, so that a ratio of a first voltage of the first power source to a second voltage of the second power source is2, wherein the inductor and the capacitor operate in a resonant mode to realize power switching between the first power source and the second power source.

In one embodiment, in a 3-fold conversion mode, a portion of the switches are constantly turned on, another portion of the switches are constantly turned off, and another portion of the switches are used to switch the first capacitor and the third capacitor based on the switching cycle, so that the first capacitor and the third capacitor are connected in series between the first power source and the second power source in a first period of the switching cycle, and the first capacitor and the third capacitor are connected in parallel to the second power source in a second period of the switching cycle, so that a ratio of a first voltage of the first power source to a second voltage of the second power source is 3.

In one embodiment, in a 3-fold conversion mode, a portion of the switches are constantly conductive, another portion of the switches are constantly non-conductive, and another portion of the switches are configured to switch the first capacitor and the third capacitor based on the switching cycle such that the first capacitor and the third capacitor are connected in series between the first power source and the second power source during a first period of the switching cycle and the first capacitor and the third capacitor are connected in parallel to the second power source during a second period of the switching cycle, such that a ratio of a first voltage of the first power source to a second voltage of the second power source is 3, wherein the inductor and the first capacitor, and/or the inductor and the third capacitor operate in a resonant mode to achieve power conversion between the first power source and the second power source.

In one embodiment, the switching converter includes a plurality of inductors coupled to a plurality of current paths corresponding to the plurality of capacitors, and the plurality of switches are configured to periodically switch the coupling of the plurality of inductors and the plurality of capacitors such that the plurality of inductors and the corresponding plurality of capacitors operate in a resonant manner to achieve power conversion between the first power source and the second power source, wherein at least two of the plurality of inductors have mutual inductance (coupled inductance) therebetween.

In one embodiment, the plurality of inductors having mutual inductance with each other are configured as mutual inductors (coupled inductors) or as a transformer.

In one embodiment, the at least one switching converter includes a first switching converter and a second switching converter, wherein the first switching converter and the second switching converter are coupled in parallel between the first power source and the second power source, and the first switching converter and the second switching converter switch the corresponding switches of each switching converter in opposite phases.

In an embodiment, the switched capacitor converter circuit according to the feature (3), wherein the third inductor and the fourth inductor are both operated in a continuous conduction mode.

In an embodiment, the switched capacitor converter circuit according to the feature (3), wherein a switching frequency corresponding to the switching period is lower than a resonant frequency of the third inductor and the first capacitor and/or lower than a resonant frequency of the fourth inductor and the second capacitor.

In one embodiment, the control circuit includes a zero current detection circuit for generating a zero current detection signal according to an inductor current flowing through the inductor, wherein when the zero current detection signal indicates that the inductor current is 0, the plurality of switches are switched to respective corresponding inverted states, thereby performing power conversion between the first power source and the second power source.

In an embodiment, the control circuit further includes a delay circuit for delaying the time when the switches are switched to the respective corresponding inverted states.

In one embodiment, the zero current detection circuit includes a zero current estimation circuit, coupled to the inductor, the first capacitor and/or the second capacitor, for estimating a time point when the inductor current is 0 according to a voltage difference between two ends of the inductor, a voltage difference between two ends of the first capacitor, and/or a voltage difference between two ends of the second capacitor, so as to generate the zero current detection signal.

In one embodiment, the zero current estimation circuit includes: the voltage detection circuit is used for generating a voltage detection signal according to the voltage difference between the two ends of the inductor so as to indicate that the voltage difference between the two ends of the inductor exceeds a first period of zero voltage; a ramp circuit, for generating a first ramp of a ramp signal in the first time interval according to the voltage detection signal, and continuing to generate a second ramp of the ramp signal after the first time interval is ended, wherein the slopes of the first ramp and the second ramp are opposite in phase, and the absolute values of the slopes of the first ramp and the second ramp are equal; and a comparator for indicating a time point when the inductor current is 0 when the second slope reaches a zero current threshold, so as to generate the zero current detection signal.

In one embodiment, the zero current estimation circuit estimates the time point when the inductive current is 0 according to the time point when the voltage difference between the two ends of the first capacitor reaches the peak value and the time point when the voltage difference between the two ends of the first capacitor reaches the valley value, and/or according to the time point when the voltage difference between the two ends of the second capacitor reaches the peak value and the time point when the voltage difference between the two ends of the second capacitor reaches the valley value, so as to generate the zero current detection signal.

In one embodiment, the at least one inductor includes a plurality of inductors, and a plurality of inductor currents corresponding to the plurality of inductors are adjusted by: the control circuit is further configured to generate a plurality of delay times, and adjust at least one of the plurality of delay times according to a difference between an average of the plurality of inductor currents and at least one of the plurality of inductor currents, so that the plurality of inductor currents are in a fixed ratio; wherein the plurality of inductor currents correspond to an inductor current of the first inductor and an inductor current of the second inductor, or correspond to an inductor current of the third inductor and an inductor current of the fourth inductor; the plurality of delay times are respectively used for delaying a charging start time or a discharging start time of each of the plurality of inductors.

In one embodiment, the fixed ratio is 1: 1.

in one embodiment, one of the plurality of capacitors further corresponds to a distribution capacitor, one of the plurality of switches further corresponds to a pre-charge transistor electrically connected between an input power and the distribution capacitor, wherein the input power corresponds to one of the first power or the second power; the control circuit is further configured to control the conduction degree of the pre-charge transistor and the switching of the other switches in a linear feedback manner in a pre-charge mode, so as to control the electrical connection relationship between the capacitors, and pre-charge the cross voltage of at least one of the capacitors to a corresponding preset voltage when the voltage drop of the distribution capacitor is lower than a threshold voltage.

In one embodiment, the predetermined voltage is a target voltage of an output voltage, wherein the output voltage corresponds to a voltage of the other of the first power source or the second power source.

In one embodiment, the switched capacitor converter circuit further includes a driving circuit for driving at least a portion of the plurality of switches, the driving circuit including: a plurality of drivers for generating a plurality of driving signals according to the control of the control circuit, for periodically driving a part of the plurality of switches, respectively, to perform power conversion between the first power supply and the second power supply in a resonant manner; and a power supply circuit for providing a plurality of driving power supplies corresponding to a part of the plurality of drivers, comprising: a voltage boost circuit (voltage boost) for generating a boost power according to a frequency signal, a DC voltage and an output related signal related to an output voltage, wherein the voltage of the boost power is related to a sum of an input voltage and the output related signal, wherein the input voltage and the output voltage respectively correspond to a first voltage of the first power and a second voltage of the second power, or respectively correspond to the second voltage and the first voltage; a plurality of driving capacitors, wherein the voltage across each driving capacitor corresponds to the corresponding driving power supply; and a plurality of supply diodes coupled in series with each other in a forward direction of the supply diodes from the boost power supply, wherein a reverse terminal of each supply diode is coupled to a positive terminal of the corresponding driving power supply for charging the corresponding driving capacitor to generate the corresponding driving power supply and for blocking reverse current and reverse voltage.

In one embodiment, the voltage boost circuit, the corresponding driving capacitor and the corresponding supply diode form a charge pump, and when the voltage boost circuit generates the boost power, the corresponding supply diode charges the driving capacitor according to the boost power to generate the corresponding driving power, wherein a negative terminal of the driving power is coupled to the output voltage, and the corresponding driving power is related to the input voltage.

In one embodiment, the voltage boost circuit, the corresponding driving capacitor, the corresponding supply diode and the corresponding switch form a bootstrap circuit (bootstrap), when the boost power is generated by the voltage boost circuit, the corresponding supply diode charges the driving capacitor according to a second boost power to generate the corresponding driving power, wherein a voltage of the negative terminal of the driving power varies with switching of the plurality of switches, a voltage of the positive terminal of the driving power also varies with switching of the plurality of switches, and the corresponding driving power is associated with the input voltage when in a steady state, wherein the second boost power is associated with the boost power.

In one embodiment, the switched capacitor converter circuit further comprises an upper capacitor and a plurality of upper switches, wherein the at least one switching converter comprises a first switching converter and a second switching converter; wherein the upper capacitor, the plurality of upper switches, the first switching converter and the second switching converter are coupled to each other in a basic topology; wherein the plurality of upper layer switches control the first switching converter and the capacitor to be connected in series between the first power supply and the second power supply and control the second switching converter to be connected in parallel with the second power supply during a first period of the switching cycle; in a second period of the switching cycle, the plurality of upper switches control the second switching converter and the capacitor to be connected in series between the second power supply and a ground potential, and control the first switching converter and the second power supply to be connected in parallel.

In one embodiment, the switched capacitor converter circuit further comprises an upper capacitor and a plurality of upper switches, wherein the at least one switching converter comprises a first switching converter and a second switching converter; wherein the upper capacitor, the plurality of upper switches, the first switching converter and the second switching converter are coupled to each other in a basic topology; wherein the plurality of upper layer switches control the first switching converter and the capacitor to be connected in series between the first power supply and the second power supply and control the second switching converter to be connected in parallel with the second power supply during a first period of the switching cycle; in a second period of the switching cycle, the plurality of upper switches control the second switching converter and the capacitor to be connected in series between the second power supply and a ground potential, and control the first switching converter and the second power supply to be connected in parallel.

In one embodiment, a ratio of a first voltage of the first power source to a second voltage of the second power source is 8.

In one embodiment, the switched capacitor converter circuit further comprises a further upper capacitor, a plurality of further upper switches, a further upper first switching converter and a further upper second switching converter, wherein the further upper capacitor, the plurality of further upper switches, the further upper first switching converter and the further upper second switching converter are further coupled to each other in a recursive development corresponding to the basic topology; wherein the first switching converter of the upper layer and the second switching converter of the upper layer correspond to the switched capacitor converting circuit of the next layer recursively.

In another aspect, the present invention provides a power conversion system, comprising the aforementioned switched capacitor converter circuit including an inductor; a voltage regulator for receiving a first stage power supply and generating an output voltage, wherein the output voltage is regulated to a predetermined level; and the interface and control unit is used for controlling the voltage regulator to regulate the output voltage to a preset level, and the interface and control unit is used for controlling a switching frequency of the voltage regulator and/or controlling the switching frequency of the switched capacitor conversion circuit through a communication interface so as to improve the power conversion efficiency of the power conversion system.

In one embodiment, the interface and control unit controls the switching frequency of the voltage regulator to be synchronous with the switching frequency of the switched capacitor converter circuit, so as to reduce the electromagnetic interference of the power converter system.

In an embodiment, the switching frequency of the switching capacitance conversion circuit is adjusted by adjusting respective delay times of at least some of the switches.

The purpose, technical content, features and effects of the present invention will be more readily understood by the following detailed description of specific embodiments.

Drawings

Fig. 1A to fig. 1E show schematic diagrams of several prior art switched capacitor switching circuits.

Fig. 2A shows a circuit diagram of a prior art switched capacitor switching circuit.

Fig. 2B shows a characteristic curve of capacitance versus voltage for a typical capacitor.

Fig. 3 is a schematic diagram of a non-resonant switched capacitor switching circuit according to an embodiment of the invention.

Fig. 4A to 4B are schematic diagrams illustrating an embodiment of the operation of the switched capacitor switching circuit corresponding to fig. 3.

FIG. 5 is a schematic diagram of an embodiment of a resonant switched capacitor switching circuit according to the invention.

FIG. 6 is a schematic diagram of an embodiment of a resonant switched capacitor switching circuit according to the invention.

FIG. 7 is a schematic diagram of an embodiment of a resonant switched capacitor switching circuit according to the invention.

FIG. 8 is a waveform diagram illustrating the operation of an embodiment of the resonant switched capacitor switching circuit according to the present invention.

FIG. 9 is a waveform diagram illustrating the operation of an embodiment of the resonant switched capacitor switching circuit according to the present invention.

Fig. 10A to 10B are schematic diagrams illustrating two embodiments of a non-resonant switched capacitor converter circuit according to the present invention.

Fig. 11 to 13 are schematic diagrams illustrating an embodiment of a resonant switching capacitance conversion circuit according to the present invention.

FIG. 14 is a schematic diagram of an embodiment of a non-resonant switched capacitor converter circuit according to the invention.

Fig. 15A to 15B are schematic diagrams illustrating two embodiments of resonant switched capacitor switching circuits according to the present invention.

FIG. 16 is a schematic diagram of an embodiment of a resonant switched capacitor switching circuit according to the invention.

FIG. 17 is a schematic diagram of an embodiment of a non-resonant switched capacitor converter circuit according to the invention.

Fig. 18-20 are schematic diagrams illustrating embodiments of resonant switched capacitor switching circuits according to the present invention.

FIG. 21 is a waveform diagram illustrating the operation of an embodiment of the resonant switched capacitor switching circuit according to the present invention.

FIG. 22A is a schematic diagram of a non-resonant switched capacitor converter circuit according to an embodiment of the invention.

FIG. 22B is a block diagram of a switched capacitor converter circuit according to an embodiment of the present invention.

Fig. 23-25 are schematic diagrams illustrating embodiments of resonant switched capacitor switching circuits according to the present invention.

Fig. 26A-26B are schematic diagrams illustrating embodiments of a zero current detection circuit in a resonant switched capacitor switching circuit according to the invention.

FIGS. 27A-27C are waveform diagrams illustrating operations of several embodiments of resonant switched capacitor switching circuits according to the present invention.

FIGS. 28A-28B are schematic diagrams illustrating embodiments of zero current estimation circuits in resonant switched capacitor converter circuits according to the present invention.

FIG. 29 is a waveform showing the operation of several embodiments of the resonant switched capacitor switching circuit according to the present invention.

FIG. 30 is a diagram illustrating an embodiment of a zero current estimation circuit in a resonant switched capacitor switching circuit according to the present invention.

FIG. 31 is a schematic diagram of an embodiment of a control circuit for controlling current balance in a resonant switching capacitor converting circuit according to the invention.

FIG. 32 is a waveform diagram illustrating the operation of a current balancing embodiment of the resonant switched capacitor switching circuit according to the present invention.

FIGS. 33-34 are diagrams illustrating several pre-charging embodiments of control circuits in resonant switched capacitor switching circuits according to the present invention.

Fig. 35 to 36 are waveform diagrams illustrating operations of two pre-charged embodiments of the resonant switched capacitor switching circuit according to the present invention.

Fig. 37-38 are schematic diagrams illustrating several embodiments of driving circuits in resonant switched capacitor switching circuits according to the present invention.

FIG. 39 is a schematic diagram of an embodiment of a power conversion system implemented by the resonant switched capacitor converter circuit according to the invention.

Description of the symbols in the drawings

31: zero current detection circuit

32: judgment circuit

33, 34: zero current estimation circuit

36: current sensing circuit

37: current regulation circuit

70: power supply circuit

71: voltage boosting circuit

310, 510, 610, 710, 1010A, 1210, 1410, 1510A, 1510B, 1610, 2610, 2810, 3300, 3310: switching converter

321: logic circuit

321a, 321 b: and gate

322: status circuit

322a, 322 b: flip-flop

331: voltage detection circuit

332: timing circuit

333: ramp circuit

334, 383: comparator with a comparator circuit

341: peak-valley detection circuit

362a, 362 b: switching circuit

371: averaging circuit

372a, 372 b: comparison circuit

373: delay circuit

381: amplifying circuit

382: signal decision circuit

511: first resonant tank

512: second resonance tank

750: driving circuit

910: resonant switching type capacitance conversion circuit

920: voltage regulator

930: interface and control unit

940: CPU/GPU/memory unit

950: power supply unit

1611: transformer device

1700, 1800, 1900, 2000, 2200A, 2200B, 2400, 2600A, 2800B, 3000, 3700, 3800: switching type capacitance conversion circuit

1710, 1810, 1910, 2210, 2230, 2410: first switching converter

1720, 1820, 1920, 2220, 2240, 2420: second switching converter

1811, 1812, 1821, 1822, 2311, 2312, 2321, 2322: resonance tank

2041a, 2041b, 3611a, 3611 b: voltage sensing circuit

2630, 2830A, 2830B, 3130, 3330: control circuit

38: pre-charging circuit

3900: power supply conversion system

C1, C2, C3, C11, C12, C21, Cd1, Cd7, Cd9, Cd4, CINT, Cs1, Cs2, CV1, CV 2: capacitor with a capacitor element

Cd4, Cd 9: driving capacitor

DCR1, DCR 2: parasitic resistance

Drv1, Drv4, Drv7, Drv 9: driver

Ds 1-Ds 4: supply diode

EAO: amplifying control signals

G1, G4, G7, G9: drive signal

GA, GB: control signal

GAD, GAP: control pulse

GBD, GBP: control pulse

I1: first current

I2: the second current

Iavg: average current signal

IFC1, IFC 2: communication interface

IL, IL1, IL2, IL11, IL 12: inductive current

ISN1, ISN 2: current sensing signal

L, L1, L11, L2, L12: inductor

LX, LX1, LX 2: switching node

Q1-Q10, Q21, Q28: switch with a switch body

S2, S3: driving power switch

Rcs1, Rcs 2: resistor with a resistor element

RMP: ramp signal

t2, t 4: time point

T1: time period

Ta1, Ta 2: adjusting signals

td1, td 2: delay time

TN: during negative voltage

TP: during positive voltage

V1: first voltage

V2: second voltage

Vb, Vb 1-Vb 4: heightening power supply

VC1, VC2, VC 3: over pressure

Vcd1, Vcd7, Vcd9, Vcd 4: driving power supply

VD: voltage detection signal

VL: voltage difference

VLa, VLb: voltage of

VLX: node voltage

VOUT: output voltage

Vref: reference signal

VT: ramp signal

Vth 0: zero current threshold

ZCD: zero current detection signal

Detailed Description

The drawings in the present disclosure are schematic and are intended to show the coupling relationship between circuits and the relationship between signal waveforms, and the circuits, signal waveforms and frequencies are not drawn to scale.

Fig. 3 shows a schematic diagram of a non-resonant switched capacitor switching circuit according to an embodiment of the present invention (switched capacitor switching circuit 3000). Fig. 4A to 4B are schematic diagrams illustrating an embodiment of the operation of the switched capacitor switching circuit corresponding to fig. 3.

The switched capacitor converter circuit 3000 is used to convert the first power source (corresponding to the first voltage V1 and the first current I1) into the second power source (corresponding to the second voltage V2 and the second current I2), or to convert the second power source into the first power source. In the embodiment, the switched capacitor converter circuit 3000 includes a switching converter 310, and the switching converter 310 includes a first capacitor (capacitor C1), a second capacitor (capacitor C2), a third capacitor (capacitor C3), and a plurality of switches Q1-Q10 coupled to each other.

In one embodiment, during a first period of the switching cycle (corresponding to fig. 4A), the switches Q1-Q10 control the first capacitor (capacitor C1) and the third capacitor (capacitor C3) to be connected in series between the first power source and the second power source, and control the second capacitor (capacitor C2) to be connected in parallel with the second power source, and the other end of the second capacitor (capacitor C2) is controlled to be coupled to the ground potential. Specifically, taking fig. 4A as an example, the first switches Q1, Q2 and Q3 are turned on to control the first capacitor (capacitor C1) and the third capacitor (capacitor C3) to be connected in series between the first power source and the second power source, the switches Q4 and Q5 are turned on to control the second capacitor (capacitor C2) to be connected in parallel with the second power source, and the switches Q6 to Q10 are turned off (shown in gray). In this embodiment, in the first period, the control signal GA is enabled to turn on the switch controlled by the control signal GA, and the control signal GB is disabled to turn off the switch controlled by the control signal GB.

In a second period of the switching cycle (corresponding to fig. 4B), the switches Q1-Q10 control the second capacitor (capacitor C2) and the third capacitor (capacitor C3) to be connected in series between the second power supply and the ground potential, and control the first capacitor (capacitor C1) to be connected in parallel with the second power supply. As shown in fig. 4B, in the second period of the switching cycle, the second capacitor (capacitor C2) and the third capacitor (capacitor C3) are connected in anti-series between the second power supply and the ground potential. Specifically, taking fig. 4B as an example, the switches Q6, Q7, and Q8 are turned on to control the second capacitor (capacitor C2) and the third capacitor (capacitor C3) to be connected in series between the second power source and the ground potential, the switches Q9 and Q10 are turned on to control the first capacitor (capacitor C1) to be connected in parallel with the second power source, and the switches Q1 to Q5 are turned off (shown in gray). In the present embodiment, in the second period, the control signal GA is disabled to make the switch controlled by the control signal GA non-conductive, and the control signal GB is enabled to make the switch controlled by the control signal GB conductive.

The switched capacitor converter circuit 3000 performs power conversion between the first power source and the second power source by the above-described periodic operation. In this embodiment, the ratio of the first voltage V1 to the second voltage V2 is 4.

Note that, in the second period, the second capacitor (the capacitor C2) and the third capacitor (the capacitor C3) are connected in series in an "inverted" manner, which means that the voltage across the second capacitor (the capacitor C2) is opposite to the voltage across the third capacitor (the capacitor C3) (i.e., the positive and negative terminals are opposite).

Continuing with fig. 4A and 4B, in the embodiment of converting the first power source into the second power source, during the first period (fig. 4A), the first power source charges the first capacitor (capacitor C1) and the third capacitor (capacitor C3) connected in series, and the second capacitor (capacitor C2) is discharged to supply the second power source, i.e., the second capacitor (capacitor C2) charges the capacitor CV2 coupled to the second power source. During the second period (fig. 4B), the third capacitor (capacitor C3) charges the second capacitor (capacitor C2) and the second power source.

In addition, in the embodiment of converting the second power to the first power, during the first period (fig. 4A), the second power charges the first capacitor (capacitor C1) and the third capacitor (capacitor C3) connected in series with each other, and the second power charges the second capacitor (capacitor C2). During a second period (fig. 4B), the second power source charges the first capacitor (capacitor C1), and the second power source charges the third capacitor (capacitor C3) through the second capacitor (capacitor C2).

Through the above-mentioned periodic operation, in the present embodiment, in a steady state, a ratio of the voltage across the third capacitor (the capacitor C3) to the second voltage V2 is2, a ratio of the voltage across the first capacitor (the capacitor C1) VC1 to the second voltage V2 is1, and a ratio of the voltage across the second capacitor (the capacitor C2) VC2 to the second voltage V2 is 1. In the embodiment where the second voltage V2 is 12V, the voltage across VC1 of the first capacitor (capacitor C1) and the voltage across VC2 of the second capacitor (capacitor C2) are both 12V in the steady state, and it is noted that, as shown in fig. 2B, since the voltage across the capacitor can be maintained at a lower voltage in the steady state, the capacitor can maintain a higher effective capacitance, and thus the voltage resistance and volume required by the capacitor can be effectively reduced, and the resonant frequency is more stable and has better transient response. It is also noted that the output current (e.g., corresponding to the second current I2) of the present invention is provided by two channels, thereby reducing ripple.

Capacitors CV1 and CV2, which are coupled to the first power source and the second power source, respectively, correspond to the input capacitor and the output capacitor, respectively, in the embodiment where the first power source is converted to the second power source, or correspond to the output capacitor and the input capacitor, respectively, in the embodiment where the second power source is converted to the first power source.

In an embodiment of the present invention, the switching converter further includes at least one inductor coupled to at least one current path corresponding to at least a portion of the plurality of capacitors (e.g., C1-C2), and the plurality of switches (e.g., Q1-Q10) are further configured to periodically switch the coupling of the inductor L to the first capacitor (e.g., C1) and/or the second capacitor (e.g., C2), such that the inductor L and the first capacitor (e.g., C1), and/or the inductor L and the second capacitor (e.g., C2) operate in a resonant manner to achieve power conversion between the first power source and the second power source.

Referring to fig. 5, fig. 5 is a schematic diagram illustrating a resonant switched capacitor switching circuit according to an embodiment of the invention. The switching converter 510 in this embodiment is similar to the switching converter 310 of fig. 3, except that the switching converter 510 further includes an inductor L1 and an inductor L2, a first capacitor (capacitor C1) is directly electrically connected in series with the inductor L1 to form a first resonant tank 511, and a second capacitor (capacitor C2) is directly electrically connected in series with the inductor L2 to form a second resonant tank 512. In one embodiment, during the first period of the switching cycle, the switches Q1-Q10 control the first resonant tank 511 and the third capacitor (capacitor C3) to be connected in series between the first power supply and the second power supply, and control the second resonant tank 512 to be connected in parallel with the second power supply. On the other hand, in the second period of the switching cycle, the plurality of switches Q1 to Q10 control the second resonant tank 512 and the third capacitor (capacitor C3) to be connected in series between the second power supply and the ground potential, and control the first resonant tank 511 to be connected in parallel with the second power supply, and the switching converter 510 realizes power conversion between the first power supply and the second power supply by operating in a resonant manner through the above-described periodic operation. The details of the control of the switches Q1-Q10 can be found in the embodiments of FIGS. 4A-4B.

FIG. 6 is a schematic diagram of an embodiment of a resonant switched capacitor switching circuit according to the invention. The switching converter 610 of this embodiment is similar to the switching converter 310 of FIG. 3, except that the switching converter 610 further includes an inductor L coupled between the second power source and a switching node LX, and during a first period of a switching cycle, a plurality of switches Q1-Q10 control a first capacitor (capacitor C1) and a third capacitor (capacitor C3) to be connected in series between the first power source and the second power source after being connected in series with the inductor L through the switching node LX, and control a second capacitor (capacitor C2) to be connected in parallel with the second power source after being connected in series with the inductor L through the switching node LX. On the other hand, in the second period of the switching cycle, the switches Q1-Q10 control the second capacitor (capacitor C2) and the third capacitor (capacitor C3) to be connected in series with the inductor L between the second power source and the ground potential through the switching node LX, and control the first capacitor (capacitor C1) to be connected in series with the inductor L through the switching node LX before being connected in parallel with the second power source. In the present embodiment, the first capacitor (capacitor C1), the second capacitor (capacitor C2), and the third capacitor (capacitor C3) perform switching between the first power source and the second power source by resonating with the inductor L. The details of the control of the switches Q1-Q10 can be found in the embodiments of FIGS. 4A-4B.

It should be noted that the capacitor of the present embodiment and the inductor perform resonance in the charging and discharging processes, so that the surge current of the capacitor during charging and discharging can be effectively reduced, and zero current switching control or zero voltage switching control can be realized through the resonance characteristic.

FIG. 7 is a schematic diagram of an embodiment of a resonant switched capacitor switching circuit according to the invention. The switching converter 710 in this embodiment is similar to the switching converter 310 of fig. 3, except that the switching converter 710 further includes an inductor L1 and an inductor L2, wherein the inductor L1 is coupled between the second power source and the first switching node LX1, and the inductor L2 is coupled between the second power source and the second switching node LX 2. In a first period of a switching cycle of the switching cycle, the switches Q1-Q10 control a first capacitor (capacitor C1) and a third capacitor (capacitor C3) to be connected in series between the first power source and the second power source after being connected in series with the inductor L1 through the first switching node LX, and control a second capacitor (capacitor C2) to be connected in series with the inductor L2 through the second switching node LX, and then to be connected in parallel with the second power source. On the other hand, in the second period of the switching cycle, the switches Q1-Q10 control the second capacitor (capacitor C2) and the third capacitor (capacitor C3) to be connected in series with the inductor L2 through the second switching node LX between the second power supply and the ground potential, and control the first capacitor (capacitor C1) to be connected in series with the inductor L1 through the first switching node LX before being connected in parallel with the second power supply. The details of the control of the switches Q1-Q10 can be found in the embodiments of FIGS. 4A-4B.

In one embodiment, as mentioned above, the capacitance of the third capacitor C3 in the embodiments of fig. 5 to 7 is much larger than the capacitance of the first capacitor (capacitor C1) and the second capacitor (capacitor C2), so that the first resonant frequency of the first capacitor (capacitor C1) and the inductor and the second resonant frequency of the second capacitor (capacitor C2) and the inductor are much higher than the third resonant frequency of the third capacitor (capacitor C3) and the inductor, and in a preferred embodiment, the first resonant frequency and the second resonant frequency are both greater than or equal to 10 times the third resonant frequency.

Fig. 8 shows waveforms corresponding to the operation of the embodiment of fig. 5. Resonant currents (i.e., inductor currents IL1 and IL2) in inductors L1 and L2 and voltages VC1, VC2, and VC3 across capacitors C1, C2, and C3, respectively, are full-wave ac sinusoidal waves. Specifically, in the present embodiment, the first power source is converted into the second power source, wherein the ripple of the second voltage V2 and the second current I2 (corresponding to the output voltage and the output current) and the ripple of the voltage across VC3 of the third capacitor (capacitor C3) are very low, and the voltage across VC1 and VC2 of the first capacitor (capacitor C1) and the second capacitor (capacitor C2) are also maintained at a low dc level.

Fig. 9 shows waveforms corresponding to the embodiments of fig. 6 and 7. The resonant currents (i.e. the inductor currents IL, IL1, IL2) in the inductors L (corresponding to the embodiment of fig. 6), L1 and L2 (corresponding to the embodiment of fig. 7) are full-wave rectified sine waves, in other words, the resonant currents IL, IL1, IL2 are full-wave rectified sine waves larger than 0 in this embodiment.

To continue with fig. 9, in one aspect, in an embodiment, at least a portion of the switches Q1-Q10 switch when the inductor current (IL, IL1, IL2) of the inductor (L, L1, L2) is 0, such that the at least a portion of the switches achieve zero current switching. The control method of zero current switching will be described in detail later.

Fig. 10A to 10B are schematic diagrams illustrating two embodiments of a non-resonant switched capacitor converter circuit according to the present invention. The pipeline resonant and non-resonant switching type capacitance conversion circuit can also be operated in conversion modes of different multiples by controlling a plurality of switches of one part to be in constant conduction and controlling a plurality of switches of the other part to be in constant conduction. Specifically, for example, the switching converter 310 can be operated in a 2-fold conversion mode, in which a part of the switches Q1-Q10 are constantly turned on, another part of the switches Q1-Q10 are constantly turned off, and another part of the switches Q1-Q10 are used to switch one of the second capacitor (capacitor C2) or the third capacitor (capacitor C3) based on a switching cycle, so that the capacitor is connected in series between the first power source and the second power source in a first period of the switching cycle, and is connected in parallel to the second power source in a second period of the switching cycle, so that a ratio of a first voltage V1 of the first power source to a second voltage V2 of the second power source is 2.

The switching converter 1010A shown in fig. 10A corresponds to the switching converter 310 of fig. 3, in the present embodiment, the switching converter 1010A operates in a 2-fold switching mode, in which the switch Q1 is constantly turned on (shown by short circuit), the switches Q2, Q3, Q8-Q10 are constantly turned off, the switches Q4-Q7 are used to switch the second capacitor (capacitor C2) based on the switching cycle, so that the second capacitor (capacitor C2) is connected in series between the first power source and the second power source in a first period of the switching cycle, and the second capacitor (capacitor C2) is connected in parallel to the second power source in a second period of the switching cycle, so that a ratio of the first voltage V1 of the first power source to the second voltage V2 of the second power source is 2. In this embodiment, since the switches Q2, Q3, and Q8 to Q10 are constantly off, at least one end of each of the first capacitor (capacitor C1) and the third capacitor (capacitor C3) is constantly floating.

In another embodiment, the switching converter 1010B shown in fig. 10B corresponds to the switching converter 310 of fig. 3, in this embodiment, the switching converter 1010B operates in a 2-fold switching mode, in which the switches Q4 and Q9 are constantly turned on (shown as a short circuit), the switches Q3, Q5, Q6 and Q10 are constantly turned off, the switches Q1, Q2, Q7 and Q8 are used to switch the third capacitor C3 based on a switching cycle, so that the third capacitor C3 is connected in series between the first power source and the second power source in a first period of the switching cycle, and the third capacitor C3 is connected in parallel with the second power source in a second period of the switching cycle, so that a ratio of a first voltage V1 of the first power source to a second voltage V2 of the second power source is 2. In this embodiment, since the switches Q3, Q5, Q6, and Q10 are constantly off, at least one end of each of the first capacitor C1 and the second capacitor C2 is constantly floating.

Fig. 11 to 13 are schematic diagrams illustrating an embodiment of a resonant switching capacitance conversion circuit according to the present invention. The switching converter 1110 shown in fig. 11 may correspond to the switching converter 510 of fig. 5, and the operation of its switches is similar to that of the switching converter 1010A of fig. 10A, specifically, in the present embodiment, in the 2-fold switching mode, the switch Q1 of the switching converter 1110 is constantly turned on (shown as a short circuit), the switches Q2, Q3, Q8-Q10 are constantly turned off, and the switches Q4-Q7 are configured to switch the second capacitor (capacitor C2) based on the switching cycle, so as to connect the second capacitor (capacitor C2) and the inductor L2 in series between the first power source and the second power source in the first period of the switching cycle, and connect the second capacitor (capacitor C2) and the inductor L2 in series in the second period of the switching cycle, so that the ratio of the first voltage V1 of the first power source and the second voltage V2 of the second power source is2, wherein the second capacitor (capacitor C2) and the inductor L operate in a resonant manner to realize the switching between the first power source and the second power source. In this embodiment, since the switches Q2, Q3, and Q8 to Q10 are constantly off, at least one end of each of the resonance tank 1111 (the first capacitor (capacitor C1), the inductor L1) and the third capacitor (capacitor C3) is constantly floating.

The switching converter 1210 shown in fig. 12 may correspond to the switching converter 610 of fig. 6, and the operation of the switches thereof is similar to that of the switching converter 1010A of fig. 10A, specifically, in the present embodiment, in the 2-fold conversion mode, the switch Q1 of the switching converter 1210 is constantly turned on (shown as a short circuit), the switches Q2, Q3, Q8-Q10 are constantly turned off, the switches Q4-Q7 are used to switch the second capacitor (capacitor C2) based on the switching cycle, so that the second capacitor (capacitor C2) is controlled to be connected in series between the first power source and the second power source after being connected in series with the inductor L through the switching node LX during the first period of the switching cycle, and the second capacitor (capacitor C2) is controlled to be connected in parallel with the second power source after being connected in series with the inductor L through the switching node LX during the second period of the switching cycle, in other words, the switches Q4-Q7 are connected in the second period of the switching cycle, the second capacitor (capacitor C2) is controlled to be connected in series between the second power source and the ground potential through the switching node LX and the inductor L such that the ratio of the first voltage V1 of the first power source to the second voltage V2 of the second power source is2, wherein the second capacitor (capacitor C2) and the inductor L operate in a resonant manner to realize power conversion between the first power source and the second power source. In this embodiment, since the switches Q2, Q3, and Q8 to Q10 are constantly off, at least one end of each of the first capacitor (capacitor C1) and the third capacitor (capacitor C3) is constantly floating.

The switching converter 1310 shown in fig. 13 may correspond to the switching converter 710 shown in fig. 7, and the operation of the switches thereof is similar to that of the switching converter 1010A shown in fig. 10A, specifically, in the present embodiment, in the 2-fold conversion mode, the switches Q4, Q9 of the switching converter 1310 are constantly turned on (shown as short-circuited), the switches Q3, Q5, Q6, Q10 are constantly turned off, the switches Q1, Q2, Q7, Q8 are used to switch the third capacitor C3 based on the switching cycle, so that in the first period of the switching cycle, the third capacitor (capacitor C3) is controlled to be connected in series between the first power source and the second power source after being connected in series with the inductor L through the switching node LX, and in the second period of the switching cycle, the third capacitor (capacitor C3) is controlled to be connected in series with the inductor L through the switching node LX and then connected in parallel with the second power source, in other words, the switches Q4-Q7 are switched in the second period of the switching cycle, the third capacitor (capacitor C3) is controlled to be connected in series between the second power source and the ground potential through the switching node LX and the inductor L such that the ratio of the first voltage V1 of the first power source to the second voltage V2 of the second power source is2, wherein the third capacitor (capacitor C3) and the inductor L operate in a resonant manner to realize power conversion between the first power source and the second power source. In this embodiment, since the switches Q3, Q5, Q6, and Q10 are constantly off, at least one end of each of the first capacitor C1 and the second capacitor (capacitor C2) is constantly floating.

FIG. 14 is a schematic diagram of an embodiment of a non-resonant switched capacitor converter circuit according to the invention. The switching converter 1410 shown in fig. 14 corresponds to the switching converter 310 of fig. 3, in the present embodiment, the switching converter 1410 operates in a 3-fold switching mode, in which the switch Q4 is constantly turned on (shown by a short circuit), the switches Q5, Q6 are constantly turned off, the switches Q1-Q3, Q7-Q10 are used to switch the first capacitor (capacitor C1) and the third capacitor (capacitor C3) based on the switching period, so as to control the first capacitor (capacitor C1) and the third capacitor (capacitor C3) to be connected in series between the first power source and the second power source in a first period of the switching period, and control the first capacitor (capacitor C1) and the third capacitor (capacitor C3) to be connected in parallel to the second power source in a second period of the switching period, so that a ratio of the first voltage V1 of the first power source and the second voltage V2 of the second power source is 3. In this embodiment, since the switches Q5 and Q6 are not conductive constantly, one end of the second capacitor (capacitor C2) is also floating constantly.

Fig. 15A to 15B are schematic diagrams illustrating two embodiments of resonant switched capacitor switching circuits according to the present invention. The switching converter 1510A shown in fig. 15A may correspond to the switching converter 610 of fig. 6, and the operation of the switches thereof is similar to the switching converter 1410 of fig. 14, specifically, in the present embodiment, in the 3-fold switching mode, the switch Q4 of the switching converter 1510A is constantly turned on (shown as a short circuit), the switches Q5, Q6 are constantly turned off, the switches Q1-Q3, Q7-Q10 are used to switch the first capacitor (capacitor C1) and the third capacitor (capacitor C3) based on the switching period, so as to control the first capacitor (capacitor C1), the third capacitor (capacitor C3) and the inductor L to be connected in series between the first power source and the second power source in the first period of the switching period, and control the first capacitor (capacitor C1) and the third capacitor (capacitor C3) to be connected in series with the inductor L and then connected in parallel with the second power source, the ratio of the first voltage V1 of the first power source to the second voltage V2 of the second power source is 3, wherein the first capacitor (capacitor C1) and the third capacitor (capacitor C3) operate in resonance with the inductor L to realize power conversion between the first power source and the second power source. In this embodiment, since the switches Q5 and Q6 are constantly off, one end of the second capacitor (capacitor C2) is also constantly floating.

The switching converter 710 shown in fig. 15B may correspond to the switching converter 710 shown in fig. 7, and the operations of the switches thereof are similar to the switching converter 1510A, except that in the first period of the switching cycle, the first capacitor (capacitor C1), the third capacitor (capacitor C3) and the inductor L1 of the switching converter 1510B are connected in series between the first power source and the second power source, and in the second period of the switching cycle, the first capacitor (capacitor C1) and the third capacitor (capacitor C3) are connected in series with the inductor L1 and the inductor L2, respectively, and then connected in parallel with the second power source, so that the ratio of the first voltage V1 to the second voltage V2 is 3. The details of the operation of the switch can be found in the embodiment of fig. 15A.

It should be noted that, the ratio of the first voltage V1 to the second voltage V2 can be set to be several different multiples by the way that some switches are constantly on, some switches are constantly off, and other switches are switched according to the required mode, in the switch and device configurations of fig. 10A, 10B, 11-14, 15A, and 15B, respectively, corresponding to the switches and devices of fig. 3 and 5-7. Fig. 10A, 10B, 11 to 14, 15A and 15B are equivalent circuit diagrams showing the embodiments of fig. 3 and 5 to 7, in which the switch that is not conductive constantly and the capacitor that is floating constantly are omitted to simplify the drawing.

FIG. 16 is a schematic diagram of an embodiment of a resonant switched capacitor switching circuit according to the invention. The switching converter 1610 shown in fig. 16 is similar to the switching converter 710 shown in fig. 7, in the embodiment, the inductors L1 and L2 of the switching converter 1610 have mutual inductance, so that the inductor currents IL1 and IL2 of the switching converter 1610 can have better current balance, and the capacitors C1 and C2 can have better voltage balance.

In one embodiment, inductors L1 and L2 may be configured as mutual inductors (e.g., transformer), or as a transformer (e.g., 1611).

FIG. 17 is a schematic diagram of an embodiment of a non-resonant switched capacitor converter circuit according to the invention. In one embodiment, the switched capacitor converter circuit 1700 includes a first switching converter 1710 and a second switching converter 1720, the first switching converter 1710 and the second switching converter 1720 are coupled in parallel between the first power source and the second power source, in this embodiment, the first switching converter 1710 and the second switching converter 1720 correspond to the switching converter 310 of fig. 3, for example, in this embodiment, the output power can be increased or the ripple current and the ripple current can be reduced by a plurality of switching converters operating in parallel. The term "parallel connection" of the switching converters means that the input ends of the switching converters are electrically connected to each other, for example, the first power supply, and the output ends of the switching converters are electrically connected to each other, for example, the second power supply.

In one embodiment, the first switching converter 1710 and the second switching converter 1720 switch the corresponding switches in each switching converter with opposite phases to each other to perform power conversion in an interleaved manner, specifically, as shown in fig. 17, the control signals GA and GB of the switches Q1-Q10 of the first switching converter 1710 are in phase with the switching converter 310 of fig. 3, and the control signals GA and GB of the switches Q11-Q20 of the first switching converter 1720 are in anti-phase with the switching converter 310 of fig. 3 (and thus are also in anti-phase with the first switching converter 1710).

Fig. 18-20 are schematic diagrams illustrating embodiments of resonant switched capacitor switching circuits according to the present invention.

The switched capacitor switching circuit 1800 of fig. 18 is similar to the switched capacitor switching circuit 1700 of fig. 17, and the switched capacitor switching circuit 1800 includes a first switching converter 1810 and a second switching converter 1820, with the difference that the first switching converter 1810 and the second switching converter 1820 further include inductors L1, L2, L11, and L12, which are respectively connected in series with capacitors C1, C2, C11, and C12 to form resonant tanks 1811, 1812, 1821, and 1822. Like the switched capacitor converter circuit 1700 of fig. 17, the first and second switching converters 1810 and 1820 are operated in an interleaved manner to perform power conversion, and the first and second switching converters 1810 and 1820 are each similar to the switching converter 510 of fig. 5 to perform power conversion in a resonant manner.

The switched-capacitor converter circuit 1900 of fig. 19 is similar to the switched-capacitor converter circuit 1700 of fig. 17, and the switched-capacitor converter circuit 1900 includes a first switching converter 1910 and a second switching converter 1920, which are different in that the first switching converter 1910 and the second switching converter 1920 further include inductors L1, L2, L11 and L12, respectively, and are connected in series with the current paths corresponding to the capacitors C1, C2, C11 and C12, respectively, in a manner similar to the embodiment of fig. 7. Like the switched capacitor converter circuit 1700 of fig. 17, the first switching converter 1910 and the second switching converter 1920 are operated in an interleaved manner to perform power conversion, and the first switching converter 1910 and the second switching converter 1920 are respectively similar to the switching converter 710 of fig. 7, so as to perform power conversion in a resonant manner.

The switched capacitor converter circuit 2000 of fig. 20 is similar to the switched capacitor converter circuit 1900 of fig. 19, and the inductors L1, L2, L11, and L12 of the switched capacitor converter circuit 2000 have mutual inductance, so that the inductor currents IL1, IL2, IL11, and IL12 of the switched capacitor converter circuit 2000 can have better current balance, and the capacitors C1, C2, C11, and C12 can also have better voltage balance. In one embodiment, the switched capacitor converter circuit 2000 may be configured with the inductors L1, L2, L11, and L12 having mutual inductance with each other, or with mutual inductance between only some of the inductors, as desired. In one embodiment, the inductors L1, L2, L11, L12 may be configured as at least one transformer.

FIG. 21 is a waveform diagram illustrating the operation of an embodiment of the resonant switched capacitor switching circuit according to the present invention. Fig. 21 corresponds to the embodiment of fig. 7, for example, in this embodiment, the inductor L1 and the inductor L2 are both operated in the continuous conduction mode, so that the ripple current and the ripple current can be further reduced. As shown in fig. 21, the inductor currents IL1 and IL2 show that the inductor L1 and the inductor L2 both operate in the continuous conduction mode, and the voltage across the capacitors (C1, C2, C3) VC1, VC2, and VC3, the ripple voltage of the second voltage V2, and the ripple currents of the inductor currents IL1 and IL2 and the second current I2 are all greatly reduced.

In addition, in the embodiment (for example, fig. 21) in which the plurality of inductors operate in the continuous conduction mode, the switching frequency (for example, the frequency of the voltage VC1 corresponding to the capacitor C1 in fig. 21) corresponding to the switching period does not need to precisely correspond to the resonant frequency of the inductor L1 and the first capacitor (capacitor C1) and the resonant frequency of the inductor L2 and the second capacitor (capacitor C2), and in a preferred embodiment, the switching frequency may be lower than the resonant frequency of the inductor L1 and the first capacitor (capacitor C1) and/or lower than the resonant frequency of the inductor L2 and the second capacitor (capacitor C2), so that the resonant switched capacitor switching circuit of the present invention has a higher tolerance for the variation of the inductance values of the inductors (e.g., L1, L2) and the variation of the capacitance values of the capacitors (e.g., C1, C2).

Referring to fig. 22A and 22B, fig. 22A is a schematic diagram of a non-resonant switched capacitor converter circuit according to an embodiment of the invention. FIG. 22B is a block diagram of a switched capacitor converter circuit according to an embodiment of the present invention.

The switched capacitor converter circuit 2200A shown in fig. 22A includes a first switching converter 2210 and a second switching converter 2220, and an upper capacitor (capacitor C21) and a plurality of upper switches (Q21, Q28), wherein the first switching converter 2210 and the second switching converter 2220 may correspond to the switching converter 310 of fig. 3, for example. In one aspect, the switched capacitor converting circuit 2200A shown in fig. 22A is configured to have more layers based on the switched converter 310 of fig. 3, and specifically, the upper layer capacitor (capacitor C21), the plurality of upper layer switches (switches Q21, Q28), the first switched converter 2210 and the second switched converter 2220 are coupled to each other in a basic topology, which is described in reference to fig. 22B, and in one embodiment, the basic coupling relationship between the upper layer capacitor (capacitor C21), the plurality of upper layer switches Q21, Q28, the first switched converter 2210 and the second switched converter 2220 is described in detail.

Referring to fig. 22B, in an embodiment, according to the basic topology described above, an input terminal of the first switching converter 2210 (corresponding to 2230, fig. 22B) and one end of the upper capacitor (capacitor C21) are electrically connected to each other, an input terminal of the second switching converter 2220 (corresponding to 2240, fig. 22B) and the other end of the upper capacitor (capacitor C21) are electrically connected to each other, and further, an output terminal of the first switching converter 2210, an output terminal of the second switching converter 2220 and the second power source are electrically connected to each other.

In a first period of the switching cycle (e.g., corresponding to the control signal GA being enabled and the control signal GB being disabled), the switches (e.g., the switches Q11-Q20) of the first switching converter 2210 and the upper switches (e.g., the switches Q21, Q28) control the upper capacitor (the capacitor C21) to be connected in series with the first switching converter 2210 and establish at least one current path between the first power source and the second power source, and the switches (e.g., the switches Q21, Q28) of the second switching converter 2220 and the switches (e.g., the switches Q1-Q10) of the second switching converter 2220 control the upper capacitor C21 and the second switching converter 2220 to be open and control the second switching converter 2220 to establish at least one current path between the second power source and the ground potential.

On the other hand, in a second period of the switching cycle (e.g., corresponding to the control signal GA being disabled and the control signal GB being enabled), the plurality of upper switches (Q21, Q28) and the plurality of switches (Q1-Q10) of the second switching converter 2220 control the second switching converter 2220 and the upper capacitor (capacitor C21) to be connected in series between the second power supply and the ground potential and establish at least one current path between the second power supply and the ground potential, and the plurality of upper switches (Q21, Q28) and the plurality of switches (Q11-Q20) of the first switching converter 2210 control the upper capacitor (capacitor C21) and the first switching converter 2210 to be disconnected and control the first switching converter 2210 to establish at least one current path between the second power supply and the ground potential.

The current paths are, for example, current paths established by the switches that are turned on correspondingly when the control signal GA is enabled or the control signal GB is enabled.

In this embodiment, the ratio of the first voltage V1 to the second voltage V2 shown in fig. 22A is 8. In detail, in steady state, the voltage across capacitor C21 is 4 × V2, the voltage across capacitors C3 and C13 (both corresponding to the third capacitor in the previous embodiments) are 2 × V2, and the voltage across capacitors C1, C11 (both corresponding to the first capacitor in the previous embodiments), C2, C12 (both corresponding to the second capacitor in the previous embodiments) are V2.

With continuing reference to FIG. 22B, according to the present invention, the number of stages of the pipeline switched capacitor converter circuit can be recursively expanded through the basic topology of FIG. 22B, thereby achieving a higher conversion ratio between the first voltage and the second voltage. As shown in fig. 22B, any pipeline-switched capacitor converting circuit (e.g., corresponding to the N-layer pipeline-switched capacitor converting circuit in the figure, where N is an integer greater than or equal to 2) having the basic topology of fig. 22B may be used to replace the first switching converter 2230 and the second switching converter 2240, so as to obtain a pipeline-switched capacitor converting circuit with a higher layer number, i.e., the pipeline-switched capacitor converting circuit 2200B will become an N + 1-layer pipeline-switched capacitor converting circuit.

For example, if the pipeline switched capacitor converting circuit 2200A of fig. 22A is substituted into the first switching converter 2230 and the second switching converter 2240 of fig. 22B, the pipeline switched capacitor converting circuit 2200B of fig. 22B would be configured as 16: 1, the same substituting configuration can continuously and repeatedly increase the layer number, thereby continuously increasing the conversion multiple of the power supply.

In this embodiment (16: 1 switched capacitor converting circuit), the first switching converter 2210 and the second switching converter 2220 shown in fig. 22A can be regarded as pipeline switched capacitor converting circuits of the bottom layer (1 layer), which have the structure corresponding to the switching converter 310 shown in fig. 3, while the pipeline switched capacitor converting circuit 2200A shown in fig. 22A can be regarded as pipeline switched capacitor converting circuits of 2 layers, and further, the pipeline switched capacitor converting circuit 2200B shown in fig. 22B can be regarded as pipeline switched capacitor converting circuits of 3 layers by substituting the pipeline switched capacitor converting circuit 2200A shown in fig. 22A into the first switching converter 2230 and the second switching converter 2240 shown in fig. 22B.

Fig. 23-25 are schematic diagrams illustrating embodiments of resonant switched capacitor switching circuits according to the present invention.

The switching capacitance converting circuit 2300 shown in fig. 23 is similar to the switching capacitance converting circuit 2200A shown in fig. 22A, wherein the first switching converter 2310 and the second switching converter 2320 are further configured with resonant slots, i.e., resonant slots 2311, 2312, 2321, 2322, in other words, the switching capacitance converting circuit 2300 performs a switching operation in a manner similar to the switching capacitance converting circuit 2200A, so as to perform a conversion between the first power source and the second power source in a resonant manner through the resonant slots 2311, 2312, 2321, 2322, in this embodiment, a ratio of the first voltage V1 to the second voltage V2 is also 8.

The switched capacitor converting circuit 2400 shown in fig. 24 is similar to the switched capacitor converting circuit 2200A shown in fig. 22A, wherein the first and second switching converters 2410 and 2420 are further configured with the inductors as shown in the embodiment of fig. 7, i.e., the inductors L1, L2, L11 and L12, in other words, the switched capacitor converting circuit 2300 performs the switching operation in a manner similar to the switched capacitor converting circuit 2200A, and further performs the conversion between the first and second power sources in the resonant manner as shown in the embodiment of fig. 7 through the inductors L1, L2, L11 and L12 and the corresponding capacitors, in this embodiment, the ratio of the first voltage V1 to the second voltage V2 is also 8.

The switched capacitor converter circuit 2500 of fig. 25 is similar to the switched capacitor converter circuit 2400 of fig. 24, and the inductors L1, L2, L11, and L12 in the switched capacitor converter circuit 2500 have mutual inductance, so that the inductor currents IL1, IL2, IL11, and IL12 of the switched converter circuit 2500 have better current balance, and the capacitors C1, C2, C11, and C12 also have better voltage balance. In one embodiment, the switched capacitor converter circuit 2500 may be configured such that the inductors L1, L2, L11, and L12 all have mutual inductance with each other, or only some of the inductors have mutual inductance, as desired. In one embodiment, the inductors L1, L2, L11, L12 may be configured as at least one transformer.

Fig. 26A-26B are schematic diagrams illustrating embodiments of a resonant switched capacitor switching circuit and a zero current detection circuit therein according to the invention. Fig. 27A to 27C show operation waveform diagrams corresponding to the embodiment of fig. 26A to 26B.

The switched capacitor converter circuit 2600A of fig. 26A includes a switching converter 2610 and a control circuit 2630, the configuration of the switching converter 2610 is the same as that of the switching converter 710 of fig. 7, the control circuit 2630 is configured to generate control signals (e.g., a control signal GA and a control signal GB) to control switches (e.g., switches Q1 to Q10) of the switching converter 2610, the control circuit 2630 includes a zero current detection circuit 31 and a determination circuit 32, the zero current detection circuit 31 is configured to generate a zero current detection signal ZCD according to inductor currents IL1 and IL2 flowing through inductors L1 and L2, in the embodiment, the zero current detection circuit 31 detects the inductor current IL, which corresponds to the sum of the inductor currents IL1 and IL 2. In one embodiment, when the zero current detection signal ZCD indicates that the inductor current IL is 0, the switches Q1-Q10 are switched to their respective inverted states, thereby performing power conversion between the first power source and the second power source. Specifically, taking fig. 27A as an example, when the inductor current IL is 0 (representing that any one of the inductor currents IL1 and IL2 is turned to 0 in the embodiment), the control signal GA and the control signal GB are turned to opposite-phase levels respectively, so as to control the switches Q1 to Q10 to switch to the corresponding opposite-phase states respectively. In one embodiment, when the resonant frequency of the inductor current IL1 is equal to the resonant frequency of IL2, as shown, 50% of the switching period is between any two adjacent 0 current points of IL.

Referring to fig. 26A, in an embodiment, the zero current detection circuit 31 includes a current sensing circuit 311 and a comparator 312, and the current sensing circuit 321 is used for sensing the inductor current IL. The comparator 322 is configured to compare the sensed current-related signal with a reference signal Vref, and to generate a zero-current detection signal ZCD to indicate a time point when the inductor current IL reaches 0 current.

Referring to fig. 26A, in an embodiment, the determining circuit 32 includes a logic circuit 321 and a state circuit 322, the logic circuit 321 is configured to generate a control pulse GAP and a control pulse GBP according to the current states of the zero current detection signal ZCD, the control signal GA, and the control signal GB, when the zero current detection signal ZCD indicates that the inductor current IL reaches 0 current, and the control pulse GAP and the control pulse GBP are used to trigger the state circuit 322 to generate the control signal GA and the control signal GB.

In one embodiment, the determining circuit 32 further includes a delay circuit 323 for delaying the control pulse GAP and the control pulse GBP to generate the delayed control pulse GAD and the delayed control pulse GBD, and the control signal GA and the control signal GB are delayed accordingly, so as to delay the time when the switches Q1-Q10 switch to their respective inverted states.

Referring to fig. 26A and 27B, in the embodiment of fig. 27B, the reference signal Vref may be adjusted such that, for example, the time when the control signal GA is turned to the low level (indicating non-conduction) is earlier, for example, in fig. 27B, the time when the control signal GA is turned to the low level is earlier than the time when the inductor current IL1 reaches 0 by a time period T1, at which time the inductor current IL1 is still a positive current, for example, so as to realize zero-voltage switching of the switch Q10, for example.

Referring to fig. 26A and 27C, in an embodiment, the delay time may cause, for example, the inductor current IL2 to freewheel at the delay time, thereby achieving, for example, zero-voltage switching of the switch Q1. Specifically, as shown in fig. 27C, after the inductor current IL2 reaches 0, a delay time T2 elapses, so that the inductor current IL2 flows to, for example, a negative current, the control signal GB is turned off, and then the control signal GA is turned on after the delay time T3, thereby implementing zero-voltage switching of, for example, the switch Q1.

Referring to fig. 26B, fig. 26B corresponds to a more specific embodiment of fig. 26A. In this embodiment, the logic circuit 321 includes an and gate 321a and an and gate 321b, the and gate 321a is used for generating the control pulse GAP according to the zero current detection signal ZCD and the inverse signal of the control signal GA, and the and gate 321b is used for generating the control pulse GBP according to the in-phase signal of the zero current detection signal ZCD and the control signal GA. The delay circuit 323 includes delay units 323a and 323b for delaying the control pulse GAP and the control pulse GBP to generate the delayed control pulse GAD and the delayed control pulse GBD, respectively. The status circuit 322 includes flip-flops 322a and 322b, which are triggered to generate the control signal GA and the control signal GB according to the control pulse GAD and the control pulse GBD, respectively.

It should be noted that the operation manner for determining the switching time points of the plurality of switches according to the inductance current reaching 0 is not limited to be applied to the switching converter 2610 in fig. 26A and 26B, and in another embodiment, the operation manner may also be applied to embodiments corresponding to fig. 6, 13, 15A, 15B, 19, and the like, for example, in an embodiment (such as fig. 6) of sharing the inductor L, the zero current detection circuit 31 may be configured to sense the inductance current IL of the inductor L to implement the zero current detection and the subsequent control operation, which is not described herein again.

Fig. 28A-28B are schematic diagrams of resonant switched capacitor switching circuits (switched capacitor switching circuits 2800A, 2800B) and several embodiments of zero current estimation circuits therein according to the present invention, which are also switched by the zero current detection signal ZCD.

The control circuit 2830A shown in fig. 28A generates the zero-current detection signal ZCD according to another embodiment, wherein the switching converter 2810 of the present embodiment corresponds to the switching converter 610 of fig. 6, and the capacitors C1 and C2 share the inductor L in the current path.

The control circuit 2830A includes a zero current estimation circuit 33, coupled to the inductor L, for estimating a timing of the inductor current IL being 0 according to a voltage difference between two ends of the inductor L and a voltage difference between two ends of the first capacitor (capacitor C1), so as to generate a zero current detection signal ZCD, and then generate a control signal (e.g., GA, GB) by the determination circuit 32 according to the zero current detection signal ZCD to control operations of the switches, as shown in fig. 26A.

Referring to fig. 28A and fig. 29, in an embodiment, the zero current estimation circuit 33 includes a voltage detection circuit 331 and a timing circuit 332, wherein the voltage detection circuit 331 is configured to generate a voltage detection signal VD according to, for example, a voltage difference VL between two ends of the inductor L to indicate that the voltage difference VL between two ends of the inductor L1 exceeds a positive voltage period TP of the zero voltage. The timing circuit 332 is coupled to the output end of the voltage detection circuit 331, and is configured to estimate a negative voltage period TN during which the voltage difference VL between the two ends of the inductor does not exceed zero voltage according to the voltage detection signal VD, so as to generate a zero current estimation signal ZCD to indicate a time point when the inductor current IL is zero.

It should be noted that the operation manner of generating a voltage detection signal VD according to the voltage difference between the two ends of the inductor to estimate the time point when the inductor current is zero is not limited to be applied to the switching converter 2810 in fig. 28A, but in another embodiment, the operation manner may also be applied to, for example, an embodiment (as in fig. 7) corresponding to the embodiment in fig. 7 in which the capacitor has respective corresponding inductors (e.g., L1, L2), and the voltage detection circuit may be used to respectively sense the inductor currents IL1, IL2 of the inductors L1, L2, and respectively estimate the time points when the inductor currents IL1, IL2 reach 0, so as to perform subsequent control operations, which will not be described herein.

The control circuit 2830B shown in fig. 28B generates the zero-current detection signal ZCD according to another embodiment, wherein the switching converter 2810 of the present embodiment corresponds to the switching converter 610 of fig. 6.

In this embodiment, the control circuit 2830B includes a zero current estimation circuit 33, coupled to the first capacitor (capacitor C1) (and also coupled to the second capacitor (capacitor C2)), for estimating a timing point when the inductor current IL is 0 according to a voltage difference (across-voltage VC1) (and also according to across-voltage VC2) between two ends of the first capacitor C1 (and also according to the second capacitor (capacitor C2)), so as to generate a zero current detection signal ZCD, and then generate a control signal (e.g., GA, GB) by the determination circuit 32 according to the zero current detection signal ZCD to control operations of the switches, as shown in fig. 26A.

Referring to fig. 28B and fig. 29, in the present embodiment, the zero current estimation circuit 34 includes a peak-valley detection circuit 341, and the peak-valley detection circuit 341 is configured to generate a voltage detection signal according to the voltage difference (the cross voltage VC1) between the two ends of the capacitor C1 to indicate a peak time point (e.g., time point t2 shown in fig. 4) of the peak value of the voltage difference between the two ends of the capacitor C1 and a valley time point (e.g., time point t4 shown in fig. 4) of the valley value, and accordingly generate the zero current estimation signal ZCD, where both the peak time point and the valley time point correspond to a time point when the inductor current IL is 0. There are many different embodiments for detecting the peak and the valley of the voltage difference, which are well known to those skilled in the art and will not be described herein.

FIG. 30 is a diagram of a more specific embodiment of a zero current estimation circuit in the switched capacitor converter circuit corresponding to FIG. 28A. The zero current estimation circuit 33 of the present embodiment includes a comparator (corresponding to the voltage detection circuit 331), a ramp circuit 333 and a comparator 334, wherein the ramp circuit 333 and the comparator 334 correspond to the timing circuit 332.

The comparator 331 compares the voltages VLa and VLb at two ends of the inductor L to generate a voltage detection signal VD, indicating that the voltage difference at two ends of the inductor L exceeds the zero voltage for a time period T1.

The ramp circuit 333 Is configured to generate a first ramp (e.g., the rising ramp of fig. 29) of the ramp signal VT in a time period T1 according to the voltage detection signal VD, and generate a second ramp (e.g., the falling ramp of fig. 29) of the ramp signal VT after the time period T1 Is ended and after the end value of the first ramp (i.e., the peak of the ramp signal VT), in which the slopes of the first ramp and the second ramp are opposite to each other and the absolute values of the slopes of the first ramp and the second ramp are equal, in one embodiment, the configurable current sources Is1 and Is2 are implemented by charging and discharging the integration capacitor (capacitor CINT) with equal current values.

The comparator 334 is used for generating the zero-current detection signal ZCD when the inductor current IL is 0 when the ramp signal VT (particularly, the second ramp) reaches the zero-current threshold Vth 0. It should be noted that, in other embodiments, the absolute value of the slope of the first slope and the absolute value of the slope of the second slope may be in other ratios, and in this case, the same effect may be obtained by adjusting the zero current threshold.

Fig. 31 is a schematic diagram of an embodiment of a control circuit 3130 for controlling current balance in the resonant switched capacitor switching circuit according to the invention. The switched capacitor converter circuit of the present embodiment includes a plurality of inductors, for example, corresponding to the embodiments of fig. 5, 7, 13, 15B, 16, 18-20, and 23-25, as shown in fig. 31, a control circuit 3130 is coupled to the plurality of inductors (e.g., L1, L2) to sense the corresponding plurality of inductor currents IL1, IL2, and adjust control parameters related to the inductor currents IL1 and IL2 according to a difference between an average value of the plurality of inductor currents (e.g., IL1 and IL2) and at least one of the plurality of inductor currents, so as to adjust a fixed ratio between the plurality of inductor currents IL1 and IL2, and in a preferred embodiment, adjust the plurality of inductor currents IL1 and IL2 to be equal to achieve current balance.

Referring to fig. 32, fig. 32 is a waveform diagram illustrating an operation of a current balancing circuit of the resonant switched capacitor switching circuit according to an embodiment of the present invention. In a preferred embodiment, the control circuit 3130 may adjust the delay time of at least some of the switching cycles to switch at least some of the switches (e.g., td1, and/or td2), thereby adjusting at least one of the inductor currents IL1 and IL2, such that the inductor currents IL1 and IL2 are balanced. For example, when the inductor current IL1 is higher than the average current, the switch associated with the inductor current IL1 may be delayed to decrease the inductor current IL1, thereby balancing the inductor currents IL1 and IL 2. In other embodiments, the inductor currents IL1 and IL2 may be adjusted in corresponding directions, respectively.

With reference to fig. 31, in the present embodiment, the control circuit 3130 includes a current sensing circuit 36 and a current adjusting circuit 37, the current sensing circuit 36 is configured to generate a current sensing signal ISN1 and a current sensing signal ISN2 according to the inductor currents IL1 and IL2, the current adjusting circuit 37 includes an averaging circuit 371, and comparing circuits 372a and 372b, the averaging circuit 371 generates an average current signal Iavg according to the current sensing signal ISN1 and the current sensing signal ISN2, the comparing circuits 372a and 372b are respectively configured to generate an adjusting signal Ta1 according to a difference between the current sensing signal ISN1 and the average current signal Iavg, and/or generate an adjusting signal Ta2 according to a difference between the current sensing signal ISN2 and the average current signal Iavg, and the adjusting signal Ta1 and/or the adjusting signal Ta2 are used to adjust the control signals GA and/or GB.

In detail, in an embodiment, only one of the adjustment signals Ta1 and Ta2 is needed to adjust the delay time of at least one of the control signals GA and GB (e.g., the delay circuit 373 adjusts the delay time td1 and/or td2), so as to adjust at least one of the inductor currents IL1 and IL2, thereby achieving the current balance.

Continuing to refer to fig. 31, the current sensing circuit 36 includes voltage sensing circuits 3611a and 361b and conversion circuits 362a and 362 b. The voltage sensing circuit 361a is used for sensing a voltage difference (L1A-L1B) between two ends of a first inductor (inductor L1) to generate a first voltage sensing signal correspondingly. The voltage sensing circuit 361b is used for sensing a voltage difference (L2A-L2B) between two ends of the second inductor (inductor L11) to generate a second voltage sensing signal correspondingly. In one embodiment, the voltage sensing circuits 2041a and 2041b respectively include a filter composed of a resistor Rcs1 and a capacitor Cs1, and a resistor Rcs2 and a capacitor Cs2 respectively coupled to two sides of the first inductor L1 and two sides of the second inductor (inductor L1) for respectively taking out the voltage across the inductor L1 and the parasitic resistor DCR1 and the voltage across the inductor L2 and the parasitic resistor DCR2, and under a specific configuration, the voltage across the capacitor Cs1 and the capacitor Cs2 respectively and the voltage across the parasitic resistor DCR1 and the parasitic resistor DCR2 are in a linear positive correlation.

The switching circuits 362a and 362b respectively switch to generate the first current sense signal (i.e., current sense signal ISN1) and the second current sense signal (i.e., current sense signal ISN2) according to the first voltage sense signal and the second voltage sense signal. In one embodiment, the conversion circuits 362a and 362b may be, for example, but not limited to, transductor amplifiers, respectively.

It should be noted that the current sensing circuit 36 is implemented by using a parasitic resistance DCR (parasitic direct current resistance) current detection architecture, but this is not intended to limit the scope of the present invention, and in other embodiments, other current detection methods may be used to sense the currents of the first power stage circuit and the second power stage circuit, for example, a current sensing resistor may be connected in series on a current path to sense the current, or a voltage across a sensing switch to sense the current, so as to obtain a corresponding current sensing signal, and the current balance control may still be performed by the averaging and comparison, as follows.

FIGS. 33-34 are schematic diagrams illustrating embodiments of a plurality of precharge circuits in a resonant switched capacitor converter circuit according to the present invention.

In an embodiment, one of the capacitors in the switched capacitor converter circuit of the present invention further corresponds to a distribution capacitor, and one of the switches further corresponds to a pre-charge transistor electrically connected between an input power source and the distribution capacitor, wherein the input power source corresponds to one of the first power source and the second power source.

Specifically, taking fig. 33 as an example, the switched capacitor conversion circuit 3300 includes a switching converter 3310 and a control circuit 3330, in this embodiment, an input power source corresponds to a first power source, a distribution capacitor corresponds to a capacitor C3, a pre-charge transistor corresponds to a switch Q1, and the control circuit 3330 includes a pre-charge circuit 38, the pre-charge circuit 38 is configured to generate a control signal G1 to control the conduction degree of the pre-charge transistor Q1 in a linear feedback manner during a pre-charge mode, the control circuit 3330 controls the switching of the other switches Q2 to Q10, and controls the electrical connection relationship between the capacitors C1 to C3, so that when the voltage drop of the distribution capacitor C3 is lower than a threshold voltage, the cross-voltage of at least one of the capacitors C1 to C3 is pre-charged to a corresponding preset voltage, thereby effectively reducing the inrush current during power source startup, for example.

In one embodiment, for example, the capacitor C1 may be charged to a corresponding predetermined voltage, or all the capacitors may be precharged to a corresponding predetermined voltage, and in a preferred embodiment, the predetermined voltage corresponds to a dc voltage of each of the plurality of capacitors in a steady state, and thus in one embodiment, the predetermined voltage is related to a target voltage of the output voltage, and in this embodiment, the predetermined voltage corresponds to the second voltage V2 or a multiple thereof.

Fig. 34 shows a more specific embodiment of the precharge circuit, the precharge circuit 38 includes an amplifier circuit 381 and a signal decision circuit 382, in which in one embodiment, the amplifier circuit 381 is configured to generate an amplification control signal EAO according to a difference between a ramp signal RMP and a voltage at one end of the distribution capacitor (capacitor C3), and the signal decision circuit 382 controls the precharge transistor (switch Q1) according to the amplification control signal EAO to control the voltage at one end of the distribution capacitor (capacitor C3) to be charged to a corresponding predetermined voltage according to a rising rate of the ramp signal RMP.

In one embodiment, the precharge circuit 38 further includes a comparator 383 for sensing the input voltage (corresponding to the first voltage V1) to determine that the precharge mode is activated when the input voltage is higher than a threshold voltage. The signal determining circuit 382 and the amplifying circuit 381 are also used to determine whether the voltage across the distribution capacitor (capacitor C3) exceeds a threshold voltage, so as to determine whether to activate the pre-charging mode.

It should be noted that, after the pre-charge mode, the control signal G1 generated by the signal determining circuit 382 can still control the switch Q1 in synchronization with the control signal GA to perform the switching between the first power supply and the second power supply.

Fig. 35-36 are waveform diagrams illustrating the operation of two pre-charge circuits of the resonant switched capacitor converting circuit according to the present invention.

In the precharge mode shown in fig. 35, the switch Q1 controls a predetermined current (I1 as shown) to precharge the capacitor C3 and other capacitors, so that the voltage VC3 and the second voltage V2 across the capacitor C3 are precharged to respective predetermined voltages with a predetermined rising slope.

Fig. 36 shows that after the pre-charge mode, since the capacitors are pre-charged to their respective predetermined voltages, the inrush current of the inductor and the capacitors is effectively reduced when the switches start to periodically switch for the resonant power conversion.

Fig. 37-38 are schematic diagrams illustrating several embodiments of driving circuits in resonant switched capacitor switching circuits according to the present invention.

Referring to fig. 37, in the present embodiment, the switched capacitor switching circuit 3700 includes a switching converter 510 and a driving circuit 750 corresponding to, for example, the embodiment of fig. 5, the driving circuit 750 is configured to drive at least a portion of the switches (e.g., Q1, Q4, Q7, Q9), and the driving circuit 750 includes a plurality of drivers Drv1, Drv4, Drv7, Drv9 and a power supply circuit 70.

The plurality of drivers Drv1, Drv4, Drv7, Drv9 are configured to generate a plurality of driving signals G1, G4, G7, G9 according to the control of the corresponding control signal GA or GB, and to periodically drive the plurality of switches Q1, Q4, Q7, Q9 of the portion, respectively, to perform power conversion between the first power source and the second power source in a resonant manner. It should be noted that the remaining switches (basically those without the offset voltage driver) are also driven to switch according to the corresponding control signals GA or GB, and the details thereof are not important in the present application and therefore are not described herein again.

The power supply circuit 70 is used for providing a plurality of driving power supplies Vcd1, Vcd7, Vcd9 and Vcd4 corresponding to the plurality of drivers Drv1, Drv4, Drv7 and Drv9, and the power supply circuit 70 includes a voltage boost circuit 71(voltage boost), a plurality of driving capacitors (capacitors Cd1, Cd7, Cd9 and Cd4) and a plurality of supply diodes Ds1 to Ds 4.

The voltage boost circuit 71(voltage boost) is used for generating a boost power Vb according to the frequency signal, the dc voltage VDD and an output related signal related to an output voltage (corresponding to the second voltage V2 in the embodiment), wherein the voltage of the boost power Vb is related to a sum of the input voltage (corresponding to the first voltage V1 in the embodiment) and the output related signal. The voltage across each driving capacitor (capacitors Cd1, Cd7, Cd9, Cd4) corresponds to the corresponding driving power supplies Vcd1, Vcd7, Vcd9 and Vcd 4. A plurality of supply diodes (Ds 1-Ds 4), the self-boosting power Vb, are coupled in series with each other in the forward direction of the supply diodes Ds 4-Ds 1, wherein the reverse terminal of each supply diode Ds 1-Ds 4 is coupled to the positive terminal of the corresponding driving power source Vcd1, Vcd7, Vcd9, Vcd4, for charging the corresponding driving capacitor (capacitors Cd1, Cd7, Cd9, Cd4) to generate the corresponding driving power sources Vcd1, Vcd7, Vcd9, Vcd4, and for blocking reverse current and reverse voltage.

With continued reference to FIG. 37, the voltage boost circuit 71, the corresponding driving capacitors (capacitors Cd9, Cd4) and the corresponding supply diodes Ds 3-Ds 4 form a charge pump, and when the voltage boost circuit 71 generates the boost power Vb, the corresponding supply diodes Ds 3-Ds 4 charge the driving capacitors Cd9, Cd4 according to the boost power Vb to generate the corresponding driving power Vcd9, Vcd4, wherein the negative terminals of the driving power Vcd9, Vcd4 are coupled to a relatively fixed output voltage (V2), and the corresponding driving power Vcd9, Vcd4 are related to the DC voltage VDD.

With reference to fig. 37, in the present embodiment, the voltage boost circuit 71, the corresponding driving capacitors (capacitors Cd1, Cd7), the corresponding supply diodes Ds1 to Ds2, and the corresponding switches Q1, Q7 respectively form a bootstrap circuit (bootstrap), when the voltage boost circuit 71 generates the boost power Vb, the corresponding supply diodes Ds 1-Ds 2 charge the driving capacitors (capacitors Cd1, Cd7) according to the corresponding second boosted power supplies Vb 3-Vb 4 to generate the corresponding driving power supplies Vcd1, Vcd7, wherein the voltage of the negative terminals of the driving power supplies Vcd1, Vcd7 varies with the switching of the switches Q1, Q7, the voltage of the positive terminals of the driving power supplies Vcd1, Vcd7 also varies with the switching of the switches Q1, Q7 (this is the self-lifting purpose), the corresponding driving power supplies Vcd1, Vcd7 are associated with the input voltage (V1) in the steady state, wherein the second boosted power supplies Vb 3-Vb 1 are associated with the boosted power supply Vb.

Still referring to fig. 37, in an embodiment, the power supply circuit 70 further includes driving power switches S2 and S3 respectively connected in parallel to the corresponding supply diodes Ds2 and Ds3, wherein the driving power switches S2 and S3 can be set to be constantly conductive to improve the conversion efficiency when the switching converter 510 corresponds to a resonant switching converter configured as a resonant tank, and can be set to be non-conductive when other types of switching converters are configured as shown, which will be described in detail later.

Referring to fig. 38, the switching capacitance converting circuit 3800 is similar to the switching capacitance converting circuit 3700, the switching capacitance converting circuit 3800 includes a switching converter 610 and a driving circuit 850 corresponding to, for example, the embodiment of fig. 6, the driving circuit 850 is configured to drive at least a portion of a plurality of switches (e.g., Q1, Q4, Q7, Q9), the driving circuit 850 includes a plurality of drivers Drv1, Drv4, Drv7, Drv9 and the power supply circuit 80, and the power supply circuit 80 similarly includes a voltage boosting circuit 81, a plurality of driving capacitors (e.g., capacitors Cd1, Cd7, Cd9, Cd4) and a plurality of supply diodes Ds 1-Ds 4.

The difference from the switched capacitor conversion circuit 3700 is that the switched capacitor conversion circuit 3800 of the switched converter 610 includes an inductance L shared by the capacitors C2 and C3, so that the voltage boost circuit 81 is configured as a bootstrap circuit in this embodiment, coupled to the switching node LX, and generates the corresponding boosted power Vb in a bootstrap manner based on the switching node voltage VLX. The remaining operations may refer to embodiments of the switched capacitor switching circuit 3700.

FIG. 39 is a schematic diagram of an embodiment of a power conversion system implemented by the resonant switched capacitor converter circuit according to the invention. The power conversion system 3900 includes a resonant switched capacitor converter circuit 910, a voltage regulator 920, and an interface and control unit 930.

The resonant switched-capacitor converting circuit 910 may correspond to any one of the aforementioned switched-capacitor converting circuits including an inductor, for example, to convert a first power source (e.g., corresponding to V1) into a second power source (e.g., corresponding to V2).

The voltage regulator 920 is used for converting the second power source to generate the output voltage VOUT, wherein the output voltage VOUT is regulated to a predetermined level.

The interface and control unit 930 is used to control the voltage regulator 920 to regulate the output voltage VOUT to a predetermined level, and the interface and control unit 930 is used to control the switching frequency of the voltage regulator 920 and/or control the switching frequency of the switched capacitor converting circuit 910 through the communication interfaces IFC1 and IFC2, so as to improve the power conversion efficiency of the power converting system 3900.

In a preferred embodiment, the interface and control unit controls the switching frequency of the voltage regulator 920 and the switching frequency of the switched capacitor converter circuit 910 to be synchronous, so as to reduce the electromagnetic interference of the power converter system 3900.

In a preferred embodiment, the switching frequency of the switching capacitor converting circuit 910 is adjusted by adjusting the delay time corresponding to at least some of the switches (e.g., corresponding to Q1-Q10 in the previous embodiment) in the switching capacitor converting circuit 910.

As shown in FIG. 39, the voltage regulator 920 and the interface and control unit 930 may be further coupled to the CPU/GPU/memory 940, respectively, and the output voltage VOUT may be used to supply power to the CPU/GPU/memory 940. The CPU/GPU/memory 940 may be one of a Central Processing Unit (CPU), a Graphics Processing Unit (GPU) and a memory unit or a combination thereof.

In one embodiment, the interface and control unit 930 may adjust the control signals GA, GB and/or their delay time according to the load requirements of the cpu/gpu/memory 940 to adjust the ratio of the first voltage V1 and the second voltage V2 and the ratio of the second voltage V2 and the output voltage VOUT. In another embodimentThe interface and control unit 930 may adjust the resonant frequency of the resonant switched capacitor converter 910 and the switching frequency of the voltage regulator 920 according to the load requirements of the cpu/gpu 940. Such as but not limited to I²A C (Inter-Integrated Circuit) interface.

In an embodiment, the power conversion system 3900 further comprises a power supply unit 950. For providing a first power source. In one embodiment, the power supply unit 950 may include an emi suppressor having a filtering band, and the resonant frequency of the synchronous resonant switched capacitor converter 910 and the switching frequency of the voltage regulator 920 may be within the filtering band of the emi suppressor, so as to filter out the electromagnetic noise of the resonant switched capacitor converter 910 and the voltage regulator 920 at the same time and improve the filtering effect of the emi.

The invention provides a novel switching type capacitance conversion circuit with a pipeline type structure, which can expand the layer number and adjust the conversion multiplying power according to the requirement, and an inductor is arranged on a current path, so that the switching type capacitance conversion circuit can be expanded into a resonance switching type capacitance conversion circuit with a pipeline type structure, and the surge current can be reduced.

The present invention has been described with respect to the preferred embodiments, but the above description is only for the purpose of facilitating the understanding of the present invention by those skilled in the art, and is not intended to limit the broadest scope of the present invention. The embodiments described are not limited to single use, but may be used in combination, for example, two or more embodiments may be combined, and some components in one embodiment may be substituted for corresponding components in another embodiment. Further, equivalent variations and combinations are contemplated by those skilled in the art within the spirit of the present invention, and the term "processing or computing or generating an output result based on a signal" is not limited to the signal itself, and includes, if necessary, performing voltage-to-current conversion, current-to-voltage conversion, and/or scaling on the signal, and then processing or computing the converted signal to generate an output result. It is understood that equivalent variations and combinations, not necessarily all illustrated, will occur to those of skill in the art, which combinations are not necessarily intended to be limiting. Accordingly, the scope of the present invention should be determined to encompass all such equivalent variations as described above.