Absorption enhanced silicon-based photoelectric detector and preparation method thereof

文档序号:1965272 发布日期:2021-12-14 浏览:11次 中文

阅读说明:本技术 一种吸收增强型硅基光电探测器及其制备方法 (Absorption enhanced silicon-based photoelectric detector and preparation method thereof ) 是由 杨荣 于 2021-08-19 设计创作,主要内容包括:本发明提供了一种吸收增强型硅基光电探测器及其制备方法,包括SOI衬底、波导以及SOI衬底上的光电探测器,光电探测器包括P型接触层、吸收层、N型接触层以及位于P型接触层和N型接触层之上的金属电极;所述SOI衬底从下至上为背衬底硅层、压应变氮化硅层以及顶硅层;所述N型接触层由向顶硅层局部区域中注入杂质后转化而来;顶硅层经过刻蚀得到所述波导,波导末端与N型接触层连接;所述SOI衬底中位于N型接触层两侧的顶硅层、氮化硅层以及背衬底硅层上表面部分通过刻蚀去除。本发明提出的探测器与III-V族红外光电探测器相比,Ge探测器容易与Si集成;与传统Ge探测器相比,拥有更广的探测范围;与其他四族材料,如Sn,Pb等引入相比,氮化硅与CMOS完全兼容。(The invention provides an absorption enhanced silicon-based photoelectric detector and a preparation method thereof, and the absorption enhanced silicon-based photoelectric detector comprises an SOI (silicon on insulator) substrate, a waveguide and a photoelectric detector on the SOI substrate, wherein the photoelectric detector comprises a P-type contact layer, an absorption layer, an N-type contact layer and metal electrodes positioned on the P-type contact layer and the N-type contact layer; the SOI substrate is provided with a backing bottom silicon layer, a compressive strain silicon nitride layer and a top silicon layer from bottom to top; the N-type contact layer is formed by injecting impurities into a local area of the top silicon layer and then is converted; etching the top silicon layer to obtain the waveguide, wherein the tail end of the waveguide is connected with the N-type contact layer; and the upper surface parts of the top silicon layer, the silicon nitride layer and the back lining bottom silicon layer which are positioned at two sides of the N-type contact layer in the SOI substrate are removed by etching. Compared with the III-V family infrared photoelectric detector, the Ge detector provided by the invention is easy to integrate with Si; compared with the traditional Ge detector, the detector has a wider detection range; compared with other four-family materials, such as Sn, Pb and the like, the silicon nitride is completely compatible with CMOS.)

1. An absorption enhancement type silicon-based photoelectric detector is characterized by comprising an SOI (silicon on insulator) substrate, a waveguide and a photoelectric detector on the SOI substrate, wherein the photoelectric detector comprises a P-type contact layer, an absorption layer, an N-type contact layer and a metal electrode positioned on the P-type contact layer and the N-type contact layer; the SOI substrate is provided with a backing bottom silicon layer, a compressive strain silicon nitride layer and a top silicon layer from bottom to top; the N-type contact layer is formed by injecting impurities into a local area of the top silicon layer and then is converted; etching the top silicon layer to obtain the waveguide, wherein the tail end of the waveguide is connected with the N-type contact layer; and the upper surface parts of the top silicon layer, the compressive strain silicon nitride layer and the backing bottom silicon layer which are positioned at two sides of the N-type contact layer in the SOI substrate are removed by etching, so that tensile strain is introduced into the absorption layer.

2. The absorption-enhanced silicon-based photodetector of claim 1, wherein the absorption layer is comprised of a Ge material.

3. The absorption-enhanced silicon-based photodetector of claim 1, wherein the compressively-strained silicon nitride layer is strained from 1GPa to 3 GPa.

4. The absorption-enhanced silicon-based photodetector of claim 1, wherein the P-type contact layer is a P-type Ge contact layer formed by ion implantation after selective epitaxial growth on the absorption layer.

5. The absorption-enhanced silicon-based photodetector of any one of claims 1 to 3, wherein the waveguide tip width is greater than the waveguide body width.

6. A preparation method of an absorption enhanced silicon-based photoelectric detector is characterized by comprising the following steps:

step 1, injecting hydrogen ions into a silicon substrate;

step 2, depositing compressive strain silicon nitride on the front surface and the side of the silicon substrate implanted with the hydrogen ions;

step 3, wafer bonding;

step 4, preparing the SOI substrate of backing a bottom silicon layer, a compressive strain silicon nitride layer and a top silicon layer through Smart cut and a CMP process;

step 5, depositing and pressing a layer of strained silicon nitride on the surface of a backing substrate silicon layer of the SOI substrate;

step 6, preparing a waveguide by photoetching and dry etching the top silicon layer;

step 7, defining the range of the N-type contact layer at the tail end of the waveguide through photoetching, and preparing the N-type contact layer in the range;

step 8, defining the range of the photoelectric detector, and selectively and epitaxially growing a Ge absorption layer on the N-type contact layer;

and 9, selectively and epitaxially growing a P-type Ge contact layer on the Ge absorption layer.

Step 10, depositing metal electrodes on the P-type Ge contact layer and the N-type contact layer, and forming Ge photoelectric detector electrodes through photoetching;

step 11, defining a stress release region through photoetching, and etching the top silicon layer, the compressive strain silicon nitride layer and part of the backing bottom silicon layer of the stress release region;

and 12, removing the compressive strain silicon nitride on the surface of the backing substrate silicon layer.

7. The method according to claim 5, wherein the range of the photodetector is smaller than that of the N-type contact layer, and the photodetector is located in the middle of the N-type contact layer.

8. The method according to claim 5 or 6, wherein in step 7, the N-type contact layer is formed by ion implantation and high temperature annealing, and the doping concentration is 2e19 cm-3.

9. The method of claim 7, wherein in step 9, the P-type Ge contact layer has an ion doping concentration of 2e19 cm-3.

10. The method of claim 5, wherein in step 11, the stress relief regions are on both sides of the N-type contact layer.

Technical Field

The invention relates to the field of semiconductors, in particular to an absorption enhanced silicon-based photoelectric detector and a preparation method thereof.

Background

The photodetector is one of the key devices in the field of semiconductor optoelectronic devices, and has been widely used in the fields of optical communication, optical sensing, optical imaging, automatic driving, and the like in recent years. In particular, in the application fields of optical sensing, remote imaging, and the like, not only is a high responsivity and a high rate required for a photodetector, but also a wide spectral range is required for a device.

Because the spectral response range of the photodetector is limited by the forbidden bandwidth of the detector material and the lifetime of the photogenerated carriers, the conventional semiconductor photodetector can only work in a certain wavelength range, such as near infrared band, visible light band, etc., and no mature L, U-band Ge photodetector product exists at present. In academia, at present, the absorption range of a Ge detector is increased mainly by introducing other elements of the four groups such as Sn, Pb and the like into Ge, and the compatibility with CMOS is greatly problematic after introducing other elements, so that no CMOS line is adopted at present.

Disclosure of Invention

Compared with the traditional III-V group and II-V group infrared detectors, the IV group infrared detector has the potential advantages of small volume, easy integration, low cost, high performance and the like because the preparation process is compatible with the Si-based CMOS process. Ge detectors based on Si substrates or SOI substrates have gained wide application in the fields of communication and sensing. By introducing tensile strain in Ge, the detection range of the detector can be further extended, so that the detector can be used for communication between an L wave band and a U wave band. Silicon nitride is a CMOS compatible material, and by introducing silicon nitride at the bottom, the introduction of stress in the Ge layer can be effectively increased.

The technical scheme adopted by the invention is as follows: an absorption enhanced silicon-based photoelectric detector comprises an SOI (silicon on insulator) substrate, a waveguide and a photoelectric detector on the SOI substrate, wherein the photoelectric detector comprises a P-type contact layer, an absorption layer, an N-type contact layer and a metal electrode positioned on the P-type contact layer and the N-type contact layer; the SOI substrate is provided with a backing bottom silicon layer, a compressive strain silicon nitride layer and a top silicon layer from bottom to top; the N-type contact layer is formed by injecting impurities into a local area of the top silicon layer and then is converted; etching the top silicon layer to obtain the waveguide, wherein the tail end of the waveguide is connected with the N-type contact layer; the upper surface parts of the top silicon layer, the compressive strain silicon nitride layer and the backing bottom silicon layer which are positioned on two sides of the N-type contact layer in the SOI substrate are removed through etching, through etching the compressive strain silicon nitride layer and the substrate silicon, tensile strain can be introduced into the absorption layer through SiN medium-pressure strain release, and the absorption of the absorption layer in L and U wave bands is enhanced.

Further, the absorption layer is composed of a Ge material.

Further, the compressively strained silicon nitride layer is strained from 1GPa to 3 GPa.

Furthermore, the P-type contact layer is formed by ion implantation after selective epitaxial growth on the absorption layer.

Further, the width of the end of the waveguide is larger than the width of the waveguide body.

The invention also provides a preparation method of the absorption enhanced silicon-based photoelectric detector, which comprises the following steps:

step 1, injecting hydrogen ions into a silicon substrate;

step 2, depositing compressive strain silicon nitride on the front surface and the side of the silicon substrate implanted with the hydrogen ions;

step 3, wafer bonding;

step 4, preparing the SOI substrate of backing a bottom silicon layer, a compressive strain silicon nitride layer and a top silicon layer through Smart cut and a CMP process;

step 5, depositing and pressing a layer of strained silicon nitride on the surface of a backing substrate silicon layer of the SOI substrate;

step 6, preparing a waveguide by photoetching and dry etching the top silicon layer;

step 7, defining the range of the N-type contact layer at the tail end of the waveguide through photoetching, and preparing the N-type contact layer in the range;

step 8, defining the range of the photoelectric detector, and selectively and epitaxially growing a Ge absorption layer on the N-type contact layer;

and 9, selectively and epitaxially growing a P-type Ge contact layer on the Ge absorption layer.

Step 10, depositing metal electrodes on the P-type Ge contact layer and the N-type contact layer, and forming Ge photoelectric detector electrodes through photoetching;

step 11, defining a stress release region through photoetching, and etching the top silicon layer, the compressive strain silicon nitride layer and part of the backing bottom silicon layer of the stress release region;

and 12, removing the strained silicon nitride on the surface of the backing substrate silicon layer.

Furthermore, the range of the photoelectric detector is smaller than that of the N-type contact layer, and the photoelectric detector is positioned in the middle of the N-type contact layer.

Further, in step 7, an N-type contact layer is prepared by ion implantation and high temperature annealing, with a doping concentration of 2e19 cm-3.

Further, in step 9, the ion doping concentration of the P-type Ge contact layer is 2e19 cm-3.

Further, in step 11, the stress relief regions are on both sides of the N-type contact layer.

Compared with the prior art, the beneficial effects of adopting the technical scheme are as follows:

(1) ge detectors are easily integrated with Si compared to III-V infrared photodetectors.

(2) Compared with the traditional Ge detector, the Ge detector has wider detection range.

(3) Compared with other four-family materials, such as Sn, Pb and the like, the silicon nitride is completely compatible with CMOS.

Drawings

Fig. 1 is a schematic three-dimensional structure diagram of an absorption enhanced silicon-based photodetector according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of an absorption enhanced silicon-based photodetector according to an embodiment of the present invention.

Fig. 3(a) -fig. 3(h) are schematic diagrams illustrating a process for manufacturing an absorption-enhanced silicon-based photodetector according to the present invention.

Detailed Description

The invention is further described below with reference to the accompanying drawings.

The invention aims to provide an absorption enhanced silicon-based photoelectric detector and a manufacturing method thereof, aiming at the problem that the responsivity of the existing Ge infrared photoelectric detector is extremely reduced when the optical wavelength is more than 1.5um, and solving the problem that the detection range of the existing detector is narrow. The specific scheme is as follows:

example 1

Fig. 1 is a schematic three-dimensional structure diagram of the absorption-enhanced silicon-based photodetector of the present embodiment, and fig. 2 is a schematic cross-sectional diagram of the absorption-enhanced silicon-based photodetector of the present embodiment.

As shown in the figure, the absorption enhanced silicon-based photoelectric detector comprises an SOI substrate, a waveguide and a photoelectric detector on the SOI substrate,

the photoelectric detector comprises a P-type contact layer, an absorption layer, an N-type contact layer and metal electrodes positioned on the P-type contact layer and the N-type contact layer; the preparation process is compatible with the standard CMOS process, and in the embodiment, the absorption region is made of Ge material and is prepared by adopting selective epitaxial growth and ion implantation of Ge.

The SOI substrate is provided with a backing bottom silicon layer, a compressive strain silicon nitride layer and a top silicon layer from bottom to top; the N-type contact layer is formed by injecting impurities into a local area of the top silicon layer and then is converted; etching the top silicon layer to obtain the waveguide, wherein the tail end of the waveguide is connected with the N-type contact layer; the upper surface parts of the top silicon layer, the compressive strain silicon nitride layer and the backing bottom silicon layer which are positioned on two sides of the N-type contact layer in the SOI substrate are removed through etching, and tensile strain can be introduced into Ge after etching of the bottom SiN, so that the absorption capacity of the detector is improved. In another embodiment, portions of the top silicon layer, the compressively strained silicon nitride layer, and the upper surface of the backing bottom silicon layer all around the N-type contact layer are etched away.

Specifically, the range of the N-type contact layer is larger than that of the absorption layer, and the metal electrodes are arranged on the surface of the N-type contact layer on two sides of the absorption layer and on the surface of the P-type contact layer.

In this embodiment, the removal of the top silicon layer, the compressive strained silicon nitride layer and the upper surface portion of the back bottom silicon layer on both sides of the N-type contact layer in the SOI substrate is to release the stress of the compressive strained silicon nitride, so as to introduce a tensile strain in the Ge absorption layer, thereby increasing the detection range of the detector to the L-band or even the U-band.

In this embodiment, the P-type contact layer is a P-type Ge contact layer formed by ion implantation after selective epitaxial growth on the absorber layer.

Preferably, the waveguide end width is larger than the waveguide body width, and the end width is equivalent to the N-type contact layer. In one embodiment, the waveguide body width is 500nm and the absorbing layer portion has a waveguide width of 10 um.

Example 2

As shown in fig. 3(a) -3 (h), this embodiment further provides a method for preparing the absorption-enhanced silicon-based photodetector of embodiment 1, which includes the following steps:

step 1, injecting hydrogen ions into a silicon substrate;

step 2, depositing compressive strain silicon nitride on the front surface and the side of the silicon substrate implanted with the hydrogen ions to ensure the stress balance of the silicon substrate and avoid warping;

step 3, wafer bonding;

step 4, preparing the SOI substrate of backing a bottom silicon layer, a compressive strain silicon nitride layer and a top silicon layer through Smart cut and a CMP process;

step 5, depositing and pressing a layer of strained silicon nitride on the surface of a backing substrate silicon layer of the SOI substrate to keep stress balance;

step 6, preparing a waveguide by photoetching and dry etching the top silicon layer;

step 7, defining the range of the N-type contact layer at the tail end of the waveguide through photoetching, and preparing the N-type contact layer in the range;

step 8, passing through SiO2The hard mask defines the range of the photoelectric detector, and a CVD method is adopted to selectively and epitaxially grow a Ge absorption layer on the N-type contact layer;

and 9, selectively and epitaxially growing a P-type Ge contact layer on the Ge absorption layer.

Step 10, depositing metal electrodes on the P-type Ge contact layer and the N-type contact layer, and forming Ge photoelectric detector electrodes through photoetching;

step 11, defining a stress release region through photoetching, and etching the top silicon layer, the compressive strain silicon nitride layer and part of the backing bottom silicon layer of the stress release region;

and 12, removing the strained silicon nitride on the surface of the backing substrate silicon layer.

Specifically, the range of the photoelectric detector is smaller than that of the N-type contact layer, and the photoelectric detector is positioned in the middle of the N-type contact layer.

Preferably, in step 7, the N-type contact layer is prepared by ion implantation and high temperature annealing, the doping concentration is 2e19cm-3, and in this embodiment, phosphorus ion implantation is used.

Preferably, in step 9, the ion doping concentration of the P-type Ge contact layer is 2e19cm-3, and boron ion implantation is adopted in the embodiment.

Preferably, in step 11, the stress relief regions are on both sides of the N-type contact layer. In another embodiment, the stress tetragonal region may also include other regions besides the waveguide and the N-type contact layer.

Compared with the III-V family infrared photoelectric detector, the absorption enhanced silicon-based photoelectric detector provided by the invention has the advantages that the Ge detector is easy to integrate with Si; compared with the traditional Ge detector, the detector has a wider detection range; compared with other four-family materials, such as Sn, Pb and the like, the silicon nitride is completely compatible with CMOS.

The invention is not limited to the foregoing embodiments. The invention extends to any novel feature or any novel combination of features disclosed in this specification and any novel method or process steps or any novel combination of features disclosed. Those skilled in the art to which the invention pertains will appreciate that insubstantial changes or modifications can be made without departing from the spirit of the invention as defined by the appended claims.

All of the features disclosed in this specification, or all of the steps in any method or process so disclosed, may be combined in any combination, except combinations of features and/or steps that are mutually exclusive.

Any feature disclosed in this specification may be replaced by alternative features serving equivalent or similar purposes, unless expressly stated otherwise. That is, unless expressly stated otherwise, each feature is only an example of a generic series of equivalent or similar features.

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