阅读说明：本技术 直流脉冲电源装置以及直流脉冲电源装置的频率控制方法 (DC pulse power supply device and frequency control method for DC pulse power supply device ) 是由 让原逸男 安达俊幸 米山知宏 宫嵜洸一 于 2019-11-08 设计创作，主要内容包括：本发明的直流脉冲电源装置具备电压钳位部,该电压钳位部包含与直流电抗器并联连接的电容器,以抑制由于脉冲部所具备的斩波电路的直流电抗器的漏电感而产生的浪涌电压的上升。在作为脉冲模式的初始阶段的脉冲动作的起动时,在直到电容器电压被充电至足以将直流电抗器的磁饱和复位的电压为止的期间,控制斩波电路的脉冲动作的频率。(A DC pulse power supply device is provided with a voltage clamp section including a capacitor connected in parallel to a DC reactor to suppress an increase in surge voltage due to leakage inductance of the DC reactor of a chopper circuit provided in a pulse section. At the start of a pulse operation which is an initial stage of a pulse mode, the frequency of the pulse operation of the chopper circuit is controlled until the capacitor voltage is charged to a voltage sufficient to reset the magnetic saturation of the dc reactor.)

1. A DC pulse power supply device is characterized by comprising:

a direct current power supply;

a pulse unit connected to the dc power supply and generating a pulse output by a boost chopper circuit including a series circuit of a dc reactor and a switching element;

a voltage clamp unit including a capacitor connected in parallel to the dc reactor of the pulse unit, the voltage clamp unit clamping a voltage across the dc reactor to a clamp voltage by a capacitor voltage of the capacitor; and

a control circuit unit for controlling the switching operation of the switching element of the pulse unit,

the control circuit unit includes a pulse mode control unit for controlling a pulse operation of a pulse mode for generating a pulse output,

the pulse mode control unit includes a frequency control unit for varying a frequency,

the frequency control unit performs a pulse operation at a variable frequency capable of changing the frequency of the pulse operation by gradually increasing or gradually decreasing the time width of each period in a plurality of periods in the initial stage of the pulse operation, thereby resetting the magnetic saturation of the DC reactor.

2. The direct current pulse power supply device according to claim 1,

in each of a plurality of cycles in an initial stage of the pulse operation, the variable-frequency pulse operation of the frequency control unit is a pulse operation in which: the time width of an on period during which the switching element is closed to turn on the DC reactor is fixed, and the time width of an off period during which the switching element is opened to clamp the DC reactor to the capacitor voltage is gradually reduced.

3. The direct current pulse power supply apparatus according to any one of claims 1 to 2,

the frequency control unit performs a pulse operation at a stable frequency in which a time width of the period is fixed in a stable stage after an initial stage of the pulse operation, and switches from the variable frequency to the stable frequency based on a capacitor voltage of the capacitor or a voltage change of the capacitor voltage.

4. The direct current pulse power supply device according to claim 3,

the pulse mode control unit includes a voltage determination unit that determines a state of charge of the capacitor based on a voltage or a voltage change of the capacitor voltage,

the frequency control unit switches from the variable frequency to the stable frequency based on a result determined by the voltage determination unit based on a voltage or a voltage change of the capacitor voltage.

5. The direct current pulse power supply apparatus according to any one of claims 1 to 4,

the DC pulse power supply device includes a regeneration unit that regenerates a voltage amount exceeding a set voltage in a reactor voltage of the DC reactor to the DC power supply,

the regeneration unit includes the capacitor connected in parallel to the dc reactor, and the capacitor uses a reactor voltage of the dc reactor as a regeneration input voltage.

6. A frequency control method of DC pulse power supply device,

the DC pulse power supply device includes:

a direct current power supply;

a pulse unit connected to the dc power supply and generating a pulse output by a boost chopper circuit including a series circuit of a dc reactor and a switching element;

a pulse unit connected to the dc power supply and generating a pulse output by a boost chopper circuit including a series circuit of a dc reactor and a switching element;

a voltage clamp unit including a capacitor connected in parallel to the dc reactor of the pulse unit, the voltage clamp unit clamping a voltage across the dc reactor to a clamp voltage by a capacitor voltage of the capacitor; and

a control circuit unit for controlling the switching operation of the switching element of the pulse unit,

it is characterized in that the preparation method is characterized in that,

in the pulse mode control for controlling a pulse operation for generating a pulse mode of a pulse output, the control circuit unit performs frequency control at a variable frequency capable of changing the frequency of the pulse operation by gradually increasing or gradually decreasing the time width of each period in a plurality of periods in the initial stage of the pulse operation,

the variable frequency pulsing action is as follows:

the time width of an ON period during which the switching element is closed to turn on the DC reactor is fixed, and the time width of an OFF period during which the switching element is opened to clamp the DC reactor to the capacitor voltage is gradually reduced,

resetting the magnetic saturation of the direct current reactor.

7. The frequency control method of a DC pulse power supply device according to claim 6,

the control circuit section switches from the initial stage to a stable stage based on the capacitor voltage of the capacitor being charged to a predetermined voltage.

8. The frequency control method of a direct current pulse power supply device according to claim 7,

the control circuit unit switches from the initial stage to a steady stage based on the fact that the voltage change of the capacitor voltage of the capacitor converges within a predetermined fluctuation range.

9. The frequency control method of a direct current pulse power supply device according to claim 8,

the predetermined voltage is a reset voltage that resets magnetic saturation of the dc reactor.

Technical Field

The present invention relates to a dc pulse power supply device having a control circuit for suppressing magnetic saturation, and a control method for suppressing magnetic saturation of a dc reactor included in the dc pulse power supply device.

Background

In a dc pulse power supply device, a circuit configuration including a series circuit of a dc reactor and a switching element is known as a pulse generating circuit for generating a pulse output. The pulse generating circuit generates a pulse output having a pulse waveform by repeating on/off operations of the switching element to interrupt the dc voltage.

The pulse output from the dc pulse power supply device is a high-frequency output in which the on state and the off state of a dc voltage are repeated at several Hz (hertz) to several hundreds kHz (kilohertz).

A dc pulse power supply device is used as a power supply device for supplying a pulse output to a load such as a plasma generator, a pulse laser excitation, and an electric discharge machine. For example, when a dc pulse power supply device is used in a plasma generation device, a pulse output is supplied between electrodes in a plasma generation chamber, and plasma is ignited by discharge between the electrodes to sustain the generated plasma.

Fig. 12 shows an example of a configuration of a dc pulse power supply device, and the example of the configuration shown includes a pulse generating circuit using a chopper circuit. As a circuit for generating a pulse waveform, a boost chopper circuit is known. The dc pulse power supply device 100 includes a dc power supply unit 110, a pulse unit 120, and a control circuit unit 140. The boost chopper circuit of the pulse unit 120 is configured by connecting a dc reactor 121 and a switching element 122 in series. The control circuit section 140 controls the drive circuit 123. The switching element 122 performs on/off operation based on a drive signal of the drive circuit 123. The pulse unit 120 supplies a pulse output obtained by boosting the dc voltage of the dc power supply unit 110 to the load 150 (patent documents 1 and 2).

Documents of the prior art

Patent document

Patent document 1: japanese laid-open patent publication No. 8-222258 (FIG. 1, paragraph 0012)

Patent document 2: japanese patent laid-open No. 2006-6053 (FIG. 1)

Disclosure of Invention

Problems to be solved by the invention

When a dc pulse power supply device is used in a plasma generator, a pulse output from the dc pulse power supply device is supplied between electrodes in a chamber of the plasma generator, and a discharge generated between the electrodes ignites a plasma to sustain the generated plasma. When a plasma is used as a load, the dc pulse power supply device supplies a pulse output to the plasma load in each of an ignition mode, a dc mode, and a pulse mode. Plasma is ignited in an ignition mode, and after a constant discharge voltage state is passed in a direct current mode, a pulse operation is started in a pulse mode.

Fig. 13 is a schematic flowchart for explaining each mode of supplying a pulse output from the dc pulse power supply device to the plasma load.

In general, a plasma generator corresponds to an electric load for a dc power supply device, and the load at the start of plasma discharge until plasma discharge is generated has a different impedance state than the load during normal operation in which plasma discharge is stably generated. Therefore, in general, the dc power supply device gradually increases the voltage to generate plasma discharge, and applies a voltage larger than the voltage during normal operation to the electrode for a constant period. This output mode is referred to as an ignition mode (S10).

In the ignition mode, a constant discharge voltage state is obtained after the plasma discharge is generated. This output mode is referred to as a direct current mode (S20).

After the dc mode, the dc voltage is turned on/off at a predetermined duty ratio to be in a pulse output state. This output pattern is referred to as a pulse pattern (S30).

In the chopper circuit of the pulse section 120A shown in fig. 14 (a), a DS voltage between the drain D and the source S of the switching element 122A generates a surge voltage due to a leakage inductance included in the dc reactor 121A when the switching element 122A is turned off. In order to avoid damage to the switching element 122A due to a surge voltage, the inventors of the present application have proposed a configuration in which a voltage clamp section 130B is provided, and the voltage clamp section 130B clamps a voltage across the dc reactor 121B to a predetermined voltage. Fig. 14 (b) shows an outline of the proposed circuit configuration. The voltage clamp 130B includes a capacitor C connected in parallel to the dc reactor 121B. The voltage clamp section 130B clamps the capacitor voltage VC of the capacitor C to a voltage lower than the surge voltage, thereby suppressing an excessive surge voltage rise of the DS voltage.

Generally, when the magnetic field of the reactor increases with an increase in the reactor current, the magnetic permeability of the reactor decreases, and the reactor becomes magnetically saturated when the reactor reaches the maximum magnetic flux density of the magnetic material. The magnetic permeability is reduced in the state of magnetic saturation. The low magnetic permeability of the reactor becomes a factor of overcurrent. By applying voltages of different polarities to the reactor, the voltage-time product (ET product), which is the product of the applied voltage and time, is made to be of opposite polarity and equal in magnitude, thereby resetting the reactor from magnetic saturation.

In fig. 14 (c), the voltage-time product Son during the on period and the voltage-time product Soff during the off period of the switching element 122B are made to have opposite polarities and equal magnitudes, so that the magnetic saturation of the dc reactor 121B is reset.

Fig. 15 is a diagram for explaining the magnetic saturation state of the dc reactor, where fig. 15 (a) shows an output voltage waveform of the dc power supply device, fig. 15 (b) shows a saturation current waveform of the dc reactor current iDCL, and fig. 15 (C) shows a voltage waveform of the capacitor C in the voltage clamp portion.

In a circuit configuration including a voltage clamp portion, there is a problem that a reset due to magnetic saturation of a dc reactor is insufficient. Fig. 14 (c) shows a state where magnetic saturation occurs. The voltage during the off period of the switching element 122B functions as a reset voltage, which is clamped by the capacitor voltage VC of the capacitor C of the voltage clamp portion 130B. Since the capacitor voltage VC gradually rises from 0V at the start of pulse generation, the reset voltage does not become a voltage sufficient for reset magnetic saturation in the initial stage. Therefore, in the initial pulse mode at the time of pulse generation start, the voltage-time product Soff during the off period of the switching element 122B is smaller than the voltage-time product Son during the on period of the switching element 122B, and the bias of the dc reactor is not reset and reaches magnetic saturation.

When the dc reactor 121 is magnetically saturated, the inductance decreases, and thus an excessive current flows. Fig. 16 is a current example of a dc reactor, and shows a state where an excessive current is generated due to magnetic saturation. Therefore, in the initial pulse mode at the time of pulse generation start, there is a problem that an excessive current is generated due to magnetic saturation because a reset voltage for resetting magnetic saturation is insufficient.

The present invention has been made to solve the above-described conventional problems, and an object of the present invention is to suppress magnetic saturation of a dc reactor at the time of pulse generation start and to suppress generation of an excessive current due to the magnetic saturation in a dc pulse power supply device.

More specifically, the object is to suppress magnetic saturation by suppressing a dc reactor current during a period from a capacitor voltage of a capacitor connected in parallel with the dc reactor to a voltage sufficient to reset the magnetic saturation when the pulse generation is started.

Means for solving the problems

A DC pulse power supply device is provided with a voltage clamp section including a capacitor connected in parallel to a DC reactor to suppress an increase in surge voltage due to leakage inductance of the DC reactor in a chopper circuit provided in a pulse section. In a DC pulse power supply device, a reactor voltage when a switching element of a chopper circuit is in an off state is suppressed by a voltage clamp section, and this voltage suppression becomes a factor of magnetic saturation of a DC reactor. A control circuit unit of a DC pulse power supply device controls the operating frequency of a switching element to suppress the occurrence of magnetic saturation of a DC reactor.

A DC pulse power supply device controls the frequency of a pulse operation of a chopper circuit during a period until a capacitor voltage is charged to a voltage sufficient to reset magnetic saturation of a DC reactor at the start of the pulse operation as an initial stage of a pulse mode. The frequency control method includes a method of varying a time width of an off period in which the switching element is in an off state.

During the on-period, a supply voltage is applied to the dc reactor and the reactor current increases.

On the other hand, during the off period, the capacitor voltage is applied to the dc reactor and clamped by the capacitor voltage.

(frequency control mode)

In the frequency control method, the time width Ton of the on period is fixed, the time width Toff of the off period is gradually reduced as the capacitor voltage increases, the time width Toff of the off period is set to be long when the capacitor voltage is small, and the time width Toff of the off period is gradually reduced as the capacitor voltage increases. By this frequency control, an increase in the difference between the voltage-time product Soff during the off period and the voltage-time product Son during the on period is suppressed in the initial stage, and the occurrence of magnetic saturation of the dc reactor is suppressed.

Here, the gradual increase or decrease of the time width means gradual increase or decrease from the initial value toward the predetermined value. The predetermined value of the time width that is gradually increased or decreased is the time width of each period in a cycle after the capacitor voltage has been charged to a voltage sufficient to reset the magnetic saturation of the dc reactor, and corresponds to the time width of the off period or the on period of each period in the steady stage. The initial value of the off period is a time width longer than the time width of the off period in the steady phase.

After the pulse operation is started, the capacitor voltage increases in the initial stage, and then becomes a stable stage at the stage when the charging of the capacitor voltage is completed. The voltage across the DC reactor during the off period is clamped by the charging voltage of the capacitor, thereby suppressing the generation of surge voltage.

In the initial phase of the pulse mode, the capacitor voltage is charged from 0V to the charging voltage. During the off period, the voltage across the dc reactor is clamped to the capacitor voltage, and therefore has an amplitude smaller than the voltage at the steady state. Therefore, when the time width is set to the time width of the steady stage, a difference occurs between the voltage-time product Son and the voltage-time product Soff, and it is difficult to suppress magnetic saturation of the dc reactor. The frequency control of the present invention gradually reduces the time width Toff of the off period in the initial stage, thereby suppressing the difference between the voltage-time product Son and the voltage-time product Soff and suppressing the magnetic saturation of the dc reactor.

In the stable phase of the pulse mode, the capacitor voltage becomes a voltage sufficient to reset the magnetic saturation of the dc reactor. In this stabilization phase, the voltage applied to the dc reactor is suppressed to the clamp voltage of the capacitor voltage, but since the capacitor voltage is a voltage sufficient to reset the magnetic saturation of the dc reactor, the dc reactor is not magnetically saturated in a period of the on period and the off period having the stabilization phase.

The present invention includes various embodiments of a dc pulse power supply device and a frequency control method for the dc pulse power supply device.

[ DC pulse Power supply device ]

A DC pulse power supply device of the present invention includes a DC power supply, a pulse unit, a voltage clamp unit, and a control circuit unit. The pulse unit generates a pulse output by a boost chopper circuit including a series circuit of a dc reactor and a switching element. The voltage clamping section clamps both ends of the DC reactor to a clamping voltage by a capacitor voltage of a capacitor connected in parallel to the DC reactor of the pulse section. The control circuit unit controls the switching operation of the switching element of the pulse unit.

The control circuit unit includes a pulse pattern control unit that controls a pulse operation of a pulse pattern for generating a pulse output. In the pulse operation in the pulse mode, the switching element is repeatedly turned on and off at a predetermined duty ratio, and power is supplied from the dc power supply to the load by a pulse output corresponding to the duty ratio.

The pulse mode control unit includes a frequency control unit for varying the frequency. The frequency control unit turns on the switching element to turn on the DC reactor, thereby applying a power supply voltage to the DC reactor. At this time, the reactor current increases in the dc reactor. On the other hand, when the switching element is turned off, the reactor voltage is generated in the dc reactor by the energy accumulated in the reactor current. The reactor voltage is clamped to the capacitor voltage of a capacitor connected in parallel with the dc reactor.

The frequency control unit suppresses magnetic saturation of the DC reactor by varying the frequency of the pulse operation in each of a plurality of cycles in the initial stage. After the charging of the capacitor is completed, switching is made from the variable frequency in the initial stage to the stable frequency in the stable stage.

The variable frequency is obtained by fixing the time width Ton of the on period of the switching element in each period and gradually reducing the time width of the other period, thereby varying the frequency of the pulse operation.

In the frequency control method, the frequency is controlled by changing the time width of the off period in which the switching element is turned off.

(frequency control type Structure)

In the configuration based on the frequency control method, the frequency control unit fixes the time width Ton of the on period of the switching element in each of the plurality of periods in the initial stage of the pulse operation, and gradually decreases the time width Toff of the off period of the switching element as the capacitor voltage increases. Regarding the time width Toff of the off period, the initial period in which the capacitor voltage is small is set to be long, and the time width toward the stabilization period is shortened as the capacitor voltage increases. By the frequency control, the increase of the difference between the voltage-time product Soff during the off period and the voltage-time product Son during the on period is suppressed, and the generation of the magnetic saturation of the dc reactor is suppressed.

At the start of the pulse operation, the off period in which the time width can be changed is started from an initial value. After the pulse operation is started, the time width of the off period is gradually reduced from the initial value to execute the pulse operation. During this time, the time width of the other on period remains fixed. After the capacitor voltage becomes a voltage sufficient to reset the magnetic saturation, the variable time width is switched to the time width of the stabilization phase, and the pulse operation of the stabilization phase is performed. The time width of the increase/decrease can be set according to the driving condition such as the number of cycles from the initial value to the steady value in the steady stage. Whether the capacitor voltage reaches a voltage sufficient to reset the magnetic saturation can be detected based on a voltage value or a voltage change of the capacitor voltage of the capacitor.

The pulse mode control unit includes a voltage determination unit that determines whether or not the capacitor voltage reaches a charging voltage. The frequency control unit switches from the variable frequency to the stable frequency of the pulse mode based on a result determined by the voltage determination unit based on the voltage value or the voltage change of the capacitor voltage. The voltage of the capacitor voltage is compared with a set voltage, when the capacitor voltage exceeds the set voltage, or when the voltage change Delta VC of the capacitor voltage is compared with a set value, and when the voltage change Delta VC is within the set value, the charging of the capacitor is judged to be completed, and the capacitor voltage reaches a voltage which is enough to reset the magnetic saturation of the direct current reactor. As the set voltage, for example, a fully charged voltage set in advance can be used.

The DC pulse power supply device of the present invention includes a regeneration unit that regenerates a voltage amount exceeding a set voltage in a reactor voltage of a DC reactor to a DC power supply. The regeneration unit is provided with a capacitor connected in parallel with the DC reactor, and suppresses a surge voltage by regenerating a voltage amount exceeding the clamp voltage in the reactor voltage of the DC reactor using the capacitor voltage of the capacitor as the clamp voltage, and suppresses magnetic saturation of the DC reactor by frequency control using the clamped reactor voltage.

[ frequency control method for DC pulse Power supply device ]

The frequency control method of the present invention is a control method of a dc pulse power supply of the present invention including a dc power supply, a pulse section, a voltage clamp section, and a control circuit section, and suppresses occurrence of magnetic saturation of a dc reactor by controlling a frequency of a switching operation until a capacitor voltage becomes a voltage sufficient to reset magnetic saturation of the dc reactor.

In the pulse mode control for controlling a pulse operation in a pulse mode for generating a pulse output, the frequency of the pulse operation is varied by gradually decreasing the time width of each period in a plurality of periods in the initial stage of the pulse operation.

The variable frequency includes an operation mode of a pulse operation in an initial stage.

The action mode is as follows: the time width of an on period during which the switching element is closed to apply the power supply voltage to the DC reactor is fixed, and the time width of an off period during which the switching element is opened to clamp the DC reactor to the capacitor voltage is gradually reduced.

In the initial phase of the pulse action, the capacitor voltage is charged in a frequency control process in which the time width of the off period is gradually reduced. The increase in the capacitor voltage is stopped after the charging of the capacitor is completed, and the capacitor voltage becomes a constant voltage. The magnetic saturation of the DC reactor is reset in a stabilization phase by setting a charging voltage of the capacitor to a voltage sufficient to reset the magnetic saturation of the DC reactor.

The present invention sets the capacitor voltage at this time to a predetermined voltage. The prescribed voltage is a capacitor voltage of a capacitor sufficient to stably reset magnetic saturation in the pulse mode, and determines a point of time at which the pulse mode is switched from the frequency control in the initial stage to the stable stage. Whether or not the capacitor voltage has reached the predetermined voltage can be detected based on the voltage value or the voltage change of the capacitor voltage, and it can be determined that the capacitor voltage has reached the predetermined voltage by detecting that the voltage value of the capacitor voltage has reached the predetermined voltage value or the voltage change of the capacitor voltage has stopped. The predetermined voltage value can be determined by obtaining a voltage value of a capacitor voltage when the capacitor is charged to a voltage sufficient to reset magnetic saturation in advance.

After the capacitor voltage is charged to a predetermined voltage, the frequency control in the initial stage is stopped, and a predetermined power is supplied to the load while the pulse width is maintained at a predetermined width in the steady stage. When plasma is used as a load in a stable stage, a pulse output is formed based on a predetermined frequency of a pulse mode, and the pulse output is supplied to the plasma load to maintain plasma discharge.

Effects of the invention

As described above, according to the present invention, in the dc pulse power supply device, it is possible to suppress the occurrence of magnetic saturation of the dc reactor due to the pulse operation and to suppress the occurrence of an excessive current due to the magnetic saturation.

In the pulse operation of the dc pulse power supply device, the frequency is varied at an initial stage of a period until a capacitor voltage of a capacitor connected in parallel with the dc reactor reaches a voltage sufficient for resetting the magnetic saturation to suppress the magnetic saturation, and the frequency control is stopped at a stable stage when the capacitor voltage reaches a voltage sufficient for resetting the magnetic saturation, and power is supplied at a stable frequency in a pulse mode.

Drawings

Fig. 1 is a flowchart illustrating frequency control of the dc pulse power supply device of the present invention.

Fig. 2 is a flowchart illustrating a first embodiment of frequency control of the dc pulse power supply device according to the present invention.

Fig. 3 is a waveform diagram for explaining the voltage and current states of the first embodiment of the frequency control of the dc pulse power supply device according to the present invention.

Fig. 4 is a current waveform diagram of the dc reactor current at the time of frequency control according to the present invention.

Fig. 5 is a schematic configuration of the dc pulse power supply device according to the present invention.

Fig. 6 is a diagram for explaining a first configuration example of the dc pulse power supply of the present invention.

Fig. 7 is a diagram for explaining an example of a circuit configuration of an inverter circuit provided in a regeneration unit of a dc pulse power supply device according to the present invention.

Fig. 8 is a diagram for explaining a second configuration example of the dc pulse power supply of the present invention.

Fig. 9 is a diagram for explaining a third configuration example of the dc pulse power supply of the present invention.

Fig. 10 is a diagram for explaining a fourth configuration example of the dc pulse power supply of the present invention.

Fig. 11 is a diagram for explaining a fifth configuration example of the dc pulse power supply of the present invention.

Fig. 12 is a diagram for explaining a configuration example of a conventional dc pulse power supply device.

Fig. 13 is a schematic flowchart for explaining each mode of supplying a pulse output from the dc pulse power supply device to the plasma load.

Fig. 14 is a diagram for explaining magnetic saturation of the dc reactor.

Fig. 15 is a diagram for explaining a magnetic saturation state of the dc reactor.

Fig. 16 is a diagram for explaining an example of the current of the dc reactor.

Detailed Description

The DC pulse power supply device of the present invention performs frequency control for varying the frequency of a pulse operation until a capacitor voltage is charged to a voltage sufficient to reset magnetic saturation of a DC reactor at the start of the pulse operation as an initial stage of a pulse mode.

The frequency control of the dc pulse power supply device of the present invention will be described with reference to fig. 1 to 4, and the schematic configuration of the dc pulse power supply device of the present invention will be described with reference to fig. 5. A configuration example of the dc pulse power supply of the present invention will be described with reference to fig. 6 to 11.

[ frequency control ]

Fig. 1 is a flowchart for explaining the frequency control of the dc pulse power supply device of the present invention, and shows the control flow at the initial stage of the pulse mode.

The pulse unit provided in the dc pulse power supply device of the present invention includes a chopper circuit for generating a pulse output from a dc voltage, and a voltage clamp unit including a capacitor connected in parallel to a dc reactor of the chopper circuit in order to suppress an increase in surge voltage due to leakage inductance of the dc reactor of the chopper circuit. The voltage clamp unit clamps the voltage across the DC reactor to a capacitor voltage to suppress the rise of the surge voltage.

On the other hand, in the dc pulse power supply device, since the reactor voltage when the switching element of the chopper circuit is in the off state is suppressed by the voltage clamp portion, the voltage time product of the reset magnetic saturation becomes insufficient, which becomes a factor of the dc reactor magnetic saturation.

The invention controls the frequency by changing the frequency at the initial stage of the pulse mode, so that the voltage time product of the switch element in the off state is enough to reset the magnetic saturation, thereby inhibiting the generation of the magnetic saturation caused by clamping the reset voltage. Hereinafter, a control flow in the initial stage of the pulse mode will be described with reference to the flowchart of fig. 1.

In the frequency control, in the frequency control section in the initial stage, the time width of the on period is fixed, and the time width of the other off period is made variable, thereby making the frequency variable.

In the initial stage, the pulse operation is started with the initial frequency fA in the first cycle (S1). The time width T of one cycle of the pulse operation at this time is represented by (1/fA) (S2).

The time width T of one cycle of the pulse operation is a time width (Tfix + Tva) obtained by combining a fixed time width Tfix having a fixed time width and a variable time width Tva having a variable time width. The frequency is varied by gradually decreasing the variable time width Tva in each cycle (S3).

During the off period, the voltage applied to the dc reactor is clamped by the capacitor voltage. Before the charging is completed, the capacitor voltage is a voltage insufficient to reset the magnetic saturation of the dc reactor.

The frequency control of the present invention suppresses magnetic saturation of a DC reactor by varying the frequency until the capacitor voltage is charged. The frequency control is performed by a variable frequency until the capacitor voltage is charged to a voltage sufficient to reset the magnetic saturation of the DC reactor after the start of the pulse operation.

It is determined whether the charging of the capacitor voltage is completed (S4). When the charging of the capacitor voltage is not completed (S4), the frequency is changed from the initial frequency fA to the variable frequency fB (S5). The time width T of one cycle of the pulse operation is represented by (1/fB). Since the fixed time width Tfix is fixed in the time width T (═ 1/fB), the variable frequency fB is changed by decreasing the variable time width Tva (S6).

In the pulse mode, the pulse operation includes an initial stage at the time of start and a stable stage after the start, and the capacitor voltage increases in the initial stage and shifts to the stable stage after the capacitor voltage reaches a voltage sufficient for reset. When the charging of the capacitor voltage is completed (S4), the frequency control is ended by the voltage applied to the dc reactor during the off period reaching a voltage sufficient to reset the magnetic saturation, and the frequency is switched from the variable frequency fB to the pulse mode frequency fPU in the steady phase.

The pulse mode frequency fPU is a frequency of the pulse mode when a predetermined power is supplied to the load in the steady phase. The time width TPU of one period of the stabilization phase is determined based on the pulse mode frequency fPU, and the duty ratio of the on period and the off period is determined according to the power supplied to the load.

In the stabilization phase, the clamp voltage based on the capacitor voltage becomes a voltage sufficient to reset the magnetic saturation of the dc reactor. In this stabilization phase, the voltage applied to the dc reactor is suppressed to the clamp voltage of the capacitor voltage, but since the capacitor voltage is a voltage sufficient to reset the magnetic saturation of the dc reactor, the dc reactor does not magnetically saturate in the pulse mode switched to the stabilization frequency in the stabilization phase (S7).

(frequency control mode)

The frequency control based on the variable frequency is performed such that the time width Toff of the off period during which the switching element is turned off is gradually reduced in each cycle of the pulse operation.

In the frequency control method, the time width of the off period in which the switching element is turned off is gradually reduced in each cycle of the pulse operation. The frequency control suppresses an increase in a difference between a voltage-time product Soff during the off period and a voltage-time product Son during the on period, and suppresses generation of magnetic saturation of the dc reactor.

Hereinafter, a frequency control method will be described.

(frequency control mode)

Fig. 2 is a flowchart illustrating a control flow of the frequency control method, and fig. 3 is a waveform diagram illustrating a voltage/current state based on the frequency control method.

In the initial stage, the pulse operation is started with the initial frequency fA of the first cycle (S1). The time width T of one cycle of the pulse operation at this time is represented by (1/fA). The time width T of one cycle of the pulse operation is a time width obtained by adding the time width Ton of the on period in which the switching element is turned on and the time width Toff of the off period in which the switching element is turned off, the time width Ton of the on period is a fixed time width Tfix in which the time width is fixed, and the time width Toff of the off period is a variable time width Tva in which the time width is variable. The frequency is changed by gradually decreasing the time width Toff of the off period from the initial value ToffA (S2A).

The control circuit unit outputs an on signal of the time width Ton (S3a), and closes the switching element to be in an on state during the time width Ton (S3 b).

After the lapse of the time width Ton, the control circuit unit outputs an off signal of the time width Toff (S3c), and turns on the switching element to be in an off state during the time width Toff. The time width Toff is set to an initial value ToffA in the first period of the initial stage, and is set to a time width ToffB changed in accordance with the variable frequency fB in the subsequent period (S3 d).

After the lapse of the time width Toff, it is determined whether the charging of the capacitor voltage is completed (S4). When the charging of the capacitor voltage is not completed (S4), the frequency is changed from the initial frequency fA to the variable frequency fB (S5).

Since the time width Ton of the on period is fixed to the fixed time width Tfix, the frequency is made variable by changing the time width ToffB of the off period. The time width TB of one cycle of the pulse operation when the frequency is variable is represented by (1/fB), and the frequency fB is increased by gradually decreasing the time width ToffB of the off period (S6A).

When the charging of the capacitor voltage is completed (S4), the voltage applied to the dc reactor during the off period reaches a voltage sufficient to reset the magnetic saturation, the frequency control is ended, and the frequency is switched from the variable frequency fB to the pulse mode frequency fPU in the steady phase (S7).

Fig. 3 (a) shows an output voltage waveform, a dc reactor saturation current waveform, and a capacitor voltage waveform.

In the frequency control section in the initial stage, the time width is gradually shortened from the time width TA of the first cycle, and the frequency is increased to the frequency in the steady state. Since the time width Ton of the on period in which the switching element is in the on state is a fixed time width in each period, the frequency is made variable by changing the time width Toff of the off period in which the switching element is in the off state. The illustrated output voltage waveform shows a state in which the time width Ton is fixed, the time width Toff is gradually reduced, and the amplitude of the output voltage in which the switching element is in the off state increases toward the amplitude of the output voltage in the steady state in each period. The capacitor voltage rises from 0V to the charge completion voltage in the initial stage.

Fig. 3 (b) is a schematic diagram for explaining a suppression state of magnetic saturation by frequency control. Voltages of opposite polarities are applied to the DC reactors during the ON period and the OFF period of the switching element. The voltage-time product Son during the on period is the product of the voltage during the on period, which is approximately the power supply voltage, and the on-time width Ton.

On the other hand, the voltage-time product Soff during off-period is the product of the voltage during off-period and the time width Toff. The voltage during the off period is clamped by the capacitor voltage, and the charging completion voltage from 0V to the capacitor rises. Since the voltage during the off period is low in the initial stage, the voltage-time product Soff is insufficient to reset the magnetic saturation with respect to the voltage-time product Son in a state where the time width Toff is fixed.

The frequency control of the present invention fixes the time width Ton of the on period, and changes the time width Toff of the off period, and gradually decreases from a time width longer than the time width of the steady stage as the capacitor voltage increases. The time width Toff of the off period is gradually reduced as the capacitor voltage rises, and the voltage-time product Soff and the voltage-time product Son are made to be approximately equal in each period, thereby suppressing the occurrence of magnetic saturation.

The dc reactor saturation current repeats an increase in the on period and a decrease in the off period. The dc reactor suppresses magnetic saturation by frequency control, and thus the dc reactor saturation current is suppressed to be less than the magnetic saturation level.

[ stabilization phase of pulse mode ]

In the stable phase of the pulse mode, a pulse operation is performed at the frequency of the stable phase. In this stabilization phase, the capacitor voltage VC is charged to a voltage sufficient to reset the magnetic saturation of the dc reactor, and therefore the dc reactor is reset without being magnetically saturated, and the dc reactor current iDCL does not exceed the magnetic saturation level although it varies in each cycle.

Fig. 4 shows a current waveform of a dc reactor current based on the frequency control of the present invention. The illustrated current waveform indicates that the dc reactor current does not become an excessive current in any of the initial stage and the steady stage of the ignition mode, the dc mode, and the pulse mode.

[ general Structure of DC pulse Power supply device ]

Fig. 5 shows a configuration example of a dc pulse power supply device according to the present invention. The DC pulse power supply device includes: a dc power supply unit 10, a pulse unit 20, a voltage clamp unit 30cl, a control circuit unit 40, and a voltage detection unit 60. The pulse unit 20 supplies a pulse output generated from the dc voltage of the dc power supply unit 10 to the load 50.

The pulse unit 20 can be formed of a boost chopper circuit. The pulse unit 20 includes a boost chopper circuit configured by a series connection of a dc reactor 21 and a switching element 22. The dc reactor 21 is connected in series between the dc power supply unit 10 and the load 50, and the switching element 22 is connected in parallel to the load 50. The drive circuit 23 turns on/off the switching element 22 to generate a pulse output having a pulse waveform from the dc voltage. The dc reactor 21 is connected in parallel with the capacitor C of the voltage clamp section 30 cl.

In the illustrated configuration example, the dc power supply side of the pulse unit 20 includes a terminal B grounded and a terminal a serving as a negative voltage on the low voltage side. The switching element 22 is an example of an FET, and has a source S side connected to a low voltage side and a drain D side connected to a high voltage side of a ground voltage, and inputs a drive signal from the drive circuit 23 to a gate G side.

The control circuit unit 40 controls the boost chopper circuit via the drive circuit 23, and generates a control signal for determining the time width or duty ratio of the on time and the off time of the switching element 22 corresponding to the target pulse output. The drive circuit 23 outputs a drive signal to the gate G of the switching element 22 based on the control signal of the control circuit unit 40, and turns on/off the switching element 22.

The source S side of the switching element 22 is connected to the load side of the dc reactor 21, and the drain D side of the switching element 22 is grounded. When the switching element 22 is in the on state, the load side of the dc reactor 21 is grounded, and the dc reactor current iDCL flows from the terminal B to the terminal a via the switching element 22 and the dc reactor 21 in the on state. At this time, electromagnetic energy is accumulated in the dc reactor 21. When the switching element 22 is switched from the on state to the off state, the reactor voltage VDCL is generated in the dc reactor 21 by the energy stored in the dc reactor 21. The boost chopper circuit repeats the on operation and the off operation of the switching element 22, and increases the output voltage Vo in accordance with the duty ratio of the on/off time.

The voltage clamp section 30cl clamps the capacitor voltage VC of the capacitor C to a clamp voltage. When the switching element 22 is in the off state, the capacitor C connected in parallel with the dc reactor 21 applies a capacitor voltage VC to the dc reactor 21. Thereby, the both-end voltage of the dc reactor 21 is clamped to the clamp voltage by the capacitor voltage VC.

The control circuit unit 40 includes: an ignition mode control unit (IG mode control unit) 42 that ignites plasma in an ignition mode; a DC mode control unit (DC mode control unit) 43 that sets a constant discharge voltage state in a DC mode after plasma ignition; a pulse pattern control unit 44 that forms a pulse output by frequency control of a pulse pattern; and a mode switching unit 41 for switching the modes.

The pulse mode control unit 44 changes the frequency of the on/off switching element 22 by switching the frequency. In the initial stage, first, a pulse operation is performed for one cycle at an initial frequency fA, and then, a pulse operation is performed while changing the frequency over a plurality of cycles by a variable frequency fB. After the pulse operation is performed by changing the frequency in the initial stage, the pulse operation is performed at the stable frequency in the stable stage in each period of the subsequent pulse mode to form a pulse output.

The pulse mode control unit 44 includes a frequency control unit 44c for varying the frequency, and in the initial stage of the pulse operation, the frequency is varied so that the time width Ton of the on period in which the switching element is closed and turned on is fixed and the time width Toff of the off period in which the switching element is opened and turned off is gradually reduced.

By changing the frequency, an increase in the difference between the voltage-time product when the switching element is in the on state and the voltage-time product when the switching element is in the off state is suppressed, and the occurrence of magnetic saturation in the initial stage is suppressed.

In the steady phase of the pulse operation, the switching element is switched at the frequency of the steady phase of the pulse mode, and steady power is supplied to the load. In the stabilization phase, the capacitor voltage is a voltage sufficient to reset the magnetic saturation of the dc reactor, and therefore, even in a state where the voltage is clamped by the capacitor voltage, the dc reactor does not magnetically saturate in the pulse mode of the frequency switched to the stabilization phase.

The frequency controller 44c includes an initial frequency unit 44c1, a variable frequency unit 44c2, and a pulse pattern frequency unit 44c 3. The initial frequency unit 44c1 has an initial frequency fA, the variable frequency unit 44c2 generates a variable frequency fB, and the pulse pattern frequency unit 44c3 has a pulse pattern frequency fPU at a steady stage. The pulse mode control unit 44 includes a period detection unit 44a that detects one period, and a voltage determination unit 44b that determines the state of charge of the capacitor using the capacitor voltage VC or the voltage change Δ VC of the capacitor voltage, in addition to the frequency control unit 44 c. The capacitor voltage VC is detected by the voltage detection unit 60.

Upon receiving the start signal, the mode switching unit 41 transmits a signal for starting ignition to the ignition mode control unit 42. The ignition mode control unit 42 receives the start signal and performs an ignition operation.

The mode switching unit 41 monitors the output voltage Vo, and transmits a switching signal for switching from the ignition mode to the dc mode control unit 43 based on the output voltage Vo. The dc mode control unit 43 applies a dc voltage of a constant voltage to set a discharge voltage state. The mode switching unit 41 transmits a switching signal of the pulse mode after switching to the dc mode to the pulse mode control unit 44.

In the pulse pattern control unit 44, the frequency control unit 44c starts the control of the pulse pattern using the initial frequency fA of the initial frequency unit 44c 1. The drive circuit 23 performs on/off operation for one cycle at the cycle of the initial frequency fA.

The cycle detection unit 44a detects each cycle of the pulse operation upon receiving the switching signal of the pulse mode. The voltage determination unit 44b instructs the voltage determination unit 44b to determine the state of charge of the capacitor each time the period detection unit 44a detects the period of the pulse operation. The voltage determination unit 44b determines, for each cycle of the pulse operation, whether the capacitor voltage VC detected by the voltage detection unit 60 has reached the set voltage, or whether the voltage change Δ VC, which is the difference between the capacitor voltage VC and the capacitor voltage VC in the previous cycle, is a voltage change larger than the set value.

When the capacitor voltage VC does not reach the set voltage or when the voltage change Δ VC exceeds the set value, the frequency control unit 44c controls the drive circuit 23 using the variable frequency fB of the variable frequency control unit 44c 2. The variable frequency part 44c2 gradually increases the variable frequency fB for each cycle and updates the variable frequency part.

The variable frequency part 44c2 updates the variable frequency fB by adding or subtracting Δ Duty to the variable frequency fB of the previous cycle. The initial variable frequency fB uses the initial frequency fA as the variable frequency of the previous period.

When the capacitor voltage VC reaches the set voltage or when the voltage change Δ VC does not exceed the set value, the variable frequency fB is switched to the pulse mode frequency fPU in the steady phase, and the drive circuit 23 is controlled using the pulse mode frequency fPU of the pulse mode frequency section 44c 3.

[ example of Structure of DC pulse Power supply device ]

Hereinafter, a configuration example of the dc pulse power supply device will be described. The pulse section of the direct current pulse power supply device of the configuration example includes a regeneration section for regenerating a reactor voltage of the direct current reactor. The regeneration unit includes a capacitor connected in parallel with the dc reactor, and is configured to regenerate a reactor voltage of the dc reactor. The regeneration unit, in addition to regenerating the reactor voltage of the dc reactor, clamps the capacitor voltage of the capacitor in the same manner as the voltage clamp unit 30cl, and clamps the reactor voltage of the dc reactor connected in parallel to the capacitor voltage.

The first structural example is a structure for regenerating reactor voltages at both ends of a dc reactor of a boost chopper circuit, the second to fifth structural examples are structures for regenerating a reactor voltage of one dc reactor of two magnetically coupled dc reactors of the boost chopper circuit, the second and fifth structural examples are structures in which two magnetically coupled dc reactors are a tapped single-turn transformer, and the third and fourth structural examples are structures in which two magnetically coupled dc reactors are a multi-turn transformer.

In the first to fifth configuration examples, the voltage on the low voltage side of the dc power supply is used as the reference voltage for the regenerative reactor voltage.

[ first configuration example of DC pulse Power supply device ]

A first configuration example of the dc pulse power supply device of the present invention will be described with reference to fig. 6.

The DC pulse power supply device of the present invention includes: a direct-current power supply unit (DC unit) 10; a pulse unit 20A that supplies a pulse output generated by a boost chopper circuit connected to the dc power supply unit 10 to the load 5; a regeneration unit 30 that regenerates the excessive voltage increase amount generated by the pulse unit 20A to the dc power supply unit 10 side; a control circuit unit 40 for controlling the dc power supply unit 10, the pulse unit 20A, the drive circuit 23, and the regeneration unit 30; and a voltage detection unit 60 that detects the capacitor voltage and supplies a pulse output to the load 5 via the output cable 3. In fig. 6, an example of the plasma generation device is shown as the load 5, but the load 5 is not limited to the plasma generation device, and may be used for pulse laser excitation, an electric discharge machine, and the like.

(DC Power supply section)

The DC power supply unit (DC unit) 10 includes: a rectifier 11 that rectifies an ac voltage of the ac power supply 2 into a dc voltage; a snubber circuit 12 that absorbs and suppresses a spike high voltage generated in a transient state during rectification; a single-phase inverter circuit 13 that converts a direct-current voltage into an alternating-current voltage; a single-phase transformer 14 for converting the ac voltage of the single-phase inverter circuit 13 to a predetermined voltage value; a rectifier 15 that rectifies an ac voltage obtained by voltage conversion of the single-phase transformer 14 into a dc voltage; and a capacitor 16(CF) having a voltage between both ends as a dc voltage of the dc power supply unit. One end of the capacitor 16 is grounded, and the other end forms a low voltage of a negative voltage. In the structure shown in fig. 6, an example of a capacitive load of the plasma generation device is shown as the load 5. Here, since one end of the plasma generating apparatus is grounded and a negative voltage is supplied, the dc power supply unit 10 generates a pulse output of a negative voltage.

The single-phase inverter circuit 13 performs a switching operation in accordance with a control signal from the control circuit unit 40, and converts a dc voltage into an ac voltage of a predetermined frequency. The respective circuit elements of the rectifiers 11 and 15, the snubber circuit 12, the single-phase inverter circuit 13, and the single-phase transformer 14 constituting the dc power supply unit 10 may have any conventionally known circuit configuration.

(pulse section)

The pulse unit 20A generates a pulse waveform from the dc voltage by a boost chopper circuit. The boost chopper circuit includes: a dc reactor 21a connected in series between the dc power supply side and the load side; a switching element (Q1)22 connected in parallel with the load side; and a drive circuit 23 for driving the on/off operation of the switching element 22. The dc power supply side of the pulse unit 20A includes a terminal B connected to ground and a terminal a serving as a negative voltage on the low voltage side. The illustrated switching element 22 is an example of an FET, and has a source S side connected to a low voltage side and a drain D side connected to a high voltage side of a ground voltage, and inputs a drive signal from the drive circuit 23 to a gate G side.

The control circuit unit 40 generates a signal for determining the time width or duty ratio of the on time and the off time of the switching element 22 in accordance with the target pulse output in order to operate the boost chopper circuit, and generates a control signal based on the voltage and the current at the output terminal of the dc power supply unit 10.

The drive circuit 23 outputs a drive signal to the gate G of the switching element 22 based on the control signal of the control circuit unit 40, and performs on/off operation of the switching element 22.

The source S side of the switching element 22 is connected to the load side of the dc reactor 21a, and the drain D side of the switching element 22 is grounded. When the switching element 22 is in the on state, the load side of the dc reactor 21a is grounded, and a current flows from the terminal B to the terminal a via the switching element 22 and the dc reactor 21a in the on state. At this time, electromagnetic energy is accumulated in the dc reactor 21 a. When the switching element 22 is switched from the on state to the off state, the reactor voltage VDCL is generated in the dc reactor 21a by the energy stored in the dc reactor 21 a. The boost chopper circuit repeats the on operation and the off operation of the switching element 22, and increases the output voltage Vo in accordance with the duty ratio of the on/off time.

(regeneration section)

The regeneration unit 30 regenerates, to the dc power supply, a voltage amount exceeding a set voltage within a reactor voltage of a dc reactor of the boost chopper circuit. The regeneration unit 30 includes a diode 31, a capacitor 32(C1), an inverter circuit 33, a transformer 34, and a rectifier 35.

One end of the capacitor 32(C1) is connected to the load-side end of the dc reactor 21a, and the other end is connected to the dc power supply-side end of the dc reactor 21a via the diode 31, and a reactor voltage generated in the dc reactor 21a is applied thereto. The capacitor voltage VC1 of the capacitor 32(C1) is determined based on the dc voltage VAB of the dc power supply and the transformation ratio of the transformer, and when the transformation ratio of the transformer 34 is (n 2: n1), VC1 is set to (n2/n1) × VAB. The diode 31 is connected with the direction from the pulse unit 20A toward the capacitor 32(C1) of the regeneration unit 30 as the forward direction, and when the reactor voltage VDCL of the dc reactor 21a exceeds the capacitor voltage VC1 of the capacitor 32(C1), the regeneration unit 30 regenerates the reactor voltage VDCL by a voltage amount exceeding the capacitor voltage VC1 of the capacitor 32 (C1). Therefore, the regeneration unit 30 performs a regeneration operation with the capacitor voltage VC1 of the capacitor 32(C1) as a threshold value.

As a method of determining the capacitor voltage VC1, the output of the inverter circuit 33 may be controlled in addition to changing the transformation ratio of the transformer 34. For example, PWM control, phase shift control, and the like are available, but the present invention is not limited to this as long as the output of the inverter circuit is controlled.

In the circuit configuration shown in fig. 6, the regeneration unit 30 has one end connected to the low-voltage-side input terminal of the pulse unit 20A, and regenerates the reactor voltage VDCL of the dc reactor 21a as the regeneration input voltage Vin with reference to the voltage (negative voltage) on the low voltage side.

The inverter circuit 33 performs dc-ac conversion between the dc voltage on the capacitor 32 side and the ac voltage on the transformer 34 side, maintains the capacitor voltage VC1 of the capacitor 32(C1) at a constant voltage based on the dc voltage VAB of the dc power supply, and converts the excess voltage amount to ac and regenerates it to the dc power supply side when the reactor voltage VDCL exceeds the capacitor voltage VC1 of the capacitor 32 (C1). Since the capacitor voltage VC1 is kept at a constant voltage, the reactor voltage VDCL of the direct current reactor 21a is clamped to the capacitor voltage VC 1. The inverter circuit 33 can be formed of, for example, a bridge circuit of switching elements. The switching operation of the switching element is controlled in accordance with a control signal α from the control circuit unit 40.

The transformer 34 modulates a voltage ratio between the dc voltage VAB of the dc power supply unit 10 and the capacitor voltage VC1 of the capacitor 32(C1) based on the transformation ratio. In the case where the transformation ratio of the transformer 34 is (n 2: n1), the voltage relationship between the dc voltage VAB and the capacitor voltage VC1 is represented by VC1 ═ n2/n1 × VAB.

The rectifier 35 rectifies the ac voltage on the transformer 34 side into a dc voltage on the dc power supply unit 10 side. The dc-side terminal of the rectifier 35 is connected to the terminal A, B of the dc power supply unit 10, and power is regenerated to the dc power supply unit 10 only when the capacitor voltage VC1 exceeds the voltage based on the dc voltage VAB.

The configuration of the regeneration unit 30 is not limited to the above configuration as long as it has a function of clamping the voltage across the dc reactor 21a to a predetermined voltage and a function of regenerating the amount of electric power exceeding the predetermined voltage to the dc power supply side.

(example of the regeneration section)

A circuit configuration example of an inverter circuit provided in a regeneration unit of a dc pulse power supply device will be described with reference to fig. 7.

The regeneration unit 30 includes an inverter circuit 33, and the inverter circuit 33 outputs an ac voltage obtained by dc-ac converting the dc voltage VC1 of the capacitor 32(C1) to the transformer 34. The inverter circuit 33 includes: a bridge circuit 33a including switching elements QR1 to QR 4; and a drive circuit 33b that generates drive signals for driving the switching elements QR1 to QR4 based on the control signal α. Here, an example of a full bridge circuit is shown as the bridge circuit 33a, but a half bridge circuit or a multiphase inverter circuit may be used.

[ second Structure of DC pulse Power supply device ]

A second configuration example of the dc pulse power supply device of the present invention will be described with reference to fig. 8. The second configuration example is different from the first configuration example in the configuration of the boost chopper circuit of the pulse section 20, and the other configurations are the same as the first configuration example. Hereinafter, a configuration different from the first configuration example will be described, and a description of other common configurations will be omitted.

The dc reactor 21a included in the boost chopper circuit of the first configuration example is formed of a single coil. In contrast, the dc reactor 21b of the second configuration example is constituted by a tapped single-turn transformer instead of the single coil of the boost chopper circuit of the first configuration example. The dc reactor 21b, which is formed of a tapped single-turn transformer, may be formed by connecting a magnetically coupled first dc reactor 21b-1 and second dc reactor 21b-2 in series, with the connection point of the first dc reactor 21b-1 and the second dc reactor 21b-2 being a tap point. One end of the first dc reactor 21b-1 is connected to the low-voltage-side terminal a of the dc power supply, one end of the second dc reactor 21b-2 is connected to the load side, and a tap point of a connection point between the first dc reactor 21b-1 and the second dc reactor 21b-2 is connected to the source S terminal of the switching element 22.

When the switching element 22 is in the on state, a tap point of a connection point of the dc reactor 21B is grounded, and a current flows from the terminal B to the terminal a via the switching element 22 in the on state and the first dc reactor 21B-1 of the dc reactor 21B. At this time, electromagnetic energy is accumulated in the first direct current reactor 21 b-1.

When the switching element 22 is switched from the on state to the off state, the reactor voltage VDCL1 is generated in the first dc reactor 21b-1 and the reactor voltage VDCL2 is generated in the second dc reactor 21b-2 by the dc reactor current iDCL flowing due to the energy stored in the first dc reactor 21b-1 of the dc reactor 21 b. The boost chopper circuit increases the output voltage Vo in the same manner as in the first configuration example by repeating the on operation and the off operation of the switching element 22.

The voltage ratio between the reactor voltage VDCL1 of the first dc reactor 21b-1 and the reactor voltage VDCL2 of the second dc reactor 21b-2 corresponds to the ratio of the inductance ratio between the first dc reactor 21b-1 and the second dc reactor 21 b-2. The turn ratio of the tapped single-turn coil of the first direct-current reactor 21b-1 and the second direct-current reactor 21b-2 of the direct-current reactor 21b is n1 p: in the case of n2p, the voltage ratio (VDCL1/VDCL2) between the reactor voltage VDCL1 of the first dc reactor 21b-1 and the reactor voltage VDCL2 of the second dc reactor 21b-2 is the turn ratio (n1p/n2 p).

The regeneration unit 30 of the second configuration example operates in the same manner by applying the reactor voltage VDCL1 of the first dc reactor 21b-1 of the dc reactor 21b instead of the reactor voltage VDCL of the dc reactor 21a of the first configuration example.

In the regeneration unit 30, one end of the capacitor 32(C1) is connected to a connection point between the first dc reactor 21b-1 and the second dc reactor 21b-2 of the dc reactor 21b, and the other end is connected to a dc power supply side end of the first dc reactor 21b-1 via the diode 31, and the reactor voltage VDCL1 generated in the first dc reactor 21b-1 is applied. The capacitor voltage VC1 of the capacitor 32(C1) is determined based on the dc voltage VAB of the dc power supply and the transformation ratio of the transformer 34, and when the transformation ratio of the transformer 34 is (n 2: n1), VC1 is set to (n2/n1) × VAB. When the reactor voltage VDCL1 of the first dc reactor 21B-1 exceeds the capacitor voltage VC1 of the capacitor 32(C1), the regeneration unit 30 regenerates the reactor voltage VDCL1 by the amount of voltage exceeding the capacitor voltage VC1 of the capacitor 32(C1) by connecting the diode 31 with the direction from the pulse unit 20B toward the capacitor 32(C1) of the regeneration unit 30 as the forward direction. Therefore, as in the first configuration example, the regeneration unit 30 performs a regeneration operation with the capacitor voltage VC1 of the capacitor 32(C1) as a threshold value.

The output voltage Vo is obtained by superimposing the reactor voltage VDCL1 of the first dc reactor 21b-1 and the reactor voltage VDCL2 of the second dc reactor 21b-2 on the dc voltage VAB of the dc power supply (Vo VAB + VDCL1+ VDCL 2). Since the reactor voltage VDCL1 of the first dc reactor 21b-1 is clamped to the capacitor voltage VC1, the output voltage Vo becomes Vo VAB + VC1+ VDCL 2.

[ third Structure of DC pulse Power supply device ]

A third configuration example of the dc pulse power supply device of the present invention will be described with reference to fig. 9. The third configuration example is different from the first and second configuration examples in the configuration of the boost chopper circuit of the pulse section 20C, and the other configurations are the same as the first and second configuration examples. Hereinafter, a configuration different from the first and second configuration examples will be described, and a description of other common configurations will be omitted.

The dc reactor 21b included in the boost chopper circuit of the second configuration example is formed of a tapped single-turn transformer. In contrast, the dc reactor 21c of the third configuration example is configured by a multi-turn transformer instead of the tapped single-turn transformer of the boost chopper circuit of the second configuration example. An example of a polarity-adding transformer is shown as a multi-turn transformer of the dc reactor 21 c.

The dc reactor 21c formed of a multi-turn transformer is configured by connecting a first dc reactor 21c-1 and a second dc reactor 21c-2, which are magnetically coupled, in parallel. The first dc reactor 21c-1 has one end connected to the terminal a on the low voltage side of the dc power supply and the other end connected to the source S of the switching element 22. One end of the second dc reactor 21c-2 is connected to the source S end of the switching element 22, and the other end is connected to the load side.

When the switching element 22 is in the on state, the end of the dc reactor 21c on the switching element 22 side of the first dc reactor 21c-1 is grounded, and a current flows from the terminal B to the terminal a via the switching element 22 and the first dc reactor 21c in the on state. At this time, electromagnetic energy is accumulated in the first dc reactor 21 c.

Next, when the switching element 22 is switched from the on state to the off state, the reactor voltage VDCL1 is generated in the first dc reactor 21c-1 by the dc reactor current iDCL flowing due to the stored energy stored in the first dc reactor 21c-1 of the dc reactor 21c, and the reactor voltage VDCL2 is generated in the second dc reactor 21c-2 by magnetic coupling with the first dc reactor 21 c-1. The boost chopper circuit repeats the on operation and the off operation of the switching element 22, thereby increasing the output voltage Vo in the same manner as in the first and second configuration examples.

The voltage ratio between the reactor voltage VDCL1 of the first dc reactor 21c-1 and the reactor voltage VDCL2 of the second dc reactor 21c-2 corresponds to the ratio of the inductance ratio between the first dc reactor 21c-1 and the second dc reactor 21 c-2. When the turn ratio of the multi-turn coil of the first dc reactor 21c-1 and the second dc reactor 21c-2 of the dc reactor 21c is set to (n1 p: n2p), the voltage ratio (VDCL1/VDCL2) of the reactor voltage VDCL1 of the first dc reactor 21c-1 to the reactor voltage VDCL2 of the second dc reactor 21c-2 becomes the turn ratio (n1p/n2 p).

The regeneration unit of the third configuration example operates in the same manner as the reactor voltage VDCL1 of the first dc reactor 21b-1 of the dc reactor 21b of the second configuration example.

In the regeneration unit 30, one end of the capacitor 32(C1) is connected to the switching element side end of the first dc reactor 21C-1 of the dc reactor 21C, and the other end is connected to the dc power supply side end of the first dc reactor 21C-1 via the diode 31, and the reactor voltage VDCL1 generated in the first dc reactor 21C-1 is applied. The capacitor voltage VC1 of the capacitor 32(C1) is determined based on the dc voltage VAB of the dc power supply and the transformation ratio of the transformer, and when the transformation ratio of the transformer 34 is (n 2: n1), VC1 is set to (n2/n1) × VAB. The diode 31 is connected with the direction from the pulse unit toward the capacitor 32(C1) of the regeneration unit 30 as the forward direction, and when the reactor voltage VDCL1 of the first dc reactor 21C-1 exceeds the capacitor voltage VC1 of the capacitor 32(C1), the regeneration unit 30 regenerates the voltage amount by which the reactor voltage VDCL1 exceeds the capacitor voltage VC1 of the capacitor 32 (C1). Therefore, as in the first and second configuration examples, the regeneration unit 30 performs a regeneration operation with the capacitor voltage VC1 of the capacitor 32(C1) as a threshold value.

The output voltage Vo is obtained by superimposing the reactor voltage VDCL1 of the first dc reactor 21c-1 and the reactor voltage VDCL2 of the second dc reactor 21c-2 on the dc voltage VAB of the dc power supply (Vo VAB + VDCL1+ VDCL 2). Since the reactor voltage VDCL1 of the first dc reactor 21c-1 is clamped to the capacitor voltage VC1, the output voltage Vo becomes Vo VAB + VC1+ VDCL 2. When the turn ratio of the first dc reactor 21c-1 to the second dc reactor 21c-2 is (n1p/n2p), the reactor voltages VDCL1 and VDCL2 are represented by (VDCL1/VDCL2 — n1p/n2 p).

[ fourth Structure of DC pulse Power supply device ]

A fourth configuration example of the dc pulse power supply device of the present invention will be described with reference to fig. 10. The fourth configuration example is different from the third configuration example in the configuration of a transformer for a dc reactor in a boost chopper circuit constituting the pulse section 20D, and the other configuration is the same as the third configuration example.

The dc reactor 21c included in the boost chopper circuit of the third configuration example is a multi-turn transformer with a polarity added. In contrast, the dc reactor 21d of the fourth configuration example is configured by a multi-turn transformer of a decreasing polarity instead of the multi-turn transformer of an increasing polarity of the boost chopper circuit of the third configuration example.

The dc reactor 21d formed of a multi-turn transformer is configured by connecting a magnetically coupled first dc reactor 21d-1 and second dc reactor 21d-2 in parallel. The first dc reactor 21d-1 has one end connected to the terminal a on the low voltage side of the dc power supply and the other end connected to the source S of the switching element 22. One end of the second dc reactor 21d-2 is connected to the terminal a on the low voltage side of the dc power supply, and the other end is connected to the load side.

When the switching element 22 is in the on state, the end of the dc reactor 21d on the switching element 22 side of the first dc reactor 21d-1 is grounded, and a current flows from the terminal B to the terminal a via the switching element 22 and the first dc reactor 21d-1 in the on state. At this time, electromagnetic energy is accumulated in the first direct current reactor 21 d-1.

When the switching element 22 is switched from the on state to the off state, the reactor voltage VDCL1 is generated in the first dc reactor 21d-1 by the dc reactor current iDCL flowing due to the energy stored in the first dc reactor 21d-1 of the dc reactor 21d, and the reactor voltage VDCL2 is generated in the second dc reactor 21d-2 by magnetic coupling with the first dc reactor 21 d-1. The boost chopper circuit repeats the on operation and the off operation of the switching element 22, thereby increasing the output voltage Vo in the same manner as in the first, second, and third configuration examples.

The voltage ratio of the reactor voltage VDCL1 of the first dc reactor 21d-1 to the reactor voltage VDCL2 of the second dc reactor 21d-2 corresponds to the ratio of the inductance ratio of the first dc reactor 21d-1 to the second dc reactor 21 d-2. When the turn ratio of the multi-turn coil of the first direct current reactor 21d-1 and the second direct current reactor 21d-2 of the direct current reactor 21d is set to (n1 p: n2p), the voltage ratio (VDCL1/VDCL2) of the reactor voltage VDCL1 of the first direct current reactor 21d-1 to the reactor voltage VDCL2 of the second direct current reactor 21d-2 becomes the turn ratio (n1p/n2 p).

The dc reactor 21d of the regeneration unit of the fourth configuration example operates in the same manner as the reactor voltage VDCL1 of the first dc reactor 21c of the third configuration example.

In the regeneration unit 30, one end of the capacitor 32(C1) is connected to the switching element side end of the first dc reactor 21d-1 of the dc reactor 21d, and the other end is connected to the dc power supply side end of the first dc reactor 21d-1 via the diode 31, and the reactor voltage VDCL1 generated in the first dc reactor 21d-1 is applied. The capacitor voltage VC1 of the capacitor 32(C1) is determined based on the dc voltage VAB of the dc power supply and the transformation ratio of the transformer, and when the transformation ratio of the transformer 34 is (n 2: n1), VC1 is set to (n2/n1) × VAB. The diode 31 is connected with the direction from the pulse unit toward the capacitor 32(C1) of the regeneration unit 30 as the forward direction, and when the reactor voltage VDCL1 of the first dc reactor 21d-1 exceeds the capacitor voltage VC1 of the capacitor 32(C1), the regeneration unit 30 regenerates the voltage amount by which the reactor voltage VDCL1 exceeds the capacitor voltage VC1 of the capacitor 32 (C1). Therefore, as in the first, second, and third configuration examples, the regeneration unit 30 performs a regeneration operation with the capacitor voltage VC1 of the capacitor 32(C1) as a threshold value.

The output voltage Vo is obtained by superimposing the reactor voltage VDCL2 of the second dc reactor 21d-2 on the dc voltage VAB of the dc power supply (Vo VAB + VDCL 2). When the turn ratio of the first dc reactor 21d-1 to the second dc reactor 21d-2 is (n1p/n2p), the reactor voltages VDCL1 and VDCL2 are represented by (VDCL1/VDCL2 ═ n1p/n2 p). Therefore, with VDCL1 clamped by VC1, the output voltage Vo is represented by Vo VAB + VC1 × (n1p/n2 p).

[ fifth Structure of DC pulse Power supply device ]

A fifth configuration example of the dc pulse power supply device of the present invention will be described with reference to fig. 11. The fifth configuration example is different from the second configuration example in the manner of installing the dc reactors of the boost chopper circuit, and the other configurations are the same as the second configuration example. Hereinafter, a configuration different from the second configuration example will be described, and descriptions of other common configurations will be omitted.

The dc reactor 21e included in the boost chopper circuit of the fifth configuration example is formed of a tapped one-turn transformer, similarly to the dc reactor 21b of the boost chopper circuit of the second configuration example, but differs in the manner of installation on the power supply line. The dc reactor 21b of the second configuration example is connected to a low-voltage-side power supply line of the dc power supply, whereas the dc reactor 21e of the fifth configuration example is connected to a high-voltage-side power supply line of the dc power supply.

In the pulse unit 20E, the dc reactor 21E composed of a tapped single-turn transformer is configured by connecting the magnetically coupled first dc reactor 21E-1 and second dc reactor 21E-2 in series, and the connection point of the first dc reactor 21E-1 and second dc reactor 21E-2 is set as a tap point. One end of the first dc reactor 21e-1 is connected to the high-voltage-side terminal B of the dc power supply, one end of the second dc reactor 21e-2 is connected to the load side and grounded, and a tap point of a connection point between the first dc reactor 21e-1 and the second dc reactor 21e-2 is connected to the drain D of the switching element 22.

When the switching element 22 is in the on state, a tap point of a connection point of the dc reactor 21e is grounded via the second dc reactor 21e-2, and a current flows from the terminal B to the terminal a via the first dc reactor 21e-1 and the switching element 22 in the on state.

At this time, electromagnetic energy is accumulated in the first direct current reactor 21 e-1.

When the switching element 22 is switched from the on state to the off state, the reactor voltage VDCL1 is generated in the first dc reactor 21e-1 and the reactor voltage VDCL2 is generated in the second dc reactor 21e-2 by the dc reactor current iDCL flowing due to the energy stored in the first dc reactor 21e-1 of the dc reactor 21 e. The boost chopper circuit increases the output voltage Vo in the same manner as in the first configuration example by repeating the on operation and the off operation of the switching element 22.

The voltage ratio between the reactor voltage VDCL1 of the first dc reactor 21e-1 and the reactor voltage VDCL2 of the second dc reactor 21e-2 corresponds to the ratio of the inductance ratio between the first dc reactor 21e-1 and the second dc reactor 21 e-2. The turn ratio of a tapped single-turn coil of a first direct current reactor 21e-1 and a second direct current reactor 21e-2 of a direct current reactor 21 is set as n1 p: in the case of n2p, the voltage ratio (VDCL1/VDCL2) between the reactor voltage VDCL1 of the first dc reactor 21e-1 and the reactor voltage VDCL2 of the second dc reactor 21e-2 is the turn ratio (n1p/n2 p).

The regeneration unit 30 of the fifth configuration example operates in the same manner by applying the reactor voltage VDCL1 of the first dc reactor 21e-1 of the dc reactor 21e instead of the reactor voltage VDCL of the dc reactor 21a of the first configuration example.

In the regeneration unit 30, one end of the capacitor 32(C1) is connected to a connection point between the first dc reactor 21e-1 and the second dc reactor 21e-2 of the dc reactor 21e, and the other end is connected to a dc power supply side end of the first dc reactor 21e-1 via the diode 31, and the reactor voltage VDCL1 generated in the first dc reactor 21e-1 is applied. The capacitor voltage VC1 of the capacitor 32(C1) is determined based on the dc voltage VAB of the dc power supply and the transformation ratio of the transformer, and when the transformation ratio of the transformer 34 is (n 2: n1), VC1 is set to (n2/n1) × VAB. When the reactor voltage VDCL1 of the first dc reactor 21e-1 exceeds the capacitor voltage VC1 of the capacitor 32(C1), the regeneration unit 30 regenerates the reactor voltage VDCL1 by the amount of voltage exceeding the capacitor voltage VC1 of the capacitor 32(C1) by connecting the diode 31 in the reverse direction from the pulse unit 20D toward the capacitor 32(C1) of the regeneration unit 30. Therefore, as in the first configuration example, the regeneration unit 30 performs a regeneration operation with the capacitor voltage VC1 of the capacitor 32(C1) as a threshold value.

The output voltage Vo is obtained by superimposing the reactor voltage VDCL1 of the first dc reactor 21e-1 and the reactor voltage VDCL2 of the second dc reactor 21e-2 on the dc voltage VAB of the dc power supply (Vo VAB + VDCL1+ VDCL 2). Since the reactor voltage VDCL1 of the first dc reactor 21e-1 is clamped to the capacitor voltage VC1, the output voltage Vo becomes Vo VAB + VC1+ VDCL 2.

In the dc pulse power supply devices according to the first to fifth configuration examples, the control circuit unit 40 includes a pulse pattern control unit that controls a pulse operation of a pulse pattern for generating a pulse output at a constant cycle, and the pulse pattern control unit includes a frequency control unit that varies a frequency. The frequency control unit changes the frequency at the initial stage of the pulse operation, thereby suppressing magnetic saturation at the initial stage of the pulse mode.

Further, the voltage of the S terminal of the switching element is clamped to a voltage lower than the surge voltage, excessive rise of the voltage applied to the switching element is suppressed, and the magnetic saturation of the dc reactors 21a to 21e is reset by the frequency control of the pulse mode control unit.

The above description of the embodiment and the modifications is an example of the dc pulse power supply device of the present invention, and the present invention is not limited to the embodiments, and various modifications can be made based on the gist of the present invention, and these modifications should not be excluded from the scope of the present invention.

Application in industry

The dc pulse power supply device of the present invention can be used not only as a power source for supplying electric power to a plasma generation device, but also as a power supply device for supplying a pulse output to a load such as a pulse laser excitation and an electric discharge machine.

Description of the reference numerals

1 DC pulse power supply

2 AC power supply

3 output cable

5 load

10 DC power supply unit

11 rectifier

12 buffer circuit

13 single-phase inverter circuit

14 single-phase transformer

15 rectifier

16 capacitor

20. 20A, 20B, 20C, 20D pulse part

21. 21a, 21b, 21c, 21d, 21e DC reactor

22 switching element

23 drive circuit

30 regeneration part

30cl voltage clamp

31 diode

32 capacitor

33 inverter circuit

33a bridge circuit

33b drive circuit

34 transformer

35 rectifier

40 control circuit part

41 mode switching part

42 ignition mode control part

43 DC mode control part

44 pulse mode control part

44a period detecting part

44b voltage determination unit

44c frequency control part

44c1 initial frequency part

44c2 variable frequency part

44c3 pulse mode frequency part

50 load

60 voltage detection part

100 D.C. pulse power supply device

110 DC power supply unit

120 pulse part

120A pulse part

121. 121A, 121B DC reactor

122. 122A, 122B switching element

123 drive circuit

130 voltage clamp

140 control circuit part

150 load

C capacitor

D drain electrode

G grid

QR1-QR4 switch element

S source electrode

Soff voltage time product

Son voltage time product

Width of T time

TA time Width

TB time width

TPU time Width

Tfix fixed time width

Toff time width

Initial value of ToffA

ToffB time Width

Ton time width

Initial value of TonA

Width of TonB time

Tva variable time width

VAB DC voltage

Voltage of VC capacitor

VC1 capacitor Voltage

VDCL reactor voltage

VDCL1 reactor voltage

VDCL2 reactor voltage

Vin regeneration input voltage

Vo output voltage

Initial frequency of fA

fB variable frequency

fPU pulse mode frequency

iDCL DC reactor current

Delta VC voltage variation

Alpha control signal.