阅读说明：本技术 可重新配置的激光脉冲生成电路 (Reconfigurable laser pulse generation circuit ) 是由 黄皓 M.多尔加诺夫 L.朱 于 2021-02-07 设计创作，主要内容包括：电驱动电路可以对一个或多个电感元件进行充电,其中电驱动电路包括一个或多个电感元件以及在一个或多个电感元件与光学负载之间串联的电容元件,并且其中电驱动电路连接到一个或多个源。电驱动电路可以在充电之后并且在第一时间间隔内生成主电脉冲。电驱动电路可以在充电之后并且在第二时间间隔内对一个或多个电感元件进行放电以提供补偿电脉冲,其中第二时间间隔的至少一部分与第一时间间隔重叠。电驱动电路可以将主电脉冲和补偿电脉冲组合成组合电脉冲。电驱动电路可以将组合电脉冲提供给光学负载。(The one or more inductive elements may be charged by an electrical drive circuit, wherein the electrical drive circuit comprises the one or more inductive elements and a capacitive element in series between the one or more inductive elements and the optical load, and wherein the electrical drive circuit is connected to the one or more sources. The electric drive circuit may generate the main electric pulse after the charging and within a first time interval. The electric drive circuit may discharge the one or more inductive elements after charging and during a second time interval to provide the compensation electric pulse, wherein at least a part of the second time interval overlaps the first time interval. The electrical drive circuit may combine the main electrical pulse and the compensation electrical pulse into a combined electrical pulse. The electrical drive circuit may provide the combined electrical pulses to the optical load.)

1. A method for driving an optical load, the method comprising:

one or more inductive elements are charged by an electrical drive circuit,

wherein the electric drive circuit comprises the one or more inductive elements,

wherein the electric drive circuit comprises a capacitive element in series between the one or more inductive elements and the optical load, and

wherein the electrical drive circuit is connected to one or more sources;

generating, by the electric drive circuit, a main electric pulse after the charging and within a first time interval;

discharging, by the electric drive circuit, the one or more inductive elements after the charging and within a second time interval to provide compensating electric pulses,

wherein at least a portion of the second time interval overlaps the first time interval;

combining, by the electrical drive circuit, the main electrical pulse and the compensation electrical pulse into a combined electrical pulse; and

providing, by the electrical drive circuit, the combined electrical pulse to the optical load.

2. The method of claim 1, wherein the combined electrical pulse has a rise time proportional to a rise time of the compensation electrical pulse.

3. The method of claim 1, wherein the compensating electrical pulse is a spike pulse.

4. The method of claim 1, wherein the main electrical pulse has a longer rise time than the compensating electrical pulse, and

wherein discharging the compensating electrical pulse compensates for the longer rise time of the main electrical pulse.

5. The method of claim 1, wherein the compensation current provided by the compensation electrical pulse compensates the main current of the main electrical pulse during the rise time of the main electrical pulse such that the combined electrical pulse provides a constant current during the rise time of the main electrical pulse.

6. The method of claim 1, wherein the combined electrical pulse has:

a shorter rise time than the main electrical pulse; and

a shorter fall time than said compensating electrical pulse.

7. The method of claim 1, wherein the second time interval begins at the same time as the first time interval.

8. The method of claim 1, wherein the second time interval corresponds to the first time interval.

9. The method of claim 1, wherein the second time interval is less than half of the first time interval.

10. The method of claim 1, wherein the electric drive circuit comprises:

a charging circuit path for charging the one or more inductive elements;

a main circuit path for generating the main electrical pulse; and

a discharge circuit path for discharging the compensation electrical pulse.

11. The method of claim 1, wherein charging the one or more inductive elements comprises closing a switch in the electrical drive circuit for the charging time, and

discharging the one or more inductive elements to provide the compensating electrical pulse comprises opening the switch after the charging time.

12. An electric drive circuit for driving an optical load, the electric drive circuit comprising:

a charging circuit path for charging one or more inductive elements during a charging time;

a main circuit path for generating a main electrical pulse in a first time interval after the charging time; and

a discharge circuit path for generating a compensation electrical pulse by discharging the one or more inductive elements during a second time interval,

wherein at least a portion of the second time interval overlaps the first time interval, an

Wherein the discharge circuit path comprises a capacitive element in series between the one or more inductive elements and the optical load; and is

Wherein the electric drive circuit is configured to:

combining the main electrical pulse and the compensating electrical pulse into a combined electrical pulse, an

Providing the combined electrical pulse to the optical load.

13. The electric drive circuit of claim 12 wherein the capacitive element is a first capacitive element, and wherein the charging circuit path comprises:

the one or more inductive elements;

a second capacitive element connected in parallel to the source; and

a switch having an open state and a closed state,

wherein the switch is in a closed state during the charging time such that current flows through the charging circuit path to charge the one or more inductive elements and the second capacitive element.

14. The electrical drive circuit of claim 13 wherein the discharge circuit path comprises:

the one or more inductive elements; and

the second capacitive element; and is

Wherein the switch transitions from a closed state to an open state to cause the one or more inductive elements to discharge current through the discharge circuit path during the second time interval to generate the compensating electrical pulse.

15. The electric drive circuit of claim 12 further comprising at least one of a rectifier diode, a switch, or a sub-circuit for preventing current from the discharge circuit path from being shunted by a source.

16. The electrical drive circuit of claim 12, wherein the charging circuit path, the main circuit path, and the discharging circuit path are connected to a single source.

17. An electric drive circuit according to claim 12, wherein said one or more inductive elements comprise traces having a length and width such as to achieve a total inductance for said electric drive circuit, such that said compensating electric pulse has a width and/or amplitude that compensates for said main electric pulse.

18. An optical device, comprising:

one or more sources;

an optical load that emits light;

an electrical drive circuit connected to the one or more sources and the optical load, wherein the electrical drive circuit comprises:

a charging circuit path for charging one or more inductive elements;

a main circuit path for generating a main electrical pulse; and

a discharge circuit path for generating a compensation electrical pulse by discharging the one or more inductive elements,

wherein the discharge circuit path comprises a capacitive element in series between the one or more inductive elements and the optical load, and

wherein the electric drive circuit is configured to:

combining the main electrical pulse and the compensating electrical pulse into a combined electrical pulse, and

providing the combined electrical pulse to the optical load; and

a controller that controls the electric drive circuit to provide the combined electric pulse to the optical load by:

causing the charging circuit path to charge the one or more inductive elements for a charging time;

causing the main circuit path to generate the main electrical pulse within a first time interval; and is

Causing the discharge circuit path to generate the compensation electrical pulse within a second time interval,

wherein at least a portion of the second time interval overlaps the first time interval; and is

Wherein the optical load is configured to emit light pulses in response to the combined electrical pulses.

19. The optical apparatus of claim 18, wherein the optical load is at least one of: an array of one or more light emitting diodes, an array of one or more laser diodes, an array of one or more semiconductor laser diodes, or an array of one or more vertical cavity surface emitting lasers.

20. The optical apparatus of claim 18, wherein causing the charging circuit path to charge the one or more inductive elements comprises causing a switch to close.

21. The optical apparatus of claim 20, wherein causing the discharge circuit path to generate a compensating electrical pulse comprises causing a switch to open.

22. The optical device of claim 18, wherein the controller is to control the electrical drive circuit to repeatedly provide the combined electrical pulses to the optical load at a pulse frequency.

23. The optical apparatus of claim 22, wherein the pulse frequency is in a range from 20 megahertz to 100 megahertz.

24. The optical device of claim 18, wherein the capacitive element is a dc blocking capacitor.

25. The optical device of claim 18, wherein the light pulse has a rise time of less than 100 picoseconds.

Technical Field

The present disclosure relates generally to electrical drive circuits for optical loads, and more particularly to methods and electrical drive circuits for generating rectangular electrical pulses to drive optical loads.

Background

Time-of-flight (TOF) -based measurement systems, such as three-dimensional (3D) sensing systems, light detection and ranging (LIDAR) systems, and the like, emit light pulses into a field of view, detect reflected light pulses, and determine distances to objects in the field of view by measuring delays and/or differences between the emitted and reflected light pulses.

Disclosure of Invention

According to some embodiments, a method may include charging one or more inductive elements by an electrical driving circuit, wherein the electrical driving circuit includes the one or more inductive elements, wherein the electrical driving circuit includes a capacitive element in series between the one or more inductive elements and an optical load, and wherein the electrical driving circuit is connected to one or more sources; generating, by the electric drive circuit, a main electric pulse after charging and within a first time interval; discharging, by the electric drive circuit, the one or more inductive elements after charging and for a second time interval to provide the compensating electric pulse, wherein at least a part of the second time interval overlaps with the first time interval; combining the main electrical pulse and the compensation electrical pulse into a combined electrical pulse by an electrical drive circuit; and the combined electrical pulses are provided to the optical load by the electrical drive circuit.

According to an example of the present disclosure, the combined electrical pulse has a rise time proportional to the rise time of the compensation electrical pulse.

According to an example of the present disclosure, the compensating electrical pulse is a spike pulse.

According to an example of the present disclosure, the main electrical pulse has a longer rise time than the compensation electrical pulse, and wherein discharging the compensation electrical pulse compensates for the longer rise time of the main electrical pulse.

According to an example of the present disclosure, the compensation current provided by the compensation electrical pulse compensates the main current of the main electrical pulse during the rise time of the main electrical pulse such that the combined electrical pulse provides a constant current during the rise time of the main electrical pulse.

According to an example of the present disclosure, the combined electrical pulse has: a shorter rise time than the main electrical pulse; and a shorter fall time than the compensating electrical pulse.

According to an example of the present disclosure, the second time interval starts at the same time as the first time interval.

According to an example of the present disclosure, the second time interval corresponds to the first time interval.

According to an example of the disclosure, the second time interval is less than half of the first time interval.

According to an example of the present disclosure, an electric drive circuit includes: a charging circuit path for charging one or more inductive elements; a main circuit path for generating a main electrical pulse; and a discharge circuit path for discharging the compensation electrical pulse.

According to an example of the present disclosure, charging the one or more inductive elements comprises closing a switch in the electric drive circuit during the charging time, and discharging the one or more inductive elements to provide the compensating electric pulse comprises opening the switch after the charging time.

According to some embodiments, an electric drive circuit for driving an optical load may comprise: a charging circuit path for charging one or more inductive elements during a charging time; a main circuit path for generating a main electrical pulse within a first time interval after a charging time; and a discharge circuit path for generating a compensation electrical pulse by discharging the one or more inductive elements during a second time interval, wherein at least a part of the second time interval overlaps the first time interval, and wherein the discharge circuit path comprises a capacitive element in series between the one or more inductive elements and the optical load; and wherein the electrical drive circuit combines the main electrical pulse and the compensation electrical pulse into a combined electrical pulse and provides the combined electrical pulse to the optical load.

According to an example of the present disclosure, the capacitive element is a first capacitive element, and wherein the charging circuit path comprises: one or more inductive elements; a second capacitive element connected in parallel to the source; and a switch having an open state and a closed state, wherein the switch is in the closed state during the charging time for current to charge the one or more inductive elements and the second capacitive element through the charging circuit path.

According to an example of the present disclosure, a discharge circuit path includes: one or more inductive elements; and a second capacitive element; and wherein the switch transitions from the closed state to the open state for causing the one or more inductive elements to discharge current through the discharge circuit path during the second time interval to generate the compensation electrical pulse.

According to an example of the present disclosure, the electric drive circuit further comprises at least one of a rectifier diode, a switch or a sub-circuit for preventing current from the discharge circuit path from being shunted by the source.

According to an example of the present disclosure, a charging circuit path, a main circuit path, and a discharging circuit path are connected to a single source.

According to an example of the present disclosure, the one or more inductive elements comprise traces having a length and a width that achieve a total inductance for the electric drive circuit, such that the compensating electric pulse has a width and/or an amplitude that compensates for the main electric pulse.

According to some embodiments, an optical device may comprise: one or more sources; an optical load that emits light; an electrical drive circuit connected to the one or more sources and the optical load, wherein the electrical drive circuit comprises a charging circuit path for charging the one or more inductive elements, a main circuit path for generating a main electrical pulse, and a discharging circuit path for generating a compensation electrical pulse by discharging the one or more inductive elements, wherein the discharging circuit path comprises a capacitive element in series between the one or more inductive elements and the optical load, and wherein the electrical drive circuit combines the main electrical pulse and the compensation electrical pulse into a combined electrical pulse and provides the combined electrical pulse to the optical load; and a controller that controls the electrical drive circuit to provide the combined electrical pulse to the optical load by: the charging path is caused to charge the one or more inductive elements for a charging time, the main circuit path is caused to generate a main electrical pulse for a first time interval, and the discharging circuit path is caused to generate a compensation electrical pulse for a second time interval, wherein at least a portion of the second time interval overlaps the first time interval, and wherein the optical load is adapted to emit an optical pulse in response to the combined electrical pulse.

According to an example of the present disclosure, the optical load is at least one of: an array of one or more light emitting diodes, an array of one or more laser diodes, an array of one or more semiconductor laser diodes, or an array of one or more vertical cavity surface emitting lasers.

According to an example of the present disclosure, causing the charging circuit path to charge the one or more inductive elements includes causing the switch to close.

According to an example of the present disclosure, causing the discharge circuit path to generate the compensating electrical pulse includes causing the switch to open.

According to an example of the present disclosure, the controller is for controlling the electrical drive circuit to repeatedly provide the combined electrical pulses to the optical load at a pulse frequency.

According to examples of the present disclosure, the pulse frequency is in a range from 20mhz to 100 mhz.

According to an example of the present disclosure, the capacitive element is a direct current blocking capacitor.

According to an example of the present disclosure, the light pulse has a rise time of less than 100 picoseconds.

Drawings

Fig. 1-4 are circuit diagrams of example embodiments of electrical drive circuits and optical loads described herein.

FIG. 5A is a diagram of an example embodiment of a controller for use in the electric drive circuits described herein.

FIG. 5B is a diagram of an example embodiment of a process implemented by a controller for the electric drive circuit described herein.

Fig. 6 is a diagram plotting an example graph of voltage from an optical detector receiving an optical signal associated with an example embodiment of an electrical drive circuit and an optical load as described herein.

Fig. 7 is a diagram plotting an example graph of voltage from an optical detector receiving an optical signal associated with an example embodiment of an electrical drive circuit and an optical load as described herein.

FIG. 8 is a graph plotting example graphs of switch timing in an example embodiment of an electrical drive circuit, voltage at a point in an example embodiment of an electrical drive circuit, voltage at another point in an example embodiment of an electrical drive circuit, and current provided to an optical load by an example embodiment of an electrical drive circuit.

FIG. 9 is a graph plotting an example graph of current provided to an optical load by an example embodiment of an electrical drive circuit.

FIG. 10 is a graph plotting an example graph of the shape of current provided to an optical load by an example embodiment of an electrical drive circuit.

Fig. 11 is a diagram plotting an example graph of an example of switching timing in an example embodiment of an electrical drive circuit.

Fig. 12 is a diagram plotting an example graph of voltage from an optical detector receiving an optical signal associated with an example embodiment of an electrical drive circuit and an optical load as described herein.

Fig. 13 is a diagram plotting an example graph of voltage from an optical detector receiving a light signal, the optical detector associated with an electrical drive circuit and an optical load as described herein.

Fig. 14 and 15 are graphs plotting example graphs of voltage from an optical detector receiving an optical signal associated with example embodiments of an electrical drive circuit and an optical load described herein.

Fig. 16 is a flow chart of an example process for driving an optical load.

Detailed Description

The following detailed description of example embodiments refers to the accompanying drawings. The same reference numbers in different drawings may identify the same or similar elements.

TOF-based measurement systems may include an optical load (e.g., a laser diode, a semiconductor laser diode, a Vertical Cavity Surface Emitting Laser (VCSEL), etc.) for emitting optical pulses into a field of view. As described above, TOF based measurement systems determine distance to an object by measuring the delay and/or difference between transmitted and reflected light pulses. TOF-based measurement systems may perform direct time-of-flight (d-TOF) measurements and/or indirect time-of-flight (i-TOF) measurements. For d-TOF applications, narrow light pulses may be emitted into the field of view. For i-TOF applications, a rectangular pulse train can be launched into the field of view. Transmitting a pulse with a well-defined time origin and rectangular shape may improve measurement accuracy and accuracy (e.g., compared to a pulse with a non-rectangular shape, long rise time, etc.). To achieve such a rectangular shape, the emitted light pulse should have a short rise time (e.g., the time for the power of the light pulse to rise) and a short fall time (e.g., the time for the power of the light pulse to fall). For example, the rise time of a light pulse may be the time for the power of the light pulse to rise from 10% of the peak power to 90% of the peak power, and may be referred to as 10% -90% rise time. Similarly, the fall time of a light pulse may be the time for the power of the light pulse to fall from 90% of the peak power to 10% of the peak power, and may be referred to as a 90% -10% fall time.

The electrical circuit used to drive the optical load is a collection of electronic components interconnected by current carrying conductors (e.g., traces). Any of the electronic components and conductors may have parasitic elements (e.g., parasitic inductance, parasitic resistance, and/or parasitic capacitance). These parasitic elements may be undesirable and, therefore, attempt to minimize them. However, it may not be possible to completely eliminate these parasitic elements (e.g., due to manufacturability limitations, component size limitations, etc.). When a supply voltage is provided to a circuit to drive an optical load, parasitic inductance, parasitic resistance, and/or parasitic capacitance in the circuit causes a delay between the supply voltage being provided and the current reaching a peak. This delay increases the rise time of the electrical pulse, which in turn increases the rise time of the optical pulse (e.g., particularly when the circuit drives an optical load at high currents).

Some embodiments described herein provide a method and/or an electric drive circuit for driving an optical load to emit a rectangular shaped light pulse. For example, the method and/or the electric drive circuit may drive the optical load to emit optical pulses having short rise times (e.g., less than 100 picoseconds (ps)), short fall times (e.g., less than 500ps, less than 300ps, etc.), and/or constant amplitudes. In some embodiments, the method and/or the electric drive circuit may charge one or more inductive elements of the electric drive circuit; generating a primary electrical pulse within a first time interval; discharging the one or more inductive elements during at least a portion of the first time interval to provide a compensating electrical pulse (e.g., spike); combining the main electrical pulse and the compensation electrical pulse into a combined electrical pulse; and provides the combined electrical pulse to the optical load. For example, the main electrical pulse may have a longer rise time (e.g., a slower rise time) than the compensation electrical pulse, and the compensation electrical pulse may compensate for the longer rise time of the main electrical pulse. In this way, the method and/or the electric drive circuit may drive the optical load with a combined electric pulse to emit a rectangular shaped light pulse. By driving the optical load to emit light pulses in a rectangular shape, the method and/or the electric drive circuit may improve the performance of the time-of-flight based measurement system.

Fig. 1 is a circuit diagram of an example implementation 100 of an electrical drive circuit and an optical load 110 as described herein. As shown in fig. 1, the optical device may include a main circuit path 102, a charging circuit path 104, and a discharging circuit path 106. In some implementations and as further described herein, the main circuit path 102 may be used to generate a main electrical pulse, and the charging circuit path 104 and the discharging circuit path 106 may be used to generate a compensation electrical pulse.

As shown in fig. 1, the optical device may further include a main source 108 (e.g., a first source), an optical load 110, a main switch 112 (e.g., a first switch), a main capacitive element 114, a rectifier diode 116, inductive elements 118 and 120, a compensation source 122 (e.g., a second source), a compensation capacitive element 124, a compensation inductive element 126, a compensation switch 128 (e.g., a second switch), a decoupling capacitive element 130, a first ground 132, and a second ground 134. In some embodiments, the electric drive circuit may include a main circuit path 102, a charging circuit path 104, a discharging circuit path 106, a main switch 112, a main capacitive element 114, a rectifier diode 116, inductive elements 118 and 120, a compensation capacitive element 124, a compensation inductive element 126, a compensation switch 128, a decoupling capacitive element 130, a first ground 132, and a second ground 134.

In some embodiments, the main electrical pulse and/or the compensation electrical pulse may also be referred to as a first electrical pulse, a second electrical pulse, etc. Additionally, or alternatively, the main circuit path 102, the charging circuit path 104, and/or the discharging circuit path 106 may also be referred to as a first circuit path, a second circuit path, a third circuit path, and so on. Additionally, or alternatively, the main capacitive element 114, the compensation capacitive element 124, and/or the decoupling capacitive element 130 may also be referred to as a first capacitive element, a second capacitive element, a third capacitive element, and so on. In this regard, the adjectives "primary," "charging," "discharging," "compensating," and "decoupling" are used herein for descriptive purposes and not to limit the scope of the elements, components, etc., that they modify, unless otherwise specifically stated.

As shown in fig. 1, the main circuit path 102 may be connected to a main source 108 and an optical load 110, and may include a main switch 112, a main capacitive element 114, a rectifier diode 116, and inductive elements 118 and 120. The charging circuit path 104 may be connected to a compensation source 122 and may include a compensation capacitive element 124, a compensation inductive element 126, and a compensation switch 128. The discharge circuit path 106 may be connected to a compensation source 122 and the optical load 110, and may include a compensation capacitive element 124, a compensation inductive element 126, a decoupling capacitive element 130, the main switch 112, and inductive elements 118 and 120.

In some embodiments, primary source 108 and/or compensation source 122 may provide current to an electric drive circuit. For example, the main source 108 and/or the compensation source 122 may be a DC (direct current) voltage source with a resistive load, a DC current source, or the like.

In some embodiments, optical load 110 may include an array of one or more light emitting diodes, an array of one or more laser diodes, an array of one or more semiconductor laser diodes, an array of one or more Vertical Cavity Surface Emitting Lasers (VCSELs), or the like. In some implementations, the optical load 110 can include multiple optical loads electrically connected in parallel and/or series. For example, the optical load 110 may include a VCSEL array having 400 emitters electrically connected in parallel. As another example, the optical load 110 may include a plurality of VCSELs (e.g., arrays or singlet (singlets)) connected in series (e.g., on a Printed Circuit Board (PCB)), which may provide increased optical power compared to a single VCSEL array.

In some implementations, the optical load 110 may allow current to flow primarily in only one direction (e.g., in a "forward" direction) when a forward bias is applied to the optical load 110, while the optical load 110 may not allow current to flow when a reverse bias is applied to the optical load 110, such as in a light emitting diode, laser diode, VCSEL, or the like. Additionally, or alternatively, the optical load 110 may allow current to flow in two directions (e.g., forward and reverse), such as in an incandescent light source or the like.

In some embodiments, the main switch 112 and/or the compensation switch 128 may be high speed and low output capacitance switches, and may be transistors, such as Field Effect Transistors (FETs), Metal Oxide Semiconductor Field Effect Transistors (MOSFETs), gallium nitride field effect transistors (ganfets), avalanche transistors, and the like. In some implementations, the compensation switch 128 can have a low inductance (e.g., to facilitate achieving a short rise time of the compensation electrical pulse).

In some implementations, the main capacitive element 114 can be a voltage storage element and can provide an inrush current (e.g., during the duration of the main electrical pulse). Additionally, or alternatively, the main capacitive element 114 may include one or more capacitors.

In some embodiments, the rectifier diode 116 may prevent current from the discharge circuit path 106 and/or the compensation source 122 from being shunted by the main source 108 (e.g., rather than flowing to the optical load 110). In this manner, the rectifier diode 116 may ensure that current from the discharge circuit path 106 and/or the compensation source 122 is directed to the optical load 110. Additionally, or alternatively, rectifier diode 116 may prevent current from discharge circuit path 106 and/or compensation source 122 from being affected by main source 108 and/or main capacitive element 114. For example, the rectifier diode 116 may isolate current from the discharge circuit path 106 and/or the compensation source 122 from the main circuit path 102 (e.g., the main source 108 and/or the main capacitive element 114). Additionally, or alternatively, the electric drive circuit may include more than one rectifier diode (e.g., in parallel, series, etc.), another switch, sub-circuit, etc. in place of or in addition to rectifier diode 116 to prevent current from discharge circuit path 106 and/or compensation source 122 from being shunted by main source 108.

In some embodiments, inductive elements 118 and 120 may simulate parasitic inductance of current carrying conductors in an electrical drive circuit. Additionally, or alternatively, inductive elements 118 and 120 may simulate parasitic inductance of bond wires in an electrical drive circuit.

In some embodiments, the compensation source 122 (e.g., voltage source) may affect the pulse height and width (e.g., amplitude and duration) of the compensation electrical pulses from the electrical drive circuit. For example, as the voltage in compensation source 122 increases, the compensation electrical pulse may become larger and wider (e.g., increasing in amplitude and increasing in duration). In some embodiments, the compensation current is supplied from the compensation capacitive element 124 (e.g., to the optical load 110), and as the voltage of the compensation source 122 increases, the fall time of the compensation electrical pulse increases.

In some implementations, the compensating capacitive element 124 can include one or more capacitors (e.g., capacitors of the compensating circuitry). In some embodiments, the compensation capacitance element 124 may be referred to as a decoupling capacitor, which may provide a surge current (e.g., during the duration of the compensation electrical pulse). Additionally, or alternatively, the compensating capacitive element 124 may have a low equivalent series inductance (ESL).

In some embodiments, the compensating inductive element 126 may include one or more inductive elements, and/or may model the total inductance of the charging circuit path 104 and/or the discharging circuit path 106. For example, the compensating inductive element 126 may simulate the inductance of a current carrying conductor in an electrical drive circuit, a bond wire in an electrical drive circuit, and the like.

In some embodiments, the compensating inductive element 126 may include a trace (e.g., a circuit trace on a Printed Circuit Board (PCB), a wire trace, a track (track), etc.) having a length and width based on a desired total inductance in view of parasitic inductances of other circuit elements (e.g., current carrying conductors in an electrical drive circuit, bond wires in an electrical drive circuit, etc.). In some embodiments, the traces may have a length and width for achieving the overall inductance of the electrical drive circuit. For example, the traces can be designed (e.g., have a length and width, etc.) to add inductance to the electrical drive circuit, thereby increasing the overall inductance of the electrical drive circuit.

Additionally, or alternatively, and as further described herein, the inductance of the compensation inductive element 126 and/or the total inductance of the electrical drive circuit may be selected, controlled, adjusted, etc., such that the fall time of the compensation electrical pulse corresponds to the rise time of the main electrical pulse, which may facilitate driving the optical load 110 to emit a rectangular-shaped optical pulse (e.g., a square-shaped optical pulse). For example, the compensating inductive element 126 may comprise a trace having a length and a width to achieve a total inductance for the electric drive circuit such that the compensating electric pulse has a width and/or amplitude that compensates for the main electric pulse.

In some embodiments, the decoupling capacitance element 130 may include one or more capacitive elements. As shown in fig. 1, a decoupling capacitance element 130 (e.g., a direct current blocking (DC blocking) capacitor) may be positioned between point a and point B in the electric drive circuit. In some embodiments, the decoupling capacitance element 130 may isolate the main circuit path 102 from the charging circuit path 104, which may improve the power efficiency of the electric drive circuit. Additionally, or alternatively, the decoupling capacitive element 130 may allow the electric drive circuit to generate and provide the compensation electric pulse (e.g., an electric pulse with a short rise time, a short fall time, etc.) as a spike pulse to the optical load 110.

In some embodiments, the decoupling capacitance element 130 may be an alternating current coupling (AC coupling) capacitor (e.g., having a capacitance of 1 nanofarad (nF)). In some embodiments, decoupling capacitor element 130 may have a capacitance of less than 100 picofarads (pF).

As described above, the main circuit path 102 may be used to generate a main electrical pulse. The main switch 112 may have an open state (e.g., an off state), wherein current cannot flow through the main switch 112 when the main switch 112 is in the open state. In some embodiments, when the main switch 112 is in an open state, current cannot flow through the optical load 110. The main switch 112 may also have a closed state (e.g., an on state), wherein current may flow through the main switch 112 when the main switch 112 is in the closed state. In some implementations, when the main switch 112 is in a closed state, current may flow through the main circuit path 102 and generate a main electrical pulse. The electrical drive circuit may provide a main electrical pulse to the optical load 110. In some implementations, and as further described herein, the optical load 110 may emit a light pulse having a slow rise time (e.g., a long rise time) based on the primary electrical pulse, similar to the light pulse shown and described herein with respect to fig. 6.

As shown in fig. 1, a main capacitive element 114 (e.g., a voltage storage capacitive element) may be connected in parallel to main source 108. In some embodiments, because the main capacitive element 114 is connected closer to the optical load 110 than the main source 108, when the main switch 112 transitions from the open state to the closed state, current may flow more directly through the main capacitive element 114 of the main circuit path 102 than through the main source 108.

In some implementations, the input (e.g., voltage, current, etc.) provided by the primary source 108 can be controlled to adjust the characteristics of the primary electrical pulse. For example, a higher voltage provided by the primary source 108 may increase the maximum amplitude of the primary electrical pulse compared to another maximum amplitude of the primary electrical pulse when the primary source 108 provides a lower voltage. As another example, a higher voltage provided by the primary source 108 may reduce the rise time of the primary electrical pulse as compared to another rise time of the primary electrical pulse when the primary source 108 provides a lower voltage.

Further, as described above, the charging circuit path 104 and the discharging circuit path 106 may be used to generate the compensation electrical pulses. The compensation switch 128 may have an open state (e.g., an off state) in which current cannot flow through the compensation switch 128 when the compensation switch 128 is in the open state. Further, the compensation switch 128 may have a closed state (e.g., an on state), wherein current may flow through the compensation switch 128 when the compensation switch 128 is in the closed state. In some embodiments, when compensation switch 128 is in a closed state, current flows through charging circuit path 104 to charge compensation inductive element 126 (e.g., which includes one or more parasitic elements in the driver circuit). For example, when the compensation switch 128 is in a closed state, current may flow through the compensation switch 128 and charge (e.g., during a charging time) the compensation inductive element 126 (e.g., which includes one or more parasitic elements in the driver circuit) through the charging circuit path 104.

In some implementations, when the compensation switch 128 transitions from the closed state to the open state, current cannot flow through the compensation switch 128, and current can discharge from the compensation inductive element 126 (e.g., which includes one or more parasitic elements in the driver circuit) through the discharge circuit path 106 and generate the compensation electrical pulse. For example, when the compensation switch 128 transitions from a closed state to an open state, current cannot flow through the compensation switch 128, and current may discharge from the compensation inductive element 126 (e.g., which includes one or more parasitic elements in the driver circuit) through the discharge circuit path 106 during a discharge time.

As shown in fig. 1, the compensation capacitive element 124 (e.g., a voltage storage capacitive element) may be connected in parallel with the compensation source 122, and the compensation capacitive element 124 may be closer (e.g., in a practical sense) to the compensation inductive element 126 and the optical load 110 than the compensation source 122. In some embodiments, compensating capacitive element 124 may provide a faster current change than compensating source 122. For example, the compensation source 122 may have a large inductance in the path between the compensation source 122 and the compensation inductance element 126, which may prevent the compensation source 122 from providing rapid current changes. In some implementations, a majority (e.g., almost 100%) of the current discharged through the discharge circuit path 106 may be provided by the compensation capacitive element 124 (e.g., which may be slowly charged by the compensation source 122 before the compensation switch 128 transitions from the closed state to the open state).

In some embodiments, the input (e.g., voltage, current, etc.) provided by the compensation source 122 can be controlled to adjust the characteristics of the compensation electrical pulse. For example, a higher voltage provided by the compensation source 122 may increase the maximum amplitude of the compensation electrical pulse as compared to another maximum amplitude of the compensation electrical pulse when the compensation source 122 provides a lower voltage. As another example, the higher voltage provided by compensation source 122 may reduce the charging time of compensation inductive element 126 as compared to another charging time of compensation inductive element 126 when compensation source 122 provides a lower voltage. In some embodiments, and as described above, the capacitance of the compensation capacitive element 124 may affect the pulse height and width (e.g., amplitude and duration) of the compensation electrical pulse.

Additionally, or alternatively, the inductance of the compensation inductance element 126 may be controlled to adjust the characteristics of the compensation electrical pulse. For example, the higher inductance of the compensating inductive element 126 may increase the fall time of the compensating electrical pulse compared to another fall time of the compensating electrical pulse when the compensating inductive element 126 has a lower inductance. In some embodiments, and as further described herein with respect to fig. 9, the inductance of the compensation inductive element 126 may be selected, controlled, adjusted, etc., such that the fall time of the compensation electrical pulse corresponds to the rise time of the primary electrical pulse, which may facilitate driving the optical load 110 to emit a rectangular-shaped optical pulse.

The electrical drive circuit may provide the compensating electrical pulses to the optical load 110. For example, the rectifier diode 116 may prevent current from the discharge circuit path 106 from being shunted by the primary source 108 (e.g., rather than flowing to the optical load 110). In some embodiments, and as further described herein, based on the compensating electrical pulse, the optical load 110 may emit a light pulse having a short rise time (e.g., a fast rise time) similar to the light pulse shown and described herein with respect to fig. 7.

In some implementations, and as further described herein with respect to fig. 5A, 5B, 8, 9, 10, and 11, the timing of the main switch 112 and the compensation switch 128 can be controlled (e.g., by a controller) such that the electrical drive circuit generates the main electrical pulse and the compensation electrical pulse, combines the main electrical pulse and the compensation electrical pulse into a combined electrical pulse, and provides the combined electrical pulse to the optical load. For example, the timing of the main switch 112 and the compensation switch 128 may be controlled such that the compensation electrical pulse is discharged during a discharge time that at least partially overlaps with the time interval during which the main electrical pulse is generated. Additionally, or alternatively, the timing of the main switch 112 and the compensation switch 128 may be controlled such that the fall time of the compensation electrical pulse corresponds to the rise time of the main electrical pulse. Further, the timing of the main switch 112 and the compensation switch 128 may be controlled such that the combined electrical pulse has a rise time proportional to the rise time of the compensation electrical pulse.

As noted above, fig. 1 is provided as an example only. Other examples may be different than that described with respect to fig. 1.

Fig. 2 is a circuit diagram of an example implementation 200 of an electrical drive circuit and an optical load 210 described herein. The example embodiment 200 may be similar to the example embodiment 100 described herein with respect to fig. 1, but the example embodiment 200 cannot include the compensation source 122 of the example embodiment 100. For example, and as shown in fig. 2, an optical device may include a primary circuit path 202 connected to a primary source 208 (e.g., a single source), a charging circuit path 204, and a discharging circuit path 206.

In some embodiments, the main circuit path 202, the charging circuit path 204, and the discharging circuit path 206 may be similar to the main circuit path 102, the charging circuit path 104, and the discharging circuit path 106, respectively, as described herein with respect to the example embodiment 100 and fig. 1. For example, the main circuit path 202 may be used to generate the main electrical pulse, and the charging circuit path 204 and the discharging circuit path 206 may be used to generate the compensation electrical pulse.

As shown in fig. 2, the optical device may further include a main source 208 (e.g., a first source), an optical load 210, a main switch 212 (e.g., a first switch), a main capacitive element 214 (e.g., a first capacitive element), a rectifier diode 216, inductive elements 218 and 220, a compensation capacitive element 224 (e.g., a second capacitive element), a compensation inductive element 226, a compensation switch 228 (e.g., a second switch), a decoupling capacitive element 230 (e.g., a third capacitive element), a first ground 232, and a second ground 234. In some embodiments, the electric drive circuit may include a main circuit path 202, a charging circuit path 204, a discharging circuit path 206, a main switch 212, a main capacitive element 214, a rectifier diode 216, inductive elements 218 and 220, a compensation capacitive element 224, a compensation inductive element 226, a compensation switch 228, a decoupling capacitive element 230, a first ground 232, and a second ground 234.

In some embodiments, main source 208, optical load 210, main switch 212, main capacitive element 214, rectifier diode 216, inductive elements 218 and 220, compensation capacitive element 224, compensation inductive element 226, compensation switch 228, and decoupling capacitive element 230 may be similar to main source 108, optical load 110, main switch 112, main capacitive element 114, rectifier diode 116, inductive elements 118 and 120, compensation capacitive element 124, compensation inductive element 126, compensation switch 128, and decoupling capacitive element 130, respectively, as described herein with respect to example embodiment 100 and fig. 1.

In some embodiments, the input (e.g., voltage, current, etc.) provided by the primary source 208 may be controlled to adjust the characteristics of the compensating electrical pulses in a manner similar to that described herein with respect to controlling the input provided by the compensating source 122 as described with respect to the example embodiment 100 and fig. 1. In other words, in the example embodiment 200 of fig. 2, rather than controlling the input provided by the compensation source to adjust the characteristics of the compensation electrical pulse, the input of the primary source 208 may be controlled to adjust the characteristics of the compensation electrical pulse. Additionally, or alternatively, the timing of the electrical drive circuit of the example embodiment 200 and/or the main switch 212 and the compensation switch 228 may be controlled (e.g., by a controller) in a manner similar to that described herein with respect to the example embodiment 100 and fig. 1.

As noted above, fig. 2 is provided as an example only. Other examples may be different than that described with respect to fig. 2.

Fig. 3 is a circuit diagram of an example implementation 300 of an electrical drive circuit and an optical load 310 as described herein. The example embodiment 300 may be similar to the example embodiment 100 described herein with respect to fig. 1, but the example embodiment 300 cannot include the primary source 108 or the primary capacitive element 114 of the example embodiment 100. For example, and as shown in fig. 3, the optical device may include a main circuit path 302, a charging circuit path 304, and a discharging circuit path 306 that are connected to a compensation source 322 (e.g., a single source) and that include (e.g., share) a compensation capacitive element 324.

In some embodiments, the main circuit path 302, the charging circuit path 304, and the discharging circuit path 306 may be similar to the main circuit path 102, the charging circuit path 104, and the discharging circuit path 106, respectively, described herein with respect to the example embodiment 100 and fig. 1. For example, the main circuit path 302 may be used to generate the main electrical pulse, and the charging circuit path 304 and the discharging circuit path 306 may be used to generate the compensation electrical pulse.

As shown in fig. 3, the optical device may further include an optical load 310, a main switch 312 (e.g., a first switch), a rectifier diode 316, inductive elements 318 and 320, a compensation source 322, a compensation capacitive element 324, a compensation inductive element 326, a compensation switch 328 (e.g., a second switch), a decoupling capacitive element 330, a first ground 332, and a second ground 334. In some embodiments, the electric drive circuit may include a main circuit path 302, a charging circuit path 304, a discharging circuit path 306, a main switch 312, a rectifier diode 316, inductive elements 318 and 320, and a compensation capacitive element 324. A compensation inductance element 326, a compensation switch 328, a decoupling capacitance element 330, a first ground 332, and a second ground 334.

In some embodiments, the optical load 310, the main switch 312, the rectifier diode 316, the inductive elements 318 and 320, the compensation source 322, the compensation capacitive element 324, the compensation inductive element 326, the compensation switch 328, and the decoupling capacitive element 330 may be similar to the optical load 110, the main switch 112, the rectifier diode 116, the inductive elements 118 and 120, the compensation source 122, the compensation capacitive element 124, the compensation inductive element 126, the compensation switch 128, and the decoupling capacitive element 130, respectively, as described herein with respect to the example embodiment 100 and fig. 1.

In some embodiments, the input (e.g., voltage, current, etc.) provided by the compensation source 322 may be controlled to adjust the characteristics of the primary electrical pulse in a manner similar to that described herein with respect to controlling the input provided by the primary source 108 as described with respect to the example embodiment 100 and fig. 1. In other words, in the example embodiment 300 of fig. 3, rather than controlling the input provided by the primary source to adjust the characteristics of the primary electrical pulse, the input of the compensation source 322 may be controlled to adjust the characteristics of the primary electrical pulse.

In some embodiments, the compensation capacitive element 324 may affect the pulse height and width (e.g., amplitude and duration) of the main electrical pulse in a manner similar to that described herein with respect to the main capacitive element 114 affecting the pulse height and width of the main electrical pulse. In other words, in the example embodiment 300 of fig. 3, rather than the capacitance of the main capacitive element affecting the pulse height and width of the main electrical pulse, the capacitance of the compensation capacitive element 324 may affect the pulse height and width of the main electrical pulse.

Additionally, or alternatively, the timing of the electrical drive circuit of the example embodiment 300 and/or the main switch 312 and the compensation switch 328 may be controlled (e.g., by a controller) in a manner similar to that described with respect to the example embodiment 100 and fig. 1.

As noted above, fig. 3 is provided as an example only. Other examples may be different than that described with respect to fig. 3.

Fig. 4 is a circuit diagram of an example implementation 400 of an electrical drive circuit and an optical load 410 as described herein. Example embodiment 400 may be similar to example embodiment 100 described herein with respect to fig. 1, but example embodiment 400 may not include rectifier diode 116 of example embodiment 100, and main switch 412 may be positioned between main source 408 and optical load 410 and between main source 408 and decoupling capacitance element 430. For example, the main switch 412 may be positioned in the same location as the rectifier diode 116 and/or may replace the rectifier diode 116, rather than being positioned in the same location as the main switch 112.

In some implementations, and as shown in fig. 4, an optical device can include a main circuit path 402, a charging circuit path 404, and a discharging circuit path 406. The main circuit path 402, the charge circuit path 404, and the discharge circuit path 406 may be similar to the main circuit path 102, the charge circuit path 104, and the discharge circuit path 106, respectively, as described herein with respect to the example embodiment 100 and fig. 1. For example, the main circuit path 402 may be used to generate the main electrical pulse, and the charging circuit path 404 and the discharging circuit path 406 may be used to generate the compensation electrical pulse.

As shown in fig. 4, the optical device may further include a main source 408 (e.g., a first source), an optical load 410, a main switch 412, a main capacitive element 414 (e.g., a first capacitive element), inductive elements 418 and 420, a compensation source 422, a compensation capacitive element 424 (e.g., a second capacitive element), a compensation inductive element 426, a compensation switch 428 (e.g., a second switch), a decoupling capacitive element 430 (e.g., a third capacitive element), a first ground terminal 432, and a second ground terminal 434. In some embodiments, the electric drive circuit may include a main circuit path 402, a charging circuit path 404, a discharging circuit path 406, a main switch 412, a main capacitive element 414, inductive elements 418 and 420, a compensation capacitive element 424, a compensation inductive element 426, a compensation switch 428, a decoupling capacitive element 430, a first ground 432, and a second ground 434.

In some embodiments, main source 408, optical load 410, main switch 412, main capacitive element 414, inductive elements 418 and 420, compensation source 422, compensation capacitive element 424, compensation inductive element 426, compensation switch 428, and decoupling capacitive element 430 may be similar to main source 108, optical load 110, main switch 112, main capacitive element 114, inductive elements 118 and 120, compensation source 122, compensation capacitive element 124, compensation inductive element 126, compensation switch 128, and decoupling capacitive element 130, respectively, as described herein with respect to example embodiment 100 and fig. 1.

In some implementations, the main switch 412 can be controlled to prevent current from the charging circuit path 404, the discharging circuit path 406, and/or the compensation source 422 from being shunted by the main source 408 (e.g., rather than flowing to the optical load 410). In this manner, the main switch 412 may ensure that current from the charging circuit path 404, the discharging circuit path 406, and/or the compensation source 422 is directed to the optical load 410.

Additionally, or alternatively, the timing of the electrical drive circuit of the example embodiment 400 and/or the main switch 412 and the compensation switch 428 may be controlled (e.g., by a controller) in a manner similar to that described herein with respect to the example embodiment 100 and fig. 1.

As noted above, fig. 4 is provided as an example only. Other examples may be different than that described with respect to fig. 4.

Fig. 5A is a diagram of an example embodiment 500 of a controller 502 for use in the electric drive circuits described herein. As shown in fig. 5A, example implementation 500 may include a controller 502, a main gate driver 504, a compensation gate driver 506, a main switch 508, and a compensation switch 510. In some implementations, the integrated circuit can include a controller 502, a main gate driver 504, a compensation gate driver 506, a main switch 508, a compensation switch 510, and the like.

Additionally, or alternatively, the main switch 508 and the compensation switch 510 may be similar to the main switch 112 and the compensation switch 128, respectively, as described herein with respect to the example embodiment 100 and fig. 1. Further, the main switch 508 and the compensation switch 510 may correspond to the main switch (e.g., the main switch 112 of fig. 1, the main switch 212 of fig. 2, the main switch 312 of fig. 3, the main switch 412 of fig. 4, etc.) and the compensation switch (e.g., the compensation switch 128 of fig. 1, the compensation switch 228 of fig. 2, the compensation switch 328 of fig. 3, the compensation switch of fig. 4, etc.) in example embodiments 100, 200, 300, and 400, respectively. In other words, the example embodiment 500 and the controller 502 may be used to control the main and compensation switches for the electric drive circuits described herein with respect to fig. 1-4.

FIG. 5B is a diagram of an example embodiment 550 of a process implemented by the controller 502 for the electric drive circuits described herein. As shown in fig. 5B, the controller 502 may receive a laser pulse input (logic level) (e.g., a logic input signal) that may signal that an optical load (e.g., the optical load 110 of fig. 1, the optical load 210 of fig. 2, the optical load 310 of fig. 3, the optical load 410 of fig. 4, etc.) driven by the electrical drive circuit should turn on. The controller 502 may generate control signals (e.g., voltages) for the main gate driver 504 and/or the compensation gate driver 506 based on the laser pulse input to turn on or off the main switch 508 and/or the compensation switch 510 (e.g., open or close the main switch 508 and/or the compensation switch 510) according to the switch timing described herein (e.g., with respect to fig. 8-9 and 11, etc.).

As shown in fig. 5B, the process of example embodiment 550 may include the controller 502 performing delay tuning on a control signal provided to the main gate driver 504 of the main switch 508. As described herein with respect to fig. 1, the timing of the main switch 112 and the compensation switch 128 may be controlled such that the compensation electrical pulses are discharged during a discharge time that at least partially overlaps with the time interval during which the main electrical pulses are generated. When the controller 502 performs delay tuning, the controller 502 may adjust the control signal provided to the main gate driver 504 of the main switch 508 such that the compensation electrical pulse is discharged during a discharge time that at least partially overlaps with the time interval during which the main electrical pulse is generated. For example, and as further described with respect to fig. 8, the controller 502 may perform delay tuning to adjust the time interval between the time the compensation switch 510 transitions from the closed state to the open state (e.g., to generate the compensation electrical pulse) and the time the main switch 508 transitions from the open state to the closed state (e.g., to generate the main electrical pulse).

As also shown in fig. 5B, the process of example implementation 550 may include the controller 502 performing pulse width tuning on a control signal provided to the compensation gate driver 506 of the compensation switch 510. As described herein with respect to fig. 1, when the compensation switch 128 is in the closed state, current may flow through the compensation switch 128 and charge the compensation inductive element 126 during the charging time, while when the compensation switch 128 transitions from the closed state to the open state, current may discharge from the compensation inductive element 126 to generate the compensation electrical pulse. In some embodiments, a longer charge time may generate a wider pulse width for the compensation electrical pulse than would be obtained with a shorter charge time. Accordingly, the charging time (e.g., the time when the compensation switch 510 is in the closed state) may be adjusted to tune the pulse width of the compensation electrical pulse. In some embodiments, when the controller 502 performs pulse width tuning, the controller 502 may adjust the control signal provided to the compensation gate driver 506 of the compensation switch 510 such that the compensation switch 510 is in a closed state for a charging time that achieves a pulse width of the compensation signal corresponding to the rise time of the main electrical pulse.

Furthermore, tuning the pulse width of the compensation electrical pulse may adjust the fall time of the compensation electrical pulse. Thus, the charging time may be adjusted to tune the fall time of the compensation electrical pulse. Thus, in some embodiments, the controller 502 may perform pulse width tuning such that the fall time of the compensation electrical pulse corresponds to the rise time of the primary electrical pulse. For example, when the controller 502 performs pulse width tuning, the controller 502 may adjust the control signal provided to the compensation gate driver 506 of the compensation switch 510 such that the compensation switch 510 is in a closed state for a charging time that achieves a fall time of the compensation electrical pulse corresponding to a rise time of the main electrical pulse.

As noted above, fig. 5A and 5B are provided as examples only. Other examples may be different than that described with respect to fig. 5A and 5B.

Fig. 6 is a diagram of an example graph 600 (e.g., which may be obtained from an oscilloscope) plotting voltages from an optical detector receiving an optical signal associated with example embodiments of an electrical drive circuit and an optical load as described herein. For example, the electrical drive circuit and the optical load may be similar to the electrical drive circuit and the optical load described herein with respect to fig. 1-4. The example graph 600 plots an optical signal generated by a DC-coupled VCSEL array in response to an electrical signal provided to the DC-coupled VCSEL array by an electrical drive circuit, where the electrical signal corresponds to a series of primary electrical pulses similar to the primary electrical pulses described herein with respect to fig. 1-4, 5A, and 5B.

As shown in fig. 6, the optical pulses of the optical signal have long rise times (e.g., due to parasitic inductance), which causes the shape of the optical pulses to deviate from a rectangular shape. Furthermore, and as also shown in fig. 6, the light pulse has a short fall time (e.g., a fast fall time) in which the power of the light pulse falls from the peak power to zero. As described herein, a short fall time may facilitate the implementation of a rectangular shaped light pulse.

Fig. 7 is a diagram of an example graph 700 (e.g., which may be obtained from an oscilloscope) plotting voltages from an optical detector receiving an optical signal associated with example embodiments of an electrical drive circuit and an optical load as described herein. For example, the electrical drive circuit and the optical load may be similar to the electrical drive circuit and the optical load described herein with respect to fig. 1-4. The example graph 700 plots an optical signal generated by an AC-coupled VCSEL array in response to an electrical signal provided to the AC-coupled VCSEL array by an electrical drive circuit, where the electrical signal corresponds to a compensation electrical pulse similar to the compensation electrical pulse described herein with respect to fig. 1-4, 5A, and 5B.

As shown in fig. 7, the light pulse has a short rise time (e.g., a fast rise time). As described herein, a short rise time may facilitate the implementation of a rectangular shaped light pulse. Furthermore, and as also shown in fig. 7, the light pulses have a narrow width and fall time, which in some embodiments may be tuned as described herein to compensate for the rise time of the primary light pulse.

In fig. 6-7, limitations on the measurement equipment (e.g., bandwidth limitations of oscilloscopes, parasitic aspects of probes, EMI (electromagnetic interference) from high speed switching FETs (field effect transistors), etc.) may prevent clean and accurate measurement of sub-nanosecond or picosecond electrical pulses directly from the electrical drive circuit. Thus, simulations may be used to estimate the peak current provided by the electric drive circuit to the optical load.

As noted above, fig. 6-7 are provided as examples only. Other examples may be different than described with respect to fig. 6-7.

FIG. 8 is a graph of example graphs 802, 804, 806, and 806 plotting the timing of switching in an example embodiment of an electrical drive circuit (example graph 802), the voltage at a point in an example embodiment of an electrical drive circuit (example graph 804), the voltage at another point in an example embodiment of an electrical drive circuit (example graph 806), and the current provided to an optical load by an example embodiment of an electrical drive circuit (example graph 808). For example, the electrical drive circuit and the optical load may be similar to the electrical drive circuit and the optical load described herein with respect to fig. 1-4.

The example graph 802 may plot switch timing for a main switch (e.g., the main switch 112 of fig. 1, the main switch 212 of fig. 2, the main switch 312 of fig. 3, the main switch 412 of fig. 4, etc.) and a compensation switch (e.g., the compensation switch 128 of fig. 1, the compensation switch 228 of fig. 2, the compensation switch 328 of fig. 3, the compensation switch of fig. 4, etc.). As shown in fig. 8, the main switch and the compensation switch may be initially off (e.g., in an open state), and at time t1, the compensation switch may be on (e.g., transition from an open state to a closed state).

As further illustrated in fig. 8 by example graph 802, the compensation switch may remain on (e.g., in a closed state) for a time interval Δ t. In some embodiments, the time interval Δ t may correspond to a charging time as described herein with respect to fig. 1-4, 5A, and 5B. For example, during time interval Δ t, the electric drive circuit may cause a current to charge one or more inductive elements (e.g., via a charging circuit path).

As shown by example graph 802 in fig. 8, the compensation switch may be turned off (e.g., transitioned from a closed state to an open state) at time t 2. In some embodiments, when the compensation switch is turned off, the one or more inductive elements may discharge to provide the compensation electrical pulse as described herein with respect to fig. 1-4, 5A, and 5B.

As further illustrated in fig. 8 by example graph 802, the main switch may be turned on (e.g., transitioning from an open state to a closed state) at time t 3. In some embodiments, the electrical drive circuit may generate a main electrical pulse as described herein with respect to fig. 1-4, 5A, and 5B when the main switch is on. Additionally, or alternatively, and as shown by example graph 802 in fig. 8, the main switch may remain on (e.g., in a closed state) for a main time interval and then turn off. In some embodiments, time t2 and time t3 may be the same time. In some embodiments, time t2 may occur after time t 3.

In an example embodiment of an electric drive circuit, the example graph 804 plots the voltage V _ a at point a. For example, point a of fig. 8 may correspond to point a shown in fig. 1-4. As shown by example graph 804 in fig. 8, when the main switch and the compensation switch are off (e.g., in an open state), voltage V _ a may correspond to voltage V2. For example, the voltage V2 may correspond to the voltage of the compensation source 122 of fig. 1.

As further illustrated by example graph 804 in fig. 8, at time t1 when the compensation switch is turned on (e.g., transitioning from an open state to a closed state), voltage V _ a becomes zero (e.g., because the compensation switch short-circuits point a to ground). In some embodiments, at time t1 when the compensation switch is on, the current at point a may increase during time interval Δ t and pass through the compensation switch.

As shown by the example graph 804 in fig. 8, at time t2 when the compensation switch is turned off (e.g., transitioning from a closed state to an open state), the voltage V _ a cannot immediately increase. In some embodiments, at time t2 when the compensation switch is turned off, voltage V _ a cannot increase immediately because there may be a short delay (e.g., two nanoseconds or less, one nanosecond or less, 0.5 nanoseconds or less, etc.) between time t2 and the time when one or more inductive elements discharge current (e.g., provide a compensation electrical pulse) through point a. Additionally, or alternatively, the time t2 and the time t3 may be controlled, adjusted, etc. (e.g., by the controller performing delay tuning, as noted with respect to fig. 5A and 5B) to account for the short delay such that the voltage V _ a may increase to the voltage peak Vpeak at time t3 when the main switch is turned on (e.g., transitioning from an open state to a closed state), as shown in the example graph 804. In some embodiments, time t2 and time t3 may be controlled, adjusted, etc. based on the pulse width of the compensating electrical pulse, control signal propagation delay (e.g., from controller to gate driver, etc.), etc. (e.g., delay tuning is performed by the controller, as described with respect to fig. 5A and 5B). However, as described above, in some embodiments, time t2 may be the same time as time t 3.

As shown in fig. 8 and further by the example graph 804, after the voltage peak V peak is reached at time t3, the voltage V _ a may decrease to a voltage V2. For example, the one or more inductive elements discharging current through point a may increase the voltage V _ a to the voltage peak V peak, and when the current discharged by the one or more inductive elements decreases, the voltage V _ a may decrease to the voltage V2 (e.g., corresponding to the voltage of the compensation source 122 of fig. 1).

In an example embodiment of an electrical drive circuit, the example graph 806 may plot the voltage V _ B at point B. For example, point B of fig. 8 may correspond to point B shown in fig. 1-4. As shown by example graph 806 in fig. 8, when the main switch and the compensation switch are off (e.g., in an open state), voltage V _ B may correspond to voltage V1. For example, the voltage V1 may correspond to the voltage of the main source 108 of fig. 1. As further illustrated by example graph 806 in fig. 8, at time t1 when the compensation switch is on, during time interval Δ t and at time t2 when the compensation switch is off, voltage V _ B may remain at voltage V1.

As shown by way of example in fig. 8 by graph 806, when the main switch is turned on, the voltage V _ B may increase to a voltage peak V peak at time t 3. As noted with respect to example graph 804, when the compensation switch is off, there may be a short delay (e.g., two nanoseconds or less, one nanosecond or less, 0.5 nanoseconds or less, etc.) between time t2 and the time at which one or more inductive elements discharge current (e.g., to provide a compensation electrical pulse) through points a and B, and time t2 and time t3 may be controlled, adjusted, etc. to account for the short delay. Thus, when the current discharged by the one or more inductive elements passes through point B, the voltage V _ B may increase to the voltage peak V peak, and because the main switches are simultaneously turned on, the current discharged by the one or more inductive elements may pass through point B to the optical load. In some embodiments, the voltage values of vpeak in example graph 806 may be different voltage values of vpeak in example graph 804.

Example graph 808 plots current provided to an optical load by an example embodiment of an electrical drive circuit. As shown in fig. 8, the electrical drive circuit cannot provide any current to the optical load until the main switch is turned on (e.g., transitions from an open state to a closed state) at time t 3. However, because time t3 may be controlled, adjusted, etc. to account for the short delay between time t2 and the time at which the one or more inductive elements release current to provide the compensation electrical pulse, the electrical drive circuit may provide current from the main circuit path (e.g., the main electrical pulse) and current from the discharge circuit path (e.g., the compensation electrical pulse) at time t3 when the main switch is turned on at time t 3. In this manner, and as shown by example graph 808 in fig. 8, the electrical drive circuit may provide a current (e.g., a combined electrical pulse) to the optical load that has a short rise time (e.g., the current increases rapidly to a maximum current), a constant amplitude, and/or a short fall time.

Fig. 9 is a diagram of example graphs 902, 904, and 906 plotting the current provided to an optical load by an example embodiment of an electrical drive circuit. For example, the electrical drive circuit and the optical load may be similar to the electrical drive circuit and the optical load described herein with respect to fig. 1-4. Additionally, or alternatively, the electric drive circuit may be controlled by a controller (e.g., controller 502 described herein with respect to fig. 5A and 5B) to perform switching sequences similar to those described with respect to fig. 8. For example, times t1, t2, and t3 shown in example graphs 902, 904, and 906 may correspond to times t1, t2, and t3 shown in and described with respect to fig. 8.

An example graph 902 plots a main current (e.g., of a main electrical pulse) that may be generated by a main circuit path of an electric drive circuit. As shown by the example graph 902 in fig. 9, the main current may have a long rise time (e.g., the current slowly increases to the maximum current) and a short fall time (e.g., the current rapidly decreases from the maximum current to zero).

Example graph 904 plots a compensation current (e.g., of a compensation electrical pulse) that may be generated by a discharge circuit path of an electrical drive circuit. As shown by example graph 904 in fig. 9, the compensation current may have a short rise time (e.g., the current increases rapidly to the maximum current) and a long fall time (e.g., the current decreases gradually from the maximum current to zero).

The example graph 906 plots a combined current (e.g., a combined electrical pulse) that may be provided by the electrical drive circuit to the optical load. For example, an electric drive circuit may combine a main current and a compensation current to generate a combined current. As shown by example graph 906 in fig. 9, the combined current may have a short rise time (e.g., corresponding to and/or shorter than the short rise time of the compensation current) and a short fall time (e.g., corresponding to the short fall time of the main current), thereby providing the combined current with a rectangular shaped pulse to the optical load. For example, the combined current may have a shorter rise time than the main current and/or a shorter fall time than the compensation current.

As further illustrated by example graph 906 in fig. 9, the maximum current of the compensation current may correspond to the maximum current of the main current. As further illustrated by the example graph 906 in fig. 9, the long fall time of the compensation current may correspond to a long rise time of the main current, such that the combined current corresponds to a maximum current of the main current and/or the compensation current during the rise time of the main current and/or the fall time of the compensation current. In other words, the compensation current (e.g., of the compensation electrical pulse) may compensate the main current (e.g., of the main electrical pulse) during the rise time of the main current, such that the combined current provides a constant current during the rise time of the main current.

In this manner, the electric drive circuit may generate and provide a combined current (e.g., a combined electrical pulse) having a short rise time, a constant amplitude, and a short fall time to the optical load. By providing such a combined current to the optical load, the electrical drive circuit may drive the optical load to emit light pulses having a rectangular shape.

As noted above, fig. 8-9 are provided as examples only. Other examples may be different than described with respect to fig. 8-9. For example, instead of controlling the main switch and the compensation switch such that the compensation electrical pulse and the main electrical pulse are combined to provide a combined electrical pulse, the controller may be configured to control the main switch and the compensation switch to generate only the compensation electrical pulse or a series of compensation electrical pulses (e.g., for 3D sensing applications), wherein the compensation electrical pulse has a narrow pulse width (e.g., driving the optical load to emit the optical pulse having a width in the range of 30 picoseconds to 1000 picoseconds). For example, the controller may control the electrical drive circuit to drive the optical load to emit a light pulse or a series of light pulses similar to the light pulses shown in and described with respect to fig. 7.

Additionally, or alternatively, for an electric drive circuit similar to fig. 1 and/or fig. 4, the main source may be switched off, turned off, adjusted to zero voltage, etc., such that the electric drive circuit does not generate the main electric pulse and only generates the compensation electric pulse or series of compensation electric pulses (e.g., with a narrow pulse width). In such embodiments, the electrical drive circuit may drive the optical load to emit a light pulse or series of light pulses similar to the light pulses shown in and described with respect to fig. 7.

In this way, the electric drive circuit may be reconfigurable to generate rectangular shaped electric pulses or narrow electric pulses for driving the optical load. Reconfigurable in this manner allows the use of electrical drive circuitry and/or time-of-flight systems for different types of applications (e.g., direct time-of-flight, indirect time-of-flight, 3D sensing, laser radar (LIDAR), etc.).

FIG. 10 is a graph plotting example graphs 1002 and 1004 of the shape of the current provided to an optical load by an example embodiment of an electrical drive circuit. For example, the shape may be used for a compensation current similar to that described with respect to fig. 9. Additionally, or alternatively, the electrical drive circuit and the optical load may be similar to the electrical drive circuit and the optical load described herein with respect to fig. 1-4.

As shown by example graph 1002 in fig. 10, the compensation widths (e.g., the widths of the compensation currents) may be adjusted to achieve the compensation widths a, b, and c. For example, the capacitance of a compensating capacitive element (e.g., compensating capacitive element 124 of fig. 1) in an electrical drive circuit can be adjusted to achieve different compensation widths. In some implementations, a higher capacitance can increase the compensation width, such as for the compensation width c. Additionally, or alternatively, a lower capacitance may reduce the compensation width, such as for the compensation width a.

As shown by example graph 1004 in fig. 10, the compensation intensities (e.g., the maximum current and/or the fall time of the compensation current) may be adjusted to achieve the compensation intensities a, b, and c. For example, the voltage supplied by a source (e.g., compensation source 122 of fig. 1) and/or the inductance of an inductive element (e.g., compensation inductive element 126 of fig. 1) in an electrical drive circuit may be adjusted to achieve different compensation strengths. In some embodiments, a higher voltage and/or higher inductance may increase the compensation strength, such as for the compensation strength c. Additionally, or alternatively, a lower voltage and/or lower inductance may reduce the compensation strength, such as for the compensation strength a.

By adjusting the compensation width and adjusting the compensation intensity, the electric drive circuit may implement a compensation current (e.g., a compensation electrical pulse) that compensates (e.g., supplements) the main current (e.g., the main electrical pulse) to implement a combined current (e.g., a combined electrical pulse) having a rectangular shape. In this way, the electrical drive circuit may be designed to provide a rectangular shaped combined current to the optical load and drive the optical load to emit a rectangular shaped light pulse. Furthermore, by driving the optical load to emit light pulses in a rectangular shape, the electrical drive circuit may improve the performance of the time-of-flight based measurement system.

As indicated above, fig. 10 is provided as an example only. Other examples may be different than that described with respect to fig. 10.

Fig. 11 is a graph plotting example graphs 1102 and 1104 of examples of switching timing in example embodiments of an electrical drive circuit. For example, the electrical drive circuit may be similar to the electrical drive circuit described herein with respect to fig. 1-4. In some implementations, the controller can control (e.g., based on switch timing) the electrical drive circuit to repeatedly provide electrical pulses (e.g., combined electrical pulses) to the optical load.

Example graph 1102 plots example switch timing for a main switch (e.g., main switch 112 of fig. 1, main switch 212 of fig. 2, main switch 312 of fig. 3, main switch 412 of fig. 4, etc.) and a compensation switch (e.g., compensation switch 128 of fig. 1, compensation switch 228 of fig. 2, compensation switch 328 of fig. 3, compensation switch of fig. 4, etc.) for a pulse period. In some embodiments, the switching timing of the main and compensation switches for the pulses may be similar to the switching timing shown in and described with respect to fig. 8-9.

As shown by example graphs 1102 and 1104 in fig. 11, the time period T may correspond to a time period between times the main switch is turned on for each pulse (e.g., a time period between the start of each pulse), and the time period T _ on may correspond to a time period for which the main switch is turned on for each pulse. The pulse duty ratio may correspond to a ratio of the time period T _ on to the time period T.

As indicated by the broken line in the example graph 1102, the time period T may have an indeterminate length (e.g., a long time period). Thus, for some applications, the pulse duty cycle (T _ on/T) may be very low. For example, the pulse duty cycle may be less than 0.1% (e.g., for direct time-of-flight applications).

The time period T may also be short, as shown by the example graph 1104 in fig. 11. In some embodiments, the charging time may determine how short the time period T may be when the compensation switch is turned on. For example, and as shown by example graph 1104 in fig. 11, the charging time may be less than the time period T _ on. Thus, for some applications, the pulse duty cycle (T _ on/T) may be very high.

In some embodiments, if the fall time of the first compensation electrical pulse is short compared to the width of the first main electrical pulse, the compensation switch may be switched on to recharge the inductive element while the main switch is still switched on. In this way, the electric drive circuit may charge the inductive element again for the second compensating electric pulse while generating the first main electric pulse, which may allow a further reduction of the time period T and an increase of the pulse duty cycle (T _ on/T).

Furthermore, if the sum of the fall time of the compensation electrical pulse and the charging time of the inductive element is less than or equal to the time period T _ on, the main switch may be turned off for a very short time period and then turned on again to generate another main electrical pulse. In other words, the difference between the time period T and the time period T _ on may be reduced if both the fall time of the compensation electrical pulse and the charging time of the inductive element are short enough that the inductive element may be fully discharged and charged again during the time period T _ on. By reducing the difference between the time period T and the time period T _ on to almost zero, the pulse duty cycle (T _ on/T) may approach 100% (e.g., 99.9%, 99.5%, 99%, 95%, etc.). In some embodiments, the switching speed of the main switch may limit how high the pulse duty cycle (T _ on/T) may be. In some embodiments, the electric drive circuit may have a 50% pulse duty cycle (e.g., for indirect time-of-flight applications).

In this manner, the electric drive circuit may be implemented with a wide range of pulse duty cycles (e.g., ranging from a single pulse to a pulse duty cycle approaching 100%), and the switching timing may be adjusted (e.g., by the controller) to implement pulse duty cycles for different applications (e.g., direct time-of-flight applications, indirect time-of-flight applications, etc.).

As noted above, fig. 11 is provided as an example only. Other examples may be different than that described with respect to fig. 11.

Fig. 12 is a diagram plotting an example graph 1200 of voltage from an optical detector receiving an optical signal associated with example embodiments of an electrical drive circuit and an optical load described herein. For example, the electrical drive circuit and the optical load may be similar to the electrical drive circuit and the optical load described herein with respect to fig. 1-4. The example graph 1200 plots optical signals generated by a VCSEL array in response to electrical signals provided to the VCSEL array by an electrical drive circuit, where the electrical signals correspond to a series of combined electrical pulses (e.g., a main electrical pulse and a compensation electrical pulse) similar to the combined electrical pulses described herein with respect to fig. 1-4, 5A, 5B, and 8-11. The VCSEL array can be DC coupled to a main circuit path of an electrical drive circuit (e.g., similar to main circuit path 102 of fig. 1, etc.) and can be AC coupled to a discharge circuit path (e.g., similar to discharge circuit path 106 of fig. 1, etc.). For example, the main current may be DC-coupled to the VCSEL array and the compensation current may be AC-coupled to the VCSEL array.

As shown in fig. 12, an electrical drive circuit can drive an optical load to emit a series of optical pulses (e.g., a pulse train). For example, the optical pulses shown in fig. 12 may have a rise time of 52ps, a fall time of 280ps, and low fluctuations (e.g., constant amplitude) between the rise time and the fall time, and the electrical drive circuit may drive the optical load at a pulse frequency of 100 megahertz (MHz). In this way, the electric drive circuit may realize light pulses having a rectangular shape. Furthermore, by driving the optical load to emit light pulses in a rectangular shape, the electrical drive circuit may improve the performance of the time-of-flight based measurement system.

As noted above, fig. 12 is provided as an example only. Other examples may be different than that described with respect to fig. 12.

Fig. 13 is a diagram of an example graph 1300 plotting voltages from an optical detector receiving a light signal, the optical detector associated with an electrical drive circuit and an optical load as described herein. The example graph 1300 plots optical signals generated by a VCSEL array in response to electrical signals provided to the VCSEL array by an electrical drive circuit.

As shown in fig. 13, the electrical drive circuit may drive the optical load to emit light pulses having high fluctuations between rise and fall times (e.g., variable, irregular, inconsistent, non-constant in amplitude, etc.). For example, and as shown in fig. 13, the light pulses have a ripple amplitude corresponding to about 38% of the peak amplitude (e.g., the difference between the peak amplitude and the minimum amplitude between the rise time and the fall time). Such fluctuations can negatively impact the performance of time-of-flight based measurement systems (e.g., 3D sensing systems).

Fig. 14 and 15 are graphs plotting example graphs 1400 and 1500 of voltages from optical detectors receiving optical signals associated with example embodiments of electrical drive circuits and optical loads described herein. For example, the electrical drive circuit and the optical load may be similar to the electrical drive circuit and the optical load described herein with respect to fig. 1-4. Example graphs 1400 and 1500 plot optical signals generated by a VCSEL array in response to electrical signals provided to the VCSEL array by an electrical drive circuit, where the electrical signals correspond to a series of combined electrical pulses (e.g., a main electrical pulse and a compensation electrical pulse) similar to the combined electrical pulses described herein with respect to fig. 1-4, 5A, 5B, and 8-11. The VCSEL array can be DC coupled to a main circuit path of an electrical drive circuit (e.g., similar to main circuit path 102 of fig. 1, etc.) and can be AC coupled to a discharge circuit path (e.g., similar to discharge circuit path 106 of fig. 1, etc.). For example, the main current may be DC-coupled to the VCSEL array and the compensation current may be AC-coupled to the VCSEL array.

As shown in fig. 14 and 15, the electrical drive circuit can drive the optical load to emit a series of light pulses. For example, the optical pulses shown in fig. 14 may have a rise time of 97ps, a fall time of about 40ps, and low fluctuations between the rise time and the fall time (e.g., constant amplitude, low ripple amplitude (such as less than 25% of peak amplitude, etc.)), and the electrical drive circuit may drive the optical load at a pulse frequency of 20 MHz. As another example, the optical pulses shown in fig. 15 may have a rise time of 53ps, a fall time of about 400ps, and low fluctuations between the rise time and the fall time, and the electrical drive circuit may drive the optical load at a pulse frequency of 50 MHz. As also shown in fig. 15, the light pulse has a fluctuation amplitude corresponding to about 23% of the peak amplitude (e.g., the difference between the peak amplitude and the minimum amplitude between the rise time and the fall time).

In this way, the electric drive circuit may realize light pulses having a rectangular shape. Furthermore, by driving the optical load to emit light pulses in a rectangular shape, the electrical drive circuit may improve the performance of the time-of-flight based measurement system.

14-15 are provided as examples only. Other examples may be different than that described with respect to fig. 14-15.

Fig. 16 is a flow chart of an example process 1600 for driving an optical load. In some embodiments, one or more of the process blocks of fig. 16 may be performed by an electric drive circuit (e.g., as shown in and described with respect to fig. 1-4, 5A, 5B, and/or 8-11). In some implementations, one or more of the process blocks of fig. 16 may be performed by another device or group of devices separate from or including the electrical drive circuitry, such as an optical device (e.g., an optical device as shown in and described with respect to fig. 1-4, 5A, 5B, and/or 8-11), a time-of-flight based measurement system (e.g., a direct time-of-flight based measurement system, an indirect time-of-flight based measurement system, etc.), a 3D sensing system, a LIDAR system, etc. Additionally, or alternatively, one or more of the process blocks of fig. 16 may be performed by one or more components of an electrical drive circuit, an optical device, a time-of-flight based measurement system, a 3D sensing system, a LIDAR system, etc. (such as a main circuit path, a charging circuit path, a discharging circuit path, one or more sources, one or more switches, a controller, etc.).

As shown in fig. 16, the process 1600 may include charging one or more inductive elements (block 1610). For example, as described above, the electrical drive circuit may charge one or more inductive elements. In some embodiments, the electric drive circuit comprises one or more inductive elements. In some embodiments, the electrical drive circuit includes a capacitive element in series between the one or more inductive elements and the optical load. In some embodiments, the electrical drive circuit is connected to one or more sources.

As further shown in fig. 16, the process 1600 may include generating a primary electrical pulse after charging and within a first time interval (block 1620). For example, as described above, the electric drive circuit may generate the main electric pulse after charging and within a first time interval.

As further shown in fig. 16, the process 1600 may include discharging the one or more inductive elements to provide the compensation electrical pulse after charging and for a second time interval, wherein at least a portion of the second time interval overlaps the first time interval (block 1630). For example, as described above, the electric drive circuit may discharge the one or more inductive elements after charging and within the second time interval to provide the compensation electric pulse. In some embodiments, at least a portion of the second time interval overlaps the first time interval. In some implementations, block 1630 may begin before block 1620. In some implementations, block 1630 may begin before block 1610 is complete.

As further shown in fig. 16, the process 1600 may include combining the main electrical pulse and the compensation electrical pulse into a combined electrical pulse (block 1640). For example, as described above, the electrical drive circuit may combine the main electrical pulse and the compensation electrical pulse into a combined electrical pulse. In some embodiments, block 1640 may begin before block 1620 and/or block 1630 completes.

As further shown in fig. 16, the process 1600 may include providing the combined electrical pulse to an optical load (block 1650). For example, as described above, the electrical drive circuit may provide the combined electrical pulses to the optical load.

Process 1600 may include additional embodiments, such as any single embodiment or any combination of embodiments described below and/or in conjunction with one or more other processes described elsewhere herein.

In a first embodiment, the combined electrical pulse has a rise time proportional to the rise time of the compensation electrical pulse.

In a second embodiment, alone or in combination with the first embodiment, the compensating electrical pulse is a spike pulse.

In a third embodiment, alone or in combination with one or more of the first and second embodiments, the main electrical pulse has a longer rise time than the compensation electrical pulse, and discharging the compensation electrical pulse compensates for the longer rise time of the main electrical pulse.

In a fourth embodiment, alone or in combination with one or more of the first to third embodiments, the compensation current provided by the compensation electrical pulse compensates the main current of the main electrical pulse during the rise time of the main electrical pulse such that the combined electrical pulse provides a constant current during the rise time of the main electrical pulse.

In a fifth embodiment, alone or in combination with one or more of the first to fourth embodiments, the combined electrical pulse has a shorter rise time than the main electrical pulse and a shorter fall time than the compensation electrical pulse.

In a sixth embodiment, alone or in combination with one or more of the first to fifth embodiments, the second time interval begins before the first time interval.

In a seventh embodiment, the second time interval starts simultaneously with the first time interval, either alone or in combination with one or more of the first to sixth embodiments.

In an eighth embodiment, the second time interval corresponds to the first time interval, either alone or in combination with one or more of the first through seventh embodiments.

In a ninth embodiment, the second time interval is less than half of the first time interval, either alone or in combination with one or more of the first through eighth embodiments.

In a tenth embodiment, alone or in combination with one or more of the first to ninth embodiments, the electric drive circuit comprises a charging circuit path for charging the one or more inductive elements, a main circuit path for generating the main electrical pulse, and a discharging circuit path for discharging the compensation electrical pulse.

In an eleventh embodiment, alone or in combination with one or more of the first to tenth embodiments, charging the one or more inductive elements comprises closing a switch in the electric drive circuit during the charging time, and discharging the one or more inductive elements to provide the compensating electric pulse comprises opening the switch after the charging time.

Although fig. 16 shows example blocks of the process 1600, in some implementations, the process 1600 may include more blocks, fewer blocks, different blocks, or a different arrangement of blocks than depicted in fig. 16. Additionally, or alternatively, two or more of the blocks of process 1600 may be performed in parallel.

The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit the embodiments to the precise form disclosed. Modifications and variations are possible in light of the above disclosure or may be acquired from practice of the embodiments. Furthermore, any of the embodiments described herein may be combined unless the foregoing disclosure explicitly provides a reason why one or more embodiments cannot be combined.

As used herein, the term "component" is intended to be broadly interpreted as hardware, firmware, and/or a combination of hardware and software.

It is apparent that the systems and/or methods described herein may be implemented in various forms of hardware, firmware, or a combination of hardware and software. The actual specialized control hardware or software code used to implement these systems and/or methods does not limit the embodiments. Thus, the operation and behavior of the systems and/or methods were described herein without reference to the specific software code-it being understood that software and hardware may be designed to implement the systems and/or methods based on the description herein.

Even though specific combinations of features are recited in the claims and/or disclosed in the specification, these combinations are not intended to limit the disclosure of the various embodiments. Indeed, many of these features may be combined in ways not specifically recited in the claims and/or disclosed in the specification. While each dependent claim listed below may depend directly on only one claim, the disclosure of various embodiments includes each dependent claim in combination with every other claim in the claim set.

No element, act, or instruction used herein should be construed as critical or essential unless explicitly described as such. Also, as used herein, the articles "a" and "an" are intended to include one or more items, and may be used interchangeably with "one or more". In addition, as used herein, the article "the" is intended to include the item or items referred to by the incorporated article "the" and may be used interchangeably with "one or more". Further, as used herein, the term "collection" is intended to include one or more items (e.g., related items, unrelated items, combinations of related and unrelated items, etc.) and may be used interchangeably with "one or more. Where only one item is intended, the phrase "only one" or similar language is used. Also, as used herein, the term "having" is intended to be an open term. In addition, the phrase "based on" is intended to mean "based, at least in part, on" unless explicitly stated otherwise. Also, as used herein, the term "or" when used in tandem is intended to be inclusive and may be used interchangeably with "and/or" unless specifically stated otherwise (e.g., if with "or (eiter)" or "only one of). Additionally, spatially relative terms (such as "closer to," "below," "lower," "above," "upper," and the like) may be used herein to describe one element or feature's relationship to another element (or elements) or feature as illustrated for ease of description. Spatially relative terms are intended to encompass different orientations of the device, apparatus, and/or element in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.