阅读说明：本技术 低接触电阻高Al组分氮化物器件及其制备方法 (Nitride device with low contact resistance and high Al component and preparation method thereof ) 是由 马晓华 芦浩 邓龙格 杨凌 侯斌 武玫 张濛 郝跃 于 2021-08-25 设计创作，主要内容包括：本发明公开了一种低接触电阻高Al组分氮化物及其制备方法,该氮化物器件包括：衬底、依次位于衬底一侧的成核层、缓冲层、沟道层、插入层、势垒层,以及位于势垒层远离衬底一侧的钝化层、源电极、漏电极和栅电极；其中,源电极和漏电极,源电极和漏电极相对设置于势垒层第一表面的两侧,且至少部分源电极位于第一凹槽内、至少部分漏电极位于第二凹槽内；钝化层位于源电极与漏电极之间,包括在垂直于衬底所在平面的方向上贯穿钝化层的开孔,栅电极位于钝化层远离衬底的一侧,至少部分栅电极位于开孔内。由于上述氮化物的制备过程中未使用源漏再生长和离子注入工艺,因而无需引入额外的工艺制程,也避免了高温激活造成势垒层解离及表面缺陷的风险。(The invention discloses a nitride with low contact resistance and high Al component and a preparation method thereof, wherein the nitride device comprises: the semiconductor device comprises a substrate, a nucleating layer, a buffer layer, a channel layer, an insertion layer and a barrier layer which are sequentially positioned on one side of the substrate, and a passivation layer, a source electrode, a drain electrode and a gate electrode which are positioned on one side of the barrier layer away from the substrate; the source electrode and the drain electrode are oppositely arranged on two sides of the first surface of the barrier layer, at least part of the source electrode is positioned in the first groove, and at least part of the drain electrode is positioned in the second groove; the passivation layer is positioned between the source electrode and the drain electrode and comprises an opening penetrating through the passivation layer in the direction vertical to the plane of the substrate, the gate electrode is positioned on one side of the passivation layer far away from the substrate, and at least part of the gate electrode is positioned in the opening. Because the preparation process of the nitride does not use a source-drain regrowth and ion implantation process, an additional process is not needed, and the risks of barrier layer dissociation and surface defects caused by high-temperature activation are avoided.)

1. A low contact resistance high Al composition nitride device, comprising: a substrate;

a nucleation layer on one side of the substrate;

a buffer layer positioned on one side of the nucleation layer away from the substrate;

the channel layer is positioned on one side, far away from the substrate, of the buffer layer;

the insertion layer is positioned on one side of the channel layer, which is far away from the substrate;

a barrier layer on a side of the interposer remote from the substrate;

the passivation layer, the source electrode, the drain electrode and the gate electrode are positioned on one side of the barrier layer, which is far away from the substrate; wherein the content of the first and second substances,

the barrier layer comprises a first surface far away from the insertion layer, the first surface comprises a first groove, a second groove, a source electrode and a drain electrode, the source electrode and the drain electrode are oppositely arranged on two sides of the first surface, at least part of the source electrode is positioned in the first groove, and at least part of the drain electrode is positioned in the second groove;

the passivation layer is located between the source electrode and the drain electrode and comprises an opening, the opening penetrates through the passivation layer in a direction perpendicular to a plane of the substrate, the gate electrode is located on one side, away from the substrate, of the passivation layer, and at least part of the gate electrode is located in the opening.

2. The low contact resistance high Al composition nitride device of claim 1, wherein the barrier layer comprises AlN, Al_xGa_1-xN or Sc_yAl_1-yN, wherein x represents the atomic ratio of Al, y represents the atomic ratio of Sc, and x>0.6，y>0.6。

3. The nitride device according to claim 1, wherein the barrier layer has a thickness of 6 to 15nm in a direction perpendicular to a plane of the substrate.

4. The nitride device according to claim 1, wherein the first and second grooves have a depth h in a direction perpendicular to the plane of the substrate, wherein h is 4nm or more and 15nm or less.

5. The low contact resistance high Al composition nitride device according to claim 1, wherein the source electrode and the drain electrode include a contact layer, a catalytic layer, a spacer layer, and a cap layer in a direction of a substrate directed to a barrier layer;

wherein the contact layer comprises In or In_xAl_yThe catalytic layer comprises Al, the spacer layer comprises Ni, Mo, Cr or Ti, and the cap layer comprises Au, TiN, TaN, W or Pt.

6. The low contact resistance high Al composition nitride device of claim 5, wherein the source electrode and the drain electrode further comprise a predeposition layer;

the predeposition layer is positioned on one side of the contact layer far away from the catalytic layer along the direction vertical to the plane of the substrate.

7. The low contact resistance high Al composition nitride device of claim 6, wherein the pre-deposited layer comprises Si or Ge.

8. The low contact resistance high Al composition nitride device of claim 7, wherein the thickness of the pre-deposited layer in a direction perpendicular to the plane of the substrate is x, wherein x ≦ 4 nm.

9. A preparation method of a nitride device with low contact resistance and high Al component is characterized by comprising the following steps:

providing a heterojunction material, wherein the heterojunction material comprises a substrate, and a nucleating layer, a buffer layer, a channel layer, an insertion layer and a barrier layer which are sequentially grown on one side of the substrate;

etching the heterojunction material to the buffer layer by adopting an Inductively Coupled Plasma (ICP) device;

after photoresist is coated on the surface of the barrier layer, photoetching a preset area, and pre-etching the barrier layer by utilizing ICP (inductively coupled plasma) to form a first groove and a second groove;

coating photoresist on the barrier layer, photoetching to obtain source electrode region and drain electrode region, and preparing In_xAl_yThe alloy target material is formed by sputtering ohmic metal by adopting a magnetron sputtering machine;

stripping and rapid thermal annealing are carried out on the ohmic metal to form a source electrode and a drain electrode;

depositing a SiN film on the barrier layer by utilizing plasma enhanced chemical vapor deposition PECVD to form a passivation layer;

photoetching the passivation layer to form an opening, and etching the source electrode region, the drain electrode region and the SiN passivation layer of the opening by utilizing an ICP (inductively coupled plasma) device;

coating photoresist on the surface of the passivation layer, photoetching a gate electrode area, and depositing gate metal by adopting a magnetron sputtering process to form a gate electrode;

and coating photoresist on the surfaces of the gate electrode, the source electrode and the drain electrode, photoetching an interconnection pattern, and depositing an interconnection metal layer by adopting an electron beam evaporation process to obtain the nitride device.

Technical Field

The invention belongs to the technical field of semiconductors, and particularly relates to a nitride device with low contact resistance and high Al component and a preparation method thereof.

Background

With the improvement of the technological level, the first and second generation semiconductor materials in the prior art can not meet the requirements of higher frequency and higher power electronic devices, and the electronic devices based on nitride semiconductor materials can meet the requirements, so that the device performance is greatly improved, and the third generation semiconductor materials represented by GaN are widely applied to the manufacture of microwave millimeter wave devices.

GaN is a novel wide bandgap compound semiconductor material, and has many excellent characteristics that silicon-based semiconductor materials do not have, such as wide bandgap, high breakdown electric field, and higher thermal conductivity, and is corrosion-resistant and radiation-resistant. Most GaN devices at present are AlGaN/GaN HEMTs, when the GaN devices are applied to 5G millimeter waves, the gate length of the devices needs to be reduced to obtain higher frequency characteristics, and in order to maintain the gate control performance of a channel and inhibit the short channel effect while reducing the gate length, the thickness of a barrier layer needs to be reduced as much as possible. However, thinning of the conventional AlGaN barrier layer reduces the electron density in the channel, which leads to a decrease in saturation current density and deterioration of device characteristics. Therefore, to overcome the above problems, barrier layers of high Al composition are required, and the problems of the barrier application are concentrated on low-resistance ohmic contact, which is not easily formed due to the large contact barrier in the conventional gold half-contact fabrication method.

In order to obtain a high-quality ohmic contact, in the related art, a source-drain regrowth and ion implantation mode is mainly adopted in the device process to form an ohmic contact of a high-Al nitride barrier so as to realize the performance optimization of an ohmic region. However, extra processes are introduced for source-drain regrowth, so that the process complexity is increased, the process difficulty is high, and the maintenance cost of MBE/MOCVD regrowth equipment is high; the ion implantation mode needs to activate and implant Si ions, the activation temperature is usually over 1000 ℃, so that barrier components are easy to dissociate, the quality is poor, the defect state of the barrier surface is increased, and the dynamic characteristic of the device is deteriorated.

Disclosure of Invention

In order to solve the above problems in the prior art, the present invention provides a nitride having a low contact resistance and a high Al composition. The technical problem to be solved by the invention is realized by the following technical scheme:

the present invention provides a nitride device with low contact resistance and high Al composition, comprising: a substrate;

a nucleation layer on one side of the substrate;

a buffer layer positioned on one side of the nucleation layer away from the substrate;

the channel layer is positioned on one side, far away from the substrate, of the buffer layer;

the insertion layer is positioned on one side of the channel layer, which is far away from the substrate;

a barrier layer on a side of the interposer remote from the substrate;

the passivation layer, the source electrode, the drain electrode and the gate electrode are positioned on one side of the barrier layer, which is far away from the substrate; wherein the content of the first and second substances,

the barrier layer comprises a first surface far away from the insertion layer, the first surface comprises a first groove, a second groove, a source electrode and a drain electrode, the source electrode and the drain electrode are oppositely arranged on two sides of the first surface, at least part of the source electrode is positioned in the first groove, and at least part of the drain electrode is positioned in the second groove;

the passivation layer is located between the source electrode and the drain electrode and comprises an opening, the opening penetrates through the passivation layer in a direction perpendicular to a plane of the substrate, the gate electrode is located on one side, away from the substrate, of the passivation layer, and at least part of the gate electrode is located in the opening.

In one embodiment of the invention, the barrier layer comprises AlN and Al_xGa_1-xN or Sc_yAl_1-yN, wherein x represents the atomic ratio of Al, y represents the atomic ratio of Sc, and x>0.6，y>0.6。

In one embodiment of the invention, the thickness of the barrier layer is 6-15 nm along the direction vertical to the plane of the substrate.

In one embodiment of the invention, the depth of the first groove and the second groove is h along the direction vertical to the plane of the substrate, wherein h is more than or equal to 4nm and less than or equal to 15 nm.

In one embodiment of the present invention, the source electrode and the drain electrode include a contact layer, a catalytic layer, a spacer layer, and a cap layer in a direction in which the substrate points to the barrier layer;

wherein the contact layer comprises In or In_xAl_yThe catalytic layer comprises Al, the spacer layer comprises Ni, Mo, Cr or Ti, and the cap layer comprises Au, TiN, TaN, W or Pt.

In one embodiment of the invention, the source electrode and the drain electrode further comprise a pre-deposited layer;

the predeposition layer is positioned on one side of the contact layer far away from the catalytic layer along the direction vertical to the plane of the substrate.

In one embodiment of the invention, the pre-deposited layer comprises Si or Ge.

In one embodiment of the invention, the thickness of the pre-deposition layer along the direction vertical to the plane of the substrate is x, wherein x is less than or equal to 4 nm.

In a second aspect, the present invention further provides a method for manufacturing a nitride device with low contact resistance and high Al content, comprising:

providing a heterojunction material, wherein the heterojunction material comprises a substrate, and a nucleating layer, a buffer layer, a channel layer, an insertion layer and a barrier layer which are sequentially grown on one side of the substrate;

etching the heterojunction material to the buffer layer by adopting an Inductively Coupled Plasma (ICP) device;

after photoresist is coated on the surface of the barrier layer, photoetching a preset area, and pre-etching the barrier layer by utilizing ICP (inductively coupled plasma) to form a first groove and a second groove;

coating photoresist on the barrier layer, photoetching to obtain source electrode region and drain electrode region, and preparing In_xAl_yThe alloy target material is formed by sputtering ohmic metal by adopting a magnetron sputtering machine;

stripping and rapid thermal annealing are carried out on the ohmic metal to form a source electrode and a drain electrode;

depositing a SiN film on the barrier layer by utilizing plasma enhanced chemical vapor deposition PECVD to form a passivation layer;

photoetching the passivation layer to form an opening, and etching the source electrode region, the drain electrode region and the SiN passivation layer of the opening by utilizing an ICP (inductively coupled plasma) device;

coating photoresist on the surface of the passivation layer, photoetching a gate electrode area, and depositing gate metal by adopting a magnetron sputtering process to form a gate electrode;

and coating photoresist on the surfaces of the gate electrode, the source electrode and the drain electrode, photoetching an interconnection pattern, and depositing an interconnection metal layer by adopting an electron beam evaporation process to obtain the nitride device.

Compared with the prior art, the invention has the beneficial effects that:

the invention provides a nitride device with low contact resistance and high Al component and a preparation method thereof, because a source-drain regrowth process and an ion implantation process are not used in the preparation process of the nitride, an additional process and high maintenance cost of regrowth equipment are not required to be introduced, and the risks of barrier layer dissociation and surface defects caused by high-temperature activation are avoided.

In addition, the invention utilizes the characteristic of small work function of In metal to ensure that the contact potential barrier formed by the In metal and a high Al barrier layer is lower In height, particularly, the In metal and nitride easily form InAlN or InAlGaN compound, so that the metal is easy to infiltrate downwards, the probability of direct transport of current carriers is improved, and the ohmic contact resistance of a nitride device is further reduced.

The present invention will be described in further detail with reference to the accompanying drawings and examples.

Drawings

Fig. 1 is a schematic structural diagram of a low contact resistance high Al composition nitride device provided by an embodiment of the present invention;

FIG. 2 is a schematic diagram of a source electrode according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of another structure of a source electrode provided in an embodiment of the present invention;

fig. 4 is a schematic flow chart of a method for manufacturing a nitride device with low contact resistance and high Al composition according to an embodiment of the present invention;

FIG. 5 is a schematic process diagram of a method for fabricating a low contact resistance high Al content nitride device according to an embodiment of the present invention;

FIG. 6 is a schematic process diagram of another method for fabricating a low contact resistance high Al content nitride device according to an embodiment of the present invention;

FIG. 7 is a schematic process diagram of another method for fabricating a low contact resistance high Al content nitride device according to an embodiment of the present invention;

FIG. 8 is a schematic process diagram of another method for fabricating a low contact resistance high Al content nitride device according to an embodiment of the present invention;

FIG. 9 is a schematic process diagram of another method for fabricating a low contact resistance high Al content nitride device according to an embodiment of the present invention;

FIG. 10 is a schematic process diagram of another method for fabricating a low contact resistance high Al content nitride device according to an embodiment of the present invention;

FIG. 11 is a schematic process diagram of another method for fabricating a low contact resistance high Al content nitride device according to an embodiment of the present invention;

fig. 12 is a schematic process diagram of another method for manufacturing a low-contact-resistance high-Al-component nitride device according to an embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to specific examples, but the embodiments of the present invention are not limited thereto.

Fig. 1 is a schematic structural diagram of a nitride device with low contact resistance and high Al composition according to an embodiment of the present invention. As shown in fig. 1, an embodiment of the present invention provides a low contact resistance high Al composition nitride device, including: a substrate 1;

a nucleation layer 2 on one side of the substrate 1;

a buffer layer 3 positioned on the side of the nucleation layer 2 away from the substrate 1;

a channel layer 4 on the buffer layer 3 on the side away from the substrate 1;

an insertion layer 5 on the side of the channel layer 4 remote from the substrate 1;

a barrier layer 6 on the side of the insertion layer 5 remote from the substrate 1;

a passivation layer 9, a source electrode 7, a drain electrode 8 and a gate electrode 10 on the side of the barrier layer 6 away from the substrate 1; wherein the content of the first and second substances,

the barrier layer 6 comprises a first surface S1 far away from the insertion layer 5, the first surface S1 comprises a first groove A1, a second groove A2, a source electrode 7 and a drain electrode 8, the source electrode 7 and the drain electrode 8 are oppositely arranged on two sides of the first surface S1, at least part of the source electrode 7 is positioned in the first groove A1, and at least part of the drain electrode 8 is positioned in the second groove A2;

the passivation layer 9 is located between the source electrode 7 and the drain electrode 8, the passivation layer 9 comprises an opening B, the opening B penetrates through the passivation layer 9 in a direction perpendicular to the plane of the substrate 1, the gate electrode 10 is located on a side of the passivation layer 9 away from the substrate 1, and at least a portion of the gate electrode 10 is located in the opening B.

Specifically, the nitride device comprises a substrate 1, and a nucleation layer 2, a buffer layer 3, a channel layer 4, an insertion layer 5 and a barrier layer 6 which are sequentially grown on one side of the substrate 1, wherein the barrier layer 6 comprises a first surface S1 on the side far away from the insertion layer 5, and the first surface S1 comprises a source electrode 7 and a drain electrode 8; in the viewing angle shown in fig. 1, the source electrode 7 and the drain electrode 8 are oppositely disposed on the left and right sides of the first surface S1. Optionally, the first surface S1 further includes a first groove a1 and a second groove a2, both recessed toward a side close to the interposer 5, along a direction perpendicular to the plane of the substrate 1, an orthographic projection of the source electrode 7 covering the first groove a1, and an orthographic projection of the drain electrode 8 covering the second groove a 2.

Exemplarily, as shown in fig. 1, each of the source electrode 7 and the drain electrode 8 is composed of a first sub-portion and a second sub-portion, wherein the first sub-portion of the source electrode 7 and the drain electrode 8 is located on a side of the passivation layer 9 away from the insertion layer 5, the second sub-portion of the source electrode 7 is located in the first groove a1, and the second sub-portion of the drain electrode 8 is located in the second groove a 2. It is understood that the present embodiment can increase the ohmic contact area between the source electrode 7 and the barrier layer 6 and between the drain electrode 8 and the barrier layer 6 and maintain a high carrier density below the ohmic contact by providing the first groove a2 and the second groove a 2.

Note that, in the present embodiment, the first groove a1 is located at the edge of the source electrode 7 on the side close to the drain electrode 8, and the second groove a2 is located at the edge of the drain electrode 8 on the side close to the source electrode 7. It should be understood that, for the ohmic contact, due to the current edge effect, only the edge of the source-drain ohmic contact close to the inner side is usually used for transmitting electrons, and the high Al barrier layer increases the difficulty of the ohmic contact, so this embodiment etches and thins this portion to reduce the barrier width and optimize the contact resistance, and does not etch the barrier layer in other regions, thereby maintaining the polarization charge concentration below this region and ensuring the high conductivity of the channel.

Further, the nitride device provided by the embodiment of the present invention further includes a passivation layer 9 and a gate electrode 10, where the passivation layer 9 includes an opening B, the opening B penetrates through the passivation layer 9 in a direction perpendicular to a plane of the substrate 1, the gate electrode 10 is located on a side of the passivation layer 9 away from the substrate 1, and at least a portion of the gate electrode 10 is located in the opening B. The design mode can form a T-shaped gate, and compared with an I-shaped gate without opening a hole in the passivation layer 9, the design mode can reduce the resistance of a gate electrode and improve the small signal gain and frequency characteristics of a device.

Optionally, the thickness of the barrier layer 6 is 6-15 nm in a direction perpendicular to the plane of the substrate 1. In this embodiment, the barrier layer 6 may include AlN or Al_xGa_1-xN or Sc_yAl_1-yN, wherein x represents a atom of AlSub ratio, y represents the atomic ratio of Sc, x>0.6，y>0.6。

Illustratively, the depth of the first groove A1 and the second groove A2 is h along the direction perpendicular to the plane of the substrate 1, wherein h is more than or equal to 4nm and less than or equal to 15 nm. It should be noted that, in the embodiment, the depths of the first groove a1 and the second groove a2 are equal, and on one hand, the first groove a1 and the second groove a2 can be realized through one lithography window without additionally adding a step of process, which is beneficial to simplifying the preparation process; in addition, if the depths of the first groove a1 and the second groove a2 are different, the ohmic contact is likely to be non-uniform.

Fig. 2 is a schematic structural diagram of a source electrode provided in an embodiment of the present invention, and it should be noted that the drain electrode in this embodiment has the same structure as the source electrode. Alternatively, as shown in fig. 2, in the direction in which the substrate 1 is directed to the barrier layer 6, the source electrode 7 and the drain electrode 8 include a contact layer 12, a catalytic layer 13, a spacer layer 14, and a cap layer 15;

wherein the contact layer 12 comprises In or In_xAl_yCatalytic layer 13 comprises Al, spacer layer 14 comprises Ni, Mo, Cr or Ti, and cap layer 15 comprises Au, TiN, TaN, W or Pt.

Specifically, In the direction In which the substrate 1 is directed to the barrier layer 6, the source electrode 7 and the drain electrode 8 include a contact layer 12, a catalytic layer 13, a spacer layer 14, and a cap layer 15 In this order, and the contact layer 12 may include In or In_xAl_yBecause the metal In has the characteristic of small work function, the contact barrier formed by the contact layer 12 In the source and drain electrodes 8 and the barrier layer 6 with high Al component is low, particularly InAlN or InAlGaN compound is easily formed by In and nitride, so that the metal is easy to infiltrate, the probability of improving the direct transport of carriers by a semiconductor is improved, and the ohmic contact resistance is further reduced.

In addition, when In is used for the contact layer 12_xAl_yIn the case of alloying, In and Al metals can be contacted with the semiconductor more uniformly, and the half-alloying reaction of the alloy can be more easily generated.

Fig. 3 is a schematic structural diagram of another source electrode provided in the embodiment of the present invention. In this embodiment, the drain electrode has the same structure as the source electrode, and as shown in fig. 3, in the above-described low contact resistance high Al composition nitride device, the source electrode 7 and the drain electrode 8 further include a predeposition layer 16; in a direction perpendicular to the plane of the substrate 1, the predeposition layer 16 is located on the side of the contact layer 12 remote from the catalytic layer 13. It can be understood that the pre-deposition layer 16 can be diffused to the barrier layer 6 in the thermal annealing process, so that the barrier layer 6 is subjected to thermal annealing n-type doping, the ohmic contact barrier width is reduced, the tunneling current is favorably improved, and the contact resistance is reduced.

Optionally, the pre-deposited layer 16 comprises Si or Ge with a thickness x ≦ 4 nm. For example, the thickness of the pre-deposited layer 16 may be 2nm, 3nm, or 3.5 nm.

Fig. 4 is a schematic flow chart of a method for manufacturing a low-contact-resistance high-Al-component nitride device according to an embodiment of the present invention, and fig. 5 to 12 are schematic process diagrams of a method for manufacturing a low-contact-resistance high-Al-component nitride device according to an embodiment of the present invention. Referring to fig. 1 and fig. 4-12, the present invention further provides a method for manufacturing a nitride device with low contact resistance and high Al content, comprising:

s1, providing a heterojunction material, wherein the heterojunction material comprises a substrate 1, and a nucleation layer 2, a buffer layer 3, a channel layer 4, an insertion layer 5 and a barrier layer 6 which are sequentially grown on one side of the substrate 1;

s2, etching the heterojunction material to the buffer layer 3 by adopting an Inductively Coupled Plasma (ICP) device;

s3, after photoresist is coated on the surface of the barrier layer 6, photoetching is carried out to form a preset area, and the barrier layer 6 is pre-etched by utilizing ICP to form a first groove A1 and a second groove A2;

s4, coating photoresist on the barrier layer 6, photoetching to form a source electrode region and a drain electrode region, and preparing In_xAl_yThe alloy target material is formed by sputtering ohmic metal by adopting a magnetron sputtering machine;

s5, stripping and rapidly thermally annealing the ohmic metal to form a source electrode 7 and a drain electrode 8;

s6, depositing a SiN film on the barrier layer 6 by utilizing plasma enhanced chemical vapor deposition PECVD to form a passivation layer 9;

s7, photoetching the passivation layer 9 to form an opening B, and etching the SiN passivation layer 9 of the opening B and the source electrode region, the drain electrode region by using an ICP (inductively coupled plasma) device;

s8, coating photoresist on the surface of the passivation layer 9, photoetching a gate electrode 10 area, and depositing gate metal by adopting a magnetron sputtering process to form a gate electrode 10;

and S9, coating photoresist on the surfaces of the gate electrode 10, the source electrode 7 and the drain electrode 8, photoetching an interconnection pattern, and depositing an interconnection metal layer 11 by adopting an electron beam evaporation process to obtain the nitride device.

Specifically, before the step S2, the surface of the heterojunction material may be cleaned to remove organic and inorganic contaminants and surface oxides introduced during material storage. Alternatively, the heterojunction material is placed in acetone for ultrasonic cleaning for 2 minutes, then boiled in positive photoresist stripping liquid heated in water bath at 60 ℃ for 10 minutes, then the heterojunction material is sequentially placed in acetone and ethanol for ultrasonic cleaning for 3 minutes, then the residual acetone and ethanol are cleaned by deionized water, then the heterojunction material is cleaned by HF (HF: H2O ═ 1: 5) for 30 seconds, finally the heterojunction material is cleaned by deionized water and dried by ultra-pure nitrogen.

Optionally, in the step S2, the step of etching the heterojunction material to the buffer layer 3 by using an inductively coupled plasma ICP apparatus includes:

s201, photoetching an electric isolation region on the barrier layer 6:

specifically, the heterojunction material is placed on a hot plate at 200 ℃ and baked for 5 min; then throwing photoresist to the heterojunction material, wherein the rotating speed can be 3500rpm, and baking for 1min on a 90 hot plate after completing the photoresist throwing; then, putting the heterojunction material into a photoetching machine to expose the photoresist in the preset electric isolation region; and finally, putting the exposed heterojunction material into a developing solution to remove the photoresist in the preset electric isolation region, and carrying out ultra-pure water washing and nitrogen blow-drying on the photoresist.

S202, etching an electrically isolated region on the barrier layer 6:

etching the barrier layer 6 by adopting an ICP (inductively coupled plasma) process dry method to realize the mesa isolation of the active region, wherein gas Cl adopted for etching₂/BCl₃The pressure is 5mTorr, the power of the upper electrode is 100w, the power of the lower electrode is 10w, and the etching time is 40 s.

S203, removing the etched mask:

and sequentially putting the heterojunction material subjected to active region isolation into an acetone solution, a stripping solution, an acetone solution and an ethanol solution for cleaning to remove the photoresist outside the electrical isolation region, cleaning with deionized water and drying with nitrogen.

Optionally, in the step S3, after coating the photoresist on the surface of the barrier layer 6, performing photolithography to form a predetermined region, and performing pre-etching on the barrier layer 6 by using ICP to form the first groove a1 and the second groove a2, the step includes:

s301, etching a predetermined ohmic edge region on the barrier layer 6:

firstly, placing the etched heterojunction material on a hot plate at 200 ℃ for baking for 5min, then throwing photoresist on the heterojunction material, and baking the heterojunction material on the hot plate at 90 ℃ for 1min, wherein the thickness of the throwing photoresist can be 0.77 mu m; then, putting the heterojunction material into a photoetching machine to expose the photoresist in the preset area, wherein the exposed pattern is hexagonal; and finally, putting the exposed heterojunction material into a developing solution to remove the photoresist in the preset area, and carrying out ultra-pure water washing and nitrogen blow-drying on the photoresist.

S302, carrying out barrier layer 6 pre-etching on the ohmic edge area:

etching the barrier layer 6 by adopting an ICP (inductively coupled plasma) process dry method to realize the etching of the groove in the ohmic edge area, wherein the gas adopted by the etching is Cl optionally₂/BCl₃，BCl₃Flow rate of 20sccm, Cl₂The flow is 8sccm, the pressure is 5mTorr, the power of an upper electrode is 50w, the power of a lower electrode is 15w, the etching time is 15s, and the etching depth is 4-15 nm.

S303, removing the photoresist:

and sequentially putting the heterojunction material subjected to photoetching and etching into an acetone solution, a stripping solution, an acetone solution and an ethanol solution for cleaning to remove the photoresist outside the electric isolation region, cleaning with deionized water and blow-drying with nitrogen to form a first groove A1 and a second groove A2.

Alternatively, in step S4 described above, the barrier layer 6 is formedCoating photoresist, photoetching to obtain source electrode region and drain electrode region, and preparing In_xAl_yThe alloy target material is prepared by the steps of sputtering ohmic metal by a magnetron sputtering machine, and comprises the following steps:

s401, photoetching a source electrode area and a drain electrode area on the barrier layer 6:

firstly, putting the etched heterojunction material on a hot plate at 200 ℃ for baking for 5 min; then, throwing a stripping glue on the heterojunction material, wherein the thickness of the throwing glue is 0.35 mu m, and drying the heterojunction material on a hot plate at the temperature of 200 ℃ for 5 min; then, throwing photoresist on the heterojunction material, wherein the thickness of the photoresist is 0.77 mu m, and drying the heterojunction material on a hot plate at 90 ℃ for 1 min; then, putting the heterojunction material into a photoetching machine to expose the photoresist of the source electrode area and the drain electrode area; and finally, putting the exposed heterojunction material into a developing solution to remove the photoresist and the stripping glue in the source electrode area and the drain electrode area, and carrying out ultra-pure water washing and nitrogen blow-drying on the heterojunction material.

S402, priming film:

and removing the undeveloped photoresist thin layer of the heterojunction material subjected to the photoetching of the source electrode area and the drain electrode area by using a plasma photoresist remover, wherein the processing time is 5min, so that the stripping yield can be greatly improved.

S403, preparing Ta by using hot isostatic pressing method_xAl_yAlloy target material:

first, indium particles and aluminum powder were mixed in a ratio of 1: putting the mixture into a V-shaped powder mixer according to the atomic ratio of 10, and mixing for 12 hours under the protection of inert gas. And then, filling the mixed powder into a rubber sleeve die, sealing the rubber sleeve die, putting the rubber sleeve die into a cold isostatic press, pressurizing to 200MPa, maintaining the pressure for 40min, and carrying out cold isostatic pressing treatment to obtain the indium-aluminum blank. Then, the indium-aluminum blank is put into a stainless steel sheath and sealed, and the vacuum degree is 6 multiplied by 10^-3Heating to 400 ℃ under Pa for degassing treatment, keeping the temperature and the pressure for 8h, then placing the degassed sheath into a hot isostatic pressing furnace until the vacuum degree reaches 6 x 10^-3And (4) after Pa, starting heating, keeping the pressure of a pressure head of the hot press at 140MPa when the temperature is raised to 1100 ℃, and keeping the temperature and the pressure for 3 h. Finally, the obtained crude indium-aluminum alloy product is addedMachining to obtain an indium-aluminum alloy target material, i.e. In_xAl_yAlloying the target material, and completing the assembly on a magnetron sputtering platform for later use.

S404, sputtering source drain electrode 8 metal:

putting the heterojunction material subjected to plasma photoresist stripping into a magnetron sputtering platform until the vacuum degree of a reaction chamber of the magnetron sputtering platform reaches 2 multiplied by 10^-6And sputtering source drain electrode 8 metal on the barrier layer 6 in the source electrode area and the drain electrode area and the photoresist outside the source electrode area and the drain electrode area after Torr, wherein the source drain electrode 8 metal can be a metal stack structure which is formed by five layers of Ge, InxAly, Al, Mo and Pt from bottom to top in sequence.

Alternatively, in step S5, the step of peeling off and rapid thermal annealing the ohmic metal to form the source electrode 7 and the drain electrode 8 includes:

s501, stripping metal of the source/drain electrode 8:

firstly, soaking the heterojunction material subjected to metal sputtering of the source/drain electrode 8 in acetone for more than 40 minutes, and then carrying out ultrasonic treatment; then, putting the heterojunction material into stripping liquid with the temperature of 60 ℃ for water bath heating for 5 min; then putting the heterojunction material into an acetone solution and an ethanol solution in sequence, and ultrasonically cleaning for 3 min; finally, the heterojunction material is rinsed with ultrapure water and blown dry with nitrogen.

S502, quickly thermally annealing the heterojunction material to form ohmic contact:

and putting the heterojunction material into a rapid annealing furnace, introducing nitrogen into the annealing furnace for 10min, setting the temperature of the annealing furnace at 810 ℃ in the nitrogen atmosphere, and performing high-temperature annealing for 60s to ensure that the source and drain electrodes 8 on the source electrode region and the drain electrode region sink to the buffer layer 3, so that ohmic contact between the source and drain electrodes 8 and the heterojunction channel is formed, and source and drain gold semi-ohmic contact is formed.

In step S6, the step of forming the passivation layer 9 by depositing the SiN film on the barrier layer 6 by using plasma enhanced chemical vapor deposition PECVD includes:

s601, cleaning the surface of the heterojunction material which is subjected to ohmic contact:

firstly, putting the heterojunction material into an acetone solution, and ultrasonically cleaning for 3mim, wherein the ultrasonic intensity can be 3.0; then, putting the heterojunction material into stripping liquid with the temperature of 60 ℃ for water bath heating for 5 min; then, putting the heterojunction material into an acetone solution and an ethanol solution in sequence, and ultrasonically cleaning for 3min, wherein the ultrasonic intensity is 3.0; finally, the heterojunction material was rinsed with ultrapure water and blown dry with nitrogen.

S602, growing a passivation layer 9 on the barrier layer 6:

the method comprises the following steps of growing a SiN passivation layer 9 with the thickness of 60-150 nm on a barrier layer 6 by utilizing a Plasma Enhanced Chemical Vapor Deposition (PECVD) process, wherein the growth process conditions are as follows: by NH₃And SiH₄The optimized flow ratio is SiH as Si source and N source₄：NH₃2: 1, deposition temperature is 250 deg.C, reaction chamber pressure is 600mTorr, and RF power is 22W. The reaction time is 23-50 min, and the deposition thickness is 60-150 nm.

In the above step S7, the step of forming the opening B by photolithography of the passivation layer 9, and etching the SiN passivation layer 9 of the opening B and the source electrode region, the drain electrode region by using an ICP apparatus includes:

s701, etching ohmic opening B and a trench gate region on the SiN passivation layer 9:

firstly, putting the heterojunction material on a hot plate at 200 ℃ and baking for 5 min; then, coating and spin coating the photoresist at a spin coating speed of 3500 rpm/mim, and baking the heterojunction material on a hot plate at 90 deg.C for 1 min; then, putting the heterojunction material into a photoetching machine to expose the photoresist of the source electrode area, the drain electrode area and the opening B; finally, putting the exposed heterojunction material into a developing solution to remove the photoresist of the source electrode area, the drain electrode area and the opening B, and carrying out ultra-pure water washing and nitrogen blow-drying on the photoresist;

s702, etching the SiN passivation layer 9 by utilizing an Inductively Coupled Plasma (ICP) etching process:

illustratively, the etching conditions are: the reaction gases are CF4 and O2, the flow rate of CF4 is 25sccm, the flow rate of O2 is 5sccm, the pressure of the reaction chamber is 5mTorr, the radio frequency power of the upper electrode and the radio frequency power of the lower electrode are 100W and 10W respectively, and the etching depth is 60-150 nm.

Optionally, in step S8, after coating a photoresist on the surface of the passivation layer 9 and performing photolithography to form a gate electrode 10 region, depositing a gate metal by using a magnetron sputtering process to form the gate electrode 10, the step includes:

s801, etching a gate electrode 10 region on the passivation layer 9:

firstly, putting the heterojunction material on a hot plate at 200 ℃ for baking for 5min, and throwing a stripping glue on the heterojunction material, wherein the throwing glue thickness is 0.35 mu m; then drying the heterojunction material on a hot plate at the temperature of 200 ℃ for 5min, throwing photoresist on the heterojunction material again, wherein the thickness of the photoresist is 0.77 mu m, and drying the heterojunction material on the hot plate at the temperature of 90 ℃ for 1 min; then, putting the heterojunction material into a photoetching machine to expose the photoresist in the area of the gate electrode 10; finally, the exposed heterojunction material is put into a developing solution to remove the photoresist and the stripping glue in the area of the gate electrode 10, and then the photoresist and the stripping glue are washed by ultrapure water and dried by nitrogen.

S802, priming film:

and removing the photoresist thin layer which is not developed and cleaned in the pattern area of the heterojunction material subjected to the gate electrode 10 photoetching by using a plasma photoresist remover, wherein the processing time is 5 min.

S803, sputtering gate electrode 10 metal:

putting the heterojunction material with the hole B into a magnetron sputtering platform until the vacuum degree of a reaction chamber of the magnetron sputtering platform reaches 1 × 10^-6After the Torr, sputtering gate metal on the photoresist outside the gate electrode 10 area and the gate electrode 10 area, wherein the gate electrode 10 metal is a metal stack structure which is composed of two layers of metal of 40nm Ni and 400nm Pt from bottom to top in sequence;

s804, stripping metal:

soaking the heterojunction material sputtered by the gate electrode 10 in acetone for more than 40 minutes and then carrying out ultrasonic treatment; then, putting the heterojunction material into stripping liquid with the temperature of 60 ℃ for water bath heating for 5 min; then, putting the heterojunction material into an acetone solution and an ethanol solution in sequence, and ultrasonically cleaning for 3 min; finally, the plate was rinsed with ultrapure water and blown dry with nitrogen.

In step S9, the step of depositing the interconnection metal layer 11 by using an electron beam evaporation process after coating photoresist on the surfaces of the gate electrode 10, the source electrode 7, and the drain electrode 8 and performing photolithography of the interconnection pattern to obtain a nitride device includes:

s901, photoetching an interconnection region on the heterojunction material:

firstly, putting the heterojunction material on a hot plate at 200 ℃ and baking for 5 min; then, throwing a stripping glue on the heterojunction material, wherein the thickness of the throwing glue is 0.35 mu m, and drying the heterojunction material on a hot plate at the temperature of 200 ℃ for 5 min; then, throwing photoresist on the heterojunction material, wherein the thickness of the photoresist is 0.77 mu m, and drying the heterojunction material on a hot plate at 90 ℃ for 1 min; then, putting the heterojunction material into a photoetching machine to expose the photoresist in the interconnected electrode area; finally, the exposed heterojunction material is put into a developing solution to remove the photoresist and the stripper in the area of the gate electrode 10, and the photoresist and the stripper are washed by ultra-pure water and dried by nitrogen.

S902, priming film:

and removing the photoresist thin layer which is not developed and cleaned in the pattern area of the heterojunction material subjected to the gate electrode 10 photoetching by using a plasma photoresist remover, wherein the processing time is 5 min.

S903, depositing an interconnection metal Ti 20nm/Au200nm layer on the heterojunction material by adopting an electron beam evaporation process, and removing the photoresist to finish the manufacture of the device.

S904, stripping metal:

soaking the heterojunction material sputtered by the gate electrode 10 in acetone for more than 40 minutes and then carrying out ultrasonic treatment; then putting the heterojunction material into stripping liquid with the temperature of 60 ℃ to heat in water bath for 5 min; then, putting the heterojunction material into an acetone solution and an ethanol solution in sequence, and ultrasonically cleaning for 3 min; finally, the heterojunction material was rinsed with ultrapure water and blown dry with nitrogen gas to obtain the nitride device shown in fig. 1.

The beneficial effects of the invention are that:

the invention provides a nitride device with low contact resistance and high Al component and a preparation method thereof, because a source-drain regrowth process and an ion implantation process are not used in the preparation process of the nitride, an additional process and high maintenance cost of regrowth equipment are not required to be introduced, and the risks of barrier layer dissociation and surface defects caused by high-temperature activation are avoided.

In addition, the invention utilizes the characteristic of small work function of In metal to ensure that the contact potential barrier formed by the In metal and a high Al barrier layer is lower In height, particularly, the In metal and nitride easily form InAlN or InAlGaN compound, so that the metal is easy to infiltrate downwards, the probability of direct transport of current carriers is improved, and the ohmic contact resistance of a nitride device is further reduced.

In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations and positional relationships based on those shown in the drawings, and are used only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be considered as limiting the present invention.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.

In the present invention, unless otherwise expressly stated or limited, "above" or "below" a first feature means that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact with each other via another feature therebetween. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.

In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples described in this specification can be combined and combined by those skilled in the art.

While the present application has been described in connection with various embodiments, other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed application, from a review of the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the word "a" or "an" does not exclude a plurality. A single processor or other unit may fulfill the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.