Coefficient coding and decoding for transform skip mode in video coding and decoding

文档序号:475037 发布日期:2021-12-31 浏览:21次 中文

阅读说明:本技术 视频编解码中用于变换跳过模式的系数编解码 (Coefficient coding and decoding for transform skip mode in video coding and decoding ) 是由 M.卡尔切维茨 H.王 M.Z.科班 Y-H.赵 于 2020-05-29 设计创作,主要内容包括:描述了用于对残差块中的系数进行编解码的技术。视频编解码器(例如,视频编码器或视频解码器)可以在第一遍次中针对视频数据的当前块的残差块中的系数,在逐系数的基础上以交织方式对系数信息进行编解码(例如,编码或解码),其中系数的系数信息包括以下的一个或多个:指示该系数的值是否不为零的有效性标志;指示该系数的值是奇数还是偶数的奇偶性标志;指示该系数的值是正还是负的符号标志;以及指示该系数的绝对值是否大于相应的阈值的一个或多个大于标志;以及在第一遍次之后,在第二遍次中对当前块的残差块中的系数的余量信息进行编解码。(Techniques for coding and decoding coefficients in a residual block are described. A video codec (e.g., a video encoder or a video decoder) may, in a first pass, codec (e.g., encode or decode) coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block for a current block of video data, wherein the coefficient information for the coefficients includes one or more of: a significance flag indicating whether the value of the coefficient is not zero; a parity flag indicating whether the value of the coefficient is odd or even; a sign flag indicating whether the value of the coefficient is positive or negative; and one or more greater than flags indicating whether the absolute value of the coefficient is greater than a corresponding threshold; and after the first pass, encoding and decoding residue information of coefficients in a residue block of the current block in a second pass.)

1. A method of encoding and decoding video data, the method comprising:

encoding and decoding coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of a current block of the video data in a first pass, wherein the coefficient information for coefficients comprises one or more of: a significance flag indicating whether the value of the coefficient is not zero; a parity flag indicating whether the value of the coefficient is odd or even; a sign flag indicating whether the value of the coefficient is positive or negative; and one or more greater than flags indicating whether the absolute values of the coefficients are greater than respective thresholds; and

after the first pass, residual information for coefficients in a residual block of the current block is coded in a second pass.

2. The method of claim 1, wherein encoding and decoding the coefficient information in an interleaved manner comprises:

context-based encoding and decoding of coefficient information in an interleaved manner on a coefficient-by-coefficient basis until a binary bit count limit of the encoding and decoding is reached; and

the coefficient information is bypass coded in an interleaved manner on a coefficient-by-coefficient basis after reaching the binary bit count limit of the coding.

3. The method of claim 2, wherein encoding and decoding the residual information comprises:

encoding and decoding information indicating a remaining absolute value of a particular coefficient, wherein a bin count limit of the encoding and decoding is reached during encoding and decoding of the particular coefficient; and

and coding and decoding corresponding values of the coefficients after the specific coefficient.

4. The method of claim 3, wherein coding respective values of coefficients comprises coding information indicative of respective differences between an absolute value of respective values of coefficients following the particular coefficient and 1.

5. The method of claim 1, wherein coding the residual information comprises bypass coding the residual information.

6. The method of claim 1, further comprising:

determining that the current block is coded in a transform skip mode,

wherein the encoding and decoding the residue information in an interleaved manner comprises encoding and decoding the residue information in an interleaved manner based on the current block being encoded and decoded in a transform skip mode.

7. The method of claim 1, wherein the first and second light sources are selected from the group consisting of,

wherein encoding and decoding in an interleaved manner comprises parsing the coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of the current block in the first pass, and

wherein encoding the residual information comprises parsing the residual information for coefficients in a residual block of the current block in the second pass.

8. The method of claim 1, wherein the first and second light sources are selected from the group consisting of,

wherein encoding and decoding in an interleaved manner includes signaling the coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of the current block in the first pass, an

Wherein encoding the residual information comprises signaling residual information for coefficients in a residual block of the current block in the second pass.

9. An apparatus for encoding and decoding video data, the apparatus comprising:

a memory configured to store video data; and

a processing circuit configured to:

encoding and decoding coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of a current block of the video data in a first pass, wherein the coefficient information for coefficients comprises one or more of: a significance flag indicating whether the value of the coefficient is not zero; a parity flag indicating whether the value of the coefficient is odd or even; a sign flag indicating whether the value of the coefficient is positive or negative; and one or more greater than flags indicating whether the absolute values of the coefficients are greater than respective thresholds; and

after the first pass, residual information for coefficients in a residual block of the current block is coded in a second pass.

10. The device of claim 9, wherein to codec coefficient information in an interleaved manner, the processing circuitry is configured to:

context-based encoding and decoding of coefficient information in an interleaved manner on a coefficient-by-coefficient basis until a binary bit count limit of the encoding and decoding is reached; and

the coefficient information is bypass coded in an interleaved manner on a coefficient-by-coefficient basis after reaching the binary bit count limit of the coding.

11. The device of claim 10, wherein to codec the residual information, the processing circuit is configured to:

encoding and decoding information indicating a remaining absolute value of a particular coefficient, wherein a bin count limit of the encoding and decoding is reached during encoding and decoding of the particular coefficient; and

and coding and decoding corresponding values of the coefficients after the specific coefficient.

12. The apparatus according to claim 11, wherein, to codec respective values of coefficients, the processing circuitry is configured to codec information indicative of respective differences between absolute values of respective values of coefficients following the particular coefficient and 1.

13. The device of claim 9, wherein to codec the residual information, the processing circuit is configured to bypass codec the residual information.

14. The device of claim 9, wherein the processing circuit is configured to:

determining that the current block is coded in a transform skip mode,

wherein to codec and codec margin information in an interleaved manner, the processing circuit is configured to codec and codec margin information in an interleaved manner based on the current block being coded in a transform skip mode.

15. The apparatus as set forth in claim 9, wherein,

wherein the processing circuit comprises a video decoder,

wherein, to encode and decode in an interleaved manner, the processing circuit is configured to parse the coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of the current block in the first pass, and

wherein, to codec residue information, the processing circuit is configured to parse residue information for coefficients in a residue block of the current block in the second pass.

16. The apparatus as set forth in claim 9, wherein,

wherein the processing circuit comprises a video encoder,

wherein, to encode and decode in an interleaved manner, the processing circuit is configured to signal the coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of the current block in the first pass, and

wherein, to encode and decode the residual information, the processing circuit is configured to signal residual information for coefficients in a residual block of the current block in the second pass.

17. The device of claim 9, wherein the device comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

18. A computer-readable storage medium having instructions stored thereon that, when executed, cause one or more processors to:

encoding and decoding coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of a current block of the video data in a first pass, wherein the coefficient information for coefficients comprises one or more of: a significance flag indicating whether the value of the coefficient is not zero; a parity flag indicating whether the value of the coefficient is odd or even; a sign flag indicating whether the value of the coefficient is positive or negative; and one or more greater than flags indicating whether the absolute values of the coefficients are greater than respective thresholds; and

after the first pass, residual information for coefficients in a residual block of the current block is coded in a second pass.

19. The computer-readable storage medium of claim 18, wherein the instructions that cause the one or more processors to codec coefficient information in an interleaved manner comprise instructions that cause the one or more processors to:

context-based encoding and decoding of coefficient information in an interleaved manner on a coefficient-by-coefficient basis until a binary bit count limit of the encoding and decoding is reached; and

the coefficient information is bypass coded in an interleaved manner on a coefficient-by-coefficient basis after reaching the binary bit count limit of the coding.

20. The computer-readable storage medium of claim 19, wherein the instructions that cause the one or more processors to codec the headroom information comprise instructions that cause the one or more processors to:

encoding and decoding information indicating a remaining absolute value of a particular coefficient, wherein a binary bit count limit of the encoding and decoding is reached during encoding and decoding of the particular coefficient; and

and coding and decoding corresponding values of the coefficients after the specific coefficient.

21. The computer-readable storage medium of claim 20, wherein the instructions that cause the one or more processors to codec respective values of coefficients comprise instructions that cause the one or more processors to codec information indicative of respective differences between absolute values of respective values of coefficients following the particular coefficient and 1.

22. The computer-readable storage medium of claim 18, wherein the instructions that cause the one or more processors to codec the headroom information comprise instructions that cause the one or more processors to bypass codec of the headroom information.

23. The computer-readable storage medium of claim 18, further comprising instructions that cause the one or more processors to:

determining that the current block is coded in a transform skip mode,

wherein the instructions that cause the one or more processors to codec and codec margin information in an interleaved manner comprise instructions that cause the one or more processors to codec and codec margin information in an interleaved manner based on the current block being coded in a transform skip mode.

24. The computer-readable storage medium of claim 18,

wherein the instructions that cause the one or more processors to encode and decode in an interleaved manner comprise instructions that cause the one or more processors to parse the coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of the current block in the first pass, and

wherein the instructions that cause the one or more processors to encode residual information comprise instructions that cause the one or more processors to parse residual information for coefficients in a residual block of the current block in the second pass.

25. The computer-readable storage medium of claim 18,

wherein the instructions that cause the one or more processors to encode and decode in an interleaved manner comprise instructions that cause the one or more processors to signal the coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of the current block in the first pass, and

wherein the instructions that cause the one or more processors to encode the residual information comprise instructions that cause the one or more processors to signal residual information for coefficients in a residual block of the current block in the second pass.

26. An apparatus for encoding and decoding video data, the apparatus comprising:

means for encoding and decoding coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of a current block of the video data in a first pass, wherein the coefficient information for coefficients comprises one or more of: a significance flag indicating whether the value of the coefficient is not zero; a parity flag indicating whether the value of the coefficient is odd or even; a sign flag indicating whether the value of the coefficient is positive or negative; and one or more greater than flags indicating whether the absolute values of the coefficients are greater than respective thresholds; and

means for encoding and decoding residual information of coefficients in a residual block of the current block in a second pass after the first pass.

27. The apparatus of claim 26, wherein the means for encoding and decoding coefficient information in an interleaved manner comprises:

means for context-based coding of coefficient information in an interleaved manner on a coefficient-by-coefficient basis until a binary bit count limit of the coding is reached;

means for bypassing codec of coefficient information in an interleaved manner on a coefficient-by-coefficient basis after reaching a binary bit count limit of the codec.

28. The apparatus of claim 27, wherein the means for coding the residual information comprises:

means for encoding and decoding information indicating a remaining absolute value of a particular coefficient, wherein a bin count limit of the encoding is reached during encoding and decoding of the particular coefficient; and

means for encoding and decoding respective values of coefficients following the particular coefficient.

29. The apparatus as set forth in claim 26, wherein,

wherein the means for encoding and decoding in an interleaved manner comprises means for parsing the coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of the current block in the first pass, and

wherein the means for encoding and decoding the residue information comprises means for parsing the residue information of coefficients in a residue block of the current block in the second pass.

30. The apparatus as set forth in claim 26, wherein,

wherein the means for encoding and decoding in an interleaved manner comprises means for signaling the coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of the current block in the first pass, and

wherein the means for encoding and decoding the residue information comprises means for signaling the residue information of coefficients in the residue block of the current block in the second pass.

Technical Field

The present disclosure relates to video encoding and video decoding.

Background

Digital video capabilities can be incorporated into a wide range of devices, including digital televisions, digital direct broadcast systems, wireless broadcast systems, Personal Digital Assistants (PDAs), laptop or desktop computers, tablet computers, electronic book readers, digital cameras, digital recording devices, digital media players, video gaming devices, video gaming consoles, cellular or satellite radio telephones, so-called "smart phones," video teleconferencing devices, video streaming devices, and the like. Digital video devices implement video codec techniques such as those described in standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264/MPEG-4 part 10, Advanced Video Codec (AVC), ITU-T H.265/High Efficiency Video Codec (HEVC), and extensions of these standards. By implementing such video codec techniques, video devices may more efficiently transmit, receive, encode, decode, and/or store digital video information.

Video coding techniques include spatial (intra-picture) prediction and/or temporal (inter-picture) prediction to reduce or eliminate redundancy inherent in video sequences. For block-based video coding, a video slice (e.g., a video picture or a portion of a video picture) may be partitioned into video blocks, which may also be referred to as Coding Tree Units (CTUs), Coding Units (CUs), and/or coding nodes. Video blocks in an intra-coded (I) slice of a picture are encoded using spatial prediction with respect to reference samples in neighboring blocks in the same picture. Video blocks in an inter-coded (P or B) slice of a picture may use spatial prediction with respect to reference samples in neighboring blocks in the same picture or temporal prediction with respect to reference samples in other reference pictures. A picture may be referred to as a frame, and a reference picture may be referred to as a reference frame.

Disclosure of Invention

In general, this disclosure describes techniques for coefficient coding, e.g., in examples of transform skip modes. In the transform skip mode, the transform of residual data from one domain to another (e.g., sample domain to transform domain) is not performed, but the transform is skipped. The residual data may be a difference between the current block and the prediction block. In this case, the coefficient values may be values of residual data (e.g., values of a residual block), possibly with quantization.

Example techniques described in this disclosure relate to techniques for coding (e.g., encoding or decoding) coefficients when a transform of residual data is skipped (e.g., transform skip mode). In some examples, a video codec uses level values and sign information to codec coefficient information for coefficients. Sign information indicates whether the coefficient value is positive or negative. The level value, in combination with the parity value, indicates whether the coefficient value is greater than 0, 1,2, etc. (as a few non-limiting examples).

In some examples, the level values and sign information of neighboring coefficients may be more relevant in the transform skip mode than in the example where the transform is applied. This disclosure describes example techniques that may utilize correlation between neighboring coefficients as a way to improve coding efficiency. In this manner, the example techniques provide practical applications in video codec techniques to improve codec efficiency.

This disclosure also describes examples of interleaving coefficient coding and decoding. In interleaved coefficient coding, level values are coded (e.g., encoded or decoded) on a coefficient-by-coefficient basis in the same pass as other coefficient information, such as symbol information and parity information. Then, in a second pass, the residue values are coded coefficient by coefficient. As described in more detail, with such interleaved coefficient codecs, example techniques may facilitate better use of the codec techniques. In this way, the example techniques provide a technical solution to technical problems in video codecs, for example by providing a practical application of coefficient codecs in video codecs.

In one example, the present disclosure describes a method of encoding and decoding video data, the method comprising encoding and decoding coefficient information in a coefficient-by-coefficient basis for coefficients in a residual block of a current block of the video data in a first pass, wherein the coefficient information for the coefficients comprises one or more of: a significance flag indicating whether the value of the coefficient is not zero; a parity flag indicating whether the value of the coefficient is odd or even; a sign flag indicating whether the value of the coefficient is positive or negative; and one or more greater than flags indicating whether the absolute value of the coefficient is greater than a corresponding threshold; and after the first pass, encoding and decoding residue information of coefficients in a residue block of the current block in a second pass.

In one example, the present disclosure describes an apparatus for encoding and decoding video data, the apparatus comprising a memory configured to store video data and a processing circuit configured to encode coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of a current block of the video data in a first pass, wherein the coefficient information for the coefficients comprises one or more of: a significance flag indicating whether the value of the coefficient is not zero; a parity flag indicating whether the value of the coefficient is odd or even; a sign flag indicating whether the value of the coefficient is positive or negative; and one or more greater than flags indicating whether the absolute value of the coefficient is greater than a corresponding threshold; and after the first pass, encoding and decoding residue information of coefficients in a residue block of the current block in a second pass.

In one example, the present disclosure describes a computer-readable storage medium having instructions stored thereon that, when executed, cause one or more processors to, in a first pass, codec coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of a current block of video data, wherein the coefficient information for the coefficients includes one or more of: a significance flag indicating whether the value of the coefficient is not zero; a parity flag indicating whether the value of the coefficient is odd or even; a sign flag indicating whether the value of the coefficient is positive or negative; and one or more greater than flags indicating whether the absolute value of the coefficient is greater than a corresponding threshold; and after the first pass, encoding and decoding residue information of coefficients in a residue block of the current block in a second pass.

In one example, the present disclosure describes an apparatus for coding video data, the apparatus comprising means for coding coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of a current block of video data in a first pass, wherein the coefficient information for the coefficients comprises one or more of: a significance flag indicating whether the value of the coefficient is not zero; a parity flag indicating whether the value of the coefficient is odd or even; a sign flag indicating whether the value of the coefficient is positive or negative; and one or more greater than flags indicating whether the absolute value of the coefficient is greater than a corresponding threshold; and means for encoding and decoding residual information of coefficients in a residual block of the current block in a second pass after the first pass.

The details of one or more examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description and drawings, and from the claims.

Drawings

Fig. 1 is a block diagram illustrating an example video encoding and decoding system that may perform techniques of this disclosure.

Fig. 2A and 2B are conceptual diagrams illustrating an example binary Quadtree (QTBT) structure and corresponding Codec Tree Units (CTUs).

Fig. 3 is a conceptual diagram illustrating an example of coding and decoding coefficient information of a coefficient.

Fig. 4 is a conceptual diagram illustrating another example of coding and decoding coefficient information of a coefficient.

Fig. 5 is a conceptual diagram illustrating another example of coding and decoding coefficient information of a coefficient.

Fig. 6 is a conceptual diagram illustrating another example of coding and decoding coefficient information of a coefficient.

Fig. 7 is a conceptual diagram illustrating another example of coding and decoding coefficient information of a coefficient.

Fig. 8 is a conceptual diagram illustrating another example of coding and decoding coefficient information of a coefficient.

Fig. 9 is a block diagram illustrating an example video encoder that may perform techniques of this disclosure.

Fig. 10 is a block diagram illustrating an example video decoder that may perform techniques of this disclosure.

Fig. 11 is a flow diagram illustrating an example method for encoding and decoding video data.

Detailed Description

In video coding, a video encoder determines a prediction block for a current block. In some examples, for example in inter prediction, the prediction block may include samples from a reference picture or interpolated samples. In some examples, for example, in intra prediction, the prediction block may include samples generated from samples in the same picture as the current block. Intra block copying may be similar to inter prediction, but the prediction block is from the same picture as the current block. The video encoder determines a difference between the prediction block and the current block to generate a residual block for the current block.

In some techniques, a video encoder performs a transform on a residual block. For example, samples in the residual block may be considered to be in the pixel domain or sample domain, and the video encoder transforms samples in the pixel domain to the frequency or transform domain. The result of the transform is a block of coefficients that can be quantized and then codec.

In some examples, the video encoder skips the transform step (i.e., in a transform skip mode). In the transform skip mode, the coefficients may be identical to the samples of the residual block. These coefficients may then be quantized and then encoded.

Example techniques described in this disclosure may relate to the manner in which coefficients are processed for encoding. The term "coefficient" may refer to a coefficient of a residual block of a current block, on which a transform is skipped or on which a transform is performed. For ease of illustration, example techniques are described with respect to a transform skip mode. However, these techniques may be applicable to examples of performing transformations.

For a video encoder that signals coefficient information, the video encoder may be configured to encode coefficient information that is received by a video decoder to determine values for the coefficients. Examples of coefficient information include a significance flag (e.g., a flag indicating whether the value of the coefficient value is non-zero), a parity flag (e.g., a flag indicating whether the value of the coefficient is odd or even), a sign flag (e.g., a flag indicating whether the value of the coefficient is positive or negative), and one or more greater than flags, which in combination with the parity flag, indicate whether the absolute value of the coefficient is greater than a corresponding threshold.

The "greater than" flags are referred to as "gt" flags and are each associated with a threshold. The gt flags themselves may not be sufficient to indicate whether the values of the coefficients are greater than their respective thresholds. For example, if the gt2 (e.g., greater than 2) flag is 0, it is not necessary to derive a coefficient value of 3. Instead, a combination of the parity flag and the gt2 flag together may indicate the value.

For example, if the value of the coefficient is 3, then the parity flag is 1, indicating an odd value, the gt1 flag is 1, indicating that the value is greater than one, but the gt2 flag may be 0. In this example, the video decoder may determine that the value is greater than 1 because the gt1 flag is 1 and that the value is odd because the parity flag is 1. Therefore, since the value is greater than 1 and is an odd number, the value cannot be 2. Thus, the value may be 3, 5,7 …, etc. Further, the gt2 flag is 0, and thus, based on a combination of the gt2 flag being 0 and the coefficient being odd, the video decoder may determine that the value of the coefficient cannot be greater than 3 and is 3. If the coefficient value is 5 instead of 3, then the g2 flag should be 1.

Assuming that the last greater than flag is a greater than 5 (e.g., gt5) flag, using the level flag and parity flag, values up to 9 may be represented. For values greater than 9, the video encoder may signal a margin value. The margin value is the remaining absolute value of the coefficient.

In the present disclosure, sig _ coeff _ flag refers to a significance flag indicating whether the value of the coefficient is not zero. par level flag refers to a parity flag indicating whether the value of the coefficient is odd or even. coeff _ sign _ flag refers to a sign flag indicating whether the value of the coefficient is positive or negative. abs _ level _ gtX _ flags refers to a flag indicating whether the value of a coefficient value is greater than a certain threshold value. For example, abs _ level _ gtx _ flag [ n ] [ j ] specifies whether the absolute value of the coefficient level (at scanning position n) is greater than (j < <1) + 1. When abs _ level _ gtx _ flag [ n ] [ j ] is not present, it is inferred to be equal to 0. The gtx (or greater) flag may refer to a flag for a level value. However, the gtx flag itself may not specify whether the value is greater than the threshold. For example, a gt2 value of 0 does not necessarily mean that the value of the coefficient cannot be 3.

abs _ remaining refers to information signaled for margin. For example, abs _ remainder [ n ] is the remaining absolute value of the coefficient level that can be coded with Golomb-Rice code at scan position n. When abs _ remaining [ n ] is not present, it is inferred to be equal to 0.

The video decoder receives various coefficient information (e.g., sig _ coeff _ flag, par _ level _ flag, coeff _ sign _ flag, and all abs _ level _ gtX _ flags and abs _ remaining) and determines coefficient values of the coefficients based on the coefficient information. The video decoder may then perform inverse quantization (if needed) and inverse transform (if needed) to generate sample values for the residual block. In one or more examples, a video decoder may skip an inverse transform because coefficients may be generated by a video encoder in a transform skip mode.

The video decoder may use the same techniques as the video encoder to determine the prediction block. For example, the video encoder may signal information to the video decoder that allows the video decoder to determine the same prediction block as the video encoder. The video decoder then adds the prediction block and the residual block together to reconstruct the current block.

In some techniques, a video encoder may signal coefficient information on a bitplane-by-bitplane basis. For example, the video encoder may encode a sig _ coeff _ flag (e.g., a flag of whether the value of a coefficient is non-zero) for each coefficient in the coefficient block, forming a bit plane for the sig _ coeff _ flag value. The video encoder may then encode a par _ level _ flag for each coefficient in the coefficient block (e.g., a flag for whether the value of the coefficient is even or odd), form a bit plane for the par _ level _ flag value, and so on.

This disclosure describes example techniques in which a video encoder encodes a plurality of coefficient information coefficient-by-coefficient in a first pass through the coefficients. Then, in a subsequent pass, the video encoder may encode any remaining coefficient information on a coefficient-by-coefficient or bitplane-by-bitplane basis.

On the basis of coding coefficient information coefficient by coefficient, a video encoder may interleave different coefficient information. For example, the video encoder may encode sig _ coeff _ flag, par _ level _ flag, coeff _ sign _ flag, and all abs _ level _ gtX _ flags for the first coefficient. Then, the video encoder may encode sig _ coeff _ flag, par _ level _ flag, coeff _ sign _ flag, and all abs _ level _ gtX _ flags for the second coefficient in the first pass through the coefficients of the residual block for the current block, and so on. In one or more examples, the video encoder may then encode the abs _ remaining values on a coefficient-by-coefficient basis in a second pass through the coefficients. On the basis of bit-plane-by-bit plane coding coefficient information, a video encoder encodes a sig _ coeff _ flag of a first coefficient, then encodes a sig _ coeff _ flag of a second coefficient, then encodes a par _ level _ flag of the first coefficient, then encodes a par _ level _ flag of the second coefficient, and so on.

For example, in transform skip mode, it may be beneficial to interleave coefficient codec (e.g., encode multiple coefficient information on a coefficient-by-coefficient basis) rather than encode the coefficient information on a bit-plane-by-bit-plane basis. For example, when coding coefficient information, context-based coding may be preferable. However, how many bins (bins) may be based on possible limitations of the context codec (e.g., referred to as the bin count limit of the codec). One example of a binary bit count limit for encoding and decoding is 2 block width of the current block and block height of the current block. Another example of a binary bit count limit for encoding and decoding is 1.75 block width of the current block and block height of the current block. In some cases, a video encoder may need to determine how many bins are to be used on a coefficient-by-coefficient basis, and how many bins are to be available after the coefficient information for the coefficients is coded. After coding the coefficient information for the coefficients, how many bins will be used and how many bins will be available may need to be used for determining the quantization parameter, e.g., in a rate-distortion optimized quantization (RDOQ) process.

By interleaving coefficient information (e.g., significance information, sign information, parity information, and greater than flag) using context-based coding on a coefficient-by-coefficient basis, a video encoder may be able to better track how many bins a coefficient will use than an example where coefficient information using context-based coding is coded on a bitplane-by-bitplane basis. For example, on a bitplane-by-bitplane basis, the video encoder does not know how many bins are needed for one coefficient until the video encoder passes through all the coefficients.

In one or more examples described in this disclosure, the residual information is coded after a first pass of the context-coded coefficient information. The residual information may not be context codec based (e.g., bypass codec). Since the margin information is bypass-coded, the margin information may not affect the number of binary bits required for the context-based coding, and thus, may be separated from the context-based coding of the context information such as significance information, sign information, parity information, and level value.

Accordingly, in one or more examples, example techniques described in this disclosure may improve coefficient coding and decoding processes. One or more techniques described in this disclosure provide for practical application of coding coefficient information that may improve the overall video coding process, for example, by separating coefficient information that needs context-based coding from coefficient information that may be bypassed.

Fig. 1 is a block diagram illustrating an example video encoding and decoding system 100 that may perform techniques of this disclosure. The techniques of this disclosure are generally directed to encoding (encoding and/or decoding) video data. In general, video data includes any data used to process video. Thus, video data may include original, unencoded video, encoded video, decoded (e.g., reconstructed) video, and video metadata such as signaling data.

As shown in fig. 1, in this example, system 100 includes a source device 102, the source device 102 providing encoded video data to be decoded and displayed by a destination device 116. In particular, source device 102 provides video data to destination device 116 via computer-readable medium 110. Source device 102 and destination device 116 may comprise any of a variety of devices, including desktop computers, notebook (i.e., laptop) computers, tablet computers, set-top boxes, telephone handsets such as smartphones, televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, and the like. In some cases, source device 102 and destination device 116 may be equipped for wireless communication and may therefore be referred to as wireless communication devices. Accordingly, source device 102 and destination device 116 may be one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

In the example of fig. 1, the source device 102 includes a video source 104, a memory 106, a video encoder 200, and an output interface 108. Destination device 116 includes input interface 122, video decoder 300, memory 120, and display device 118. In accordance with the present disclosure, video encoder 200 of source device 102 and video decoder 300 of destination device 116 may be configured to apply coefficient codec techniques herein. Thus, source device 102 represents an example of a video encoding device, and destination device 116 represents an example of a video decoding device. In other examples, the source device and the destination device may include other components or arrangements. For example, source device 102 may receive video data from an external video source (e.g., an external camera). Likewise, destination device 116 may interface with an external display device instead of including an integrated display device.

The system 100 shown in fig. 1 is merely an example. In general, any digital video encoding and/or decoding device may perform coefficient codec techniques. Source device 102 and destination device 116 are merely examples of codec devices in which source device 102 generates codec video data for transmission to destination device 116. The present disclosure refers to a "codec" device as a device that performs data codec (encoding and/or decoding). Accordingly, the video encoder 200 and the video decoder 300 respectively represent examples of a codec device, and particularly, represent a video encoder and a video decoder, respectively. In some examples, the devices 102, 116 may operate in a substantially symmetric manner such that each of the devices 102, 116 includes video encoding and decoding components. Thus, the system 100 may support one-way or two-way video transmission between the video devices 102, 116, e.g., for video streaming, video playback, video broadcasting, or video telephony.

In general, video source 104 represents a source of video data (i.e., raw, unencoded video data) and provides a series of consecutive pictures (also referred to as "frames") of the video data to video encoder 200, which video encoder 200 encodes the data of the pictures. The video source 104 of the source device 102 may include a video capture device, such as a video camera, a video archive containing previously captured raw video, and/or a video feed interface that receives video from a video content provider. As a further alternative, video source 104 may generate computer graphics-based data as the source video, or a combination of live video, archived video, and computer-generated video. In each case, the video encoder 200 encodes captured, pre-captured, or computer-generated video data. The video encoder 200 may rearrange the pictures from the receiving order (sometimes referred to as "display order") to the codec order for codec. The video encoder 200 may generate a bitstream including the encoded video data. Source device 102 may then output the encoded video data onto computer-readable medium 110 via output interface 108 for receipt or retrieval by, for example, input interface 122 of destination device 116.

Memory 106 of source device 102 and memory 120 of destination device 116 represent general purpose memory. In some examples, the memories 106, 120 may store raw video data, e.g., raw video from the video source 104 and raw, decoded video data from the video decoder 300. Additionally or alternatively, the memories 106, 120 may store software instructions executable by, for example, the video encoder 200 and the video decoder 300, respectively. Although shown separately from the video encoder 200 and the video decoder 300 in this example, it is understood that the video encoder 200 and the video decoder 300 may also include internal memory for functionally similar or equivalent purposes. Further, the memories 106, 120 may store, for example, encoded video data output from the video encoder 200 and input to the video decoder 300. In some examples, portions of memory 106, 120 may be allocated as one or more video buffers, e.g., to store raw, decoded, and/or encoded video data.

Computer-readable medium 110 may represent any type of medium or device capable of transmitting encoded video data from source device 102 to destination device 116. In one example, computer-readable medium 110 represents a communication medium to enable source device 102 to send encoded video data directly to destination device 116 in real-time (e.g., via a radio frequency network or a computer-based network). Output interface 108 may modulate a transmission signal including the encoded video data, and input interface 122 may demodulate a received transmission signal according to a communication standard, such as a wireless communication protocol. The communication medium may include any wireless or wired communication medium, such as a Radio Frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-based network, such as a local area network, a wide area network, or a global network such as the internet. The communication medium may include a router, switch, base station, or any other device that facilitates facilitating communication from source device 102 to destination device 116.

In some examples, source device 102 may output the encoded data from output interface 108 to storage device 112. Similarly, destination device 116 may access the encoded data from storage device 112 via input interface 122. Storage device 112 may include any of a variety of distributed or locally accessed data storage media such as a hard drive, blu-ray discs, DVDs, CD-ROMs, flash memory, volatile or non-volatile memory, or any other suitable digital storage media for storing encoded video data.

In some examples, source device 102 may output the encoded video data to file server 114 or another intermediate storage device that may store the encoded video generated by source device 102. Destination device 116 may access the stored video data from file server 114 via streaming or download. File server 114 may be any type of server device capable of storing encoded video data and transmitting the encoded video data to destination device 116. File server 114 may represent a web server (e.g., for a website), a File Transfer Protocol (FTP) server, a content delivery network device, or a Network Attached Storage (NAS) device. Destination device 116 may access the encoded video data from file server 114 via any standard data connection, including an internet connection. This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., Digital Subscriber Line (DSL), cable modem, etc.), or a combination of both, suitable for accessing encoded video data stored on file server 114. File server 114 and input interface 122 may be configured to operate according to a streaming protocol, a download transfer protocol, or a combination thereof.

Output interface 108 and input interface 122 may represent wireless transmitters/receivers, modems, wired network components (e.g., ethernet cards), wireless communication components operating according to any of a variety of IEEE 802.11 standards, or other physical components. In examples where output interface 108 and input interface 122 include wireless components, output interface 108 and input interface 122 may be configured to communicate data, such as encoded video data, in accordance with a cellular communication standard (e.g., 4G-LTE (long term evolution), LTE advanced, 5G, etc.). In some examples in which the output interface 108 includes a wireless transmitter, the output interface 108 and the input interface 122 may be configured according to other wireless standards (e.g., IEEE 802.11 specification, IEEE 802.15 specification (e.g., ZigBee)TM)、BluetoothTMStandard, etc.) to transmit data such as encoded video data. In some examples, source device 102 and/or destination device 116 may include respective tilesA system on a system (SoC) device. For example, source device 102 may include a SoC device to perform functions pertaining to video encoder 200 and/or output interface 108, and destination device 116 may include a SoC device to perform functions pertaining to video decoder 300 and/or input interface 122.

The techniques of this disclosure may be applied to video codecs to support any of a variety of multimedia applications, such as over-the-air television broadcasts, cable television transmissions, satellite television transmissions, internet streaming video transmissions such as dynamic adaptive streaming over HTTP (DASH), digital video encoded onto a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

The input interface 122 of the destination device 116 receives the encoded video bitstream from the computer-readable medium 110 (e.g., the storage device 112, the file server 114, etc.). The encoded video bitstream may include signaling information defined by the video encoder 200 (e.g., syntax elements having values that describe characteristics and/or processing of video blocks or other codec units (e.g., slices, pictures, groups of pictures, sequences, etc.)) that is also used by the video decoder 300. The display device 118 displays the decoded pictures of the decoded video data to the user. Display device 118 may represent any of a variety of display devices, such as a Cathode Ray Tube (CRT), a Liquid Crystal Display (LCD), a plasma display, an organic light emitting diode display (OLED), or another type of display device.

Although not shown in fig. 1, in some examples, video encoder 200 and video decoder 300 may each be integrated with an audio encoder and/or audio decoder, and may include appropriate MUX-DEMUX units, or other hardware and/or software, to process a multiplexed stream that includes both audio and video in a common data stream. The MUX-DEMUX unit may be compliant with the ITU h.223 multiplexer protocol or other protocols such as the User Datagram Protocol (UDP), if applicable.

Video encoder 200 and video decoder 300 may each be implemented as any of a variety of suitable encoder and/or decoder circuits, such as one or more microprocessors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), discrete logic, software, hardware, firmware, or any combinations thereof. When the techniques are implemented in part in software, the device may store instructions of the software in a suitable non-transitory computer-readable medium and execute the instructions in hardware using one or more processors to perform the techniques of this disclosure. Each of the video encoder 200 and the video decoder 300 may be included in one or more encoders or decoders, either of which may be integrated as part of a combined encoder/decoder (CODEC) in the respective device. A device including video encoder 200 and/or video decoder 300 may include an integrated circuit, a microprocessor, and/or a wireless communication device such as a cellular telephone.

The video encoder 200 and the video decoder 300 may operate in accordance with a video codec standard, such as ITU-T h.265, also known as High Efficiency Video Codec (HEVC), or extensions thereof, such as multi-view and/or scalable video codec extensions. Alternatively, the video encoder 200 and the video decoder 300 may operate according to other proprietary or industry standards, such as ITU-T h.266, also known as multifunctional video codec (VVC). "multifunctional video codec (draft 5)" by Bross et al, Joint video experts team (JFET) of ITU-T SG 16WP 3 and ISO/IEC JTC 1/SC 29/WG 11, conference 14: a draft of the VVC standard is described in Geneva, Switzerland, 3.19.27.2019, JVET-N1001-v7 (hereinafter referred to as "VVC draft 5"). "multifunctional video codec (draft 9)" by Bross et al, Joint video experts team (JFET) of ITU-T SG 16WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 18 th conference: the latest draft of the VVC standard is described in JVET-R2001-v8 (hereinafter referred to as "VVC draft 9") on days 4, 15-24 of 2020 by teleconference. However, the techniques of this disclosure are not limited to any particular codec standard.

In general, the video encoder 200 and the video decoder 300 may perform block-based picture coding. The term "block" generally refers to a structure that includes data to be processed (e.g., to be encoded, to be decoded, or otherwise used in an encoding and/or decoding process). For example, a block may comprise a two-dimensional matrix of samples of luminance and/or chrominance data. In general, the video encoder 200 and the video decoder 300 may codec video data represented in YUV (e.g., Y, Cb, Cr) format. That is, rather than codec red, green, and blue (RGB) data for samples of a picture, the video encoder 200 and the video decoder 300 may codec luminance and chrominance components, which may include red-tone and blue-tone chrominance components. In some examples, the video encoder 200 converts the received RGB-format data to a YUV representation prior to encoding, and the video decoder 300 converts the YUV representation to an RGB format. Alternatively, a pre-processing and post-processing unit (not shown) may perform these conversions.

The present disclosure may generally refer to the process of coding (e.g., encoding and decoding) of a picture to include data that encodes or decodes the picture. Similarly, the present disclosure may refer to coding of a block of a picture to include processes of encoding or decoding data of the block (e.g., prediction and/or residual coding). An encoded video bitstream typically includes a series of values of syntax elements representing codec decisions (e.g., codec modes) and picture-to-block partitioning. Thus, reference to a coded picture or block is generally understood to be a coding of the values of the syntax elements forming the picture or block.

HEVC defines various blocks, including Coding Units (CUs), Prediction Units (PUs), and Transform Units (TUs). According to HEVC, a video codec, such as video encoder 200, partitions a Coding Tree Unit (CTU) into CUs according to a quadtree structure. That is, the video codec partitions the CTUs and CUs into four equal, non-overlapping squares, and each node of the quadtree has zero or four child nodes. A node without a child node may be referred to as a "leaf node," and a CU of such a leaf node may include one or more PUs, and/or one or more TUs. The video codec may further partition the PU and TU. For example, in HEVC, the Residual Quadtree (RQT) represents the partitioning of a TU. In HEVC, a PU represents inter prediction data and a TU represents residual data. An intra-predicted CU includes intra-prediction information such as an intra-mode indication.

As another example, the video encoder 200 and the video decoder 300 may be configured to operate according to VVC. According to VVC, a video codec (e.g., video encoder 200) partitions a picture into multiple Codec Tree Units (CTUs). The video encoder 200 may partition the CTUs according to a tree structure, such as a quadtree-binary tree (QTBT) structure or a multi-type tree (MTT) structure. The QTBT structure removes the concept of multiple partition types (e.g., separation between CU, PU, and TU of HEVC). The QTBT structure comprises two levels: a first level of partitioning according to a quadtree partitioning, and a second level of partitioning according to a binary tree partitioning. The root node of the QTBT structure corresponds to the CTU. Leaf nodes of the binary tree correspond to Codec Units (CUs).

In the MTT split structure, blocks may be split using Quadtree (QT) splitting, Binary Tree (BT) splitting, and one or more types of Ternary Tree (TT) splitting. A ternary tree partition is a partition in which a block is divided into three sub-blocks. In some examples, the ternary tree partitioning divides a block into three sub-blocks without dividing the original block by the center. The partition types (e.g., QT, BT, and TT) in MTT may be symmetric or asymmetric.

In some examples, the video encoder 200 and the video decoder 300 may represent each of the luma and chroma components using a single QTBT or MTT structure, while in other examples, the video encoder 200 and the video decoder 300 may use two or more QTBT or MTT structures, e.g., one QTBT/MTT structure for the luma component and another QTBT/MTT structure for the two chroma components (or two QTBT/MTT structures for the respective chroma components).

The video encoder 200 and the video decoder 300 may be configured to use quadtree partitioning, QTBT partitioning, MTT partitioning, or other partitioning structures in accordance with HEVC. For purposes of explanation, the description of the techniques of this disclosure is presented with respect to QTBT segmentation. However, it should be understood that the techniques of this disclosure may also be applied to video codecs configured to use quadtree partitioning or other types of partitioning.

The present disclosure may use "N × N" and "N by N" interchangeably to refer to the sample dimension of a block (such as a CU or other video block) in both the vertical and horizontal dimensions, e.g., 16 × 16 samples or 16 by 16 samples. Typically, a 16 × 16CU has 16 samples (y ═ 16) in the vertical direction and 16 samples (x ═ 16) in the horizontal direction. Likewise, an nxn CU typically has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non-negative integer value. Samples in a CU may be arranged in rows and columns. Furthermore, a CU does not necessarily have the same number of samples in the horizontal direction as in the vertical direction. For example, a CU may include N × M samples, where M is not necessarily equal to N.

Video encoder 200 encodes video data of a CU that represents prediction and/or residual information, as well as other information. The prediction information indicates how to predict the CU in order to form a prediction block for the CU. The residual information typically represents the sample-by-sample difference between the CU samples before encoding and the prediction blocks.

To predict a CU, video encoder 200 may typically form a prediction block for the CU through inter prediction or intra prediction. Inter prediction generally refers to predicting a CU from data of a previously coded picture, while intra prediction generally refers to predicting a CU from data of a previously coded picture of the same picture. To perform inter prediction, the video encoder 200 may generate a prediction block using one or more motion vectors. Video encoder 200 may generally perform a motion search to identify a reference block that closely matches a CU, e.g., with respect to a difference between the CU and the reference block. Video encoder 200 may use Sum of Absolute Differences (SAD), Sum of Squared Differences (SSD), Mean Absolute Differences (MAD), Mean Squared Differences (MSD), or other such difference calculations to calculate a difference metric to determine whether the reference block closely matches the current CU. In some examples, video encoder 200 may predict the current CU using uni-directional prediction or bi-directional prediction.

Some examples of VVC also provide an affine motion compensation mode, which may be considered an inter prediction mode. In the affine motion compensation mode, video encoder 200 may determine two or more motion vectors that represent non-translational motion (e.g., zoom-in or zoom-out, rotation, perspective motion, or other irregular motion types).

To perform intra-prediction, video encoder 200 may select an intra-prediction mode to generate the prediction block. Some examples of VVCs provide sixty-seven intra prediction modes, including various directional modes, as well as planar and DC modes. In general, the video encoder 200 selects an intra prediction mode that describes neighboring samples of a current block (e.g., a block of a CU) from which to predict samples of the current block. Assuming that the video encoder 200 encodes the CTUs and CUs in raster scan order (left to right, top to bottom), such samples may typically be above, above left, or to the left of the current block in the same picture as the current block.

The video encoder 200 encodes data representing the prediction mode of the current block. For example, for an inter-prediction mode, video encoder 200 may encode data indicating which of various available inter-prediction modes is used, as well as motion information for the corresponding mode. For example, for uni-directional or bi-directional inter prediction, the video encoder 200 may encode the motion vector using Advanced Motion Vector Prediction (AMVP) or merge mode. The video encoder 200 may use a similar mode to encode motion vectors for the affine motion compensation mode.

After prediction, e.g., intra prediction or inter prediction of a block, the video encoder 200 may calculate residual data for the block. Residual data (such as a residual block of a current block being encoded) represents a sample-by-sample difference between the block and a predicted block of the block that is formed using a corresponding prediction mode. The video encoder 200 may apply one or more transforms to the residual block to produce transformed data in the transform domain rather than the sample domain. For example, video encoder 200 may apply a Discrete Cosine Transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the residual video data. Further, video encoder 200 may apply secondary transforms, such as mode-dependent non-separable secondary transforms (mdsnst), signal-dependent transforms, Karhunen-Loeve transform (KLT), and so on, after the primary transform. The video encoder 200 generates transform coefficients after applying one or more transforms.

Transforming the residual block to produce transformed data in the transform domain rather than the sample domain is not necessary in all examples. In some examples, the transform may be skipped (e.g., in a transform skip mode for the current block). In such an example, the video encoder 200 may perform further operations on residual values (e.g., residual data) of the residual block. For example, transform data (e.g., where a transform occurs from a sample domain to a transform domain) may produce transform coefficients, and a video encoder may perform operations on the transform coefficients.

When skipping the transform, the video encoder 200 may perform an operation on the residual values. For example, in the example of a skipped transform, the coefficients may correspond to residual data (e.g., the difference between samples of the current block and the prediction block). For example, in case of a skip transform, the value of the first coefficient may be a first residual value in the residual block, the value of the second coefficient may be a second residual value in the residual block, and so on. In the following description, transform coefficients are described instead of using transform coefficients, which techniques may utilize coefficient values in the case of a skipped transform. In other words, the example techniques described for transform coefficients may also be applied to skip coefficient values of a transform.

As described above, the video encoder 200 may perform quantization of the coefficients after any transform used to generate the coefficients or after skipping a transform. Quantization generally refers to the process of quantizing coefficients to minimize the amount of data used to represent the coefficients, thereby providing further compression. By performing the quantization process, video encoder 200 may reduce the bit depth associated with some or all of the coefficients. For example, the video encoder 200 may round down an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, video encoder 200 may perform a bitwise right shift of the values to be quantized.

In one or more examples, video encoder 200 may skip quantization. For example, in some examples, video encoder 200 may skip quantization if transform skipping is enabled. In the following description, although quantization is described as occurring, it should be understood that quantization may also be skipped in some examples.

After quantization, video encoder 200 may scan the coefficients, producing a one-dimensional vector from a two-dimensional matrix including the quantized coefficients. The sweep may be designed to place higher energy (and therefore lower frequency) coefficients in front of the vector and lower energy (and therefore higher frequency) coefficients behind the vector. However, in the example of skipping a transform, the scan may place the higher energy coefficients not in front of the vector, but the lower energy coefficients behind the vector.

In some examples, video encoder 200 may scan the coefficients using a predefined scan order to produce a serialized vector and then encode the coefficients of the vector. In other examples, video encoder 200 may perform adaptive scanning. After scanning the coefficients to form a one-dimensional vector, video encoder 200 may encode the one-dimensional vector, for example, according to a context-adaptive binary arithmetic coding (CABAC) (e.g., a context-based coding) and/or a bypass coding (e.g., a non-context-based coding). Video encoder 200 may also entropy encode values of syntax elements describing metadata associated with the encoded video data for use by video decoder 300 in decoding the video data.

To perform CABAC, video encoder 200 may assign a context within the context model to a symbol to be transmitted. For example, the context may relate to, for example, whether adjacent values of a symbol are zero values. The probability determination may be based on the context assigned to the symbol.

The video encoder 200 may also generate syntax data (e.g., in a picture header, a block header, a slice header) to the video decoder 300, such as block-based syntax data, picture-based syntax data, and sequence-based syntax data, or other syntax data, such as a Sequence Parameter Set (SPS), a Picture Parameter Set (PPS), or a Video Parameter Set (VPS). The video decoder 300 may also decode such syntax data to determine how to decode the corresponding video data.

In this manner, the video encoder 200 may generate a bitstream that includes encoded video data, e.g., syntax elements that describe the partitioning of a picture into blocks (e.g., CUs) and prediction and/or residual information for the blocks. Finally, the video decoder 300 may receive the bitstream and decode the encoded video data.

In general, the video decoder 300 performs a process reverse to that performed by the video encoder 200 to decode encoded video data of a bitstream. For example, the video decoder 300 may use CABAC to decode values of syntax elements of a bitstream in a substantially similar but opposite manner to the CABAC encoding process of the video encoder 200. The syntax elements may define picture-to-CTU segmentation information and the segmentation of each CTU according to a corresponding segmentation structure (e.g., QTBT structure) to define a CU of the CTU. The syntax elements may also define prediction and residual information for blocks (e.g., CUs) of video data.

The residual information may be represented by, for example, quantized transform coefficients (or quantized coefficients in the case of a skipped transform or coefficients in the case of a skipped transform and quantization). For convenience of description, in the present disclosure, the term coefficient may include examples in which quantization is skipped, transform is skipped, quantization and transform are skipped, quantization is skipped but transform is performed, or quantization is performed but transform is skipped. In one or more examples, in the techniques described in this disclosure, these examples may be performed with coefficients in which the transform is skipped but quantization may or may not be skipped.

The video decoder 300 may inverse quantize (if needed) and inverse transform (if needed) the quantized transform coefficients of the block to reproduce the residual block for the block. The video decoder 300 uses the signaled prediction mode (intra or inter prediction) and related prediction information (e.g., motion information for inter prediction) to form a prediction block for the block. The video decoder 300 may then combine (e.g., add) the prediction block and the residual block (on a sample-by-sample basis) to reproduce (e.g., reconstruct) the original block. The video decoder 300 may perform additional processing, such as performing a deblocking process to reduce visual artifacts along block boundaries.

In accordance with techniques of this disclosure, a video codec (e.g., video encoder 200 or video decoder 300) may be configured to perform operations in examples in which transform skipping is enabled and coefficient values are coded (e.g., encoded or decoded). For example, the video codec may determine that transform skipping is enabled and codec coefficient values of coefficients in the residual block based on one or more coefficient values of one or more neighboring coefficients. In some examples, a video codec may encode one or more syntax elements in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block in a first pass, and encode syntax elements on a coefficient-by-coefficient basis for coefficients in the residual block in a second pass after the first pass.

In one or more examples, a video codec may encode coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of a current block in a first pass. The coefficient information of a coefficient includes a significance flag indicating whether the value of the coefficient is not zero; a parity flag indicating whether the value of the coefficient is odd or even; a sign flag indicating whether the value of the coefficient is positive or negative; and one or more greater than flags indicating whether the absolute value of the coefficient is greater than a corresponding threshold.

Table 1 below shows examples of coefficient values and corresponding flags signaled for each coefficient. The box labeled "NA" is used for flags that are not signaled for the corresponding coefficient values. In table 1, Rem represents the margin, and it is not signaled as a flag, but as a value. In table 1, the value is positive, which is why the sign value is 0.

Table 1.

To encode coefficient information (e.g., a significance flag indicating whether the value of the coefficient is non-zero, a parity flag indicating whether the value of the coefficient is odd or even, a sign flag indicating whether the value of the coefficient is positive or negative, and one or more greater than flags) in an interleaved manner, video encoder 200 may signal such coefficient information for a first coefficient. The video encoder 200 may then signal such coefficient information for the second coefficient, and so on. In contrast, in a bitwise plane (e.g., non-interleaved manner), video encoder 200 may signal a significance flag for each coefficient in the residual block for the current block, then signal a parity flag for each coefficient in the residual block for the current block, and so on.

However, in one or more examples described in this disclosure, video encoder 200 may signal the coefficient information in an interleaved manner in the first pass. After the first pass, the video codec may codec the residual information for the coefficients in the residual block for the current block in a second pass (e.g., on a coefficient-by-coefficient basis, but not limited to a coefficient-by-coefficient basis).

To encode and decode in an interleaved manner, the video decoder 300 may parse the coefficient information on a coefficient-by-coefficient basis for coefficients in the residual block of the current block in a first pass. For example, video decoder 300 may parse a significance flag indicating whether the value of the coefficient is non-zero, a parity flag indicating whether the value of the coefficient is odd or even, a sign flag indicating whether the value of the coefficient is positive or negative, and one or more greater-than flags in a first pass. The video decoder 300 may parse the example coefficient information for one coefficient, then parse the example coefficient information for the next coefficient, and so on, such that the coefficient information is parsed in an interleaved manner on a coefficient-by-coefficient basis for the coefficients in the current residual block in the first pass. After the first pass, to codec the residue information, the video decoder 300 may parse the residue information of the coefficients in the residue block of the current block in the second pass.

Not all example coefficient information may be signaled and parsed in all examples. For example, if the coefficient value is 0, the video encoder 200 may signal a significance flag to 0, and the video decoder 300 may parse the significance flag to 0 (e.g., indicating that the value of the coefficient is zero). In this example, the video encoder 200 may not signal and the video decoder 300 may not receive parity or sign information or any greater than flag. As another example, if the coefficient value is 1.8, the video encoder 200 may signal and the video decoder 300 may parse the validity flag, parity flag, sign flag, and greater than 1 flag, but the video encoder 200 may not signal and the video decoder 300 may not parse any other greater than flag.

It may be advantageous to encode the coefficient information in an interleaved manner in the first pass and to encode the residue information in the second pass. In some cases, the coefficient information coded in an interleaved manner may be coded using context-based coding, and the residual information may be coded using bypass coding. Context-based coding refers to an example in which a context is used to determine a probability that one binary bit will be 0 or 1, and a value is encoded or decoded using the probability. Examples of context-based codecs include CABAC. Bypass codec refers to an example in which a context is not used to determine a probability (or a probability of 0.5 is assumed).

In context-based coding, there may be a coded bin count limit that sets the maximum number of bins in the residual block that may be based on context coding. One example of a binary bit count limit for encoding and decoding is 2 x the block width of the current block x the block height of the current block, or 1.75 x the block width of the current block x the block height of the current block. However, there may be other examples of the binary bit count limit of the codec.

For rate-distortion optimized quantization (RDOQ), video encoder 200 may need to determine how many bins will be coded based on the context for the current coefficient and how many bins will remain after the current coefficient (e.g., the cumulative total of bins used for context-based coding minus the bin count limit of the coding). For RDOQ, video encoder 200 may determine, on a coefficient-by-coefficient basis, how many bins of the current coefficient will be coded based on the context, and how many bins will remain after the current coefficient. By coding in an interleaved manner, video encoder 200 is able to determine how many bins the current coefficient will use for context-based coding for the current coefficient before video encoder 200 begins determining how many bins the next coefficient will use for context-based coding. With bitplane-by-bitplane processing, the video encoder 200 may not be able to determine how many binary bits will be used by the current coefficient until the video encoder 200 processes all of the coefficients, which may negatively impact the speed at which the video encoder 200 may encode and signal the information needed to reconstruct the current block.

In one or more examples, examples of coefficient information that is context-based coded include a significance flag indicating whether the value of the coefficient is not zero, a parity flag indicating whether the value of the coefficient is odd or even, a sign flag indicating whether the value of the coefficient is positive or negative, and one or more greater flags indicating whether the absolute value of the coefficient is greater than a corresponding threshold (e.g., abs _ level _ gtx _ flag [ n ] [ j ] specifies whether the absolute value of the coefficient level is greater than (j < <1) + 1). The residual information may be codec in bypass mode. Thus, the residual information may be coded in a second pass after the first pass comprising the coefficient information coded based on the context, since the coding of the residual information does not affect whether the binary bit count limit of the coding is reached (e.g. since the residual information is bypassed).

As described above, there may be a context binary bit count limit. Thus, in some examples, to codec in an interleaved manner, a video codec may codec coefficient information in an interleaved manner on a coefficient-by-coefficient basis until a bin count limit of the codec is reached, and bypass codec the coefficient information in an interleaved manner on a coefficient-by-coefficient basis after the bin count limit of the codec is reached. For example, if during the encoding of a coefficient, the video encoder 200 and the video decoder 300 reach the binary bit count limit of encoding and decoding after encoding and decoding the significance flag, the video encoder 200 and the video decoder 300 may bypass encoding and decoding of the coefficient and the remaining coefficient information of the subsequent coefficient.

Further, in order to codec the margin information, the video codec may be configured to codec information indicating a remaining absolute value of the coefficient. However, in some examples, if the video codec reaches the binary bit count limit of the codec during the codec of a particular coefficient, the video codec may codec various coefficient values following the particular coefficient as part of the second pass. For example, instead of coding the more-than-flag of the coefficient following the particular flag, the video codec may code the residue information of the coefficient following the particular flag, where the residue information is the actual value of the coefficient or the absolute value of the coefficient minus 1.

The present disclosure may generally refer to "signaling" certain information, such as syntax elements. The term "signaling" may generally refer to the delivery of values for syntax elements and/or other data used to decode encoded video data. That is, the video encoder 200 may signal the value of the syntax element in the bitstream. Generally, signaling refers to generating values in a bitstream. As described above, source device 102 may transmit the bitstream to destination device 116 in substantially real-time, or not in real-time (such as may occur when syntax elements are stored to storage device 112 for later retrieval by destination device 116).

Fig. 2A and 2B are conceptual diagrams illustrating an example binary Quadtree (QTBT) structure 130 and corresponding Codec Tree Unit (CTU) 132. The solid lines represent quad-tree partitions and the dashed lines indicate binary tree partitions. At each partition (i.e., non-leaf) node of the binary tree, a flag is signaled to indicate which partition type (i.e., horizontal or vertical) to use, where 0 indicates horizontal partition and 1 indicates vertical partition in this example. For quad-tree partitioning, there is no need to indicate the partition type, since the quad-tree node partitions the block horizontally and vertically into 4 sub-blocks of equal size. Accordingly, the video encoder 200 may encode syntax elements (e.g., partition information) for the region tree level (i.e., solid line) of the QTBT structure 130 and syntax elements (e.g., partition information) for the prediction tree level (i.e., dashed line) of the QTBT structure 130, and the video decoder 300 may decode them. The video encoder 200 may encode video data (e.g., prediction and transform data) of a CU represented by the terminal leaf node of the QTBT structure 130, and the video decoder 300 may decode it.

In general, the CTU 132 of fig. 2B may be associated with parameters that define the size of the blocks corresponding to the nodes of the QTBT structure 130 at the first level and the second level. These parameters may include CTU size (representing the size of CTU 132 in the sample point), minimum quadtree size (MinQTSize, representing the minimum allowed quadtree leaf node size), maximum binary tree size (MaxBTSize, representing the maximum allowed binary tree root node size), maximum binary tree depth (MaxBTDepth, representing the maximum allowed binary tree depth), and minimum binary tree size (MinBTSize, representing the minimum allowed binary tree leaf node size).

The root node of the QTBT structure corresponding to the CTU may have four child nodes at the first level of the QTBT structure, each of which may be partitioned according to quadtree partitioning. That is, a node of the first level is either a leaf node (without children) or has four children. The example of the QTBT structure 130 represents such nodes as including parent nodes and child nodes with solid lines for branches. If the nodes of the first level are not larger than the maximum allowed binary tree root node size (MaxBTSize), then these nodes may be further partitioned by the corresponding binary tree. The binary tree partitioning of a node may be iterated until the partitioning results in nodes that reach a minimum allowed binary tree leaf node size (MinBTSize) or a maximum allowed binary tree depth (MaxBTDepth). The example of the QTBT structure 130 represents such a node as having a dashed line for branching. Binary tree leaf nodes are called Codec Units (CUs) and are used for prediction (e.g. intra-picture or inter-picture prediction) and transformation without any further partitioning. As described above, a CU may also be referred to as a "video block" or "block.

In one example of the QTBT segmentation structure, the CTU size is set to 128 × 128 (luma samples and two corresponding 64 × 64 chroma samples), MinQTSize is set to 16 × 16, MaxBTSize is set to 64 × 64, MinBTSize (for both width and height) is set to 4, and MaxBTDepth is set to 4. Quadtree partitioning is first applied to CTUs to generate quadtree leaf nodes. The quad tree leaf nodes may have sizes from 16 × 16 (i.e., MinQTSize) to 128 × 128 (i.e., CTU size). If the leaf quadtree node is 128 x 128, it will not be further partitioned by the binary tree because its size exceeds the MaxBTSize (i.e., 64 x 64 in this example). Otherwise, the leaf quadtree nodes will be further partitioned by the binary tree. Thus, the leaf nodes of the quadtree are also the root nodes of the binary tree and have a binary tree depth of 0. When the binary tree depth reaches MaxBTDepth (4 in this example), no further partitioning is allowed. When the binary tree node has a width equal to MinBTSize (4 in this example), it means that no further horizontal partitioning is allowed. Similarly, having a binary tree node with a height equal to MinBTSize means that no further vertical partitioning is allowed for that binary tree node. As described above, the leaf nodes of the binary tree are referred to as CUs and are further processed according to prediction and transformation without further partitioning.

As described above, example techniques described in this disclosure relate to coefficient coding for transform skip mode. For example, this disclosure describes examples of coefficient codec methods that target the codec of the transform skip mode. For example, the present disclosure relates to an entropy decoding process that converts a binary representation into a series of quantized coefficients of non-binary value. A corresponding entropy coding process (inverse of entropy decoding) is also part of the disclosure. For example, the entropy encoding process may be performed as a reverse process of the decoding process. The techniques described in this disclosure may be applied to any existing video codec, such as High Efficiency Video Codec (HEVC), or may be a codec tool in a standard currently being developed, such as multifunctional video codec (VVC), and may be applied to other future video codec standards.

The correlation between Transform Skip (TS) coefficients is described below. In the transform skip mode, the transform process is skipped for the residual signal before the quantization step at the encoder side (e.g., video encoder 200) and before the inverse transform step after the de-quantization step at the decoder side (e.g., video decoder 300). The characteristics of the untransformed residual signal are very different from the characteristics of the transformed signal.

In case of transform skipping, the coefficients are more correlated with their neighboring coefficients. As a result, the level values of the neighboring coefficients (e.g., the actual values of the coefficients) and the sign information of the neighboring coefficients are more correlated. Codecs for transforming levels (e.g., greater than flags) and sign information in skip (TS) coefficient codecs are described in b.bross, t.nguyen, p.keydel, h.schwarz, d.marpe, t.wiegand, "non-CE 8: for unified transform type signaling and residual codec for transform skipping, the jfet file jfet-M0464, malacker, massachusetts, 2019, month 1 (herein jfet-M0464). This disclosure describes examples of more efficient coding using signal characteristics.

The following describes the encoding and decoding of Transform Skip (TS) coefficients. In some techniques, transform skip residual codec, sig _ coeff _ flag, coeff _ sign _ flag, abs _ level _ 1_ flag, par _ level _ flag syntax elements are coefficient-wise interleaved codec in a first pass. Starting from the second pass, abs _ level _ gtX _ flags (currently up to 5, and the corresponding pass), the syntax elements are bit-plane-wise codec. The following is an example of the definition of a syntax element.

sig _ coeff _ flag [ xC ] [ yC ] specifies for the transform coefficient position (xC, yC) within the current transform block whether the corresponding transform coefficient level at that position (xC, yC) is non-zero.

abs _ level _ X _ flag [ n ] specifies whether the absolute value of the transform coefficient level (at the scanning position n) is greater than X, and examples of abs _ level _ X _ flag include abs _ level _ 1_ flag, abs _ level _ 2_ flag, and the like. another example of abs _ level _ gtX _ flag is: abs _ level _ gtx _ flag [ n ] [ j ] specifies whether the absolute value of the transform coefficient level (at scan position n) is greater than (j < <1) + 1. When abs _ level _ gtx _ flag [ n ] [ j ] is not present, it is inferred to be equal to 0.

par level flag [ n ] specifies the parity (e.g., odd or even) of the transform coefficient level at the scan position n.

coeff _ sign _ flag [ n ] specifies the sign of the transform coefficient level at the scanning position n.

In all passes, if the number of bin count limits of the conventional codec is not reached, the syntax element is coded as a conventional coded bin. If during the pass of the codec, the bin count limit of the conventional codec is reached, the rest of the syntax element will be bypassed. In the last pass, the abs _ remaining portion of the coefficients is coded using Rice code. Rice code is one example of bypass codec (e.g., no context-based codec is used). an example definition of abs _ remaining is that abs _ remaining [ n ] is the remaining absolute value of the transform coefficient level at the scan position n, coded with the Golomb-Rice code. There is an upper limit on the number of regular coded bins that can be used in TS blocks (e.g., the current block coded in transform skip mode).

In one example, the present disclosure describes level mapping based coefficient coding. In the transform-skip residual coding of JFET-M0464, the coefficient absolute levels absCoeffLevel are coded using sig _ coeff _ flag, abs _ level _ gtX _ flags, par _ level _ flag, and abs _ remaining values to form the final absolute transform coefficient values, where X may be 1, a, 5 (or some other cutoff value C). In this example, the absCoeffLevel value may be constructed by: abs coefflevel ═ 1+ abs _ level _ 1_ flag + par _ level _ flag +2 [ ("abs _ level _ 2_ flag" + abs _ level _ 3_ flag + … "+ abs _ level _ c _ flag" +2 [ "abs _ remainders ].

In one or more examples described in this disclosure, rather than or in addition to directly representing absCoeffLevel as in jfet-M0464, absCoeffLevel is mapped at the encoder side (e.g., video encoder 200) to a revision level to be codec as described below, and inversely mapped at the decoder side (e.g., video decoder 300) as described below.

The absCoeffLevel information for the left and upper coefficients is used to perform the mapping. In this case, let X0To representAbsolute coefficient level to the left of the current coefficient, let X1Representing the absolute coefficient level of the upper coefficient. To represent the coefficients by absolute coefficient levels absCoeffLevel, the mapped absCoeffMod is coded as follows:

for the video encoder 200:

pred=min(X0,X1)==0max(X0,X1):min(X0,X1);

if(absCoeff==pred)

{

absCoeffMod=1;

}

else

{

absCoeffMod=(absCoeff<pred)?absCoeff+1:absCoeff;

}

in the above pseudo code, if min (X0, X1) ═ 0, max (X0, X1) is used as pred; otherwise, min (X0, X1) is used as pred. If the absolute value of the coefficient to be coded is equal to the predictor pred, the modified level absCoeffMod is set to 1; otherwise, if the absolute value of the coefficient is less than the predictor, the value to be coded is increased by 1; otherwise, the absCoeff value is not modified.

For the video decoder 300:

pred=min(X0,X1)==0max(X0,X1):min(X0,X1);

if(absCoeffMod==1&&pred>0)

{

absCoeff=pred;

}

else

{

absCoeff=absCoeffMod–(absCoeffMod<=pred);

}

an example of interleaving coefficient coding is described below. In some examples, rather than splitting them into several bit-planes, video encoder 200 and/or video decoder 300 may convert all codecs of the syntax elements to codecs of abs _ remaining in an interleaved manner. The TS residual coding is changed such that sig _ coeff _ flag, par _ level _ flag, coeff _ sign _ flag, and all abs _ level _ gtX _ flags are coded in a coefficient-by-coefficient interleaving manner in the first pass. After the first pass, abs _ remaining is coded coefficient by coefficient. In some examples, when the bin count limit of conventional coding is reached, the remaining syntax elements are coded in bypass mode.

For example, a video codec (e.g., video encoder 200 and video decoder 300) may codec coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of a current block in a first pass. The coefficient information of a coefficient includes a significance flag (e.g., sig _ coeff _ flag) indicating whether the value of the coefficient is not zero, a parity flag (e.g., par _ level _ flag) indicating whether the value of the coefficient is odd or even, a sign flag (e.g., coeff _ sign _ flag) indicating whether the value of the coefficient is positive or negative, and one or more greater than flags (e.g., abs _ level _ gtX _ flags). After the first pass, the video codec may codec the residual information (e.g., abs _ rejector) for the coefficients in the residual block for the current block in a second pass.

In some examples, to codec coefficient information in an interleaved manner, a video codec may context-based codec the coefficient information in an interleaved manner on a coefficient-by-coefficient basis until a binary bit count limit of the codec is reached. The video codec may bypass codec of coefficient information in an interleaved manner on a coefficient-by-coefficient basis after reaching a binary bit count limit of the codec.

Fig. 3 is a conceptual diagram illustrating an example of coding and decoding coefficient information of a coefficient. Fig. 3 shows coefficients 0 to N-1. In this example, in the first pass, the video codec may codec the coefficient 0 to coefficient N-1 significance flags, sign flags, gt1 flags, parity flags, and gt 2-gt 5 flags in an interleaved manner. The gt 1-gt 5 notation is an abbreviation for abs _ level _ gtX _ flags, wherein X equals 1,2, 3, 4, or 5. gt 1-gt 5 or abs _ level _ gtX _ flags may also be referred to as a "greater than" flag.

The video codec may codec the significance flag, sign flag, gt1 flag, parity flag, and gt 2-gt 5 flag for coefficient 0 on the first pass through the coefficients, and then the significance flag, sign flag, gt1 flag, parity flag, and gt 2-gt 5 flag for coefficient 1, and so on, still on the first pass through the coefficients. For example, in a first pass of coefficients, video encoder 200 may signal and video decoder 300 may parse the coefficient 0's significance flag, sign flag, gt1 flag, parity flag, and gt 2-gt 5 flag, followed by the coefficient 1's significance flag, sign flag, gt1 flag, parity flag, and gt 2-gt 5 flag as part of the first pass through the coefficients, until the coefficient N-1.

After the first pass, the video codec may codec the residue information for coefficient 0 through coefficient N-1. For example, in the second pass, the video encoder 200 may signal and the video decoder 300 may parse the residue information for coefficient 0 through coefficient N-1. In the example shown in fig. 3, when context-based coding is performed on coefficient information in the first pass, the video encoder 200 and the video decoder 300 may not have reached the binary bit count limit of coding.

Fig. 4 is a conceptual diagram illustrating another example of coding and decoding coefficient information of a coefficient. In the example of fig. 4, the video codec may codec all components of the coefficients (including the residual) in an interleaved manner. For example, instead of coding the coefficient information in the first pass and coding the residual information in the second pass, the video codec may code the coefficient information (e.g., a significance flag (e.g., sig _ coeff _ flag) indicating whether the value of the coefficient is not zero, a parity flag (e.g., par _ level _ flag) indicating whether the value of the coefficient is odd or even, a sign flag (e.g., coeff _ sign _ flag) indicating whether the value of the coefficient is positive or negative, and one or more greater than flags (e.g., abs _ level _ gtX _ flags)) and the residual information in one pass (i.e., in the same pass).

For example, as shown in fig. 4, each coefficient may be divided into sig _ coeff _ flag, coeff _ sign _ flag, abs _ level _ 1_ flag, par _ level _ flag, abs _ level _ gtX _ flags (X ═ 2,3, 4, 5), and abs _ remaining. All syntax elements of one coefficient are coded before the next coefficient is coded.

Fig. 5 is a conceptual diagram illustrating another example of coding and decoding coefficient information of a coefficient. In the example of fig. 5, the coding and decoding of sig _ coeff _ flag, coeff _ sign _ flag, abs _ level _ 1_ flag, par _ level _ flag, abs _ level _ gtX _ flags are divided into two passes. In the first pass, sig _ coeff _ flag, coeff _ sign _ flag, abs _ level _ 1_ flag are coded. In the second pass, abs _ level _ gtX _ flags and par _ level _ flag are coded. The par _ level _ flag may be after all abs _ level _ gtX _ flags and is part of the second pass. In the third pass, the video codec may codec the residual information as shown in fig. 5.

Fig. 6 is a conceptual diagram illustrating another example of coding and decoding coefficient information of a coefficient. In the example of fig. 6, the syntax sig _ coeff _ flag, coeff _ sign _ flag, abs _ level _ gt1_ flag, and abs _ level _ gt2_ flag for all coefficients in a coefficient group (e.g., a residual block) are interleaved codec in the first pass. In the second pass, the coefficient information: abs _ level _ gtX _ flags (X ═ 3, 4, 5) and par _ level _ flag are coded. In the second pass, the video codec may codec the par _ level _ flag after all abs _ level _ gtX _ flags. In the last pass (e.g., the third pass), the video codec may codec the residual information (e.g., abs _ remaining) for all coefficients in the coefficient group.

This disclosure also describes examples of processing bypass codecs after a context bin limit (e.g., a bin count limit of a codec) is reached. As an example, the binary bit count limit of the codec is 2 block width block height. As another example, the binary bit count limit for the codec is 1.75 block width block height. In some techniques, if the binary bit count limit of the codec is reached, the video encoder 200 may separate the absolute values of the coefficients into abs _ level _ 1_ flag, par _ level _ flag, abs _ level _ gtX _ flags (X ═ 2,3, 4, 5), and abs _ remaining, and bypass-codec each of these coefficient information. However, according to one or more examples described in this disclosure, the video encoder 200 may encode respective values of coefficients following a particular coefficient, where a bin count limit of a codec is reached during or at the completion of the codec of the particular coefficient, instead of bypass-coding each of abs _ level _ 1_ flag, par _ level _ flag, abs _ level _ gtX _ flags (X ═ 2,3, 4, 5), and abs _ remaining. As one example, the video encoder 200 may directly bypass the codec absolute value abs (coefficient value) -1 instead of bypassing each of the codec abs _ level _ 1_ flag, par _ level _ flag, abs _ level _ gtX _ flags (X ═ 2,3, 4, 5), and abs _ remaining. The video decoder 300 may bypass-decode the coefficient value (e.g., bypass-codec based on the coefficient value or abs (coefficient value) -1) for coefficients following a particular coefficient that reached the binary bit count limit of the codec. For example, the video encoder 200 and the video decoder 300 may utilize the Rice-Golomb codec of abs _ remaining to encode and decode the absolute values of the coefficients after reaching the binary bit count limit of the codec, and after sig _ coeff _ flag and coeff _ sign _ flag are bypass-codec.

The Rice-Golomb codec is a binarization scheme that converts a value into a series of 1 or 0 binary bits. In some examples, when Rice-Golomb codec is used, context-based codec may be used. However, for the residual, the Rice-Golomb codec is used, and the binary bit is bypass-coded.

If the conventional bin count (e.g., bin count limit of codec) is reached before the gt1 flag is codec, all remaining significance flags and sign flags are bypass-codec and for significant coefficients after reaching the bin count limit of codec, the residue is codec as the absolute value of the coefficient or the absolute value of the coefficient-1 without dividing the coefficient into gt1, par, gt2, …, gt5 and the corresponding residue. Thus, in this example, the video encoder 200 and the video decoder 300 may bypass the codec significance flag and the sign flag and bypass the codec margin portion without utilizing the gtX flag and the parity flag for coefficients at and after the binary bit count limit of the codec is reached (e.g., coefficients after a particular coefficient where the binary bit count limit of the codec is reached during the codec of the particular coefficient). An example technique for bypass codec includes Rice-Golomb codec.

If the binary bit count limit of the codec is reached after the gt1 flag for a coefficient is codec, the video encoder 200 and the video decoder 300 may bypass the remaining gtX and parity flags for that coefficient before switching to codec the significance flags and sign flags to bypass and codec the residue portion to Rice-Golomb code. The example techniques may be applied to various schemes that change the codec order of significance, sign, gt1, par, gtX flags, where once a conventional bin count (e.g., the bin count limit of the codec) is reached, for the rest of the coefficient (including the current portion), only the significance flag and sign flag are bypassed codec, and the rest of the coefficient is represented by the value of one Rice-Golomb codec. The Rice-Golomb codec is an example, and other types of binarization with bypass codec techniques, such as unary codec, may also be used. In this disclosure, the margin information may refer to a remaining value after the codec is larger than the flag.

In some examples, the parameters of the Rice-Golomb codec may be redesigned because a larger value is expected for the codec when encoding or decoding the entire residue portion of abs (coeff) -1, rather than abs (coeff). One example of a change to the Rice-Golomb design is as follows:

let posX, posY be the position of the current coefficient, leftCoeff be the left side neighbor of the current coefficient, and AboveCoeff be the top neighbor of the current coefficient.

Let sum=0

if(posX>0)

{

sum+=abs(LeftCoeff);

}

if(posY>0)

{

sum+=abs(AboveCoeff);

}

const uint32_t auiGoRicePars[32]={1,0,1,1,1,1,1,2,2,2,2,2,2,2,2,2,2,2,3,3,3,3,3,3,3,3,3,3,3,3,3,3};

AuiGoRicePars [ min (sum,31) ] was used as the Rice-Golomb parameter.

Another example of deriving the Rice-Golomb parameter for coding abs (coeff) -1 uses a different table as auiggoriceps: const uint32_ t auigoriscepers [32] ═ {1,1,1,1,1,1, 2,2,2,2,2,2,2,2,3,3,3,3,3,3,3,3,3,3,3,3,3 }.

The example techniques described in this disclosure may be combined together. For example, fig. 7 is a conceptual diagram illustrating another example of coding and decoding coefficient information of a coefficient. In the example of fig. 7, video encoder 200 and video decoder 300 may perform techniques similar to the example of fig. 4 and a combination of the example in which coefficient values or coefficient value-1 are directly bypassed codec.

For example, in the example shown in fig. 7, all components of each coefficient are coded in an interleaved manner, and if a binary bit of a conventional coding is used up (e.g., reaches a binary bit count limit of coding) when one of the coefficients (e.g., Coeff2 in fig. 7) is coded, the margin information (e.g., abs (Coeff) -1) may not be divided before being coded or decoded, starting from the next coefficient, after a sig flag (e.g., a significance flag) and a symbol flag are coded or decoded. In other words, for coefficients following Coeff2 (e.g., Coeff3 through CoeffN-1), the video encoder 200 and the video decoder 300 may bypass a significance flag (e.g., sig _ Coeff _ flag) and a sign flag (e.g., Coeff _ sign _ flag) of each coefficient in an interleaved manner, and the video encoder 200 and the video decoder 300 may bypass codec margin information for each coefficient.

Fig. 8 is a conceptual diagram illustrating another example of coding and decoding coefficient information of a coefficient. In the example of fig. 8, video encoder 200 and video decoder 300 may perform techniques similar to the example of fig. 3 and a combination of the example in which coefficient values or coefficient value-1 are directly bypassed codec.

For example, similar to the example of fig. 3, the video encoder 200 and the video decoder 300 may encode or decode coefficients in a two-pass manner. For example, before reaching the binary bit count limit of the codec, the video encoder 200 and the video decoder 300 may encode and decode coefficient-by-coefficient in an interleaved manner for a coefficient in a residual block of the current block in a first pass, wherein coefficient information of the coefficient includes a significance flag (e.g., sig _ coeff _ flag) indicating whether a value of the coefficient is not zero, a parity flag (e.g., par _ level _ flag) indicating whether a value of the coefficient is odd or even, a sign flag (e.g., coeff _ sign _ flag) indicating whether a value of the coefficient is positive or negative, and one or more greater flags (e.g., abs _ level _ gtX _ flags). After the first pass, the video encoder 200 and the video decoder 300 may encode and decode the residual information (e.g., abs _ remaining) for the coefficients in the residual block in a second pass.

After reaching the context binary bit limit, for a particular coefficient, if there is no abs _ level _ 1_ flag, abs _ level _ x _ flags, par _ level _ flag for the particular coefficient that can be coded using context (e.g., due to reaching the codec count binary bit limit), then video encoder 200 and video decoder 300 may not divide the absolute value of the coefficient into abs _ level _ 1_ flag, abs _ level _ x _ flags, par _ level _ flag, and abs _ remaining. In contrast, video encoder 200 and video decoder 300 may encode or decode the corresponding values of the coefficients following a particular coefficient (e.g., encode or decode abs (coefficient value) -1)) as part of a second pass (e.g., as a Rice-Golomb codec).

For example, as shown in fig. 8, when encoding and decoding Coeff0 of the current encoding and decoding block, the video encoder 200 and the video decoder 300 may reach the binary bit count limit of encoding and decoding, for example, when encoding and decoding GT2 (the first abs _ level _ gtX _ flag (X ═ 2,3, 4, 5)). Because the bin count limit of the codec is reached, the video encoder 200 and video decoder 300 may bypass the rest of the codec greater than flag (e.g., greater than 3, greater than 4, and greater than 5), as shown in fig. 8, with (BP) next to the GT3 (greater than 3) flag, the GT4 (greater than 4), and the GT5 (greater than 5) flag, indicating bypass. In this example, starting from Coeff1, the video encoder 200 and the video decoder 300 may no longer divide the absolute value of each coefficient into abs _ level _ gt1_ flag, abs _ level _ gtX _ flags, par _ level _ flag, and abs _ remaining. In contrast, video encoder 200 and video decoder 300 may bypass the codec abs (coefficient) -1 values.

In the example of fig. 8, to codec coefficient information in an interleaved manner, the video encoder 200 and the video decoder 300 may context-based encode and decode the coefficient information in an interleaved manner on a coefficient-by-coefficient basis until a binary bit count limit of the codec is reached. For example, assuming that the binary bit count limit of the codec is not reached, the video encoder 200 and the video decoder 300 may perform context-based encoding and decoding on a coefficient-by-coefficient basis on a significance flag (e.g., sig _ coeff _ flag) indicating whether the value of the coefficient is not zero, a parity flag (e.g., par _ level _ flag) indicating whether the value of the coefficient is odd or even, a sign flag (e.g., coeff _ sign _ flag) indicating whether the value of the coefficient is positive or negative, and one or more greater-than flags (e.g., abs _ level _ gtX _ flags) indicating whether the absolute value of the coefficient is greater than a corresponding threshold.

However, in the example of fig. 8, the video encoder 200 and the video decoder 300 may have reached the binary bit count limit of codec after the greater than 2 flag of Coeff 0. In this example, video encoder 200 and video decoder 300 may then bypass the margin flags of encoding and decoding Coeff0, and bypass the significance flags and sign flags of the coefficients after Coeff0 in the first pass. For example, to codec coefficient information in an interleaved manner, the video encoder 200 and the video decoder 300 may context-based codec (e.g., encode or decode) the coefficient information in an interleaved manner on a coefficient-by-coefficient basis until a bin count limit of the codec is reached, and bypass codec (e.g., encode or decode) the coefficient information in an interleaved manner on a coefficient-by-coefficient basis after the bin count limit of the codec is reached.

In the example of fig. 8, after the first pass, the video encoder 200 and the video decoder 300 may encode the residual information of the coefficients in the residual block of the current block in the second pass. For example, to codec the residual information, the video encoder 200 and the video decoder 300 may codec information indicating a difference between a particular coefficient value and a maximum threshold value associated with a greater than flag (e.g., residual information such as Coeff 0). During the process of coding a particular coefficient (e.g., in the case of the particular coefficient Coeff0 in FIG. 8), the bin count limit of the coding may be reached. The video encoder 200 and the video decoder 300 may codec the corresponding values of the coefficients following a particular coefficient. For example, video encoder 200 and video decoder 300 may codec information indicating a difference between an absolute value of a corresponding value of a coefficient following a particular coefficient and 1 (e.g., codec information indicating a value of abs (Coeff1) -1, codec information indicating a value of abs (Coeff2) -1, and so on up to abs (Coeff n-1) -1). In one or more examples, the video encoder 200 and the video decoder 300 may bypass codec the residual information.

Fig. 9 is a block diagram illustrating an example video encoder 200 that may perform techniques of this disclosure. Fig. 9 is provided for purposes of explanation and should not be considered a limitation of the technology broadly illustrated and described in this disclosure. For purposes of explanation, the present disclosure describes the video encoder 200 in the context of a video codec standard, such as the H.265(HEVC) video codec standard and the h.266(VVC) video codec standard being developed. However, the techniques of this disclosure are not limited to these video codec standards and are generally applicable to video encoding and decoding.

In the example of fig. 9, the video encoder 200 includes a video data memory 230, a mode selection unit 202, a residual generation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a filter unit 216, a Decoded Picture Buffer (DPB)218, and an entropy coding unit 220. Any or all of video data memory 230, mode selection unit 202, residual generation unit 204, transform processing unit 206, quantization unit 208, inverse quantization unit 210, inverse transform processing unit 212, reconstruction unit 214, filter unit 216, DPB218, and entropy encoding unit 220 may be implemented in one or more processors or in processing circuitry. Further, the video encoder 200 may include additional or alternative processors or processing circuits to perform these and other functions.

The video data memory 230 may store video data to be encoded by the components of the video encoder 200. Video encoder 200 may receive video data stored in video data storage 230 from, for example, video source 104 (fig. 1). DPB218 may act as a reference picture memory that stores reference video data for use by video encoder 200 in predicting subsequent video data. Video data memory 230 and DPB218 may be formed from any of a variety of memory devices, such as Dynamic Random Access Memory (DRAM) (including synchronous DRAM (sdram)), magnetoresistive ram (mram), resistive ram (rram), or other types of memory devices. Video data memory 230 and DPB218 may be provided by the same memory device or separate memory devices. In various examples, video data memory 230 may be on-chip with other components of video encoder 200, as shown, or off-chip with respect to these components.

In this disclosure, references to video data memory 230 should not be construed as limited to memory internal to video encoder 200 unless specifically described as such, or to memory external to video encoder 200 unless specifically described as such. Conversely, a reference to video data memory 230 should be understood as a reference to memory that stores video data that video encoder 200 receives for encoding (e.g., video data for a current block to be encoded). The memory 106 of fig. 1 may also provide temporary storage of the outputs from the various units of the video encoder 200.

The various elements of fig. 9 are shown to help understand the operations performed by the video encoder 200. These units may be implemented as fixed function circuits, programmable circuits, or a combination thereof. Fixed function circuitry refers to circuitry that provides a particular function and is preset on operations that may be performed. Programmable circuitry refers to circuitry that can be programmed to perform various tasks and provide flexible functionality in the operations that can be performed. For example, a programmable circuit may execute software or firmware such that the programmable circuit operates in a manner defined by instructions of the software or firmware. Fixed function circuitry may execute software instructions (e.g., receive parameters or output parameters), but the type of operations performed by the fixed function circuitry is typically immutable. In some examples, one or more of the units may be different circuit blocks (fixed-function or programmable), and in some examples, one or more of the units may be integrated circuits.

The video encoder 200 may include an Arithmetic Logic Unit (ALU), a basic function unit (EFU), digital circuitry, analog circuitry, and/or a programmable core formed from programmable circuitry. In examples where the operations of video encoder 200 are performed using software executed by programmable circuitry, memory 106 (fig. 1) may store object code of the software received and executed by video encoder 200, or another memory (not shown) within video encoder 200 may store such instructions.

The video data memory 230 is configured to store the received video data. The video encoder 200 may retrieve pictures of video data from the video data memory 230 and provide the video data to the residual generation unit 204 and the mode selection unit 202. The video data in the video data memory 230 may be original video data to be encoded.

Mode selection unit 202 includes motion estimation unit 222, motion compensation unit 224, and intra prediction unit 226. The mode selection unit 202 may comprise additional functional units to perform video prediction according to other prediction modes. As an example, the mode selection unit 202 may include a palette unit, an intra block copy unit (which may be part of the motion estimation unit 222 and/or the motion compensation unit 224), an affine unit, a Linear Model (LM) unit, and the like.

The mode selection unit 202 typically coordinates multiple encoding processes to test combinations of encoding parameters and rate-distortion values of the results of such combinations. The encoding parameters may include a CTU-to-CU partition, a prediction mode of the CU, a transform type of residual data of the CU, a quantization parameter of the residual data of the CU, and the like. The mode selection unit 202 may finally select a combination of encoding parameters having a better rate-distortion value than other tested combinations.

Video encoder 200 may partition a picture retrieved from video data memory 230 into a series of CTUs and encapsulate one or more CTUs within a stripe. Mode selection unit 202 may partition the CTUs of a picture according to a tree structure (e.g., the QTBT structure or the quadtree structure of HEVC described above). As described above, the video encoder 200 may form one or more CUs by partitioning CTUs according to a tree structure. Such CUs may also be commonly referred to as "video blocks" or "blocks.

Typically, mode select unit 202 also controls its components (e.g., motion estimation unit 222, motion compensation unit 224, and intra prediction unit 226) to generate a prediction block (e.g., the current CU, or in HEVC, the overlapping portion of the PU and TU) for the current block. For inter prediction of a current block, the motion estimation unit 222 may perform a motion search to identify one or more closely matching reference blocks in one or more reference pictures (e.g., one or more previously coded pictures stored in the DPB 218). Specifically, the motion estimation unit 222 may calculate a value representing how similar the potential reference block is to the current block, for example, from a Sum of Absolute Differences (SAD), a Sum of Squared Differences (SSD), a Mean Absolute Difference (MAD), a Mean Square Difference (MSD), and the like. The motion estimation unit 222 may typically perform these calculations using the sample-by-sample point difference between the current block and the reference block being considered. The motion estimation unit 222 may identify the reference block having the lowest value resulting from these calculations, which indicates the reference block that most closely matches the current block.

The motion estimation unit 222 may form one or more Motion Vectors (MVs) that define the position of a reference block in a reference picture relative to the position of a current block in a current picture. The motion estimation unit 222 may then provide the motion vectors to the motion compensation unit 224. For example, for uni-directional inter prediction, motion estimation unit 222 may provide a single motion vector, while for bi-directional inter prediction, motion estimation unit 222 may provide two motion vectors. The motion compensation unit 224 may then generate a prediction block using the motion vector. For example, the motion compensation unit 224 may use the motion vectors to retrieve data of the reference block. As another example, if the motion vector has fractional sample precision, the motion compensation unit 224 may interpolate values of the prediction block according to one or more interpolation filters. Further, for bi-directional inter prediction, the motion compensation unit 224 may retrieve data of two reference blocks identified by corresponding motion vectors and combine the retrieved data by, for example, sample-by-sample averaging or weighted averaging.

As another example, for intra prediction or intra prediction coding, the intra prediction unit 226 may generate a prediction block from samples adjacent to the current block. For example, for directional modes, the intra-prediction unit 226 may generally mathematically combine values of neighboring samples and pad these computed values in a defined direction across the current block to generate a prediction block. As another example, for DC mode, the intra prediction unit 226 may calculate an average value of neighboring samples of the current block and generate a prediction block to include the resultant average value for each sample of the prediction block.

The mode selection unit 202 supplies the prediction block to the residual generation unit 204. The residual generation unit 204 receives the original, unencoded version of the current block from the video data memory 230 and the prediction block from the mode selection unit 202. The residual generation unit 204 calculates a sample-by-sample point difference between the current block and the prediction block. The resulting sample-by-sample difference defines the residual block of the current block. In some examples, the residual generation unit 204 may also determine differences between sample values in the residual block to generate the residual block using Residual Differential Pulse Code Modulation (RDPCM). In some examples, residual generation unit 204 may be formed using one or more subtractor circuits that perform binary subtraction.

In an example where mode selection unit 202 partitions a CU into PUs, each PU may be associated with a luma prediction unit and a corresponding chroma prediction unit. The video encoder 200 and the video decoder 300 may support PUs having various sizes. As described above, the size of a CU may refer to the size of a luma coding block of the CU, and the size of a PU may refer to the size of a luma prediction unit of the PU. Assuming that the size of a particular CU is 2 nx 2N, video encoder 200 may support 2 nx 2N or nxn PU sizes for intra prediction, and 2 nx 2N, 2 nx N, N x 2N, N x N, or similar symmetric PU sizes for inter prediction. The video encoder 200 and the video decoder 300 may also support asymmetric partitions of PU sizes of 2 nxnu, 2 nxnd, nlx 2N, and nR x 2N for inter prediction.

In examples where the mode selection unit does not further partition a CU into PUs, each CU may be associated with a luma codec block and a corresponding chroma codec block. As described above, the size of a CU may refer to the size of the luma codec block of the CU. The video encoder 200 and the video decoder 300 may support CU sizes of 2N × 2N, 2N × N, or N × 2N.

For other video codec techniques, such as intra block copy mode codec, affine mode codec, and Linear Model (LM) mode codec, as a few examples, mode selection unit 202 generates a prediction block for the current block being encoded via respective units associated with the codec technique. In some examples, e.g., palette mode coding, mode select unit 202 may not generate a prediction block, but rather generate a syntax element indicating the manner in which a block is reconstructed based on the selected palette. In this mode, mode selection unit 202 may provide these syntax elements to entropy encoding unit 220 for encoding.

As described above, the residual generation unit 204 receives video data of the current block and the corresponding prediction block. The residual generation unit 204 then generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates a sample-by-sample point difference between the prediction block and the current block.

Transform processing unit 206 applies one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). Transform processing unit 206 may apply various transforms to the residual block to form a block of transform coefficients. For example, transform processing unit 206 may apply a Discrete Cosine Transform (DCT), a directional transform, a karl hough-loff transform (KLT), or a conceptually similar transform to the residual block. In some examples, transform processing unit 206 may perform multiple transforms, e.g., a primary transform and a secondary transform, e.g., a rotational transform, on the residual block.

In some examples, transform processing unit 206 does not apply a transform to the residual block. For example, in an example where the mode selection unit 202 determines that the transform skip mode is enabled, the operation of the transform processing unit 206 may be skipped. In such an example, the value of the coefficient may be for a coefficient of the residual block (e.g., a first location in the residual block for a first coefficient, a residual value in the first location for a first coefficient, a second location in the residual block for a second coefficient, a residual value in the second location for a second coefficient, and so on).

The quantization unit 208 may quantize coefficients in a coefficient block (which may be, for example, a transform coefficient block or a residual block) to produce a quantized coefficient block. In some examples, the operation of the quantization unit 208 may be skipped. Quantization unit 208 may quantize coefficients of a coefficient block according to a Quantization Parameter (QP) value associated with the current block. Video encoder 200 (e.g., via mode selection unit 202) may adjust the degree of quantization applied to coefficient blocks associated with the current block by adjusting the QP value associated with the CU. Quantization may introduce information loss and, therefore, the quantized transform coefficients may have lower precision than the original transform coefficients produced by the transform processing unit 206.

The inverse quantization unit 210 and the inverse transform processing unit 212 may apply inverse quantization and inverse transform, respectively, on the quantized coefficient block (if needed) to reconstruct a residual block from the coefficient block. The reconstruction unit 214 may generate a reconstructed block corresponding to the current block (although possibly with some degree of distortion) based on the reconstructed residual block and the prediction block generated by the mode selection unit 202. For example, the reconstruction unit 214 may add samples of the reconstructed residual block to corresponding samples of the prediction block generated by the mode selection unit 202 to produce a reconstructed block.

The filter unit 216 may perform one or more filtering operations on the reconstructed block. For example, filter unit 216 may perform deblocking operations to reduce blocking artifacts along CU edges. In some examples, the operation of the filter unit 216 may be skipped.

The video encoder 200 stores the reconstructed block in the DPB 218. For example, in examples of operations that do not require the filter unit 216, the reconstruction unit 214 may store the reconstructed block to the DPB 218. In examples where operation of filter unit 216 is desired, filter unit 216 may store the filtered reconstructed block to DPB 218. The motion estimation unit 222 and the motion compensation unit 224 may retrieve reference pictures from the DPB218 that are formed from reconstructed (and possibly filtered) blocks to inter-predict blocks of subsequently encoded pictures. In addition, the intra prediction unit 226 may intra predict other blocks in the current picture using reconstructed blocks in the DPB218 of the current picture.

In general, entropy encoding unit 220 may entropy encode syntax elements received from other functional components of video encoder 200. For example, entropy encoding unit 220 may entropy encode the quantized coefficient block from quantization unit 208. As another example, entropy encoding unit 220 may entropy encode the prediction syntax elements (e.g., motion information for inter prediction or intra mode information for intra prediction) from mode selection unit 202. Entropy encoding unit 220 may perform one or more entropy encoding operations on syntax elements, which are another example of video data, to generate entropy encoded data. For example, entropy encoding unit 220 may perform a Context Adaptive Variable Length Codec (CAVLC) operation, a CABAC operation, a variable-to-variable (V2V) length codec operation, a syntax-based context adaptive binary arithmetic codec (SBAC) operation, a Probability Interval Partitioning Entropy (PIPE) codec operation, an Exponential Golomb (Exponential-Golomb) encoding operation, or another type of entropy encoding operation on the data. In some examples, entropy encoding unit 220 may operate in a bypass mode, in which syntax elements are not entropy encoded.

The video encoder 200 may output a bitstream that includes entropy-encoded syntax elements required to reconstruct blocks of a slice or picture. Specifically, the entropy encoding unit 220 may output a bitstream.

The operations described above are described with respect to blocks. This description should be understood as the operation of the luma codec block and/or the chroma codec block. As described above, in some examples, the luma codec block and the chroma codec block are luma and chroma components of a CU. In some examples, the luma codec block and the chroma codec block are luma and chroma components of the PU.

In some examples, the operations performed with respect to the luma codec block need not be repeated for the chroma codec block. As one example, the operation of identifying a Motion Vector (MV) and a reference picture of a luma codec block need not be repeated in order to identify MVs and reference pictures of chroma blocks. Conversely, the MVs of the luma codec block may be scaled to determine the MVs of the chroma blocks, and the reference pictures may be the same. As another example, the intra prediction process may be the same for luma and chroma codec blocks.

Video encoder 200 represents an example of an apparatus configured to encode video data, the apparatus comprising a memory configured to store video data, and one or more processing units implemented in circuitry configured to determine that transform skipping is enabled, and based on transform skipping being enabled, encode coefficient values of coefficients in a residual block based on one or more coefficient values of one or more neighboring coefficients. The video encoder 200 may also be configured to be enabled based on the transform skipping, in a first pass and after the first pass, encoding one or more syntax elements in an interleaved manner on a coefficient-by-coefficient basis for coefficients in the residual block, and encoding the syntax elements on a coefficient-by-coefficient basis for coefficients in the residual block in a second pass.

As an example, the mode selection unit 202 may determine that the current block is coded in the transform skip mode, which means that the operation of the transform processing unit 206 may be skipped. In this example, the residual generation unit 204 generates coefficients encoded by the entropy encoding unit 220.

Entropy encoding unit 220 may encode the coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of the current block in a first pass (e.g., when transform skipping is enabled). For example, the entropy encoding unit 220 may determine coefficient information for each coefficient in the residual block. The coefficient information for the coefficients includes one or more of: a significance flag indicating whether the value of the coefficient is non-zero, a parity flag indicating whether the value of the coefficient is odd or even, a sign flag indicating whether the value of the coefficient is positive or negative, and one or more greater-than flags indicating whether the absolute value of the coefficient is greater than a respective threshold.

In this example, to codec the coefficient information in an interleaved manner, the entropy encoding unit 220 may perform context-based coding (e.g., such as CABAC) on a coefficient-by-coefficient basis on the interleaved manner until a binary bit count limit of the coding is reached. For example, entropy encoding unit 220 may determine a coded bin count limit (e.g., 2 x block width x block height or 1.75 x block width x block height) and track how many bins of the coded bin count limit are used. When the number of bits reaches (e.g., is greater than or equal to) the bit count limit of the codec (e.g., after reaching the bit count limit of the codec), the entropy encoding unit 220 may bypass-decode the coefficient information in an interleaved manner on a coefficient-by-coefficient basis.

After the first pass, the entropy encoding unit 220 may encode the residual information of the coefficients in the residual block of the current block in the second pass. In order to encode the residual information, the entropy encoding unit 220 may bypass-encode the residual information.

In one or more examples, entropy encoding unit 220 may signal coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of a current block in a first pass. The entropy encoding unit 220 may signal residual information of coefficients in a residual block of the current block in the second pass.

Fig. 10 is a block diagram illustrating an example video decoder 300 that may perform techniques of this disclosure. Fig. 10 is provided for purposes of explanation and does not limit the techniques broadly illustrated and described in this disclosure. For purposes of explanation, this disclosure describes a video decoder 300 in accordance with the techniques of VVC and HEVC. However, the techniques of this disclosure may be performed by video codec devices configured as other video codec standards.

In the example of fig. 10, the video decoder 300 includes a Codec Picture Buffer (CPB) memory 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filter unit 312, and a Decoded Picture Buffer (DPB) 314. Any or all of the CPB memory 320, the entropy decoding unit 302, the prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, the filter unit 312, and the DPB 314 may be implemented in one or more processors or processing circuits. Further, the video decoder 300 may include additional or alternative processors or processing circuits to perform these and other functions.

The prediction processing unit 304 includes a motion compensation unit 316 and an intra prediction unit 318. The prediction processing unit 304 may include additional units to perform prediction according to other prediction modes. As an example, the prediction processing unit 304 may include a palette unit, an intra block copy unit (which may form part of the motion compensation unit 316), an affine unit, a Linear Model (LM) unit, and the like. In other examples, video decoder 300 may include more, fewer, or different functional components.

The CPB memory 320 may store video data, such as an encoded video bitstream, to be decoded by the components of the video decoder 300. For example, the video data stored in the CPB memory 320 may be obtained, for example, from the computer-readable medium 110 (fig. 1). The CPB memory 320 may include CPBs that store encoded video data (e.g., syntax elements) from an encoded video bitstream. In addition, the CPB memory 320 may store video data other than syntax elements of the coded picture, for example, temporary data representing outputs from the respective units of the video decoder 300. The DPB 314 typically stores decoded pictures, which can be output and/or used as reference video data when the video decoder 300 decodes subsequent data or pictures of the encoded video bitstream. The CPB memory 320 and DPB 314 may be formed from any of a variety of memory devices, such as, for example, DRAM (including SDRAM), MRAM, RRAM, or other types of memory devices. The CPB memory 320 and DPB 314 may be provided by the same memory device or separate memory devices. In various examples, the CPB memory 320 may be on-chip with other components of the video decoder 300 or off-chip with respect to these components.

Additionally or alternatively, in some examples, video decoder 300 may retrieve the coded video data from memory 120 (fig. 1). That is, the memory 120 may store data using the CPB memory 320 as described above. Similarly, when some or all of the functions of the video decoder 300 are implemented in software to be executed by processing circuitry of the video decoder 300, the memory 120 may store instructions to be executed by the video decoder 300.

The various elements shown in fig. 10 are shown to aid in understanding the operations performed by the video decoder 300. These units may be implemented as fixed function circuits, programmable circuits, or a combination thereof. Similar to fig. 9, the fixed function circuit refers to a circuit that provides a specific function and is preset on an operation that can be performed. Programmable circuitry refers to circuitry that can be programmed to perform various tasks and provide flexible functionality in the operations that can be performed. For example, a programmable circuit may execute software or firmware such that the programmable circuit operates in a manner defined by the instructions of the software or firmware. Fixed function circuitry may execute software instructions (e.g., receive parameters or output parameters), but the type of operations performed by the fixed function circuitry is typically immutable. In some examples, one or more of the units may be different circuit blocks (fixed-function or programmable), and in some examples, one or more of the units may be integrated circuits.

The video decoder 300 may include an ALU, an EFU, digital circuitry, analog circuitry, and/or a programmable core formed of programmable circuitry. In examples where the operations of video decoder 300 are performed by software executing on programmable circuitry, on-chip or off-chip memory may store instructions (e.g., object code) of the software received and executed by video decoder 300.

The entropy decoding unit 302 may receive the encoded video data from the CPB and entropy-decode the video data to reproduce the syntax element. The prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, and the filter unit 312 may generate decoded video data based on syntax elements extracted from the bitstream.

Typically, the video decoder 300 reconstructs images on a block-by-block basis. The video decoder 300 may perform a reconstruction operation on each block individually (where a block currently being reconstructed (i.e., decoded) may be referred to as a "current block").

Entropy decoding unit 302 may entropy decode syntax elements defining quantized transform coefficients of a quantized transform coefficient block, as well as transform information, such as a Quantization Parameter (QP) and/or transform mode indication(s). Inverse quantization unit 306 may use the QP associated with the quantized transform coefficient block to determine a degree of quantization and, similarly, a degree of inverse quantization to be applied by inverse quantization unit 306. For example, the inverse quantization unit 306 may perform a bit-by-bit left shift operation to inverse quantize the quantized transform coefficients. The inverse quantization unit 306 may thus form a coefficient block that includes coefficients (e.g., a coefficient block in which a transform is used or a coefficient block in which a transform is skipped). In some examples, the operation of inverse quantization unit 306 may be skipped. When the transform is skipped, the coefficient block may be a residual value of the residual block, i.e. such that each coefficient of a position in the residual block is a residual value of the corresponding position.

After inverse quantization unit 306 forms the coefficient block, inverse transform processing unit 308 may apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. When the transform skip mode is enabled, the operation of the inverse transform processing unit 308 may be skipped. If necessary, the inverse transform processing unit 308 may apply inverse DCT, inverse integer transform, inverse karl hough-loff transform (KLT), inverse rotation transform, inverse direction transform, or another inverse transform to the coefficient block.

Also, the prediction processing unit 304 generates a prediction block from the prediction information syntax element entropy-decoded by the entropy decoding unit 302. For example, if the prediction information syntax element indicates that the current block is inter-predicted, the motion compensation unit 316 may generate a prediction block. In this case, the prediction information syntax element may indicate the reference picture in the DPB 314 from which the reference block was retrieved, and a motion vector that identifies the location of the reference block in the reference picture relative to the location of the current block in the current picture. The motion compensation unit 316 may generally perform the inter prediction process in a manner substantially similar to that described with respect to the motion compensation unit 224 (fig. 9).

As another example, if the prediction information syntax element indicates that the current block is intra-predicted, the intra prediction unit 318 may generate the prediction block according to the intra prediction mode indicated by the prediction information syntax element. Also, intra-prediction unit 318 may generally perform the intra-prediction process in a manner substantially similar to that described with respect to intra-prediction unit 226 (fig. 9). The intra-prediction unit 318 may retrieve data for neighboring samples of the current block from the DPB 314.

The reconstruction unit 310 may reconstruct the current block using the prediction block and the residual block. For example, the reconstruction unit 310 may add samples of the residual block to corresponding samples of the prediction block to reconstruct the current block.

The filter unit 312 may perform one or more filtering operations on the reconstructed block. For example, the filter unit 312 may perform deblocking operations to reduce blocking artifacts along reconstructed block edges. The operation of the filter unit 312 need not be performed in all examples.

The video decoder 300 may store the reconstructed block in the DPB 314. As described above, the DPB 314 may provide reference information, such as samples of a current picture for intra prediction and previously decoded pictures for subsequent motion compensation, to the prediction processing unit 304. In addition, video decoder 300 may output decoded pictures from DPB 314 for subsequent presentation on a display device, such as display device 118 of fig. 1.

In this manner, video decoder 300 represents an example of a video decoding device that includes a memory configured to store video data, and one or more processing units implemented in circuitry configured to determine that transform skipping is enabled, and based on transform skipping being enabled, decode coefficient values of coefficients in a residual block based on one or more coefficient values of one or more neighboring coefficients. The video decoder 300 may also be configured to decode one or more syntax elements in a first pass in an interleaved manner (e.g., when transform skipping is enabled) on a coefficient-by-coefficient basis for the coefficients in the residual block, and to decode the syntax elements on a coefficient-by-coefficient basis in a second pass after the first pass for the coefficients in the residual block.

As an example, the prediction processing unit 304 may determine that the current block is coded in the transform skip mode (e.g., based on information signaled by the video encoder 200), which means that the operation of the inverse transform processing unit 308 may be skipped. In this example, the reconstruction unit 310 receives the coefficients decoded by the entropy decoding unit 302 (e.g., residual values resulting from skipping the inverse transform).

The entropy decoding unit 302 may decode the coefficient information in an interleaved manner (e.g., enabled based on transform skipping) on a coefficient-by-coefficient basis for coefficients in a residual block of the current block in a first pass. For example, the entropy decoding unit 302 may determine coefficient information for each coefficient in the residual block. The coefficient information for the coefficients includes one or more of: a significance flag indicating whether the value of the coefficient is non-zero, a parity flag indicating whether the value of the coefficient is odd or even, a sign flag indicating whether the value of the coefficient is positive or negative, and one or more greater-than flags indicating whether the absolute value of the coefficient is greater than a respective threshold.

In this example, to decode the coefficient information in an interleaved manner (e.g., transform-based skipping is enabled), entropy decoding unit 302 may perform context-based decoding (e.g., such as CABAC) on a coefficient-by-coefficient basis on the interleaved manner until a bin count limit of the codec is reached. For example, the entropy decoding unit 302 may determine a coded bin count limit (e.g., 2 × block width × block height or may be signaled by the video encoder 200) and track how many bins of the coded bin count limit are used. When the number of bits reaches (e.g., is greater than or equal to) the bit count limit of the codec (e.g., after reaching the bit count limit of the codec), the entropy decoding unit 302 may bypass-decode the coefficient information in an interleaved manner on a coefficient-by-coefficient basis.

After the first pass, the entropy decoding unit 302 may decode the residual information of the coefficients in the residual block of the current block in the second pass. To decode the residual information, the entropy decoding unit 302 may bypass-decode the residual information.

In one or more examples, the entropy decoding unit 302 may parse the coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients of a residual block of the current block in a first pass. The entropy decoding unit 302 may parse the residue information of the coefficients in the residue block of the current block in the second pass.

Fig. 11 is a flow diagram illustrating an example method for encoding and decoding video data. For example, processing circuitry of a video codec (e.g., video encoder 200 or video decoder 300) may determine that a current block of video data is being coded (e.g., encoded or decoded) in a transform skip mode. Based on the current block being coded in the transform skip mode, processing circuitry of the video codec may be configured to perform the example techniques.

Processing circuitry of the video codec (e.g., such as with entropy encoding unit 220 or entropy decoding unit 302) may encode coefficient information for coefficients in a residual block for a current block of video data in a first pass in an interleaved manner on a coefficient-by-coefficient basis (400). The coefficient information for the coefficients includes one or more of: a significance flag indicating whether the value of the coefficient is non-zero, a parity flag indicating whether the value of the coefficient is odd or even, a sign flag indicating whether the value of the coefficient is positive or negative, and one or more greater-than flags indicating whether the absolute value of the coefficient is greater than a respective threshold.

As one example, to codec coefficient information in an interleaved manner, processing circuitry of a video codec (e.g., such as with entropy encoding unit 220 or entropy decoding unit 302) may perform context-based coding (e.g., CABAC) on a coefficient-by-coefficient basis on the coefficient information in an interleaved manner until a bin count limit of the coding is reached. In this example, processing circuitry of the video codec (e.g., such as with entropy encoding unit 220 or entropy decoding unit 302) may bypass codec of coefficient information in an interleaved manner on a coefficient-by-coefficient basis after reaching a bin count limit of the codec.

After the first pass, processing circuitry of the video codec (e.g., such as with entropy encoding unit 220 or entropy decoding unit 302) may codec residual information for coefficients in a residual block of the current block in a second pass (402). For example, to codec the residual information, the processing circuit may bypass the codec on the residual information.

As one example, to codec the residual information, the processing circuitry of the video codec may be configured to codec the residual information. In this example, the binary bit count limit of the codec is reached during the codec of a particular coefficient. The processing circuitry of the video codec may be configured to codec the respective values of the coefficients following the particular coefficient. As one example, the processing circuit of the video codec may codec information indicating a difference between an absolute value of a corresponding value of a coefficient following a specific coefficient and 1.

In one or more examples, processing circuitry of a video codec, such as in an example where the video codec is video encoder 200, may signal coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of a current block in a first pass and signal residual information for coefficients in the residual block of the current block in a second pass. In one or more examples, processing circuitry of a video codec, such as in the example where the video codec is video decoder 300, may parse coefficient information in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block of a current block in a first pass, and parse residual information for coefficients in the residual block of the current block in a second pass.

The following are some example techniques that may be used alone or in combination.

Example 1. A method of coding video data, the method comprising determining that transform skipping is enabled, and coding coefficient values of coefficients in a residual block based on one or more coefficient values of one or more neighboring coefficients.

Example 2. The method of example 1, wherein the one or more neighboring coefficients comprise a left side coefficient and an upper side coefficient.

Example 3. The method of any one of examples 1 and 2, wherein the encoding the coefficient values comprises one of: the method includes encoding coefficient values, mapping coefficient absolute levels of the coefficients to correction values based on one or more coefficient values of one or more neighboring coefficients, or decoding the coefficient values, inverse mapping correction values to coefficient absolute levels of the coefficients based on one or more coefficient values of one or more neighboring coefficients.

Example 4. A method of encoding and decoding video data, the method comprising, in a first pass and after the first pass, encoding and decoding one or more syntax elements in an interleaved manner on a coefficient-by-coefficient basis for coefficients in a residual block, and in a second pass encoding and decoding syntax elements on a coefficient-by-coefficient basis for coefficients in the residual block.

Example 5. The method of example 4, wherein the one or more syntax elements coded in the first pass include one or more of a sig _ coeff _ flag, a par _ level _ flag, a coeff _ sign _ flag, and all abs _ level _ gtX _ flags, examples of which are described in this disclosure.

Example 6. The method of any of examples 4 and 5, wherein the syntax elements coded in the second pass comprise abs _ remaining, examples of which are described in this disclosure.

Example 7. The method of any one or combination of examples 1-6.

Example 8. The method of any one or combination of examples 1-6, wherein the encoding comprises decoding.

Example 9. The method of any one or combination of examples 1-6, wherein the coding comprises encoding.

Example 10. An apparatus for codec of video data, the apparatus comprising a memory configured to store video data and a video codec comprising fixed-function or programmable circuitry, wherein the video codec is configured to perform the method of any one or combination of examples 1-6.

Example 11. The apparatus of example 10, wherein the video codec comprises a video decoder.

Example 12. The apparatus of example 10, wherein the video codec comprises a video encoder.

Example 13. The apparatus of any of examples 10-12, further comprising a display configured to display the decoded video data.

Example 14. The apparatus of any of examples 10-13, wherein the apparatus comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

Example 15. A computer-readable storage medium having instructions stored thereon that, when executed, cause one or more processors to perform the method of any one or combination of examples 1-6.

Example 16. An apparatus for encoding and decoding video data, the apparatus comprising means for performing the method of any one or combination of examples 1-6.

It will be recognized that, according to an example, certain acts or events of any of the techniques described herein can be performed in a different order, may be added, merged, or omitted entirely (e.g., not all described acts or events are necessary for the practice of the techniques). Further, in some examples, acts or events may be performed concurrently, e.g., through multi-threaded processing, interrupt processing, or multiple processors, rather than sequentially.

In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium and executed by a hardware-based processing unit. Computer-readable media may include computer-readable storage media corresponding to tangible media, such as data storage media, or communication media including any medium that facilitates transfer of a computer program from one place to another (e.g., according to a communication protocol). In this manner, the computer-readable medium may generally correspond to (1) a non-transitory tangible computer-readable storage medium or (2) a communication medium such as a signal or carrier wave. A data storage medium may be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, code and/or data structures to implement the techniques described in this disclosure. The computer program product may include a computer-readable medium.

By way of example, and not limitation, such computer-readable storage media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also, any connection is properly termed a computer-readable medium. For example, if the instructions are transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. However, it should be understood that computer-readable storage media and data storage media do not include connections, carrier waves, signals, or other transitory media, but are directed to non-transitory, tangible storage media. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, Digital Versatile Disc (DVD), floppy disk and blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

The instructions may be executed by one or more processors, such as one or more DSPs, general purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuitry. Accordingly, the terms "processor" and "processing circuitry" as used herein may refer to any of the foregoing structures or any other structure suitable for implementing the techniques described herein. Further, in some aspects, the functionality described herein may be provided in dedicated hardware and/or software modules configured for encoding and decoding, or incorporated into a combined codec. Furthermore, the techniques may be fully implemented in one or more circuits or logic elements.

The techniques of this disclosure may be implemented in a variety of devices or apparatuses, including a wireless handset, an Integrated Circuit (IC), or a set of ICs (e.g., a chip set). Various components, modules, or units are described in this disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily require implementation by different hardware units. Rather, as noted above, the various units may be combined in a codec hardware unit, or provided by a collection of interoperative hardware units including one or more processors as noted above, in conjunction with suitable software and/or firmware.

Various examples have been described. These and other examples are within the scope of the following claims.

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