阅读说明：本技术 电子器件封装件及其制造方法 (Electronic device package and method of manufacturing the same ) 是由 全英镐 于 2021-04-25 设计创作，主要内容包括：本发明公开了一种电子器件封装件。所述电子器件封装件包括：板,电子器件安装在所述板上；模制部,形成为覆盖所述板上的所述电子器件；以及导电层,设置在所述模制部的表面上,并且延伸到形成在所述板上的沟槽中。(The invention discloses an electronic device package. The electronic device package includes: a board on which an electronic device is mounted; a molding part formed to cover the electronic device on the board; and a conductive layer provided on a surface of the molding portion and extending into a groove formed on the board.)

1. An electronic device package comprising:

a board on which an electronic device is mounted;

a molding part formed to cover the electronic device mounted on the board; and

a conductive layer disposed on a surface of the molding part and configured to extend into a groove formed on the board.

2. The electronic device package of claim 1, wherein the mold is configured to contact the plate to form a border, and the trench is formed adjacent to the border.

3. The electronic device package according to claim 2, wherein the groove has a width measured in a direction parallel to an upper surface of the board and perpendicular to the boundary, and a depth measured in a thickness direction of the board, and the width of the groove is formed larger than the depth of the groove.

4. The electronic device package according to claim 2, wherein the conductive layer is provided to extend to a side surface of the mold portion, cover the boundary, and extend to contact a bottom of the trench.

5. The electronic device package according to claim 1, wherein an area above the board is divided into a shield layer forming area and a shield layer non-forming area, the shield layer forming area includes the mold portion, the shield layer non-forming area includes an electronic device, and the trench is provided between the mold portion and the electronic device of the shield layer non-forming area.

6. The electronic device package according to claim 1, wherein the groove is formed to surround the mold along an outer circumference of the mold in a ring shape.

7. The electronic device package according to claim 1, wherein the groove is formed to extend in a straight line along an edge of the molding part.

8. The electronic device package of claim 1, wherein an end of the conductive layer is disposed in the trench.

9. The electronic device package according to any one of claims 1 to 8, wherein the trench is formed by recessing an insulating protective layer formed on an upper surface of the board.

10. The electronic device package of any of claims 1-8, wherein the trench is formed by patterning a mold on an upper surface of the plate.

11. The electronic device package of claim 10, wherein the first sidewall of the trench is defined by a molded bump protruding from the board.

12. The electronic device package according to any one of claims 1 to 8, wherein the mold part includes an extended region that extends on the board in a direction parallel to an upper surface of the board, and the groove is formed by recessing an upper surface of the extended region of the mold part.

13. A method of manufacturing an electronic device package, the method comprising:

mounting an electronic device on a board;

forming a molding part sealing the electronic device mounted on the board;

forming a groove on the plate adjacent to the molded part;

providing a shield layer non-formation region that is distinguished from a shield layer formation region, wherein the shield layer formation region includes the molding part;

forming a mask on the shield layer non-formation region to dispose an edge of the mask over the trench;

forming a conductive layer on the mold part and the mask; and

the mask is removed.

14. The manufacturing method of an electronic device package according to claim 13, wherein the forming of the groove includes patterning an insulating protective layer formed on an upper surface of the board to form the groove.

15. The manufacturing method of an electronic device package according to claim 13, wherein in the forming of the groove, a mold portion on an upper surface of the board is patterned to form the groove.

16. An electronic device package comprising:

a plate, an area above the plate including a shield layer forming area and a shield layer non-forming area;

a groove formed on the plate;

wherein the shield layer forming region includes:

a first electronic device covered by a mold portion; and

a first conductive layer disposed on the molding part and configured to extend into the groove.

17. The electronic device package of claim 16, wherein the trench is formed by recessing an insulating protective layer formed on the board.

Technical Field

The following description relates to an electronic device package and a method of manufacturing the same.

Background

With the rapid development of smart devices, there is a demand for personal products and portable products in the electronic device industry. In order to improve the portability of smart devices while improving their functions and performance, miniaturization and weight reduction of electronic devices embedded in these device systems are beneficial.

In order to achieve miniaturization and weight saving of electronic devices, with technological development in the direction of reducing the individual size of the mounting assembly, development of technology for integrating a plurality of individual elements into a single electronic device has thus been conducted in parallel. For example, a system on chip (SoC) refers to a computer or battery system component integrated in one integrated circuit, and a System In Package (SIP) refers to a technology of packaging a plurality of circuits formed of separate chips into a single package to realize a light-weight and small-sized package.

In the SIP module applied to the electronics industry related to communications, since a plurality of functions are increasingly advantageous, the plurality of functions can be gradually multi-functionalized into one module. Therefore, problems of interference, such as electromagnetic interference (EMI) or poor electromagnetic compatibility (EMC), between components in one module or components in other modules may occur. Therefore, in order to prevent such electromagnetic interference (EMI), it may be necessary to develop an assembly to which a partial shield is applied.

The above information is presented merely as background information to aid in understanding the present disclosure. No determination is made as to whether any of the above information is applicable as prior art to the present disclosure, nor is an assertion made.

Disclosure of Invention

This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

In one general aspect, an electronic device package includes: a board on which an electronic device is mounted; a molding part formed to cover the electronic device mounted on the board; and a conductive layer disposed on a surface of the molding part and configured to extend into a groove formed on the board.

The molding part may be configured to contact the plate to form a boundary, and the groove is formed adjacent to the boundary.

The groove may have a width measured in a direction parallel to the upper surface of the plate and perpendicular to the boundary, and a depth measured in a thickness direction of the plate, and the width of the groove may be formed to be greater than the depth of the groove.

The conductive layer may be provided to extend to a side surface of the molding part, cover the boundary, and extend to contact the bottom of the trench.

An area above the board may be divided into a shield layer forming area including the mold part and a shield layer non-forming area including an electronic device, and the trench is disposed between the mold part and the electronic device of the shield layer non-forming area.

The groove may be formed to surround the mold part in a ring shape along an outer circumference of the mold part.

The groove may be formed to extend in a straight line along an edge of the molding part.

An end portion of the conductive layer may be disposed in the trench.

The trench may be formed by recessing an insulating protection layer formed on the upper surface of the plate.

The grooves may be formed by patterning a mold on the upper surface of the plate.

The first side wall of the channel may be defined by a molded bump protruding from the plate.

The molding part may include an extension region extending on the plate in a direction parallel to an upper surface of the plate, and the groove is formed by recessing an upper surface of the extension region of the molding part.

In one general aspect, an electronic device package manufacturing method includes: mounting an electronic device on a board; forming a molding part sealing the electronic device mounted on the board; forming a groove on the plate adjacent to the molded part; providing a shield layer non-formation region that is distinguished from a shield layer formation region, wherein the shield layer formation region includes the molding part; forming a mask on the shield layer non-formation region to dispose an edge of the mask over the trench; forming a conductive layer on the mold part and the mask; and removing the mask.

The forming of the trench may include patterning an insulating protection layer formed on the upper surface of the plate to form the trench.

In the forming of the groove, a molding portion on an upper surface of the plate may be patterned to form the groove.

In one general aspect, an electronic device package includes: a plate, an area above the plate including a shield layer forming area and a shield layer non-forming area; a groove formed on the plate; wherein the shield layer forming region includes: a first electronic device covered by a mold portion; and a first conductive layer disposed on the mold part and configured to extend into the groove; and wherein the shield layer non-formation region includes: a second electronic device coated with a mask; and a second conductive layer disposed over the mask and configured to extend over the trench.

An edge of the mask may be configured to protrude above the trench.

The trench may be formed by recessing an insulating protection layer formed on the board.

Other features and aspects will be apparent from the following detailed description, the accompanying drawings, and the claims.

Drawings

Fig. 1 is a perspective view illustrating an example electronic device package in accordance with one or more embodiments.

Fig. 2 illustrates a cross-sectional view of the example electronic device package taken along line II-II in fig. 1.

Fig. 3 shows an enlarged sectional view of the "a" portion of fig. 2.

Fig. 4 illustrates a top plan view of an example electronic device package in accordance with one or more embodiments shown in fig. 1.

Fig. 5 illustrates a top plan view according to an example variation of one or more embodiments shown in fig. 1.

Fig. 6A-6D illustrate process diagrams of a process for manufacturing an example electronic device package, according to one or more embodiments shown in fig. 1.

Fig. 7 is a cross-sectional view illustrating an example electronic device package in accordance with one or more embodiments.

FIG. 8 illustrates an enlarged cross-sectional view of section "B" according to one or more embodiments illustrated in FIG. 7.

Fig. 9 illustrates a top plan view of an example electronic device package in accordance with one or more embodiments illustrated in fig. 7.

Fig. 10 is a top plan view illustrating an example variation in accordance with one or more embodiments shown in fig. 7.

Fig. 11A-11D illustrate process diagrams of an example manufacturing process of an example electronic device package according to one or more embodiments shown in fig. 7.

Fig. 12 illustrates a cross-sectional view of an example electronic device package, according to an example.

Like reference numerals refer to like elements throughout the drawings and detailed description. The drawings may not be to scale and the relative sizes, proportions and depictions of the elements in the drawings may be exaggerated for clarity, illustration and convenience.

Detailed Description

Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings, it being noted that examples are not limited thereto.

The following detailed description is provided to assist the reader in obtaining a thorough understanding of the methods, devices, and/or systems described herein. However, various changes, modifications, and equivalents of the methods, devices, and/or systems described herein will be apparent to those skilled in the art upon an understanding of the present disclosure. For example, the order of operations described herein is merely an example and is not limited to the order set forth herein, but rather, variations may be made in addition to the operations which must occur in a particular order which will be apparent upon an understanding of the present disclosure. In addition, descriptions of features known in the art may be omitted for the sake of clarity and conciseness.

The features described herein may be embodied in many different forms and should not be construed as limited to the examples described herein. Rather, the examples described herein have been provided merely to illustrate some of the many possible ways to implement the methods, devices, and/or systems described herein that will be apparent upon understanding the present disclosure.

Throughout the specification, when an element (such as a layer, region, or substrate) is described as being "on," connected to, "or" coupled to "another element, it can be directly on," connected to, or directly coupled to the other element, or one or more other elements may be present between the two elements. In contrast, when an element is referred to as being "directly on," "directly connected to" or "directly coupled to" another element, there are no other elements present between the two elements. "portions" of an element as used herein may include the entire element or less than the entire element.

As used herein, the term "and/or" includes any one of the associated listed items or any combination of any two or more; likewise, "at least one of … …" includes any one of the associated listed items or any combination of any two or more.

Although terms such as "first", "second", and "third", etc., may be used herein to describe various elements, components, regions, layers or sections, these elements, components, regions, layers or sections should not be limited by these terms. Rather, these terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section from an example described herein could also be termed a second element, component, region, layer or section without departing from the teachings of the example.

Spatially relative terms such as "above … …," "above," "below … …," and "below" may be used herein to describe one element's relationship to another element as illustrated in the figures for ease of description. Such spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "above" or "upper" relative to other elements would then be "below" or "lower" relative to the other elements. Thus, the term "above … …" may include both an orientation of "above … …" and "below … …" depending on the spatial orientation of the device. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative terms used herein may be interpreted accordingly.

The terminology used herein is for the purpose of describing various examples only and is not intended to be limiting of the disclosure. The singular is intended to include the plural unless the context clearly dictates otherwise. The terms "comprises," "comprising," "including," "constructed of," "having," and the like, in the specification, specify the presence of stated features, quantities, steps, operations, elements, components, and/or combinations thereof, but do not preclude the presence or addition of one or more other features, quantities, steps, operations, elements, components, and/or combinations thereof.

The features of the examples described herein may be combined in various ways that will be apparent upon understanding the present disclosure. Further, while the examples described herein have various configurations, other configurations are possible as will be apparent upon understanding the present disclosure.

Due to manufacturing techniques and/or tolerances, the shapes shown in the drawings may vary. Accordingly, the examples described herein are not limited to the particular shapes shown in the drawings, but include changes in shape that occur during manufacturing.

Fig. 1 illustrates a perspective view of an example electronic device package, fig. 2 is a cross-sectional view of the example electronic device package taken along line II-II in fig. 1, and fig. 3 illustrates an enlarged cross-sectional view of section "a" of fig. 2, in accordance with one or more embodiments.

Referring to fig. 1 and 2, an example electronic device package 100 in accordance with one or more embodiments may include: a board 130 on which the electronic device 120 is mounted; a mold part 140 covering the electronic device 120; and a conductive layer 150 disposed on the molding part 140. The electronic device 120 may include active components (such as an IC (integrated circuit) chip, as non-limiting examples) or passive components. The board 130 may be a multilayer circuit board that can be formed by repeatedly stacking, for example, a plurality of insulating layers and a plurality of wiring layers, and may be configured as a double-sided circuit board in which wiring layers are formed on both sides of one insulating layer as needed.

The molding part 140 may be formed to cover and seal the electronic device 120 in at least a partial area on the board 130, and the molding part 140 thus formed may extend to cover a side of the electronic device 120 to contact the board 130, and thus may be configured to form the boundary 135 (fig. 3). In a non-limiting example, the mold part 140 may be formed by using an Epoxy Molding Compound (EMC) as a molding material.

The conductive layer 150 may be formed on the molding part 140 to cover the molding part 140. The conductive layer 150 may be formed by depositing a conductive material along a surface of the molding part 140 to serve as an electromagnetic interference (EMI) shielding layer, and may be deposited by, for example, a sputtering process.

In the electronic device package 100, the groove 137 may be formed on the board 130 adjacent to the molding part 140. The groove 137 may be disposed adjacent to a boundary 135 formed by the intersection of the plate 130 and the molding 140, and the conductive layer 150 may be disposed to extend into the groove 137. That is, the conductive layer 150 extending to the side of the mold 140 covers the boundary 135 of the mold 140 and the board 130, then extends into the groove 137, and then may reach the bottom of the groove 137.

The groove 137 may be formed by recessing a portion of the insulating protective layer 132 formed on the upper surface of the plate 130 adjacent to the boundary 135. The insulating protective layer 132 may be formed using a solder resist, and the groove 137 having such a shape may be patterned when the solder resist is processed on the upper surface of the board 130.

Referring to fig. 3, the groove 137 may be formed such that the width w is greater than the depth d. In an example, the width of the groove 137 may be measured in a direction (x-axis direction or y-axis direction in the drawing) parallel to the upper surface of the plate 130 and perpendicular to the edge or boundary 135 of the molding part 140, and the depth of the groove 137 may be measured in a thickness direction (z-axis direction in the drawing) of the plate 130. Accordingly, the width w of the portion of the groove 137 extending in the y-axis direction of the drawing may be measured in the x-axis direction of the drawing, and the width w of the portion of the groove 137 extending in the x-axis direction of the drawing may be measured in the y-axis direction of the drawing.

The conductive layer 150 may be formed by a sputtering process while shielding the shield layer non-formation region NS with the mask M. In this example, by positioning the edge of the mask M to protrude to a position above the trench 137, the conductive layer 151 coated in the shield layer non-formation region NS can be easily cut off from the conductive layer 150 coated in the shield layer formation region S with respect to the trench 137 when the mask M is removed. This will be described in more detail below with reference to process diagrams.

Fig. 4 illustrates a top plan view of an example electronic device package in accordance with one or more embodiments.

Referring to fig. 4, in the electronic device package 100, the groove 137 may be formed to extend in a parallel direction along an edge of the mold part 140 and to surround the mold part 140 in an annular plane along an outer circumference of the mold part 140. In addition, on the board 130, another electronic device 160 may be disposed on the shielding layer non-formation region NS, and in an example, a connector may be mounted. Accordingly, the groove 137 may be disposed between the other electronic device 160 and the molding part 140.

In an example, conductive layer 150 extending into trench 137 terminates in trench 137 such that an end of conductive layer 150 can be disposed in trench 137. This is because in the process of forming the conductive layer 150, after removing the mask M protruding above the trench 137 after depositing the conductive layer 150, the conductive layer 150 may be cut in the trench 137. As a result, when the conductive layer 150 is deposited using the mask M, the protrusion of the conductive layer 150 may be prevented from occurring on the surface of the board 130.

Fig. 5 illustrates a top plan view according to a variation of one or more embodiments illustrated in fig. 1.

Referring to fig. 5, in the electronic device package 100' according to an example, the groove 137' may extend in a straight line on the board 130' along one edge of the molding part 140' and may extend to an edge of the board 130 '. In an example, the groove 137 'may be provided at two places on both sides of the molding part 140', and the conductive layer 150 'may extend into the groove 137'.

Fig. 6A-6D are process diagrams illustrating a manufacturing process of an example electronic device package according to one or more embodiments shown in fig. 1. Methods of manufacturing example electronic device packages according to one or more embodiments are described below with reference to fig. 6A through 6D. Here, the electronic device package may be manufactured by arranging a plurality of modules in an array on a single board to produce the electronic device package array 101, and then cutting the electronic device package array 101 into individual module packages.

Referring to fig. 6A, according to a method of manufacturing an example electronic device package, an electronic device 120 may be mounted on a board 130 in one step. The board 130 may use a Printed Circuit Board (PCB), and the electronic device 120 may include active elements such as IC chips or passive elements.

Referring to fig. 6A, in another step, a molding part 140 sealing the electronic device 120 may be formed on the board 130. The molding part 140 may be formed to cover and seal the electronic device 120 in at least some areas on the board 130. The mold part 140 thus formed may extend to cover the side of the electronic device 120 and may intersect or contact the board 130 to form the boundary 135. The mold part 140 may use, for example, Epoxy Molding Compound (EMC) as a molding material.

Referring to fig. 6A, in a further step, a groove 137 may be formed on the plate 130 adjacent to the mold part 140. The groove 137 may be patterned by processing a solder resist when forming the insulating protection layer 132 on the upper surface of the board 130, whereby the groove 137 may be formed in a structure in which the insulating protection layer 132 on the upper surface of the board 130 is recessed.

Referring to fig. 6B, in a further step, a shield layer forming region S including the molding part 140 and a shield layer non-forming region NS as other regions are provided, and a mask M may be applied as a cover in the shield layer non-forming region NS. At this time, one edge of the mask M may be disposed such that it is located over the trench 137 or extends through the trench 137, that is, the mask M protrudes into the region of the trench 137.

Referring to fig. 6C, in a further step, conductive layers 150 and 151 may be formed on the mold part 140 and the mask M, respectively. The conductive layer 150 may be formed by depositing a conductive material along the surface of the mold part 140. The conductive layer 150 may be implemented as an electromagnetic interference (EMI) shielding layer, and may apply, for example, a sputtering process. The conductive layer 150 may be formed to cover the molding part 140, and the conductive layer 151 may also be coated on the mask M, but may be formed to be easily disconnected in the region of the trench 137.

That is, when the sputtering process is applied, ionized gas atoms of the conductive layer forming material may be sprayed and vacuum-deposited to integrally form a thin film on the upper surface of the mold part 140 and on the mask M. Accordingly, the ionized gas atoms ejected during the sputtering process may deposit the conductive layer 150, the conductive layer 150 being connected from the top and side of the mold 140, covering the boundary 135 of the mold 140 and the plate 130, and extending to the inner wall and the bottom of one side of the groove 137. On the other hand, since the mask M may be disposed such that at least one edge above the trench 137 protrudes, a space formed by the width and depth of the trench 137 may be secured between the edge of the mask M and the bottom of the trench 137. When a step is formed through the space, the edge of the mask M may be suspended over the trench 137, whereby the conductive layer 151 deposited on the mask M may not be thickly connected to the conductive layer 150 located inside the trench 137 and may be formed to be weakly connected or disconnected.

Referring to fig. 6D, in a further step, the mask M may be removed. After the deposition of the conductive layers 150 and 151 is completed, the conductive layer 151 deposited on the shield layer non-formation region NS may be removed when the mask M is removed. At this time, the step secured by the groove 137 can disconnect the conductive layer 150 covering the mold part 140 and the conductive layer 151 on the mask M.

That is, as shown in fig. 12, in the example electronic device package according to the comparative example in which the conductive layer is formed on the board without forming the trench, since the conductive layer 50 deposited on the board 30 and the conductive layer 51 deposited on the mask M are thickly connected to each other, when the mask M is removed, the lifting of the conductive layer may occur.

However, as described above, in the method of manufacturing the exemplary electronic device package according to the present embodiment, since the conductive layer 151 on the mask M and the conductive layer 150 covering the mold part 140 can be easily disconnected by the structure of the groove 137 on the board 130, the end of the conductive layer 150 can be prevented from being lifted when the mask M is removed.

The array of the electronic device packages 100, of which the formation of the conductive layer 150 has been completed, may be cut along the cutting line CL to manufacture the respective module packages.

Fig. 7 is a cross-sectional view illustrating an example electronic device package in accordance with one or more embodiments, and fig. 8 is an enlarged cross-sectional view of a "B" portion in the example embodiment of fig. 7.

Referring to fig. 7, an electronic device package 200 according to one or more embodiments includes: a board 230 on which the electronic device 220 is mounted; a mold part 240 covering the electronic device 220; and a conductive layer 250 may be disposed on the molding part 240. The electronic device 220 may include active components (such as Integrated Circuit (IC) chips, as non-limiting examples) or passive components. By way of example, the board 230 may comprise, for example, a Printed Circuit Board (PCB).

The mold 240 may be formed to cover and seal the electronic device 220 in at least a portion of an area above the board 230, and the mold 240 may extend to cover a side of the electronic device 220 and intersect or contact the board 230, thereby being configured to form the boundary 235. The mold 240 may be formed using, for example, an Epoxy Molding Compound (EMC) as a molding material.

The conductive layer 250 may be formed on the mold 240 to cover the mold 240. The conductive layer 250 may be formed by depositing a conductive material along a surface of the mold 240. Conductive layer 250 may be implemented as an electromagnetic interference (EMI) shielding layer and may be deposited by, for example, a sputtering process.

In the electronic device package 200, the groove 237 may be formed on the board 230 adjacent to the molding part 240. Grooves 237 may be disposed adjacent to a boundary 235 formed by the intersection or contact of plate 230 and mold 240, and conductive layer 250 may be disposed to extend into grooves 237. That is, the conductive layer 250 extending to the side of the mold 240 covers the mold 240 and the boundary 235 of the plate 230, then extends into the groove 237, and may reach the bottom of the groove 237.

The groove 237 may be formed by patterning a mold 240 on the upper surface of the plate 230 adjacent to the border 235. That is, the molding part 240 may include an extension region 241 extending in a direction parallel to the upper surface of the plate 230 on the plate 230, and the groove 237 may be formed by recessing the upper surface of the extension region 241 including the boundary 235. Accordingly, one sidewall of the groove 237 may be defined by the mold 240 covering the electronic device 220, and the other sidewall of the groove 237 may be defined by the mold bump 243 protruding from the plate 230.

Referring to fig. 8, in an example, the groove 237 may be formed such that the width w is greater than the depth d. In an example, the width of the groove 237 may be measured in a direction (x-axis direction or y-axis direction in the drawing) parallel to the upper surface of the plate 230 and perpendicular to the edge or boundary 235 of the mold 240, and the depth of the groove 237 may be measured in a thickness direction (z-axis direction in the drawing) of the plate 230. Therefore, in a portion of the groove 237 extending in the y-axis direction in the drawing, the width w may be measured in the x-axis direction in the drawing, and in a portion of the groove 237 extending in the x-axis direction in the drawing, the width w may be measured in the y-axis direction in the drawing.

The conductive layer 250 may be formed by applying a sputtering process while shielding the shield layer non-formation region NS with the mask M. At this time, since the edge of the mask M is disposed to protrude above the groove 237 while being supported on the top of the molding bump 243, the conductive layer 250 applied to the shield layer forming region S may be easily cut off from the shield layer non-forming region NS with respect to the groove 237 when the mask M is removed. This will be described in more detail below with reference to process diagrams.

Fig. 9 is a top plan view illustrating an example electronic device package according to one or more embodiments shown in fig. 7.

Referring to fig. 9, in the electronic device package 200, the grooves 237 may extend side by side along the edge of the mold 240, and may be formed to surround the mold 240 in an annular plane along the outer circumference of the mold 240. Further, another electronic device 260 may be disposed in the shield layer non-formation region NS on the board 230, and for example, a connector may be mounted. Accordingly, the groove 237 may be provided between the molding part 240 and the other electronic device 260.

In an example, the conductive layer 250 extending into the trench 237 can terminate in the trench 237 such that an end of the conductive layer 250 can be disposed in the trench 237. This is because the conductive layer 250 is disconnected in the trench 237 after removing the mask M protruding above the trench 237 after depositing the conductive layer 250 during the formation process of the conductive layer 250. As a result, lifting of the conductive layer 250, which may occur on the surface of the board 230 when the conductive layer 250 is deposited using the mask M, may be prevented.

Fig. 10 is a top plan view illustrating an example variation of the example embodiment of fig. 7.

Referring to fig. 10, in an electronic device package 200 'according to an example modification, a groove 237' may extend in a straight line along one edge of a mold 240 'and may extend to an edge of a board 230'. Thus, the molded tab 243' defining one sidewall of the channel 237' may also extend in a straight line and may extend to an edge of the plate 230 '. In an example, the groove 237 'may be disposed at two regions on both sides of the molding part 240', and the conductive layer 250 'may extend into the groove 237'.

Fig. 11A-11D show process diagrams of a manufacturing process of an example electronic device package according to the embodiment shown in fig. 7. A manufacturing method of manufacturing the electronic device package according to the present embodiment will be described below with reference to fig. 11A to 11D. In an example, an electronic device package may be manufactured by arranging a plurality of modules in an array on a board to produce an electronic device package array 201. The board may then be cut for each individual module package.

According to the method of manufacturing the electronic device package according to the present exemplary embodiment, the electronic device 220 may be mounted on the board 230 in one step (refer to fig. 11A). Board 230 may be implemented as a Printed Circuit Board (PCB) and electronics 220 may include active components (such as, but not limited to, IC chips) or passive components.

Referring to fig. 11A, in another step, a molding part 240 sealing the electronic device 220 may be formed on the board 230. The molding part 240 may be formed to cover and seal the electronic device 220 in at least some areas on the board 230. The mold part 240 thus formed may extend to cover the side of the electronic device 220 to contact the board 230. The mold 240 may implement, for example, an Epoxy Molding Compound (EMC) as a molding material.

Referring to fig. 11A, in a further step, a groove 237 may be formed on the plate 230 adjacent to the mold 240 (refer to fig. 11A). In an example, the groove 237 may be formed by performing a removal process (etching process) on the mold 240 on the upper surface of the plate 230. That is, the mold part 240 formed to have the inclined surface 240a in the side surface may be cut by using a laser or a saw blade to process the vertical side surface 240b and the extension region 241 extending in the direction intersecting therewith. In addition, after the groove 237 is formed by recessing the upper surface of the extension region 241 by a removal process, the molding bump 243 may be formed outside the groove 237.

Referring to fig. 11B, in a further step, a shield layer forming region S including the molding part 240 and a shield layer non-forming region NS including a region other than the shield layer forming region S may be determined, and the mask M may be covered in the shield layer non-forming region NS. At this time, one edge of the mask M may be disposed to protrude above the groove 237 while being supported on the upper surface of the molding bump 243.

Referring to fig. 11C, in a further step, conductive layers 250 and 251 may be formed on the mold part 240 and the mask M, respectively. The conductive layer 250 may be formed by depositing a conductive material along a surface of the molding part 240 to serve as an electromagnetic interference (EMI) shielding layer, and in one example, a sputtering process may be applied. The conductive layer 250 may be formed to cover the molding part 240, and the conductive layer 251 may be coated on the mask M, but the conductive layer 251 may be formed to be easily disconnected in the region of the trench 237.

That is, when the sputtering process is applied, ionized gas atoms of the conductive layer forming material may be sprayed and vacuum-deposited to integrally form a thin film on the upper surface of the mold part 240 and the mask M. Accordingly, the ionized gas atoms sprayed from the sputtering process may deposit the conductive layer 250, the conductive layer 250 extending from the top and side surfaces of the mold part 240, covering the boundaries of the mold part 240 and the plate 230, and extending to the inner wall and the bottom of one side of the groove 237. In an example, since the mask M may be disposed such that one edge protrudes above the groove 237, a space formed by the width and depth of the groove 237 may be secured between the edge of the mask M and the bottom of the groove 237. After the step of forming the space, the edge of the mask M may be suspended over the trench 237, whereby the conductive layer 251 deposited on the mask M is not thickly connected to the conductive layer 250 disposed inside the trench 237 but weakly connected to the conductive layer 250 or formed to be disconnected.

Referring to fig. 11D, in a further step, the mask M may be removed. By removing the mask M after the deposition of the conductive layers 250 and 251 is completed, the conductive layer 251 deposited in the shield layer non-formation region NS can also be removed. At this time, the step secured by the groove 237 interrupts the connection between the conductive layer 251 on the mask M and the conductive layer 250 of the over-mold 240, so that the end of the conductive layer deposited on the board 230 can be prevented from being lifted when the mask M is removed.

Fig. 12 is a cross-sectional view of an example electronic device package according to a comparative example.

Referring to fig. 12, a comparative example is an example of an electronic device package 10 in which conductive layers 50 and 51 are formed on a board 30 without forming a trench. In the process of forming the partial shielding structure, a shielding layer non-formation region may be shielded by a mask, and the conductive layer may be formed by a sputtering process. At this time, the conductive layer 50 deposited on the board 30 and the conductive layer 51 deposited on the mask M may be thickly connected, so that when the mask M is removed, sputtering burrs may occur due to a lifting phenomenon of the conductive layer.

While the present disclosure includes specific examples, it will be apparent upon an understanding of the present disclosure that various changes in form and detail may be made to these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein are to be considered in a descriptive sense only and not for purposes of limitation. The description of features or aspects in each example will be understood to be applicable to similar features or aspects in other examples. Suitable results may be achieved if the described techniques are performed in a different order and/or if components in the described systems, architectures, devices, or circuits are combined in a different manner and/or replaced or supplemented by other components or their equivalents. Therefore, the scope of the present disclosure is defined not by the detailed description but by the claims and their equivalents, and all modifications within the scope of the claims and their equivalents are to be construed as being included in the present disclosure.