阅读说明：本技术 误比特率测试方法和装置 (Bit error rate testing method and device ) 是由 王学寰 张兴新 鲍鹏鑫 于 2021-01-08 设计创作，主要内容包括：本申请提供一种误比特率测试方法和装置。本申请误比特率测试方法,包括：测试装置向被测传输装置发送第一序列；被测传输装置接收第三序列,第三序列与测试装置发送的第一序列相对应；被测传输装置根据第三序列和第二序列获取第一BER；测试装置获取来自被测传输装置的第一BER；当第一BER大于或等于预设比特位比例时,测试装置向被测传输装置发送第二序列；被测传输装置接收第四序列,第四序列与测试装置发送的第二序列相对应；被测传输装置根据第四序列和第二序列获取第二BER,第二BER指示被测传输装置的BER。本申请可以适用于测试速率非对称的被测传输装置的BER。(The application provides a bit error rate testing method and device. The bit error rate testing method comprises the following steps: the test device sends a first sequence to a transmission device to be tested; the tested transmission device receives a third sequence, and the third sequence corresponds to the first sequence sent by the testing device; the tested transmission device obtains a first BER according to the third sequence and the second sequence; the testing device acquires a first BER from a tested transmission device; when the first BER is larger than or equal to the preset bit ratio, the testing device sends a second sequence to the tested transmission device; the tested transmission device receives a fourth sequence, and the fourth sequence corresponds to the second sequence sent by the test device; and the tested transmission device acquires a second BER according to the fourth sequence and the second sequence, and the second BER indicates the BER of the tested transmission device. The method and the device can be suitable for testing the BER of the transmission device to be tested with asymmetric rate.)

1. A bit error rate testing method, comprising:

transmitting a first sequence to a transmission device under test;

acquiring a first bit error rate BER from the tested transmission device;

when the first bit error rate BER is larger than or equal to a preset bit ratio, a second sequence is sent to the tested transmission device;

the values of the preset bits in the first sequence and the second sequence are different.

2. The method of claim 1, wherein prior to sending the first sequence to the transmission under test, further comprising:

acquiring the second sequence;

and acquiring the first sequence according to the second sequence.

3. The method of claim 2, wherein the obtaining the first sequence according to the second sequence comprises:

and changing the value of a preset bit in the second sequence to obtain the first sequence.

4. The method according to any of claims 1-3, wherein the predetermined bit corresponds to a predetermined bit fraction, and wherein the predetermined bit fraction is greater than a design target BER of the transmission device under test.

5. A bit error rate testing method, comprising:

receiving a third sequence, wherein the third sequence corresponds to the first sequence sent by the testing device;

acquiring a first bit error rate BER according to the third sequence and the second sequence;

receiving a fourth sequence, wherein the fourth sequence corresponds to the second sequence sent by the testing device;

and acquiring a second bit error rate BER according to the fourth sequence and the second sequence, wherein the second bit error rate BER indicates the BER of the tested transmission device.

6. The method of claim 5, wherein obtaining the first bit error rate BER according to the third sequence and the second sequence comprises:

comparing values of corresponding bits of the third sequence and the second sequence to obtain a first count value of bits of the third sequence with different values of the second sequence;

and calculating the ratio of the first count value to the total bit count value contained in the second sequence to obtain the first bit error rate BER.

7. The method according to claim 5 or 6, wherein the obtaining a second bit error rate BER according to the fourth sequence and the second sequence comprises:

comparing values of corresponding bits of the fourth sequence and the second sequence to obtain a second count value of bits of the fourth sequence with different values compared with the second sequence;

and calculating the ratio of the second counting value and the total bit counting value contained in the second sequence to obtain the second bit error rate BER.

8. A bit error rate testing method, comprising:

the test device sends a first sequence to a transmission device to be tested;

the tested transmission device obtains a first bit error rate BER according to a second sequence and a received third sequence, wherein the third sequence corresponds to the first sequence;

the testing device acquires the first bit error rate BER from the tested transmission device;

when the first bit error rate BER is larger than or equal to a preset bit ratio, the testing device sends a second sequence to the tested transmission device;

the tested transmission device obtains a second bit error rate BER according to the second sequence and a received fourth sequence, the second bit error rate BER indicates the BER of the tested transmission device, and the fourth sequence corresponds to the second sequence sent by the testing device;

the values of the preset bits in the first sequence and the second sequence are different.

9. The method of claim 8, wherein before the testing device sends the first sequence to the transmission device under test, further comprising:

the test device obtains the second sequence;

and the testing device acquires the first sequence according to the second sequence.

10. The method of claim 9, wherein the testing device obtaining the first sequence according to the second sequence comprises:

and the testing device changes the value of a preset bit in the second sequence to obtain the first sequence.

11. The method according to any of claims 8-10, wherein the predetermined bit corresponds to a predetermined bit fraction, and wherein the predetermined bit fraction is greater than a design target BER of the transmission device under test.

12. The method according to any of claims 8-11, wherein the obtaining, by the transmission device under test, the first bit error rate BER based on the second sequence and the received third sequence comprises:

the measured transmission device compares the values of the corresponding bits of the third sequence and the second sequence to obtain a first count value of the bits of the third sequence with different values compared with the second sequence;

the measured transmission device calculates the ratio of the first counting value and the total bit counting value contained in the second sequence to obtain the first bit error rate BER.

13. The method according to any of claims 8-12, wherein the obtaining, by the transmission device under test, a second bit error rate BER based on the second sequence and the received fourth sequence comprises:

the measured transmission device compares the values of the corresponding bits of the fourth sequence and the second sequence to obtain a second count value of the bits of the fourth sequence with different values compared with the second sequence;

and the tested transmission device calculates the ratio of the second counting value and the total bit counting value contained in the second sequence to obtain the second bit error rate BER.

14. A test apparatus, comprising:

the transmitting module is used for transmitting the first sequence to the transmission device to be tested;

the acquisition module is used for acquiring a first bit error rate BER from the transmission device to be tested;

the sending module is further configured to send a second sequence to the transmission device under test when the first bit error rate BER is greater than or equal to a preset bit ratio;

the values of the preset bits in the first sequence and the second sequence are different.

15. The testing device of claim 14, wherein the obtaining module is further configured to: acquiring the second sequence; and acquiring the first sequence according to the second sequence.

16. The testing device of claim 15, wherein the obtaining module is specifically configured to change values of preset bits in the second sequence to obtain the first sequence.

17. The test device according to any of claims 14-16, wherein the predetermined bit corresponds to a predetermined bit fraction, the predetermined bit fraction being larger than a design target BER of the transmission device under test.

18. A transmission device under test, comprising:

the receiving module is used for receiving a third sequence, and the third sequence corresponds to the first sequence sent by the testing device;

the acquisition module is used for acquiring a first bit error rate BER according to the third sequence and the second sequence;

the receiving module is further configured to receive a fourth sequence, where the fourth sequence corresponds to the second sequence sent by the testing apparatus;

the obtaining module is further configured to obtain a second bit error rate BER according to the fourth sequence and the second sequence, where the second bit error rate BER indicates a BER of the transmission device under test.

19. The measured transmission apparatus according to claim 18, wherein the obtaining module is specifically configured to compare values of bits corresponding to the third sequence and the second sequence to obtain a first count value of bits of the third sequence having a different value than that of the second sequence; and calculating the ratio of the first count value and the total count value of the bits contained in the second sequence to obtain the first BER.

20. The measured transmission apparatus according to claim 18 or 19, wherein the obtaining module is specifically configured to compare values of bits corresponding to the fourth sequence and the second sequence to obtain a second count value of bits of the fourth sequence having a different value than that of the second sequence; and calculating the ratio of the second counting value and the total bit counting value contained in the second sequence to obtain the second BER.

21. A bit error rate test system, comprising: a test device according to any of claims 14-17 and a transmission device under test according to any of claims 18-20.

22. An electronic device, comprising:

one or more processors;

a memory for storing one or more programs;

the one or more programs, when executed by the one or more processors, implement the method of any of claims 1-4.

23. A transmission chip, comprising:

one or more processors;

a memory for storing one or more programs;

the one or more programs, when executed by the one or more processors, implement the method of any of claims 5-7.

24. A computer-readable storage medium, having stored thereon a computer program which, when executed, implements the method of any one of claims 1-13.

25. A computer program, characterized in that it implements the method of any of claims 1-13 when executed by a computer.

Technical Field

The present application relates to communications technologies, and in particular, to a bit error rate testing method and apparatus.

Background

The transmission of data requires a transmission chip, and Bit Error Rate (BER) is an important index of the transmission chip, and the BER test can be performed on the transmission chip to verify whether the transmission chip reaches a set BER index.

In many communication systems, the rate of a transmission chip is asymmetric, that is, the uplink rate and the downlink rate are not equal, and the difference is large, for example, the uplink rate (that is, the output direction of image data shot by a camera) of a transmission chip in an on-vehicle high-definition camera usually reaches 1Gbps to 10Gbps, and the downlink rate usually only reaches 1Mbps to 100 Mbps.

However, at present, there is no BER test method suitable for a transmission chip with asymmetric rate.

Disclosure of Invention

The application provides a bit error rate testing method and a bit error rate testing device, which can be suitable for testing the BER of a tested transmission device with asymmetric rate.

In a first aspect, the present application provides a bit error rate testing method, including: transmitting a first sequence to a transmission device under test; acquiring a first bit error rate BER from a tested transmission device; when the first bit error rate BER is larger than or equal to the preset bit ratio, a second sequence is sent to the tested transmission device; the values of the preset bits in the first sequence and the second sequence are different.

The BER test method only uses the transmission channel from the test device to the tested transmission device direction, and can be suitable for testing the BER of the tested transmission device with asymmetric rate. In addition, according to the technical scheme of the application, whether the tested transmission device is trustable or not is firstly verified, the test sequence is sent to the tested transmission device under the condition that the tested transmission device is trustable, the tested transmission device calculates the actual BER of the tested transmission device, and the accuracy of the BER is ensured.

In a possible implementation manner, before sending the first sequence to the transmission device under test, the method further includes: acquiring a second sequence; the first sequence is obtained from the second sequence. Optionally, obtaining the first sequence according to the second sequence includes: and changing the value of the preset bit in the second sequence to obtain the first sequence.

For example, a second sequence is preset in the present application, where the second sequence includes a plurality of bits (bits), and each bit has a value of 0 or 1; the second sequence is pre-stored in the testing device, the second sequence is read from the memory, and then the value of the preset bit in the second sequence is changed to obtain the first sequence.

In one possible implementation, the predetermined bit corresponds to a predetermined ratio, and the predetermined bit ratio is greater than a design target BER of the transmission device under test.

For example, the predetermined bit corresponds to a predetermined bit ratio, and the testing apparatus may first calculate a product of the length of the second sequence and the predetermined bit ratio to obtain a count value of the bit whose value is to be changed, and then determine the predetermined bit based on the count value.

In a second aspect, the present application provides a bit error rate testing method, including: receiving a third sequence, wherein the third sequence corresponds to the first sequence sent by the testing device; acquiring a first bit error rate BER according to the third sequence and the second sequence; receiving a fourth sequence, wherein the fourth sequence corresponds to the second sequence sent by the testing device; and acquiring a second bit error rate BER according to the fourth sequence and the second sequence, wherein the second bit error rate BER indicates the BER of the tested transmission device.

The BER test method only uses the transmission channel from the test device to the tested transmission device, and can be suitable for testing the BER of the tested transmission device with asymmetric rate. In addition, according to the technical scheme of the application, the tested transmission device calculates the first BER based on the third sequence, the testing device verifies whether the tested transmission device is trustable based on the first BER, the tested device receives the fourth sequence under the condition that the tested transmission device is trustable, and the actual BER is calculated based on the fourth sequence, so that the accuracy of the BER is guaranteed.

In a possible implementation manner, obtaining the first bit error rate BER according to the third sequence and the second sequence includes: comparing the values of the corresponding bits of the third sequence and the second sequence to obtain a first count value of the bits of the third sequence with different values compared with the second sequence; and calculating the ratio of the first counting value to the total bit counting value contained in the second sequence to obtain the first BER.

In a possible implementation manner, obtaining a second BER of the fourth sequence according to the fourth sequence and the second sequence includes: comparing the values of the corresponding bits of the fourth sequence and the second sequence to obtain a second count value of the bits of the fourth sequence with different values compared with the second sequence; and calculating the ratio of the second counting value to the total counting value of the bits contained in the second sequence to obtain a second BER.

For example, regarding the calculation of BER, the measured transmission device may be obtained by the following two methods:

the first is that the measured transmission device adopts a pure software mode to compare the values of the corresponding bit positions of the fourth sequence and the second sequence to obtain how many bit positions with different values of the fourth sequence are compared with the second sequence, and then the second BER is obtained by calculation.

The second is that the tested transmission device adopts a mode of combining hardware and software, the values of corresponding bits of the fourth sequence and the second sequence are compared through a comparator, and when the fourth sequence and the second sequence are compared, a counter is added with 1 to obtain the number of bits with different values of the fourth sequence compared with the second sequence, and then the second BER is obtained through calculation.

In a third aspect, the present application provides a bit error rate testing method, including: the test device sends a first sequence to a transmission device to be tested; the tested transmission device obtains a first bit error rate BER according to the second sequence and a received third sequence, and the third sequence corresponds to the first sequence sent by the testing device; the testing device acquires a first BER from a tested transmission device; when the first BER is larger than or equal to the preset bit ratio, the testing device sends a second sequence to the tested transmission device; the tested transmission device obtains a second BER according to the second sequence and a received fourth sequence, the second BER indicates the BER of the tested transmission device, and the fourth sequence corresponds to the second sequence sent by the testing device; the values of the preset bits in the first sequence and the second sequence are different.

The BER test method only uses the transmission channel from the test device to the tested transmission device, and can be suitable for testing the BER of the tested transmission device with asymmetric rate. In addition, according to the technical scheme of the application, whether the tested transmission device is trustable or not is verified, the test sequence is sent to the tested transmission device under the condition that the tested transmission device is trustable, the tested transmission device calculates the actual BER of the tested transmission device, and the accuracy of the BER is guaranteed.

In a possible implementation manner, before the testing device sends the first sequence to the transmission device under test, the method further includes: the test device acquires a second sequence; the testing device obtains the first sequence according to the second sequence.

In a possible implementation manner, the obtaining, by the testing apparatus, the first sequence according to the second sequence includes: the testing device changes the value of the preset bit in the second sequence to obtain the first sequence.

In one possible implementation, the predetermined bit corresponds to a predetermined bit ratio, and the predetermined bit ratio is greater than a design target BER of the transmission device under test.

In a possible implementation manner, the acquiring, by the transmission device under test, the first bit error rate BER according to the second sequence and the received third sequence includes: the measured transmission device compares the values of the corresponding bits of the third sequence and the second sequence to obtain a first count value of the bits of the third sequence with different values compared with the second sequence; the measured transmission device calculates the ratio of the first counting value and the total bit counting value contained in the second sequence to obtain the first BER.

In a possible implementation manner, the acquiring, by the transmission device under test, the second BER according to the second sequence and the received fourth sequence includes: the measured transmission device compares the values of the corresponding bits of the fourth sequence and the second sequence to obtain a second count value of the bits of the fourth sequence with different values compared with the second sequence; the measured transmission device calculates the ratio of the second counting value and the total bit counting value contained in the second sequence to obtain a second BER.

In a fourth aspect, the present application provides a test apparatus comprising: the transmitting module is used for transmitting the first sequence to the transmission device to be tested; the acquisition module is used for acquiring a first bit error rate BER from a tested transmission device; the transmitting module is further used for transmitting a second sequence to the tested transmission device when the first BER is larger than or equal to the preset bit ratio; the values of the preset bits in the first sequence and the second sequence are different.

In a possible implementation manner, the obtaining module is further configured to obtain a second sequence; the first sequence is obtained from the second sequence.

In a possible implementation manner, the obtaining module is specifically configured to change a value of a preset bit in the second sequence to obtain the first sequence.

In one possible implementation, the predetermined bit corresponds to a predetermined bit ratio, and the predetermined bit ratio is greater than a design target BER of the transmission device under test.

In a fifth aspect, the present application provides a transmission device under test, comprising: the receiving module is used for receiving a third sequence, and the third sequence corresponds to the first sequence sent by the testing device; the acquisition module is used for acquiring a first bit error rate BER according to the third sequence and the second sequence; the receiving module is further used for receiving a fourth sequence, and the fourth sequence corresponds to the second sequence sent by the testing device; and the acquisition module is further used for acquiring a second BER according to the fourth sequence and the second sequence, wherein the second BER indicates the BER of the transmission device to be tested.

In a possible implementation manner, the obtaining module is specifically configured to compare values of bits corresponding to a third sequence and a second sequence to obtain a first count value of bits of the third sequence having a value different from that of the second sequence; and calculating the ratio of the first counting value and the total bit counting value contained in the second sequence to obtain a first BER.

In a possible implementation manner, the obtaining module is specifically configured to compare values of bits corresponding to the fourth sequence and the second sequence to obtain a second count value of bits of the fourth sequence having a value different from that of the second sequence; and calculating the ratio of the second counting value to the total bit counting value contained in the second sequence to obtain a second BER.

In a sixth aspect, the present application provides a bit error rate testing system, including: the test apparatus in the foregoing fourth aspect and possible implementations thereof and the transmission apparatus under test in the foregoing fifth aspect and possible implementations thereof.

In a seventh aspect, the present application provides an electronic device, comprising: one or more processors; a memory for storing one or more programs; the one or more programs, when executed by the one or more processors, implement the methods of the foregoing first aspect and possible implementations thereof.

In an eighth aspect, the present application provides a transmission chip, including: one or more processors; a memory for storing one or more programs; the one or more programs, when executed by the one or more processors, implement a method as in the foregoing second aspect and possible implementations thereof.

In a ninth aspect, the present application provides a computer readable storage medium having stored thereon a computer program which, when executed, implements the method of the aforementioned first, second, third and possible implementations thereof.

In a tenth aspect, the present application provides a computer program that, when executed by a computer, implements the method of the aforementioned first, second, third and possible implementations thereof.

Drawings

FIG. 1 is a schematic diagram of a loop test method;

FIG. 2 is a block diagram of an exemplary bit error rate testing system according to the present application;

FIG. 3 is a flowchart illustrating an exemplary bit error rate testing method according to the present application;

FIG. 4 is a block diagram of an exemplary transmission device under test according to the present application;

FIG. 5 is a block diagram of an exemplary transmission device under test according to the present application;

FIG. 6 is a schematic diagram of an exemplary configuration of a test device of the present application;

fig. 7 is a schematic structural diagram of an exemplary transmission device under test according to the present application.

Detailed Description

To make the purpose, technical solutions and advantages of the present application clearer, the technical solutions in the present application will be clearly and completely described below with reference to the drawings in the present application, and it is obvious that the described embodiments are some, but not all embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The terms "first," "second," and the like in the description examples and claims of this application and in the drawings are used for descriptive purposes only and are not to be construed as indicating or implying relative importance, nor order. Furthermore, the terms "comprises" and "comprising," as well as any variations thereof, are intended to cover a non-exclusive inclusion, such as a list of steps or elements. A method, system, article, or apparatus is not necessarily limited to those steps or elements explicitly listed, but may include other steps or elements not explicitly listed or inherent to such process, system, article, or apparatus.

It should be understood that in the present application, "at least one" means one or more, "a plurality" means two or more. "and/or" for describing an association relationship of associated objects, indicating that there may be three relationships, e.g., "a and/or B" may indicate: only A, only B and both A and B are present, wherein A and B may be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of single item(s) or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", wherein a, b, c may be single or plural.

FIG. 1 is a schematic diagram of a loop test method. As shown in fig. 1, the test equipment generates a random test sequence and then transmits it through a transmit port (TX). The receive port (RX) of the transmission chip under test receives the sequence and then sends it directly back to the test equipment through the transmit port (TX). The test equipment compares the transmitted test sequence with the received recovery sequence to calculate the BER.

However, the loop test method can only be used for testing the BER of a transmission chip with symmetric speed, for a transmission chip with asymmetric speed, the speed of the test equipment to the direction of the transmission chip to be tested is 10Gbps, the speed of the transmission chip to be tested to the direction of the test equipment is 100Mbps, after the test sequence generated by the test equipment is sent to the transmission chip to be tested, because the speed of sending back to the test equipment is much lower, the transmission chip to be tested needs a larger storage space, the test sequence is cached and then slowly sent back, and the increase of the storage space in the transmission chip to be tested is unacceptable, which causes larger cost waste, so the loop test method cannot be used for testing the BER of the transmission chip with asymmetric speed.

In order to test the BER of a transmission device with asymmetric rate, the application provides a bit error rate test method.

Fig. 2 is a schematic diagram of an exemplary bit error rate testing system according to the present application, and as shown in fig. 2, the system includes a testing apparatus 201 and a transmission apparatus 202 under test, and two unidirectional transmission channels are established between the testing apparatus 201 and the transmission apparatus 202 under test. Illustratively, the bandwidth of the transmission channel from the testing device 201 to the tested transmission device 202 is larger, and accordingly, the transmission rate is higher; the bandwidth of the transmission channel from the transmission device under test 202 to the test device 201 is smaller, and accordingly, the transmission rate is lower. It can be understood that, in the embodiment of the present application, there is no limitation on the relative relationship between the bandwidth and the transmission rate of the two transmission channels between the testing device 201 and the transmission device 202 under test.

In the present application, the test apparatus 201 may be an electronic device having a Transmission (TX) and a Reception (RX) function; the transmission device under test 202 may be a device with Transmission (TX) and Reception (RX) functions and asymmetric rate, such as a transmission chip, a transmission device (switch, router, etc.) or a transmission chip in a transmission device.

Fig. 3 is a flowchart illustrating an exemplary bit error rate testing method according to the present application, and as shown in fig. 3, a process 300 may be executed by the testing apparatus 201 and the transmission apparatus 202 under test together. Process 300 is described as a series of steps or operations, it being understood that process 300 may be performed in various orders and/or concurrently, and is not limited to the order of execution shown in FIG. 3.

Step 301a, the testing device sends a first sequence to the transmission device under test.

In the present application, a second sequence is preset, where the second sequence includes a plurality of bits (bits), and each bit has a value of 0 or 1. The second sequence is stored in the testing device and the transmission device to be tested in advance, and is solidified in the testing device and the transmission device to be tested for example when the testing device and the transmission device to be tested are shipped; alternatively, the second sequence is transmitted to the test device and the transmission device under test and stored, for example, before the test is started, through the input interfaces of the test device and the transmission device under test. It should be noted that, in the present application, the length of the second sequence (i.e., the count value of the included bits) is not specifically limited, and the value of each bit is also not specifically limited. The length and value of the second sequence are not changed in one test, but the second sequence can be set based on the transmission device under test in different tests, such as different transmission devices under test. It should be understood that the second sequence may be the same for different transmission devices under test, and is not particularly limited thereto.

In a possible implementation manner, the testing apparatus may first read the second sequence from the memory, and then change the values of the preset bits in the second sequence to obtain the first sequence. The preset bit corresponds to the preset bit proportion, and the testing device may first calculate a product of the length of the second sequence and the preset bit proportion to obtain a count value of the bit whose value is to be changed, and then determine the preset bit based on the count value. For example, if the second sequence includes 100 bits, and the predetermined bit ratio is 10%, 10 bits to be changed exist, and the testing apparatus may randomly select 10 bits from the 100 bits of the second sequence, and change the value of the 10 bits, that is, if the original value of the bit is 0, the bit becomes 1, and if the original value of the bit is 1, the bit becomes 0. For another example, if the second sequence includes 10000 bits, and the predetermined bit ratio is 20%, 2000 bits need to be changed, and the testing apparatus may randomly select 2000 bits from the 10000 bits of the second sequence to change the value of the 2000 bits. Optionally, the value range of the preset bit ratio may be greater than the design target BER of the transmission device to be tested, for example, the design target BER of the transmission device to be tested is 10e-12, the preset bit ratio should be greater than 10e-12, for example, the preset bit ratio is 10e-11, 10e-9, and the like. Therefore, the first sequence is obtained from the second sequence, and the value of the preset bit of the first sequence is different from that of the second sequence, and the preset bit ratio corresponding to the preset bit indicates the bit error rate of the first sequence compared with the second sequence. For example, the first sequence has a different value of 10% of the bits compared to the second sequence; alternatively, the first sequence has a different value of 20% of the bits compared to the second sequence.

Step 301b, the transmission device under test receives a third sequence, where the third sequence corresponds to the first sequence sent by the testing device.

The test device sends out the first sequence, and the sequence received by the transmission device under test is the third sequence through the transmission channel of the test device to the transmission device under test, so that the third sequence corresponds to the first sequence.

The third sequence and the first sequence may not be identical, which is related to the stability of the transmission channel of the test device to the transmission device under test. When the first sequence is transmitted on the transmission channel from the testing device to the transmission device under test, the first sequence may be interfered to cause the sequence to change, and therefore the sequence received by the transmission device under test may not be the original first sequence, which is referred to as a third sequence in this application.

And step 302, the tested transmission device obtains a first BER according to the third sequence and the second sequence.

The measured transmission device may compare the values of the bits corresponding to the third sequence and the second sequence to obtain a first count value of the bits of the third sequence having a value different from that of the second sequence, and then calculate a ratio of the first count value to a total count value of the bits included in the second sequence, where the ratio is the first BER.

The second sequence is an original test sequence in this application, and the second sequence has been acquired in advance by the transmission device under test. After receiving the third sequence, the measured transmission device compares the third sequence with the second sequence to obtain a bit error rate based on the second sequence, i.e. a first BER.

Regarding the calculation of BER, the measured transmission device can be obtained by the following two methods:

the first is that the transmission device under test adopts a pure software manner to compare the values of the corresponding bits of the third sequence and the second sequence, and obtain how many bits with different values of the third sequence compared with the second sequence, for example, n (a first count value) bits, and assume that the second sequence includes L bits, so that the first BER is n/L.

The second is that the transmission device under test adopts a mode of combining hardware and software, the values of the corresponding bits of the third sequence and the second sequence are compared through a comparator, and each time the third sequence and the second sequence are compared has a bit with a different value, a counter is added by 1, so that how many bits with different values are obtained compared with the second sequence in the third sequence, for example, n bits (a first count value) are provided, and it is assumed that the second sequence contains L bits, so that the first BER is n/L.

Step 303, the testing device obtains the first BER.

After the measured transmission device calculates the first BER, the first BER may be stored in a register.

The test device may read the first BER from a register of the transmission device under test through a bus with the transmission device under test. Alternatively, the testing device may obtain the first BER from the transmission device under test through a third-party storage medium. The method for obtaining the first BER by the testing device is not particularly limited in the present application.

And step 304a, when the first BER is larger than or equal to the preset bit proportion, the testing device sends a second sequence to the tested transmission device.

After the testing device obtains the first BER, the first BER is compared with a preset bit ratio, and the purpose of the comparison is to verify whether the tested transmission device is trusted. In the application, the measured transmission device already acquires the second sequence in advance, and the BER of the measured transmission device can be known to be calculated by the measured transmission device according to the subsequent steps, so that a manufacturer of the measured transmission device can modify the received sequence based on the second sequence, and further, the probability of cheating BER can be given.

In the present application, only the testing device obtains the preset bit ratio in advance, and the transmission device under test cannot obtain the preset bit ratio, so that the transmission device under test cannot falsify the first BER obtained by calculation. If the first BER is equal to the predetermined bit ratio, it indicates that the bit error rate of the third sequence received by the transmission device under test compared with the second sequence is equal to the bit error rate of the first sequence sent by the test device compared with the second sequence, which is equivalent to that the transmission channel does not affect the transmitted sequence; if the first BER is greater than the predetermined bit ratio, it indicates that the bit error rate of the third sequence compared to the second sequence received by the transmission device under test is greater than the bit error rate of the first sequence compared to the second sequence sent by the test device, and the excess bit error rate may be caused by the transmission channel. Both of the above two cases are practical. If the first BER is smaller than the predetermined bit ratio, it indicates that the bit error rate of the third sequence received by the transmission device under test compared with the second sequence is smaller than the bit error rate of the first sequence sent by the testing device compared with the second sequence, which is not consistent with the actual situation. Therefore, once the testing device detects that the first BER is smaller than the preset bit ratio, it can determine that the transmission device under test is untrustworthy and does not perform the subsequent steps.

The testing device may determine that the transmission device under test is authentic when detecting that the first BER is greater than or equal to the predetermined bit ratio, and the testing device transmits the second sequence to the transmission device under test.

Step 304b, the transmission device under test receives the fourth sequence, and the fourth sequence corresponds to the second sequence sent by the testing device.

The test device sends out the second sequence, and the sequence received by the transmission device under test is the fourth sequence through the transmission channel of the test device to the transmission device under test, so that the fourth sequence corresponds to the second sequence.

The fourth sequence and the second sequence may not be identical, which is related to the stability of the transmission channel of the test device to the transmission device under test. When the second sequence is transmitted on the transmission channel from the testing apparatus to the transmission apparatus to be tested, the second sequence may be interfered to cause the sequence to change, and therefore the sequence received by the transmission apparatus to be tested may not be the original second sequence, which is referred to as a fourth sequence in this application.

And 305, acquiring a second BER by the transmission device to be tested according to the fourth sequence and the second sequence, wherein the second BER indicates the BER of the transmission device to be tested.

The measured transmission device may compare the values of the corresponding bits of the fourth sequence with the values of the corresponding bits of the second sequence to obtain a second count value of the bits of the fourth sequence having a different value from the second sequence, and then calculate a ratio of the second count value to a total count value of the bits included in the second sequence, where the ratio is a second BER.

The second sequence is an original test sequence in this application, and the second sequence has been acquired in advance by the transmission device under test. After receiving the fourth sequence, the transmission device under test compares the fourth sequence with the second sequence to obtain a bit error rate based on the second sequence, i.e. a second BER.

Regarding the calculation of BER, the measured transmission device can be obtained by the following two methods:

the first is that the transmission device under test adopts a pure software manner to compare the values of the corresponding bits of the fourth sequence and the second sequence, and obtain how many bits with different values of the fourth sequence compared with the second sequence, for example, m bits (a second count value) are provided, and it is assumed that the second sequence includes L bits, so that the second BER is m/L.

The second is that the transmission device under test adopts a mode of combining hardware and software, the values of the corresponding bits of the fourth sequence and the second sequence are compared through a comparator, and each time the fourth sequence and the second sequence are compared, a bit with a different value is added to a counter by 1, so that how many bits with different values are obtained in the fourth sequence compared with the second sequence, for example, m bits (a second count value) are provided, and it is assumed that the second sequence contains L bits, so that the second BER is m/L.

Therefore, the BER testing method only uses the transmission channel from the testing device to the tested transmission device, and can be suitable for testing the BER of the tested transmission device with asymmetric rate. According to the technical scheme of the embodiment of the application, whether the tested transmission device is trustable or not is verified, the test sequence is sent to the tested transmission device under the condition that the tested transmission device is trustable, the tested transmission device calculates the actual BER of the tested transmission device, and the accuracy of the BER is guaranteed.

Fig. 4 is a schematic diagram of an exemplary transmission device under test according to the present application, and as shown in fig. 4, the transmission device under test may be a device with Transmit (TX) and Receive (RX) functions and asymmetric rates, such as a transmission chip, a transmission device (switch, router, etc.), or a transmission chip in a transmission device. The transmission device under test may include: a receiving port 401, a processor 402 and a register 403, wherein the receiving port 401 is connected with the processor 402, and the processor 402 is connected with the register 403.

In one possible implementation, the receiving port 401 is configured to receive a third sequence, where the third sequence corresponds to the first sequence sent by the testing apparatus; a processor 402 configured to obtain a first bit error rate BER according to the third sequence and the second sequence; a processor 402 configured to store the first BER in a register 403; a receiving port 401 configured to receive a fourth sequence, the fourth sequence corresponding to the second sequence transmitted by the testing apparatus; and the processor 402 is configured to obtain a second BER according to the fourth sequence and the second sequence, wherein the second BER indicates the BER of the transmission device to be tested.

The transmission device under test shown in fig. 4 may be used to implement the first method for calculating BER in step 302 or step 305 described above.

Fig. 5 is a schematic diagram of an exemplary structure of a transmission device under test according to the present application, and as shown in fig. 5, on the basis of the structure shown in fig. 4, the transmission device under test further includes: a comparator 501 and a counter 502; the comparator 501 is connected with the counter 502; a comparator 501 and a counter 502 are connected between the receiving port 401 and the processor 402.

In one possible implementation, the receiving port 401 is configured to receive a third sequence, where the third sequence corresponds to the first sequence sent by the testing apparatus; a comparator 501 configured to compare values of bits corresponding to the third sequence and the second sequence; a counter 502 configured to count a comparison result of the comparator to obtain a first count value of bits of the third sequence having a different value than the second sequence; a processor 402 configured to calculate a ratio of the first count value to a total count value of bits included in the second sequence, where the ratio is a first BER; a processor 402 configured to store the first BER in a register 403; a receiving port 401 configured to receive a fourth sequence, the fourth sequence corresponding to the second sequence transmitted by the testing apparatus; a comparator 501 configured to compare values of bits corresponding to the fourth sequence and the second sequence; a counter 502 configured to count a comparison result of the comparator to obtain a second count value of bits of which the fourth sequence has a different value than the second sequence; the processor 402 is configured to calculate a ratio of the second count value to a total count value of bits included in the second sequence, which is a second BER, and the second BER indicates the BER of the transmission device under test.

The measured transmission apparatus shown in fig. 5 can be used to implement the second method for calculating BER in step 302 or step 305 described above.

Fig. 6 is a schematic structural diagram of an exemplary test apparatus 600 of the present application, and as shown in fig. 6, the test apparatus 600 of the present embodiment may be the test apparatus in the above embodiment, where the test apparatus 600 includes: a sending module 601 and an obtaining module 602, wherein,

a sending module 601, configured to send a first sequence to a transmission device under test; an obtaining module 602, configured to obtain a first bit error rate BER from the transmission device under test; the sending module 601 is further configured to send a second sequence to the transmission device under test when the first BER is greater than or equal to a preset bit ratio; the values of the preset bits in the first sequence and the second sequence are different.

In a possible implementation manner, the obtaining module 602 is further configured to obtain the second sequence; and acquiring the first sequence according to the second sequence.

In a possible implementation manner, the obtaining module 602 is specifically configured to change a value of a preset bit in the second sequence to obtain the first sequence.

In a possible implementation manner, the preset bit corresponds to a preset bit proportion, and the preset bit proportion is greater than a design target BER of the transmission device under test.

The testing apparatus 600 of this embodiment may be used to implement the technical solution of the method embodiment shown in fig. 3, and the implementation principle and the technical effect are similar, which are not described herein again.

Fig. 7 is a schematic structural diagram of an exemplary transmission device under test 700 according to the present application, and as shown in fig. 7, the transmission device under test 700 according to this embodiment may be the transmission device under test in the foregoing embodiment, where the transmission device under test 700 includes: a receiving module 701 and an obtaining module 702, wherein,

a receiving module 701, configured to receive a third sequence, where the third sequence corresponds to the first sequence sent by the testing apparatus; an obtaining module 702, configured to obtain a first bit error rate BER according to the third sequence and the second sequence; the receiving module 701 is further configured to receive a fourth sequence, where the fourth sequence corresponds to the second sequence sent by the testing apparatus; the obtaining module 702 is further configured to obtain a second BER according to the fourth sequence and the second sequence, where the second BER indicates a BER of the transmission device under test.

In a possible implementation manner, the obtaining module 702 is specifically configured to compare values of bits corresponding to the third sequence and the second sequence to obtain a first count value of bits of the third sequence having a value different from that of the second sequence; and calculating the ratio of the first count value to the total count value of the bits contained in the second sequence, wherein the ratio is the first BER.

In a possible implementation manner, the obtaining module 702 is specifically configured to compare values of bits corresponding to the fourth sequence and the second sequence to obtain a second count value of bits of the fourth sequence having a value different from that of the second sequence; and calculating the ratio of the second count value to the total count value of the bits contained in the second sequence, wherein the ratio is the second BER.

The transmission device under test 700 of this embodiment may be used to implement the technical solution of the method embodiment shown in fig. 3, and the implementation principle and the technical effect are similar, which are not described herein again.

In implementation, the steps of the above method embodiments may be performed by integrated logic circuits of hardware in a processor or instructions in the form of software. The processor may be a general purpose processor, a Digital Signal Processor (DSP), an application-specific integrated circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, or discrete hardware components. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in the embodiments of the present application may be directly implemented by a hardware encoding processor, or implemented by a combination of hardware and software modules in the encoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in a memory, and a processor reads information in the memory and completes the steps of the method in combination with hardware of the processor.

The memory referred to in the various embodiments above may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory may be a read-only memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an electrically Erasable EPROM (EEPROM), or a flash memory. Volatile memory can be Random Access Memory (RAM), which acts as external cache memory. By way of example, but not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), double data rate SDRAM, enhanced SDRAM, SLDRAM, Synchronous Link DRAM (SLDRAM), and direct rambus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to comprise, without being limited to, these and any other suitable types of memory.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (personal computer, server, network device, or the like) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.