阅读说明：本技术 一种高多层板背钻孔层间深度测试结构及方法 (Depth test structure and method for back drilling hole layer of high-rise multilayer board ) 是由 龚磊 吴云鹏 于 2020-11-17 设计创作，主要内容包括：本发明提供一种高多层板背钻孔层间深度测试结构及方法,该测试结构包括：至少一条高度与目标层高度齐平的第一测试线条；以及在电性能需求层一侧与目标层相邻的第一邻接层齐平的第二测试线条。本发明通过设置测试线条,通过测试线条的通断来对钻孔深度进行测试,从而实现对对背钻深度的准确控制。(The invention provides a depth test structure and a method between back drilling holes of a high-rise multilayer board, wherein the test structure comprises the following steps: at least one first test line with the height being flush with the height of the target layer; and a second test line flush with the first adjacent layer adjacent to the target layer on one side of the electrical performance requiring layer. According to the invention, the drilling depth is tested by setting the test line and switching on/off the test line, so that the back drilling depth is accurately controlled.)

1. The utility model provides a degree of depth test structure between high multiply wood back of body drilling layer which characterized in that: the test structure includes:

at least one first test line with the height being flush with the height of the target layer; and

and a second test line flush with the first adjacent layer adjacent to the target layer on one side of the electrical performance requirement layer.

2. The high multi-layer board back-drilled hole interlayer depth test structure of claim 1, wherein: the first test line and the second test line are conductive wires, and detection points are respectively arranged at two ends of the first test line and the second test line.

3. The high multi-layer board back-drilled hole interlayer depth test structure of claim 1, wherein: the first test line and the second test line are arranged in a crossed mode, and a test hole is formed in the crossed position of the first test line and the second test line.

4. The high multi-layer board back-drilled hole interlayer depth test structure of claim 1, 2 or 3, wherein: and a third test line is arranged on one side of the non-electrical property requirement layer and is flush with the adjacent second adjacent layer of the target layer.

5. The high multi-layer board back-drilled hole interlayer depth test structure of claim 4, wherein: the third test line is respectively crossed with the first test line and the second test line and is crossed at one point.

6. The method for testing the interlayer depth of the back-drilled hole of the high-rise multilayer board according to claim 5, wherein the method comprises the following steps: the third test line is a conductive wire, and two ends of the third test line are respectively provided with a detection point.

7. A depth test method between back drilling layers of a high-rise multilayer board is characterized by comprising the following steps: the method comprises the following steps:

providing a test structure according to any one of claims 1 to 6 in a non-working area of a tall multilayer board, at which test structure the drilling depth is tested.

8. The method for testing the interlayer depth of the back-drilled hole of the high multi-layer board according to claim 7, wherein: the method of testing the depth of the borehole at the test structure comprises:

and drilling from the surface layer corresponding to the intersection point of the first test line and the second test line until the first test line is drilled off, wherein the second test line is communicated.

9. The method for testing the interlayer depth of the back-drilled hole of the high multi-layer board according to claim 8, wherein: the first test line and the second test line are conductive wires, detection points are arranged at two ends of the first test line and the second test line respectively, and whether the first test line and the second test line are drilled off or not is judged by measuring the conductivity of the first test line and the second test line.

10. The method for testing the interlayer depth of the back-drilled hole of the high multi-layer board according to claim 8, wherein: and arranging a third test line to enable the third test line to be flush with the adjacent second adjacent layer of the target layer on one side of the non-electrical property requirement layer, and adjusting the drilling depth through the third test line.

Technical Field

The invention relates to the technical field of circuit boards, in particular to a structure and a method for testing interlayer depth of a back drilling hole of a high-rise multilayer board.

Background

Along with the continuous progress of modern communication technology, the PCB is continuously developed towards the directions of high multi-layer, high thickness and large size, namely, towards the high multi-layer circuit board, the high multi-layer circuit board needs to realize mutual conduction among different layers in order to transmit signals at high speed and meet the problems of impedance matching and the like, and the high multi-layer board cannot be used for manufacturing metallized blind holes by a method of laser blind holes and electroplating filling holes due to thick board thickness, however, with the progress of the numerical control drilling machine technology, the back drilling process capable of controlling the depth can well meet the requirement. Backdrilling refers to the process of removing a copper layer from the wall of a hole at one end of a metallized through hole with a drill to make one end of the wall of the through hole free of copper and the other end of the wall of the through hole have copper, and is called backdrilling. Because the common drilling machine takes the table top as a zero point, controls the drilling depth by setting the height Z value between the tool tip of the drill bit and the table top, and does not have the depth control function of drilling from the plate surface, the requirement of drilling to a specified target layer is difficult to accurately control, and the depth after drilling cannot be directly observed because the back drilling hole is not through drilled, and the back drilling hole and the position between the back drilling hole and the target layer can only be detected in a mode that a PCB (printed circuit board) is damaged by slicing.

Disclosure of Invention

In view of this, the invention provides a structure and a method for testing the depth between back drilling layers of a high-rise multilayer board, which test the drilling depth by arranging a first test line and a second test line, thereby realizing accurate control of the back drilling depth.

In order to solve the technical problems, the invention adopts the technical scheme that: the utility model provides a high multiply wood back drilling interlaminar degree of depth test structure, this test structure includes:

at least one first test line with the height being flush with the height of the target layer; and

and a second test line flush with the first adjacent layer adjacent to the target layer on one side of the electrical performance requirement layer.

Preferably, the first test line and the second test line are conductive wires, and two ends of the first test line and the second test line are respectively provided with a detection point.

Preferably, the first test line and the second test line are arranged in a crossed manner, and a test hole is formed at the crossed position of the first test line and the second test line.

Preferably, a third test line is arranged on one side of the non-electrical performance requirement layer and is flush with the adjacent second adjacent layer of the target layer.

Preferably, the third test line is respectively crossed with the first test line and the second test line, and is crossed at a point.

Preferably, the third test line is a conductive line, and the two ends are respectively provided with a detection point.

A method for testing interlayer depth of a back drilling hole of a high-rise multilayer board comprises the following steps:

and arranging a test structure at the non-working area of the high multilayer board, and testing the drilling depth at the test structure.

Preferably, the method of testing the depth of the borehole at the test structure comprises:

and drilling from the surface layer corresponding to the intersection point of the first test line and the second test line until the first test line is drilled off, wherein the second test line is communicated.

Preferably, the first test line and the second test line are conductive wires, and detection points are respectively arranged at two ends of the first test line and the second test line, so that whether the first test line and the second test line are drilled or not is judged by measuring the conductivity of the first test line and the second test line.

Preferably, a third test line is provided flush with the adjacent second adjacent layer of the target layer on the side of the non-electrical requiring layer, and the depth of the drilled hole is adjusted by the third test line.

The invention has the advantages and positive effects that: according to the invention, the drilling depth is tested by setting the test line and switching on/off the test line, so that the back drilling depth is accurately controlled.

Drawings

FIG. 1 is a schematic diagram of the structure of a high multi-layer board of the present invention;

FIG. 2 is a schematic diagram of the structure of the test structure of the present invention;

FIG. 3 is a schematic perspective view of a first test line and a second test line according to the present invention;

fig. 4 is a schematic top view of the first, second and third test lines according to the present invention.

Detailed Description

For a better understanding of the present invention, reference is made to the following detailed description and accompanying drawings that illustrate the invention.

The invention provides a depth test structure between back drilling holes of a high multi-layer board, which comprises:

at least one first test line with the height being flush with the height of the target layer; and

a second test line flush with the first adjacent layer adjacent to the target layer on one side of the electrical property requirement layer;

the first test lines and the second test lines are arranged in a crossed mode.

As shown in fig. 1, in a specific embodiment of the present invention, a high multi-layer board 10 includes a plurality of metal layers 101 and a metal hole 102, wherein a copper layer 103 is formed on the wall of the metal hole 102 during a copper deposition process; a part of the copper layer 103 is used for realizing the conduction between the metal layers 101, and the part needs to be reserved and is called an electrical property requirement layer; a part of the copper layer 103 does not have the function of conducting between the metal layers 101, and is equivalent to a copper pillar antenna, which causes loss and interference to the transmission of high-frequency signals, and needs to be drilled away in a back drilling manner, the part needing to be drilled away is called a non-electrical property requirement layer, and the last layer needing to be drilled away in the non-electrical property requirement layer is called a target layer.

Specifically, in this embodiment, the high-definition multilayer board 10 includes 12 metal layers 101, specifically L1 to L12, the electrical property requiring layer of the high-definition multilayer board 10 is the L1 to L6 layer, the non-electrical property requiring layer is the L7 to L12 layer, and the target layer is the L7 layer; during drilling, a non-electrical property requirement layer outside the electrical property requirement layer is drilled, namely, the layer L7-L12 of hole wall copper is drilled from the bottom L12 surface, and the layer L1-L6 of hole wall copper is reserved.

As shown in fig. 2 to 4, the test lines 20 are arranged in the non-working area of the high-rise multilayer board 10, the depth of the drilled hole is tested by switching on and off the test lines 20, and formal drilling is performed after the test is qualified; specifically, a first test line 201 is disposed flush with a target layer, and a second test line 202 is disposed flush with an adjacent first adjoining layer of the target layer on the electrical property requiring layer side.

In this embodiment, the target layer is the 7 th layer, the first adjacent layer adjacent to the target layer on the electrical property requirement layer side is the 6 th layer, the first test line 201 is flush with the target layer, i.e., the 7 th layer, and the second test line 202 is flush with the first adjacent layer, i.e., the 6 th layer; in a specific working process, drilling is carried out from the bottom surface, the Z value depth of drilling equipment is adjusted according to the thickness of an interlayer medium, a line of a target layer, namely a 7 th layer, needs to be drilled off, and a line of a first adjacent layer, namely a 6 th layer, cannot be drilled, namely the test is qualified.

In the specific process of testing, the drilling is carried out from the surface layer on one side of the non-electrical property requirement layer, namely the L12 layer, the depth of the Z value of the drilling equipment is adjusted according to the thickness of the interlayer medium, the drilling is carried out until the first test line is drilled off, the second test line is communicated, and the depth of the drilled hole is tested by judging the connection and disconnection of the first test line and the second test line.

Further, in a specific embodiment of the present invention, in order to complete the testing process at one time, the first testing line and the second testing line are arranged in an intersecting manner, and during the drilling process, only the drill needs to be drilled from the intersection of the first testing line and the second testing line, so that the alignment of the first testing line and the second testing line can be achieved.

Further, a testing hole 203 is formed at the intersection of the first testing line 201 and the second testing line 202, the testing hole 203 is a through hole, in a preferred embodiment, the intersection of the first testing line 201 and the second testing line 202 is located at the axis of the through hole, and when testing is required, only the drilling from the testing hole 203 is needed.

Furthermore, in order to conveniently judge the on/off of the first test line and the second test line, the first test line and the second test line may adopt a conductive wire (e.g., a metal wire, etc.) and a light-transmitting wire (e.g., an optical fiber, etc.), when the first test line and the second test line adopt a light-transmitting wire, whether the first test line and the second test line transmit light may be used to judge the on/off of the first test line and the second test line, and when the first test line and the second test line adopt a conductive wire, whether the first test line and the second test line are energized may be used to judge the on/off of the first test line and the second test line; in one embodiment of the present invention, the first test line and the second test line are conductive copper lines for convenience of processing.

Due to the adoption of the copper wire, the forming process is the same as the processing process of each metal layer of the high-rise multilayer board, and the test wire is formed while each metal layer of the high-rise multilayer board is formed, namely, the processing can be realized together with each metal layer of the high-rise multilayer board, for example, the first test wire is formed while the target layer is formed.

Further, in an embodiment of the present invention, the detecting points 205 are respectively disposed at two ends of the first testing line 201 and the second testing line 202, the detecting points 205 are electrically connected to the remaining first testing line 201 and the remaining second testing line 202, and the detecting points 205 are exposed outside the high-density multilayer board 10, so that the conductivity of the first testing line 201 and the second testing line 202 can be measured by a simple tool, such as a multimeter.

In a specific embodiment of the present invention, the detecting points 205 are pillars, and the pillars detecting points 205 penetrate through the height of the high multi-layer board 10 and are exposed on the upper surface layer and/or the lower surface layer of the high multi-layer board 10.

Further, in a specific embodiment of the present invention, a third test line 206 is further disposed, and the third test line is flush with the adjacent second adjacent layer of the target layer on the side of the non-electrical property requiring layer; the third test line 206 is disposed to intersect the first test line 201 and the second test line 202, and intersects at a point.

In this embodiment, a third test line 206 is provided, the third test line 206 is provided on one side of the non-electrical property requiring layer and is flush with the adjacent second adjacent layer, i.e., the L8 layer, in the back drilling process, the third test line 306, i.e., the L8 layer, is drilled first, and when the third test line 306 is drilled, the drilling depth can be adjusted again according to the thickness of the medium between the metal layers, so as to avoid the situation that the second test line 202 is drilled due to too deep drilling depth, or the drilling depth is too shallow, and the first test line 201 is not drilled.

Similarly, the third test line 206 is a conductive line, and two ends of the third test line are respectively provided with a detection point.

The second invention of the invention provides a method for testing interlayer depth of a back drilling hole of a high-rise multilayer board, which comprises the following steps: the test structure is arranged in a non-working area of the high multi-layer board, and the drilling depth is tested at the test structure.

Further, a method of testing a depth of a borehole at the test structure includes:

and drilling from the surface layer corresponding to the intersection point of the first test line and the second test line until the first test line is drilled off, wherein the second test line is communicated.

The first test line and the second test line are conductive wires, detection points are arranged at two ends of the first test line and the second test line respectively, and whether the first test line and the second test line are drilled off or not is judged by measuring the conductivity of the first test line and the second test line.

And further, arranging a third test line to enable the third test line to be flush with the adjacent second adjacent layer of the target layer on one side of the non-electrical property requirement layer, and adjusting the drilling depth through the third test line.

The embodiments of the present invention have been described in detail, but the description is only for the preferred embodiments of the present invention and should not be construed as limiting the scope of the present invention. All equivalent changes and modifications made within the scope of the present invention should be covered by the present patent.