Method and device structure for improving threshold voltage consistency of normally-off GaN HEMT
阅读说明：本技术 提高常关型GaN HEMT阈值电压一致性的方法及器件结构 (Method and device structure for improving threshold voltage consistency of normally-off GaN HEMT ) 是由 赵伟 魏敬和 刘国柱 聂晓飞 魏应强 于宗光 于 2020-12-24 设计创作，主要内容包括：本发明公开一种提高常关型GaN HEMT阈值电压一致性的方法及器件结构,属于半导体器件及制造领域。提供Si衬底,在Si衬底的表面依次形成Al-xGa-(1-x)N缓冲层、GaN沟道层、Al-yGa-(1-y)N势垒层、Al-zGa-(1-z)N中和层；刻蚀Al-zGa-(1-z)N中和层,形成用于制作栅极的凹槽；在Al-zGa-(1-z)N中和层的表面分别形成源极、栅极和漏极。Al-zGa-(1-z)N中和层产生的极化电荷可以中和Al-xGa-(1-x)N缓冲层产生的极化电荷,使常关型GaN HEMT器件的阈值电压对栅极下方区域的AlGaN厚度变化不敏感,从而提高常关型GaN HEMT器件阈值电压的一致性,降低了工艺流程中对于凹槽刻蚀深度控制的要求。(The invention discloses a method and a device structure for improving the threshold voltage consistency of a normally-off GaN HEMT, and belongs to the field of semiconductor devices and manufacturing. Providing a Si substrate, and sequentially forming Al on the surface of the Si substrate x Ga 1‑x N buffer layer, GaN channel layer, and Al y Ga 1‑y N barrier layer and Al z Ga 1‑z N neutralizing layer; etching of Al z Ga 1‑z N neutralizing layer, forming groove for making grid; in Al z Ga 1‑z And forming a source electrode, a grid electrode and a drain electrode on the surface of the N neutralization layer respectively. Al (Al) z Ga 1‑z The polarization charges generated by the N neutralizing layer can neutralize Al x Ga 1‑x The polarization charges generated by the N buffer layer make the threshold voltage of the normally-off GaN HEMT device insensitive to the AlGaN thickness variation in the region below the gridTherefore, the consistency of the threshold voltage of the normally-off GaN HEMT device is improved, and the requirement on groove etching depth control in the process flow is lowered.)
1. A method for improving the threshold voltage consistency of a normally-off GaN HEMT is characterized by comprising the following steps:
providing a Si substrate, and sequentially forming Al on the surface of the Si substratexGa1-xN buffer layer, GaN channel layer, and AlyGa1-yN barrier layer and AlzGa1-zN neutralizing layer;
etching the AlzGa1-zN neutralizing layer, forming groove for making grid;
in the AlzGa1-zAnd forming a source electrode, a grid electrode and a drain electrode on the surface of the N neutralization layer respectively.
2. The method of improving the threshold voltage uniformity of a normally-off GaN HEMT of claim 1, wherein said Al isxGa1-xN buffer layer, the GaN channel layer, and the AlyGa1-yN barrier layer and the AlzGa1-zThe N neutralization layers are grown and formed through an MOCVD process.
3. The method of improving the threshold voltage uniformity of a normally-off GaN HEMT of claim 1, wherein said Al isxGa1-xN buffer layer and the AlzGa1-zThe component ratio of Al in the N neutralization layer is | x-z-<0.02, wherein the value range of x is 0.05-0.12.
4. The method of improving the threshold voltage uniformity of a normally-off GaN HEMT of claim 1, wherein said Al isyGa1-yThe Al component ratio y in the N barrier layer is in the range of 0.15 to 0.35.
5. The method of improving the threshold voltage uniformity of a normally-off GaN HEMT of claim 1, wherein said Al isyGa1-yThe thickness of the N barrier layer is 10nm to 50 nm.
6. The method of improving the threshold voltage uniformity of a normally-off GaN HEMT of claim 1, wherein said method is further characterized in thatThe groove is formed on the Al through an ICP (inductively coupled plasma) etching methodzGa1-zAnd forming the surface of the N neutralization layer.
7. The method of claim 1 for improving the threshold voltage uniformity of normally-off GaN HEMTs in which metal magnetron sputtering is used on the AlxGa1-xAnd forming a source electrode, a grid electrode and a drain electrode on the surface of the N neutralization layer.
8. The method of improving the threshold voltage uniformity of a normally-off GaN HEMT of claim 6, wherein said gate covers said recess.
9. A normally-off GaNHEMT device structure is characterized by comprising a Si substrate and AlxGa1-xN buffer layer, GaN channel layer, and AlyGa1-yN barrier layer and AlzGa1-zThe N neutralizing layer, the source electrode, the grid electrode and the drain electrode;
the Al isxGa1-xN buffer layer, the GaN channel layer, and the AlyGa1-yN barrier layer and AlzGa1-zN neutralizing layers are sequentially deposited on the surface of the Si substrate;
the source electrode, the grid electrode and the drain electrode are positioned on the AlzGa1-zN neutralizes the surface of the layer.
10. The normally-off GaN HEMT device structure of claim 9, wherein said Al iszGa1-zAnd a groove is etched on the surface of the N neutralizing layer, and the grid electrode covers the groove.
11. The normally-off GaN HEMT device structure of claim 10, wherein said source and said drain are located on either side of said gate.
Technical Field
The invention relates to the technical field of semiconductor devices and manufacturing, in particular to a method and a device structure for improving the threshold voltage consistency of a normally-off GaN HEMT.
Background
GaN has excellent physical properties, and is typically used in applications such as high temperature, high frequency, and high voltage as one of the third generation semiconductors. The GaN HEMT power device has wide application prospect in the fields of mobile phone fast charging, vehicle-mounted electronics, data centers, 5G base stations and the like.
The conventional GaN HEMT based on the AlGaN/GaN heterojunction is a normally-on device, and during application, negative-polarity gate drive needs to be designed to realize on-off control of the device, so that the application cost of the device is increased. In addition, the normally-on GaN HEMT device has a defect in safety capability. Therefore, normally-off GaN HEMTs are more suitable commercial solutions.
A recessed-gate GaN HEMT is a common device structure of a normally-off type GaN HEMT. When the device is manufactured, a part of the AlGaN barrier layer in the area below the grid is etched, so that two-dimensional electron gas below the grid area is exhausted, and zero grid voltage turn-off of the GaNHEMT device is realized. When the groove gate etching is carried out, the etching depth is difficult to accurately control. This makes it difficult to effectively control the threshold voltage uniformity of the trench-gate normally-off GaN HEMT device.
Disclosure of Invention
The invention aims to provide a method and a device structure for improving the threshold voltage consistency of a normally-off GaN HEMT, so as to solve the problem that the threshold voltage consistency of the conventional normally-off GaN HEMT device is difficult to effectively control.
In order to solve the technical problem, the invention provides a method for improving the threshold voltage consistency of a normally-off GaN HEMT, which comprises the following steps:
providing a Si substrate, and sequentially forming Al on the surface of the Si substratexGa1-xN buffer layer, GaN channel layer, and AlyGa1- yN barrier layer and AlzGa1-zN neutralizing layer;
etching the AlzGa1-zN neutralizing layer, forming groove for making grid;
in the AlzGa1-zAnd forming a source electrode, a grid electrode and a drain electrode on the surface of the N neutralization layer respectively.
Optionally, the AlxGa1-xN buffer layer, the GaN channel layer, and the AlyGa1-yN barrier layer and the AlzGa1-zThe N neutralization layers are grown and formed through an MOCVD process.
Optionally, the AlxGa1-xN buffer layer and the AlzGa1-zThe component ratio of Al in the N neutralization layer is | x-z-<0.02, wherein the value range of x is 0.05-0.12.
Optionally, the AlyGa1-yThe Al component ratio y in the N barrier layer is in the range of 0.15 to 0.35.
Optionally, the AlyGa1-yThe thickness of the N barrier layer is 10nm to 50 nm.
Optionally, the groove is formed in the Al by an ICP etching methodzGa1-zAnd forming the surface of the N neutralization layer.
Optionally, a metal magnetron sputtering method is adopted for the AlxGa1-xAnd forming a source electrode, a grid electrode and a drain electrode on the surface of the N neutralization layer.
Optionally, the gate covers the groove.
The invention also provides a normally-off GaNHEMT device structure, which comprises a Si substrate and AlxGa1-xN buffer layer, GaN channel layer, and AlyGa1-yN barrier layer and AlzGa1-zThe N neutralizing layer, the source electrode, the grid electrode and the drain electrode;
the Al isxGa1-xN buffer layer, the GaN channel layer, and the AlyGa1-yN barrier layer and AlzGa1-zN neutralizing layers are sequentially deposited on the surface of the Si substrate；
The source electrode, the grid electrode and the drain electrode are positioned on the AlzGa1-zN neutralizes the surface of the layer.
Optionally, the AlzGa1-zAnd a groove is etched on the surface of the N neutralizing layer, and the grid electrode covers the groove.
Optionally, the source and the drain are respectively located at two sides of the gate.
In the method and the device structure for improving the consistency of the normally-off GaNHEMT threshold voltage, AlzGa1-zThe polarization charges generated by the N neutralizing layer can neutralize AlxGa1-xThe polarization charges generated by the N buffer layer enable the threshold voltage of the normally-off GaN HEMT device to be insensitive to the AlGaN thickness change of the area below the grid, so that the consistency of the threshold voltage of the normally-off GaN HEMT device is improved, and the requirement on groove etching depth control in the process flow is reduced.
Drawings
FIG. 1 is a schematic view of a provided Si substrate;
FIG. 2 is a view showing Al formation on the surface of Si substratexGa1-xSchematic of an N buffer layer;
FIG. 3 shows the structure of AlxGa1-xForming a schematic diagram of a GaN channel layer on the surface of the N buffer layer;
FIG. 4 is a view showing Al formed on the surface of a GaN channel layeryGa1-yA schematic of an N-barrier layer;
FIG. 5 shows the structure of AlyGa1-yAl is formed on the surface of the N barrier layerzGa1-zA schematic of an N-neutralizing layer;
FIG. 6 is a graph of etched AlzGa1-zForming a groove schematic diagram by the N neutralizing layer;
FIG. 7 shows a structure of AlzGa1-zAnd forming a schematic diagram of a source electrode, a grid electrode and a drain electrode on the surface of the N neutralizing layer.
Detailed Description
The method and device structure for improving the threshold voltage uniformity of a normally-off GaN HEMT according to the present invention will be described in further detail with reference to the accompanying drawings and specific embodiments. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Example one
The invention provides a method for improving the consistency of the threshold voltage of a normally-off GaN HEMT, which comprises the following steps:
as shown in fig. 1, a Si substrate 01 is provided;
as shown in FIG. 2, Al was formed on the surface of the Si substrate 01 by MOCVD growthxGa1-xAn N buffer layer 02;
as shown in fig. 3, grown by MOCVD on AlxGa1-xA GaN channel layer 03 is formed on the surface of the N buffer layer 02;
as shown in fig. 4, Al is formed on the surface of the GaN channel layer 03 by MOCVD growthyGa1-yN barrier layer 04, AlyGa1-yThe thickness range of the N barrier layer is 10 nm-50 nm;
as shown in fig. 5, grown by MOCVD on AlyGa1-yAl is formed on the surface of the N barrier layer 04zGa1-zN neutralizing layer 05;
as shown in FIG. 6, Al is etchedzGa1-zN neutralizing the layer 05 to form a groove for manufacturing a grid;
as shown in FIG. 7, the metal magnetron sputtering method is adopted to deposit Al on the surface of the substratezGa1-zForming a source electrode 06, a grid electrode 07 and a drain electrode 08 on the surface of the N neutralization layer 05; the grid electrode 07 covers the groove, and the source electrode 06 and the drain electrode 08 are positioned on two sides of the grid electrode 07.
The Al isxGa1-xN buffer layer 02 and the AlzGa1-zThe composition ratio of Al in the N neutralizing layer 05 is | x-z<0.02, x is best when z is equal; at this time, AlzGa1-zThe polarization charges generated by the N neutralization layer can completely neutralize AlxGa1-xPolarization charge generated by N buffer layer (assuming Al)zGa1-zN-neutralized layer with AlxGa1-xThe growth quality of the N buffer layer is completeSame), the threshold voltage of the normally-off GaNHEMT device is insensitive to the AlGaN thickness change of the area below the grid, so that the consistency of the threshold voltage of the normally-off GaN HEMT device is improved, and the Al resistance in the process flow is reducedzGa1-zAnd controlling the etching depth of the N grooves. Wherein the value range of x is 0.05-0.12. The Al isyGa1-yThe Al component ratio y in the N barrier layer 04 is in the range of 0.15 to 0.35.
The Al iszGa1-zThe polarization charge generated by the N neutralizing layer 05 can neutralize the AlxGa1-xThe polarization charges generated by the N buffer layer 02 make the threshold voltage of the normally-off GaN HEMT device insensitive to the AlGaN thickness variation in the area below the grid, thereby improving the consistency of the threshold voltage of the normally-off GaN HEMT device and reducing the requirement on groove etching depth control in the process flow.
Example two
The invention also provides a normally-off GaN HEMT device structure, which is shown in FIG. 7 and comprises a Si substrate 01 and AlxGa1-xN buffer layer 02, GaN channel layer 03, AlyGa1-yN barrier layer 04, AlzGa1-zN-neutralizing layer 05, source 06, gate 07, and drain 08; the Al isxGa1-xN buffer layer 02, GaN channel layer 03, AlyGa1-yN barrier layer 04 and AlzGa1-zN neutralizing layers 05 are sequentially deposited on the surface of the Si substrate 01; the source electrode 06, the grid electrode 07 and the drain electrode 08 are positioned on the AlzGa1-zN neutralizes the surface of layer 05. The Al iszGa1-zA groove is etched on the surface of the N neutralizing layer 05, and the grid electrode 07 covers the groove; the source electrode 06 and the drain electrode 08 are respectively located at two sides of the gate electrode 07.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
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