阅读说明：本技术 半导体模块 (Semiconductor module ) 是由 佐藤悠司 于 2020-09-01 设计创作，主要内容包括：本发明提供一种半导体模块。半导体模块具备：冷却器,其具有彼此相离且并列地配置的第一流路及第二流路、以及将第一流路与第二流路连接起来的第三流路；以及层叠基板,其搭载于冷却器,具有沿与第三流路交叉的方向排列地设置的多个电路板。多个电路板具有与P端子连接的第一电路板、与N端子连接的第二电路板以及与M端子连接的第三电路板。在第一电路板,沿着第三流路排列地搭载有具有探测温度的感测功能的第一感测芯片以及不具有感测功能的第一非感测芯片。在第三电路板,沿着第三流路排列地搭载有具有感测功能的第二感测芯片以及不具有感测功能的第二非感测芯片。第一感测芯片偏向第二流路侧地配置,第二感测芯片偏向第一流路侧地配置。(The invention provides a semiconductor module. The semiconductor module includes: a cooler having a first channel and a second channel arranged in parallel and apart from each other, and a third channel connecting the first channel and the second channel; and a laminated substrate mounted on the cooler, the laminated substrate having a plurality of circuit boards arranged in a direction intersecting the third flow paths. The plurality of circuit boards has a first circuit board connected to the P terminal, a second circuit board connected to the N terminal, and a third circuit board connected to the M terminal. The first circuit board is mounted with a first sensing chip having a sensing function of detecting temperature and a first non-sensing chip having no sensing function, arranged along the third flow path. The third circuit board is mounted with a second sensing chip having a sensing function and a second non-sensing chip having no sensing function, arranged along the third flow path. The first sensor chip is disposed with a bias toward the second flow path, and the second sensor chip is disposed with a bias toward the first flow path.)

1. A semiconductor module is provided with:

a cooler having a first channel and a second channel arranged in parallel and apart from each other, and a third channel connecting the first channel and the second channel; and

a laminated substrate mounted on the cooler and having a plurality of circuit boards arranged in a direction intersecting the third flow paths,

wherein the plurality of circuit boards have a first circuit board connected to the P terminal, a second circuit board connected to the N terminal, and a third circuit board connected to the M terminal,

a first sensing chip having a sensing function of detecting temperature and a first non-sensing chip having no sensing function are mounted in the first circuit board so as to be arranged along the third flow path,

a second sensing chip having the sensing function and a second non-sensing chip having no sensing function are mounted on the third circuit board so as to be aligned along the third flow path,

the first sensor chip is disposed with a bias toward the second flow path side,

the second sensor chip is disposed to be biased toward the first flow path side.

2. The semiconductor module of claim 1,

the first and second sensing chips also have a current sensing function of detecting a short circuit.

3. The semiconductor module according to claim 1 or 2,

further comprises a housing member which houses the laminated substrate and has a first terminal member and a second terminal member,

the first sensing chip and the first terminal member are connected by a first wiring member, and the second sensing chip and the second terminal member are connected by a second wiring member.

4. The semiconductor module of claim 3,

the terminal members are respectively provided on the first sensing chip side and the second sensing chip side,

the terminal member provided on the first sensor chip side and the terminal member provided on the second sensor chip side are arranged so as to diagonally face each other with the laminated substrate therebetween in a plan view.

5. The semiconductor module according to any one of claims 1 to 4,

a thermistor is disposed on an upper surface of the laminated substrate.

6. The semiconductor module according to any one of claims 1 to 5,

the P terminal is arranged in the first circuit board so as to be offset toward the first flow path side,

the M terminal is disposed in the third circuit board so as to be offset toward the second flow path side.

7. The semiconductor module according to any one of claims 1 to 5,

the P terminal is disposed in the first circuit board so as to be offset toward the second flow path side,

the M terminal is disposed in the third circuit board so as to be offset toward the first flow path side.

8. The semiconductor module according to claim 6 or 7,

an inlet port is provided in the first flow path, and an outlet port is provided in the second flow path.

Technical Field

The present invention relates to a semiconductor module.

Background

Semiconductor devices include a substrate provided with Semiconductor elements such as IGBTs (Insulated Gate Bipolar transistors), power MOSFETs (Metal Oxide Semiconductor Field Effect transistors), and FWDs (Free Wheeling diodes), and are used in inverter devices and the like.

An inverter device widely used for driving a motor for consumer use and industrial use is composed of a semiconductor switching element (switching element) such as a MOSFET or an IGBT, and a driving integrated circuit (IC chip) for driving the semiconductor switching element. As a means for miniaturizing the device and incorporating a protection circuit, an IPM (Intelligent Power Module) in which the switching element and the IC chip are packaged in one package is used.

In a conventional semiconductor device (semiconductor module), a thermistor is provided as a temperature sensor for detecting the temperature of a semiconductor element. However, since the thermistor cannot directly monitor the chip temperature, it is necessary to thermally design the device in consideration of various specific variations of products such as variations in characteristics of devices and variations in thermal resistance of packages. Therefore, a semiconductor module incorporating a so-called on-chip sensor, which incorporates functions such as a temperature sensor and a current sensor, has been proposed (see, for example, patent documents 1 to 3).

In patent document 1, a plurality of semiconductor chips are arranged on a circuit board of an insulating substrate. Each semiconductor chip is provided with a temperature detection diode for overheat protection. In patent document 2, a plurality of semiconductor chips are arranged on a drain substrate. Each semiconductor chip has a sense node through which a sense current flows. A prescribed output voltage can be detected from the current flowing to the sense node. Further, patent document 3 discloses an IGBT with current sensing. This IGBT includes a current sensing unit and a temperature sensing diode unit.

Documents of the prior art

Patent document

Patent document 1: international publication No. 2016/174899

Patent document 2: international publication No. 2015/125281

Patent document 3: japanese laid-open patent publication No. 2007-287988

Disclosure of Invention

The problem to be solved by the inventionQuestion (I)

Further, since the semiconductor element of the on-chip sensor built-in type is expensive, if all the semiconductor elements arranged in the module are of the on-chip sensor built-in type, the cost of the entire module may be affected.

The present invention has been made in view of the above problems, and an object thereof is to provide a semiconductor module capable of monitoring an internal temperature with an inexpensive configuration.

Means for solving the problems

A semiconductor module according to an embodiment of the present invention includes: a cooler having a first channel and a second channel arranged in parallel and apart from each other, and a third channel connecting the first channel and the second channel; and a laminated substrate mounted on the cooler and having a plurality of circuit boards arranged in a direction intersecting the third flow paths, wherein the plurality of circuit boards have a first circuit board connected to the P terminal, a second circuit board connected to the N terminal, and a third circuit board connected to the M terminal, a first sensing chip having a sensing function of detecting temperature and a first non-sensing chip having no sensing function are mounted in the first circuit board so as to be arranged along the third flow path, a second sensing chip having the sensing function and a second non-sensing chip having no sensing function are mounted on the third circuit board so as to be aligned along the third flow path, the first sensor chip is disposed to be biased toward the second flow path, and the second sensor chip is disposed to be biased toward the first flow path.

ADVANTAGEOUS EFFECTS OF INVENTION

According to the present invention, the semiconductor module can monitor the internal temperature with an inexpensive configuration.

Drawings

Fig. 1 is a plan view showing an example of a semiconductor module according to the present embodiment.

Fig. 2 is a view of the semiconductor module of fig. 1 viewed from the bottom surface side.

Fig. 3 is a partially enlarged view of the unit laminated substrate of fig. 1.

Fig. 4 is a cross-sectional view of the semiconductor module shown in fig. 3 cut along YZ-plane.

Fig. 5 is an equivalent circuit diagram showing a sensing function of the semiconductor element.

Fig. 6 is a schematic plan view of a semiconductor module according to a reference example.

Fig. 7 is a plan view showing a semiconductor module according to a modification.

Description of the reference numerals

1: a semiconductor module; 2: a laminated substrate; 3: a semiconductor element; 3 a: a semiconductor element (first sensing chip); 3 b: a semiconductor element (first non-sensing chip); 3 c: a semiconductor element (second sensing chip); 3 d: a semiconductor element (second non-sensing chip); 4: a thermistor; 10: a base plate; 11: a housing member; 12: a cooler; 12 a: a fin; 12 b: cooling the housing; 12 c: a recess; 12 d: an inlet port; 12 e: an outlet port; 13: an annular wall portion; 13 a: a step portion; 14: a terminal member; 15: an inner terminal portion; 16: an outer terminal portion; 17: a sealing resin; 20: an insulating plate; 21: a heat dissipation plate; 22: a circuit board; 23: a first circuit board; 24: a second circuit board; 25: a third circuit board; 26 a: a gate pad; 26 b: an emitter pad; 27 a: a gate pad; 27 b: an emitter pad; 28: an electrode pad; 30: an IGBT element; 31: an FWD element; 32: a temperature sensing diode; f1: a first flow path (refrigerant flow path); f2: a second flow path (refrigerant flow path); f3: a third flow path (refrigerant flow path); s: a bonding material; w: a wiring member.

Detailed Description

Next, a semiconductor module to which the present invention can be applied will be described. Fig. 1 is a plan view showing an example of a semiconductor module according to the present embodiment. Fig. 2 is a view of the semiconductor module of fig. 1 viewed from the bottom surface side. Fig. 3 is a partially enlarged view of the unit laminated substrate of fig. 1. Fig. 4 is a cross-sectional view of the semiconductor module shown in fig. 3 cut along YZ-plane. Fig. 5 is an equivalent circuit diagram showing a sensing function of the semiconductor element. The semiconductor module shown below is merely an example, and is not limited thereto, and can be modified as appropriate.

In the following drawings, the longitudinal direction of the semiconductor module (the direction in which a plurality of stacked substrates described later are arranged) is defined as the X direction, the short direction is defined as the Y direction, and the height direction is defined as the Z direction. The axes of X, Y, Z are shown as being orthogonal to each other to form a right hand system. In some cases, the X direction is referred to as the left-right direction, the Y direction is referred to as the front-back direction, and the Z direction is referred to as the up-down direction. These directions (front-back, left-right, up-down directions) are words used for convenience of description, and the correspondence between these directions and the respective directions of the XYZ directions may change depending on the mounting posture of the semiconductor module. For example, the heat radiation surface side (cooler side) of the semiconductor module is referred to as the lower surface side, and the opposite side is referred to as the upper surface side. In the present specification, a plan view refers to a case where the upper surface of the semiconductor module is viewed from the Z direction positive side.

The semiconductor module 1 is applied to a power conversion apparatus such as a power module. The semiconductor module 1 according to the present embodiment is a 6-in-1 (6in 1) type power module constituting an inverter circuit. As shown in fig. 1 to 4, the semiconductor module 1 includes: a base board (Japanese: ベース board) 10; a plurality of laminated substrates 2 arranged on the base plate 10; a plurality of semiconductor elements 3 arranged on the laminated substrate 2; a housing member 11 that houses the plurality of laminated substrates 2 and the plurality of semiconductor elements 3; and a cooler 12 disposed on the lower surface of the base plate 10.

The base plate 10 is a rectangular plate having an upper surface and a lower surface. The base plate 10 functions as a heat sink. The base plate 10 has a rectangular shape in plan view, which is long in the X direction. The base plate 10 is, for example, a metal plate made of copper, aluminum, or an alloy thereof, and the surface of the base plate 10 may be plated.

A frame-shaped housing member 11 is disposed on the upper surface of the base plate 10. The housing member 11 is molded of, for example, synthetic resin, and is joined to the upper surface of the base plate 10 with an adhesive (not shown). The housing member 11 has a rectangular shape along the outer shape of the base plate 10, and has an annular wall portion 13 having an opening formed at the center. The annular wall portion 13 is formed to rise in the Z direction. The annular wall portion 13 is provided with a plurality of terminal members 14. The terminal member 14 will be described later.

Further, 3 laminated substrates 2 are arranged inside the annular wall portion 13 and on the upper surface of the base plate 10 in the X direction. These 3 laminated substrates 2 constitute U-phase, V-phase, and W-phase of the inverter circuit. In the present embodiment, the arrangement is such that the U-phase, V-phase, and W-phase are provided from the right side of the paper surface in fig. 1.

The laminated substrate 2 is formed by laminating a Metal layer and an insulating layer, and is composed of, for example, a DCB (Direct Copper Bonding) substrate, an AMB (Active Metal Brazing) substrate, or a Metal base substrate. Specifically, the laminated board 2 includes an insulating plate 20, a heat dissipation plate 21 disposed on a lower surface of the insulating plate 20, and a plurality of circuit boards 22 disposed on an upper surface of the insulating plate 20. The laminated substrate 2 is formed in a substantially square shape in plan view, for example.

The insulating plate 20 is formed in a flat plate shape having a predetermined thickness in the Z direction and having an upper surface and a lower surface. The insulating plate 20 is made of, for example, alumina (Al)₂O₃) Aluminum nitride (AlN), silicon nitride (Si)₃N₄) Or a ceramic material, a resin material such as epoxy, or an insulating material such as an epoxy resin material using a ceramic material as a filler. The insulating plate 20 may be referred to as an insulating layer or an insulating film.

The heat sink 21 is formed to have a predetermined thickness in the Z direction and to cover the entire lower surface of the insulating plate 20. The heat sink 21 is formed of a metal plate having good thermal conductivity, such as copper or aluminum.

A plurality of circuit boards 22 are formed on the upper surface (main surface) of the insulating plate 20 in an island shape in an electrically insulated state from each other. Specifically, the plurality of circuit boards 22 are configured to include a first circuit board 23 connected to a positive potential point (P terminal), a second circuit board 24 connected to a negative potential point (N terminal), and a third circuit board 25 connected to an intermediate potential point (M terminal). These circuit boards 22 are formed of a metal layer having a predetermined thickness, and the metal layer is formed of a copper foil or the like.

The first circuit board 23 has a rectangular shape in plan view, extending in the Y direction so as to extend along one side of the laminated substrate 2 in the X direction. The first circuit board 23 is slightly cut away from the outside to the inside in the X direction at substantially the center in the Y direction. At the cut-out portion, a gate pad 26a and an emitter pad 26b are formed in line in the Y direction. The gate pad 26a is located on the terminal member 14 side (Y-direction positive side) of the upper arm.

The second circuit board 24 has a strip shape extending in the Y direction at substantially the center of the laminated substrate 2 in the X direction. One end of the second circuit board 24 is slightly bent in the X direction, and the whole is substantially L-shaped in plan view.

The third circuit board 25 has a substantially U-shape in plan view as follows: extends in the Y direction so as to follow one side of the other side in the X direction of the laminated substrate 2, is bent in a folded-back manner at the other end side of the second circuit board 24, and then extends in the Y direction so as to sandwich the second circuit board 24 in the Y direction. The third circuit board 25 is slightly cut away from the outside to the inside in the X direction at substantially the center in the Y direction. At the cut-out portion, a gate pad 27a and an emitter pad 27b are formed in line in the Y direction. The gate pad 27a is located on the terminal member 14 side (Y-direction negative side) of the lower arm. These 3 circuit boards 22 are arranged in a direction (X direction) intersecting a third flow path F3 (see fig. 2) constituting a part of the refrigerant flow path described later.

A plurality of semiconductor elements 3 are arranged at predetermined positions on the upper surface of the circuit board 22 with a bonding material S (see fig. 4) such as solder interposed therebetween. The semiconductor element 3 is formed of a semiconductor substrate of, for example, silicon (Si), silicon carbide (SiC), gallium nitride (GaN), or the like, and has a square shape in plan view. In the present embodiment, the semiconductor element 3 is formed of an RC (Reverse conduction) -IGBT element in which functions of an IGBT (insulated Gate Bipolar transistor) element and an fwd (free Wheeling diode) element are integrated.

The Semiconductor element 3 is not limited to this, and may be configured by combining an IGBT, a power mosfet (metal Oxide Semiconductor Field Effect transistor), a switching element such as a BJT (Bipolar junction transistor), and a diode such as an fwd (free Wheeling diode). As the semiconductor element 3, an RB (Reverse Blocking) -IGBT or the like having a sufficient withstand voltage against a Reverse bias voltage may be used. The shape, the number of arrangement, the arrangement position, and the like of the semiconductor element 3 can be appropriately changed. The semiconductor element 3 may be provided with an emitter, a source, or an anode on a first surface and a collector, a drain, or a cathode on a second surface of a semiconductor substrate having the first surface and the second surface opposite to the first surface. The semiconductor element 3 as a switching element may be provided with a gate electrode on the first surface of the semiconductor substrate, and further provided with a sense electrode.

In the present embodiment, 4 semiconductor elements 3 are arranged for every 1 laminated substrate 2 (for every 1 phase). Specifically, the 2 semiconductor elements 3a and 3b disposed on the upper surface of the first circuit board 23 constitute an upper arm. The 2 semiconductor elements 3c and 3d disposed on the upper surface of the third circuit board 25 constitute a lower arm. That is, the upper arm and the lower arm are arranged on the upper surface of the laminated substrate 2 so as to be aligned in the X direction. The chip mounting portion of the circuit board 23, the wiring member connecting portion of the circuit board 25, the circuit board 24, and the chip mounting portion of the circuit board 25 are provided in this order in the X direction.

Each of the 2 semiconductor elements constituting the upper and lower arms is further divided into a sensing chip having a predetermined sensing function and a non-sensing chip not having the sensing function. Specifically, the semiconductor elements 3a, 3c are sensing chips having a sensing function of detecting the temperature and current of the chip. On the other hand, the semiconductor elements 3b and 3d are non-sensing chips having no such sensing function. That is, the upper and lower arms are provided with 1 sensing chip and 1 non-sensing chip, respectively. Each arm may have 3 or more semiconductor elements including at least 1 sensor chip.

In the upper arm, the semiconductor elements 3a and 3b are connected in parallel and arranged in the Y direction. In the lower arm, the semiconductor elements 3c and 3d are connected in parallel and arranged in the Y direction. In this manner, the sensor chips and the non-sensor chips are arranged in a direction (Y direction) orthogonal to the arrangement direction (X direction) of the upper and lower arms. In the upper and lower arms, the sensing chip and the non-sensing chip are disposed in opposition, and details will be described later. That is, the semiconductor elements 3a and 3c are provided at positions diagonally opposed to each other in a plan view. The semiconductor elements 3a and 3c may be arranged diagonally apart from each other on the laminated substrate 2.

Here, a sensing function of the semiconductor element (sensing chip) is described with reference to fig. 5. As shown in fig. 5, the semiconductor elements 3a and 3c include an IGBT element 30, an FWD element 31, and a temperature sensing diode 32 on a semiconductor substrate.

IGBT element 30 has one end connected to gate (G), and the other end connected to collector (C), emitter (E), and sense emitter (S). The FWD element 31 is connected in antiparallel between the emitter and collector of the IGBT element 30.

One end of the temperature sensing diode 32 is connected to the anode (a), and the other end is connected to the cathode (K). The temperature sensing diode 32 detects the chip temperature based on the anode-cathode voltage. The sense emitter (S) is a terminal capable of detecting by shunting a part of the current flowing to the IGBT. The short-circuit protection can be implemented when a short-circuit operation occurs by connecting, for example, an external current sensing resistor to the sense emitter (S) and detecting the voltage. The current sensing resistor can be set to a voltage value at which short-circuit protection is started by appropriately setting conditions in designing the control circuit.

Further, a thermistor 4 is disposed on one corner portion of the upper surface of the laminated substrate 2, which is located in the vicinity of the semiconductor element 3d of the lower arm. The thermistor 4 is used to detect the temperature of cooling water flowing in the cooler 12 located on the lower surface side of the laminated substrate 2. Further, the thermistor 4 is not limited to the arrangement, and other types of temperature measuring resistors or thermocouples may be arranged.

As described above, the frame-shaped housing member 11 is disposed on the upper surface of the laminated substrate 2. The housing member 11 has an annular wall portion 13 surrounding the periphery of the 3 laminated substrates 2. A stepped portion 13a is formed on the inner peripheral side of the upper surface of the annular wall portion 13 so as to be lowered by one step. The upper surface of the stepped portion 13a is provided at a position lower than the upper surface of the annular wall portion 13.

As shown in fig. 1, a plurality of terminal members 14 are embedded in a pair of wall portions of the annular wall portion 13 facing each other in the short side direction (Y direction) by integral molding. The terminal member 14 is formed by bending a plate-like body of a metal material such as a copper material, a copper alloy material, an aluminum alloy material, or an iron alloy material. The terminal member 14 has an inside terminal portion 15 exposed on the upper surface of the stepped portion 13a and an outside terminal portion 16 protruding on the upper surface of the annular wall portion 13.

As shown in fig. 3, the plurality of terminal members 14 are arranged in the vicinity of the semiconductor elements 3a and 3c having a sensing function so as to be aligned in the X direction in correspondence with the respective electrodes. Specifically, 5 terminal members 14 are arranged in the X direction in the vicinity of the semiconductor element 3 a. In addition, 5 terminal members 14 are also arranged in the vicinity of the semiconductor element 3c in the X direction. As shown in fig. 3, the 5 arranged terminal members 14 are in a positional relationship of facing obliquely in the Y direction across the laminated substrate 2 in a plan view. The terminal member 14 for the upper arm is provided in the direction of the diagonal line of the laminated substrate 2 adjacent to the semiconductor element 3a, and the terminal member 14 for the lower arm is provided in the direction of the diagonal line of the laminated substrate 2 adjacent to the semiconductor element 3 c. The sense electrode (S, A, K) of the semiconductor element 3a and the sense electrode (S, A, K) of the semiconductor element 3c may be arranged apart in the Y direction in the diagonal direction of the laminated substrate 2. The terminal member 14 for the upper arm and the sensing electrode of the semiconductor element 3a may be electrically connected by a wiring member W. The terminal member 14 for the lower arm and the sensing electrode of the semiconductor element 3c may be electrically connected by a wiring member W. In the semiconductor element 3a, the gate electrode may be disposed on the opposite side of the sense electrode. In the semiconductor element 3c, the gate electrode may be disposed on the opposite side of the sensing electrode. Further, a terminal member 14 is also disposed on the annular wall portion 13 located near the thermistor 4. As shown in fig. 1, these terminal members 14 are configured to be the same in each phase.

Each semiconductor element 3, the circuit board 22, and the terminal member 14 are electrically connected by the wiring member W. For example, in the upper arm, the semiconductor element 3a and the inner terminal portion 15 are connected by a wiring member W, the semiconductor element 3a and the third circuit board 25 are connected by a wiring member W, the semiconductor element 3a and the gate pad 26a are connected by a wiring member W, the gate pad 26a and the gate-side terminal member 14 are connected by a wiring member W, the third circuit board 25 and the emitter pad 26b are connected by a wiring member W, and the emitter pad 26b and the emitter-side terminal member 14 are connected by a wiring member W. The semiconductor element 3b and the third circuit board 25 are also connected by the wiring member W, and the semiconductor element 3b and the gate pad 26a are also connected by the wiring member W. The gate electrode of the semiconductor element 3b may be disposed in the vicinity of the gate electrode of the semiconductor element 3a via the gate pad 26 a. The intermediate potential of the parallel-connected semiconductor elements 3a and 3b may be detected by connecting the third circuit board 25 to the emitter pad 26b via the wiring member W disposed between the semiconductor elements 3a and 3 b.

In the lower arm, the semiconductor element 3c and the inner terminal portion 15 are connected by a wiring member W, the semiconductor element 3c and the second circuit board 24 are connected by a wiring member W, the semiconductor element 3d and the gate pad 27a are connected by a wiring member W, the gate pad 27a and the gate-side terminal member 14 are connected by a wiring member W, the second circuit board 24 and the emitter pad 27b are connected by a wiring member W, and the emitter pad 27b and the emitter-side terminal member 14 are connected by a wiring member W. The semiconductor element 3d and the second circuit board 24 are also connected by the wiring member W, and the semiconductor element 3d and the gate pad 27a are also connected by the wiring member W. The gate electrode of the semiconductor element 3d may be arranged in the vicinity of the gate electrode of the semiconductor element 3c via the gate pad 27 a. The intermediate potential of the semiconductor elements 3c and 3d connected in parallel may be detected by connecting the second circuit board 24 to the emitter pad 27b via the wiring member W disposed between the semiconductor elements 3c and 3 d.

The thermistor 4 and the inner terminal 15 are also connected by a wiring member W. In addition, a conductor wire (bonding wire) is used for these wiring members W. As the material of the conductor line, any one of gold, copper, aluminum, a gold alloy, a copper alloy, and an aluminum alloy, or a combination thereof can be used. Further, a member other than the conductive wire may be used as the wiring member. For example, a ribbon cable (ribbon) can be used as the wiring member.

Further, the sealing resin 17 is filled in the internal space of the case member 11 defined by the annular wall portion 13. The sealing resin 17 is filled until the upper surface of the sealing resin 17 reaches the upper surface of the annular wall portion 13, for example. Thereby, the laminated substrate 2, the semiconductor element 3, the inner terminal 15, and the wiring member W are sealed. The sealing resin 17 may be epoxy resin or silicone resin.

As shown in fig. 2 and 4, the cooler 12 includes the base plate 10 described above and a plurality of fins 12a (details of which are omitted) provided on the lower surface side of the base plate 10. The cooler 12 may further include a cooling housing 12 b. As described above, the base plate 10 functions as a heat sink, and the plurality of laminated substrates 2 are mounted on the upper surface of the base plate 10. The plurality of fins 12a provided on the lower surface (heat radiation surface) of the base plate 10 are housed in a recess 12c formed in the cooling case 12 b. Further, the cooling housing 12b may also be referred to as a refrigerant jacket or water jacket.

A plurality of fins 12a are integrally provided on the lower surface of the base plate 10. The fins 12a may be composed of the same metal material as the base plate 10. The fins 12a are used as heat dissipation plates, in other words, heat dissipation fins. For example, pin fins (pin fin) in which a plurality of square-columnar pins (guidelines) are arranged at predetermined intervals can be used as the fins 12 a. The structure of the fin 12a is not limited to this, and can be appropriately changed. For example, a structure may be adopted in which a cylindrical needle is provided instead of a square-column-shaped needle, or a structure may be adopted in which a plurality of blades (blades) extending in the Y direction are arranged in parallel with each other. The fins 12a are provided to enable the refrigerant to flow in the Y direction.

Preferably, the region of the base plate 10 where the plurality of fins 12a are provided includes a region on the opposite side (back side) of the mounting region of the semiconductor element 3 on the laminated substrate 2 in a state where the plurality of laminated substrates 2 are joined to the base plate 10. In other words, it is preferable that the region where the plurality of fins 12a are integrally provided on the base plate 10 be a region including a region directly below the semiconductor element 3. In the present embodiment, a plurality of fins 12a are arranged in a region including a region directly below the plurality of laminated substrates 2. In the present embodiment, the assembly of the plurality of fins 12a has a substantially rectangular parallelepiped shape. The longitudinal direction of the assembly of the plurality of fins 12a coincides with the longitudinal direction (X direction) of the semiconductor module 1.

The cooling case 12b has a substantially rectangular parallelepiped outer shape and a rectangular shape elongated in the X direction in a plan view. The outer shape of the cooling case 12b in plan view has substantially the same shape as the outer shape of the base plate 10. The cooling case 12b has a recess 12c formed in the upper surface. Thereby, the cooling casing 12b is formed in a box shape with an open upper portion. The concave portion 12c has a rectangular shape in plan view, having a shape similar to the outer shape of the cooling case 12 b.

The recess 12c is formed larger than the outer shape of the assembly of the plurality of fins 12 a. More specifically, the width of the recess 12c in the Y direction is set to be sufficiently larger than the width of the assembly of the plurality of fins 12a in the Y direction. Further, the aggregation of the plurality of fins 12a is disposed at the center of the recess 12c in the Y direction. As described above, the recess 12c accommodates the plurality of fins 12 c. Gaps provided between the recess 12c and the plurality of fins 12c define refrigerant flow paths through which a refrigerant can flow.

Specifically, as shown in fig. 2, the refrigerant flow path includes a first flow path F1 provided in the concave portion 12c on the Y-direction negative side of the plurality of fins 12c, a second flow path F2 provided in the concave portion 12c on the Y-direction positive side of the plurality of fins 12c, and a third flow path F3 provided in the gaps between the plurality of fins 12 c. The first flow path F1 and the second flow path F2 are arranged in parallel with each other while being separated from each other in the Y direction. The third flow path F3 is provided between the first flow path F1 and the second flow path F2, and connects the first flow path F1 and the second flow path F2. The first flow path F1 and the second flow path F2 extend in the X direction, and the third flow path F3 extends in the Y direction. The refrigerant supplied from an external device such as a pump can circulate through the cooling system by passing through the first flow path F1, the third flow path F3, and the second flow path F2. The refrigerant may pass through the third flow path F3 from the first flow path F1 toward the second flow path F2.

The cooling case 12b is provided with an inlet 12d and an outlet 12e which serve as inlets and outlets for the refrigerant. As shown in fig. 2, the introduction port 12d is disposed so as to communicate with an end portion on the X-direction positive side of the first flow path F1 at a bottom wall portion of the cooling housing 12 b. The discharge port 12e is disposed so as to communicate with the end portion of the second flow path F2 on the X direction negative side at the bottom wall portion of the cooling case 12 b. That is, the inlet 12d and the outlet 12e are arranged to face each other obliquely with the plurality of fins 12a interposed therebetween. The inlet 12d and the outlet 12e may be provided in the side wall portion of the cooling case 12 b.

In the present embodiment, the refrigerant is introduced into the cooling jacket 12b from the inlet 12d, passes through the third flow path F3 from the first flow path F1, passes through the second flow path F2, and is discharged out of the cooling jacket 12b from the outlet 12 e. The arrangement of the inlet 12d and the outlet 12e is not limited to this, and can be changed as appropriate. For example, the positional relationship between the inlet 12d and the outlet 12e may be reversed. That is, the refrigerant flow path may be configured such that the refrigerant passes through the third flow path F3 from the second flow path F2 and then passes through the first flow path F1.

In the present embodiment, the cooling casing 12b is provided as the structure of the cooler 12, but the cooling casing 12b may have any structure. That is, the cooler 12 may be constituted only by the base plate 10 and the plurality of fins 12 a.

The power semiconductor module for mounting on a vehicle mainly includes a semiconductor element, an insulating substrate (laminated substrate), a cooler, and the like. The semiconductor element is an RC-IGBT in which an IGBT element and an FWD element are integrated. By embedding the cooler in the module, the cooling performance is improved and the size and weight of the entire module are reduced. In this semiconductor module, a 2-parallel circuit in which 2 chips are connected in parallel is formed in each of the upper and lower arms, and a large current flows. 2 one of the chips connected in parallel has a temperature sensing function for monitoring the chip temperature and a current sensing function for detecting an abnormality of the current.

Here, the structure of the conventional semiconductor module will be described with reference to a reference example. Fig. 6 is a schematic plan view of a semiconductor module according to a reference example. In fig. 6, the layout of the semiconductor element 3, the terminal member 14, and a part of the circuit board 22 is different from that of fig. 2. Therefore, the same names and symbols are used for the common structure as in fig. 2, and the description thereof is appropriately omitted.

As shown in fig. 6, the semiconductor elements 3a and 3b are connected in parallel in the upper arm and arranged on the upper surface of the first circuit board 23 in the Y direction. In the lower arm, the semiconductor elements 3c and 3d are connected in parallel and arranged on the upper surface of the third circuit board 25 in the Y direction. In this manner, the sensor chips and the non-sensor chips are arranged in a direction (Y direction) orthogonal to the arrangement direction (X direction) of the upper and lower arms. In addition, in the upper and lower arms, the sensing chip and the non-sensing chip are disposed on the same side in the Y direction. That is, the semiconductor elements 3a and 3c are arranged along one side of the laminated substrate 2 so as to be offset to one side in the Y direction and are arranged to face each other in the X direction.

In the upper arm, gate pads 26a and emitter pads 26b are formed on the upper surface of the laminated substrate 2 between the semiconductor elements 3a and 3b so as to be aligned in the Y direction. Similarly, in the lower arm, gate pads 27a and emitter pads 27b are formed on the upper surface of the laminated substrate 2 between the semiconductor elements 3c and 3d so as to be aligned in the Y direction. In fig. 6, emitter electrode (E) on the upper arm side is connected to emitter pad 26b on insulating plate 20 via wiring member W. Emitter electrode (E) on the lower arm side is connected to emitter pad 27b on insulating plate 20 via wiring member W.

Further, a plurality of electrode pads 28 are formed on the upper surface of the laminated substrate 2 on the outer side in the Y direction of the semiconductor elements 3a and 3c so as to correspond to the respective electrodes of the semiconductor elements 3a and 3 c. Specifically, 5 electrode pads 28 are arranged in a row in the X direction on the side of the semiconductor element 3a, and 5 electrode pads 28 are arranged in a row in the X direction on the side of the semiconductor element 3 c.

A plurality of terminal members 14 are integrally embedded in the annular wall portion 13 corresponding to the respective electrodes of the semiconductor elements 3a and 3 c. Specifically, the plurality of terminal members 14 are disposed on one wall portion in the short side direction (Y direction) of the annular wall portion 13. Further laterally to the 5 electrode pads 28 disposed laterally to the semiconductor element 3a, 5 terminal members 14 are disposed in a row in the X direction. Further, 5 terminal members 14 are arranged side by side in the X direction on the 5 electrode pads 28 arranged on the side of the semiconductor element 3 c.

In general, in each of the upper and lower arms, a load of a semiconductor device located on the front side (upstream side) with respect to the direction of current flow among 2 semiconductor devices connected in parallel is large. For example, the current in the upper arm flows from the P terminal toward the M terminal, and the current in the lower arm flows from the M terminal toward the N terminal. In the above-described reference example, the semiconductor elements 3a and 3c having the sensing function are arranged to be biased to one side in the Y direction, and therefore, only the temperature of one side in the Y direction of the semiconductor module can be detected. For example, when the temperature of the semiconductor elements 3b and 3d having no sensing function located on the other side in the Y direction becomes higher than the temperature of the semiconductor elements 3a and 3c, there is a possibility that the temperature control cannot be appropriately performed.

Therefore, the present inventors have conceived of the present invention with a view to the positional relationship between the sensing chip having the sensing function and the non-sensing chip having no sensing function and the flow direction of the refrigerant (cooling water) flowing in the cooler integrated with the module.

That is, the gist of the present invention is to dispose the sensor chip and the non-sensor chip on the lower arm side in a reverse direction to the conventional one, and to align the arrangement direction of the sensor chip and the non-sensor chip with the direction in which the refrigerant flows.

Specifically, in the present embodiment, as shown in fig. 3, a plurality of semiconductor elements 3 constituting upper and lower arms arranged in a lateral direction are arranged on the upper surface of the laminated substrate 2. The plurality of semiconductor elements are configured such that sensing chips (semiconductor elements 3a and 3c) having a sensing function of detecting temperature and non-sensing chips (semiconductor elements 3b and 3d) having no sensing function are arranged in a direction (Y direction) orthogonal to an arrangement direction (X direction) of the upper and lower arms. In addition, in the upper and lower arms, the sensing chip and the non-sensing chip are disposed in opposition. That is, the semiconductor elements 3a and 3c are arranged so as to face obliquely in a plan view, and are provided on the diagonal line of the laminated substrate 2. The flow direction of the refrigerant flowing through the cooler 12 coincides with the arrangement direction of the sensor chips and the non-sensor chips.

In other words, the semiconductor element 3a as the first sensing chip having a sensing function of detecting temperature and the semiconductor element 3b as the first non-sensing chip having no sensing function are mounted in the first circuit board 23 so as to be aligned along the third flow path F3. Further, the semiconductor element 3c as a second sensing chip having a sensing function and the semiconductor element 3d as a second non-sensing chip having no sensing function are mounted on the third circuit board 25 in a row along the third flow path F3. The semiconductor element 3a is disposed to be offset toward the second flow path F2, and the semiconductor element 3c is disposed to be offset toward the first flow path F1. The P terminal is disposed on the first circuit board 23 so as to be offset toward the first flow path F1, and the M terminal is disposed on the third circuit board 25 so as to be offset toward the second flow path F2. The first flow path F1 includes the inlet 12d, and the second flow path F2 includes the outlet 12.

According to these configurations, the sensing chip and the non-sensing chip are combined, and thus the semiconductor device can be manufactured at a lower cost than a case where all the semiconductor elements in the module are formed of the sensing chip. In addition, by arranging the sensing chips and the non-sensing chips differently from each other in the upper arm and the lower arm, the sensing chips are not biased to one side in the Y direction of the semiconductor module 1. Further, by aligning the flow direction of the refrigerant flowing through the cooler 12 with the arrangement direction (Y direction) of the sensor chips and the non-sensor chips, the temperature of the semiconductor element can be appropriately detected both on the upstream side and the downstream side of the cooler 12. Therefore, the temperature of the non-sensing chip having no sensing function can be estimated by the sensing chip in the vicinity thereof, so that the temperature control can be more effectively realized. In this way, even a semiconductor element having no sensing function can detect the chip temperature with an inexpensive configuration.

In the present embodiment, since there is no element corresponding to the pad 28 shown in fig. 6 of the reference example, the semiconductor element 3a and the semiconductor element 3d can be arranged so as to be shifted outward in the Y direction by a distance corresponding to the space of the pad 28. That is, the semiconductor element 3a is closer to the second flow path F2 than the semiconductor element 3d, and the semiconductor element 3c is closer to the first flow path F1 than the semiconductor element 3 b. This ensures the distance between semiconductor elements 3a and 3c in the flow direction of the refrigerant flowing directly below semiconductor element 3 (third flow path F3), and allows the temperature change of the refrigerant to be easily monitored.

In this embodiment, the sensing chip has not only a temperature sensing function but also a current sensing function. According to this structure, a short circuit can be detected by the current sensing function. In the present embodiment, the sensing chip has both a temperature sensing function and a current sensing function, but the present invention is not limited to this configuration. It is not necessary to have a current sensing function.

In the reference example, the terminal member 14 and the semiconductor element 3 are electrically connected via the electrode pads 28 on the insulating plate 20, whereas in the present embodiment, the terminal member 14 and the semiconductor element 3 are directly connected by the wiring member W. According to this configuration, since each electrode pad 28 can be omitted, the area of the laminated substrate 2 can be reduced, and the size and cost of the entire module can be reduced.

In the present embodiment, the plurality of terminal members 14 are provided on the upper arm and the lower arm, respectively. The plurality of terminal members 14 are arranged so that the upper arm and the lower arm face each other obliquely across the laminated substrate 2 in a plan view. According to this configuration, since the plurality of terminal members 14 are diagonally opposed in the Y direction, when a control board (printed circuit board) disposed on the upper surface of the module is mounted, the control board can be stably held by the plurality of opposed terminal members 14. The control board may be provided with a driving integrated circuit for controlling the switching element.

Although not particularly shown, the control board is formed of a printed circuit board having a rectangular shape in a plan view, which is long in the X direction, corresponding to the outer shape of the semiconductor module 1. The control board is formed with, for example, through holes corresponding to the outer terminal portions 16 of the terminal members 14. The control board is disposed at a predetermined position of the semiconductor module 1 by inserting the tip of the outer terminal portion 16 into the through hole.

In the reference example, the terminal member 14 is disposed only on one side in the Y direction, and therefore, even if the control board is disposed, the other side in the Y direction is not supported. Therefore, in the reference example, the control board cannot be stably held. Therefore, in the reference example, a support portion for supporting the control board to the housing member 11 (the annular wall portion 13) needs to be separately formed, and thus the structure becomes complicated.

In the present embodiment, the thermistor 4 is disposed on the upper surface of the laminated substrate 2 (insulating plate 20). With this configuration, the temperature of the refrigerant flowing below the laminated substrate 2 can be detected by the thermistor 4. Further, the thermistor 4 is preferably disposed on the downstream side in the flow direction of the refrigerant. This enables detection of the temperature of the refrigerant heated by the heat of the semiconductor element 3.

As described above, according to the present invention, the sensor chip and the non-sensor chip on the lower arm side are arranged in the opposite direction to the conventional one, and the arrangement direction of the sensor chip and the non-sensor chip is aligned with the direction in which the refrigerant flows, whereby the chip temperature can be detected with an inexpensive configuration even for a semiconductor element having no sensor function.

In the above embodiment, the number and arrangement positions of the semiconductor elements 3 arranged on the laminate substrate 2 are not limited to the above configuration, and can be changed as appropriate.

In the above embodiment, the number and layout of the circuit boards 22 are not limited to the above configuration, and can be changed as appropriate.

In the above embodiment, the semiconductor element 3 is formed in a rectangular shape in plan view, but the present invention is not limited to this configuration. The semiconductor element 3 may be formed in a polygonal shape other than a rectangular shape.

In the above embodiment, the upper arm and the lower arm of one phase are each configured by connecting 2 semiconductor elements in parallel, but the number of parallel-connected semiconductor elements may be 3 or more. The number of phases of the semiconductor module 1 may be any number of phases, not only single phase and three phases, but also more phases.

In the above-described embodiment, the case where the sense chip is disposed on the downstream side in the current flowing direction with respect to the non-sense chip in both the upper arm and the lower arm has been described, but the present invention is not limited to this configuration. In both the upper arm and the lower arm, the positional relationship between the sense chip and the non-sense chip may be reversed, and the sense chip may be disposed on the upstream side in the current flowing direction with respect to the non-sense chip. For example, the configuration shown in fig. 7 can be performed. Fig. 7 is a plan view showing a semiconductor module according to a modification. In fig. 7, the difference from fig. 3 is that: the arrangement of the semiconductor elements 3a, 3b, the arrangement of the semiconductor elements 3c, 3d, and the arrangement of the plurality of terminal members 14 are reversed, respectively. Therefore, only the differences will be mainly described, and the same reference numerals will be given to the common components, and the description thereof will be appropriately omitted.

As shown in fig. 7, the semiconductor element 3a as a first sensing chip having a sensing function of detecting temperature and the semiconductor element 3b as a first non-sensing chip having no sensing function are mounted in the first circuit board 23 so as to be aligned along the third flow path F3. Further, the semiconductor element 3c as a second sensing chip having a sensing function and the semiconductor element 3d as a second non-sensing chip having no sensing function are mounted on the third circuit board 25 in a row along the third flow path F3. The semiconductor element 3a is disposed to be biased toward the first flow path F1, and the semiconductor element 3c is disposed to be biased toward the second flow path F2. The P terminal is disposed on the first circuit board 23 so as to be offset toward the first flow path F1, and the M terminal is disposed on the third circuit board 25 so as to be offset toward the second flow path F2. In the embodiment shown in fig. 7, the first flow path F1 and the second flow path F2 may be exchanged with respect to the third flow path F3. At this time, in the third flow path F3, the refrigerant can flow from the M terminal side to the P terminal side.

With these configurations, as in the configuration of fig. 3, the distance between semiconductor elements 3a and 3c can be ensured in the flow direction of the refrigerant flowing directly below semiconductor element 3 (third flow path F3), and the temperature change of the refrigerant can be easily monitored. In particular, the semiconductor elements 3a and 3c can be arranged on the upstream side with respect to the direction of current flow indicated by the broken-line arrows in fig. 7. This makes it possible to monitor the temperature of the semiconductor elements 3a and 3c on the upstream side in the current direction, which is considered to have a larger load. The semiconductor elements 3a and 3c may be provided near the P terminal and the M terminal, and the semiconductor elements 3b and 3d may be provided at a distance.

In the above embodiment, the flow direction of the refrigerant flowing in the cooler 12 is directed in the Y direction. In this case, the refrigerant inlet and outlet may be on either side in the Y direction. That is, which side in the Y direction is upstream or downstream may be possible. For example, the side on which the thermistor 4 is disposed may be a refrigerant discharge side (downstream side).

The present embodiment and the modification are described, and the above embodiment and the modification may be combined in whole or in part as another embodiment.

In the embodiment shown in fig. 3 and 7, the semiconductor chip 3a (sensor chip) for the upper arm and the semiconductor chip 3c (sensor chip) for the lower arm are provided separately in the flow direction of the coolant and are disposed adjacent to each other at opposite corners of the laminated substrate 2. With this configuration, the temperature within the module can be monitored by the sensing chips that are separated on the upstream side and the downstream side of the refrigerant. In both the embodiments, the terminal member 14 connected to the semiconductor chip 3a for the upper arm and the terminal member 14 connected to the semiconductor chip 3c for the lower arm may be disposed adjacent to each other at opposite corners of the laminated substrate 2, apart from each other in the flow direction of the cooling medium. By the arrangement of these terminal members 14, the control board can be stably held. As shown in fig. 7, in the laminated substrate 2, the semiconductor chip 3a for the upper arm and the terminal member 14 may be provided on the P terminal side, and the semiconductor chip 3c for the lower arm and the terminal member 14 may be provided on the M terminal side. With this arrangement, regardless of the direction in which the refrigerant flows, the temperature in the module can be monitored by the sensing chip having a relatively large load.

The present embodiment is not limited to the above-described embodiments and modifications, and various changes, substitutions, and alterations can be made without departing from the spirit and scope of the technical idea. Further, if the technical idea can be realized by other methods due to technical progress or other derived techniques, the method can also be used for implementation. Therefore, the claims cover all embodiments that can be included within the scope of the technical idea.

Next, the characteristic points in the above embodiment are organized.

The semiconductor module described in the above embodiment includes: a cooler having a first channel and a second channel arranged in parallel and apart from each other, and a third channel connecting the first channel and the second channel; and a plurality of circuit boards mounted on the cooler and arranged in a direction intersecting the third flow paths, wherein the plurality of circuit boards have a first circuit board connected to the P terminal, a second circuit board connected to the N terminal, and a third circuit board connected to the M terminal, a first sensing chip having a sensing function of detecting temperature and a first non-sensing chip having no sensing function are mounted in the first circuit board so as to be arranged along the third flow path, a second sensing chip having the sensing function and a second non-sensing chip having no sensing function are mounted on the third circuit board so as to be aligned along the third flow path, the first sensor chip is disposed to be biased toward the second flow path, and the second sensor chip is disposed to be biased toward the first flow path.

In the semiconductor module according to the above-described embodiment, the first sense chip and the second sense chip further have a current sensing function of detecting a short circuit.

The semiconductor module according to the above-described embodiment further includes a case member that houses the laminated substrate, and that has a first terminal member and a second terminal member, the first sensor chip and the first terminal member being connected by a first wiring member, and the second sensor chip and the second terminal member being connected by a second wiring member.

In the semiconductor module according to the above-described embodiment, the terminal members are provided on the first sensor chip side and the second sensor chip side, respectively, and the terminal member provided on the first sensor chip side and the terminal member provided on the second sensor chip side are arranged so as to face obliquely across the laminated substrate in a plan view.

In the semiconductor module according to the above-described embodiment, a thermistor is disposed on the upper surface of the laminated substrate.

In the semiconductor module according to the above-described embodiment, the P terminal is disposed on the first circuit board so as to be offset toward the first flow path, and the M terminal is disposed on the third circuit board so as to be offset toward the second flow path.

In the semiconductor module according to the above-described embodiment, the P terminal is disposed on the first circuit board so as to be offset toward the second flow path, and the M terminal is disposed on the third circuit board so as to be offset toward the first flow path.

In the semiconductor module according to the above-described embodiment, an inlet port is provided in the first flow path, and an outlet port is provided in the second flow path.

Industrial applicability

As described above, the present invention has an effect that the internal temperature can be monitored with an inexpensive configuration, and is particularly useful for a semiconductor module.