阅读说明：本技术 功率放大器 (Power amplifier ) 是由 丁兆明 于 2019-11-29 设计创作，主要内容包括：本发明提供一种功率放大器电路,其包含电流产生器和电流镜驱动器。所述电流产生器具有连接到第一电压源的第一输入和被配置成产生第一电流的输出。所述电流产生器包含第一晶体管、第二晶体管、第一电阻器和第二电阻器。所述第一晶体管具有连接到地的发射极。所述第二晶体管具有连接到所述第一晶体管的基极的基极和连接到地的发射极。所述第一电阻器连接于所述第一电压源与所述第一晶体管的集极之间。所述第二电阻器连接于所述第一电压源与所述第二晶体管的集极之间。所述电流镜驱动具有连接到所述电流产生器的所述输出以接收所述第一电流的第一输入和被配置成产生第二电流的输出。(A power amplifier circuit includes a current generator and a current mirror driver. The current generator has a first input connected to a first voltage source and an output configured to generate a first current. The current generator includes a first transistor, a second transistor, a first resistor, and a second resistor. The first transistor has an emitter connected to ground. The second transistor has a base connected to the base of the first transistor and an emitter connected to ground. The first resistor is connected between the first voltage source and the collector of the first transistor. The second resistor is connected between the first voltage source and the collector of the second transistor. The current mirror drive has a first input connected to the output of the current generator to receive the first current and an output configured to generate a second current.)

1. A power amplifier circuit, comprising:

a current generator having a first input connected to a first voltage source and an output configured to generate a first current, the current generator comprising:

a first transistor having an emitter connected to ground;

a second transistor having a base connected to the base of the first transistor and an emitter connected to ground;

a first resistor connected between the first voltage source and a collector of the first transistor; and

a second resistor connected between the first voltage source and a collector of the second transistor; and

a current mirror drive having a first input connected to the output of the current generator to receive the first current and an output configured to generate a second current.

2. The power amplifier circuit of claim 1, wherein the first current has a current variation of less than 0.2% as the first voltage source has a voltage variation of about 2V.

3. The power amplifier circuit of claim 1, wherein the resistance of the first resistor is substantially the same as the resistance of the second resistor.

4. The power amplifier circuit of claim 1, wherein a ratio of a resistance of the first resistor to a resistance of the second resistor is about 2: 1.

5. The power amplifier circuit of claim 1, wherein the current generator further comprises:

a third transistor having a base connected to a second voltage source, an emitter connected to the base of the first transistor, and a collector connected to the collector of the first transistor; and

a fourth transistor having an emitter connected to the collector of the first transistor, wherein a base of the fourth transistor and a collector of the fourth transistor are connected to the first resistor.

6. The power amplifier circuit of claim 1, wherein the current generator further comprises:

a third resistor connected between the emitter of the first transistor and ground; and

a fourth resistor connected between the emitter of the second transistor and ground.

7. The power amplifier circuit of claim 1, further comprising:

a first transistor having an emitter connected to the output of the current generator and a collector connected to a second input of the current mirror driver;

a first resistor connected between the collector and base of the first transistor; and

a second resistor connected between a second voltage source and the base of the first transistor.

8. The power amplifier circuit of claim 1, wherein the current mirror driver comprises:

a first transistor having an emitter connected to ground and a collector connected to the output of the current generator;

a second transistor having a base connected to a second input of the current mirror driver, an emitter connected to the base of the first transistor, and a collector connected to a second voltage source;

a first resistor connected between the base of the first transistor and the emitter of the second transistor; and

a second resistor connected between the emitter of the second transistor and the output of the current mirror driver.

9. The power amplifier circuit of claim 8, wherein the current mirror driver further comprises a third resistor connected between the base of the first transistor of the current mirror driver and the second resistor of the current mirror driver.

10. The power amplifier circuit of claim 1, further comprising a first transistor having an emitter connected to ground, a base connected to the output of the current mirror driver and configured to receive the second current, and a collector connected to an output matching element (OMN).

11. The power amplifier circuit of claim 1, wherein the output of the current mirror driver is connected to an input matching element (IMN).

12. The power amplifier circuit of claim 1, wherein the first current has a current variation of less than 1.5% as the operating temperature of the power amplifier changes from about-55 ℃ to about 125 ℃.

13. The power amplifier circuit of claim 1 wherein the current generator and the current mirror driver comprise only one type of transistor, and wherein the transistor is a Heterojunction Bipolar Transistor (HBT).

14. A power amplifier circuit, comprising:

a current generator having a first input connected to a first voltage source and an output configured to generate a first current; and

a bandgap circuit having a first input connected to the output of the current generator to receive the first current and an output configured to generate a reference voltage.

15. The power amplifier circuit of claim 14 wherein the first current has a current variation of less than 0.2% as the first voltage source has a voltage variation of about 2V.

16. The power amplifier circuit of claim 14, wherein the current generator further comprises:

a first transistor having an emitter connected to ground;

a second transistor having a base connected to the base of the first transistor and an emitter connected to ground;

a first resistor connected between the first voltage source and a collector of the first transistor; and

a second resistor connected between the first voltage source and the collector of the second transistor.

17. The power amplifier circuit of claim 16, wherein the resistance of the first resistor is substantially the same as the resistance of the second resistor.

18. The power amplifier circuit of claim 16, wherein a ratio of the resistance of the first resistor to the resistance of the second resistor is about 2: 1.

19. The power amplifier circuit of claim 16, wherein the current generator further comprises:

a third transistor having a base connected to a second voltage source, an emitter connected to the base of the first transistor, and a collector connected to the collector of the first transistor;

a fourth transistor having an emitter connected to the collector of the first transistor, wherein a base of the fourth transistor and a collector of the fourth transistor are connected to the first resistor;

a third resistor connected between the emitter of the first transistor and ground; and

a fourth resistor connected between the emitter of the second transistor and ground.

20. The power amplifier circuit of claim 14, further comprising:

a first transistor having an emitter connected to the output of the current generator and a collector connected to a second input of the bandgap circuit;

a first resistor connected between the collector and base of the first transistor; and

a second resistor connected between a second voltage source and the base of the first transistor.

21. The power amplifier circuit of claim 14, wherein the bandgap circuit comprises:

a first transistor having an emitter connected to ground and a collector connected to the output of the current generator;

a second transistor having an emitter connected to ground through a first resistor and a collector connected to a base of the first transistor;

a third transistor having an emitter connected to ground, a base connected to a base of the second transistor, and a collector connected to the base of the second transistor;

a fourth transistor having an emitter connected to the base of the first transistor through a second resistor, a collector connected to a second input of the bandgap circuit, and a collector connected to a second voltage source;

a third resistor connected between the emitter of the fourth transistor and the base of the second transistor;

a fourth resistor connected between the third resistor and the base of the second transistor; and

a fifth resistor connected between the third resistor and the base of the third transistor.

22. The power amplifier circuit of claim 14 wherein the first current has a current variation of less than 1.5% as the operating temperature of the power amplifier changes from about-55 ℃ to about 125 ℃.

Technical Field

The present disclosure relates to a power amplifier, and more particularly, to a bias circuit for a power amplifier.

Background

A power amplifier is a circuit in a wireless transceiver for amplifying a signal to be transmitted. As the complexity of the circuitry in the wireless transceiver increases, the power amplifier should have more functionality and better performance. However, since the bias voltage or current of the power amplifier may vary with operating temperature or voltage source changes, this will adversely affect the performance of the power amplifier.

Disclosure of Invention

According to an aspect of the present disclosure, a power amplifier circuit includes a current generator and a current mirror driver. The current generator has a first input connected to a first voltage source and an output configured to generate a first current. The current generator includes a first transistor, a second transistor, a first resistor, and a second resistor. The first transistor has an emitter connected to ground. The second transistor has a base connected to the base of the first transistor and an emitter connected to ground. The first resistor is connected between the first voltage source and the collector of the first transistor. The second resistor is connected between the first voltage source and the collector of the second transistor. The current mirror drive has a first input connected to the output of the current generator to receive the first current and an output configured to generate a second current.

According to another aspect of the present disclosure, a power amplifier circuit includes a current generator and a bandgap circuit. The current generator has a first input connected to a first voltage source and an output configured to generate a first current. The bandgap circuit has a first input connected to the output of the current generator to receive the first current and an output configured to generate a reference voltage.

Drawings

Fig. 1A is a schematic diagram illustrating a power amplifier according to some embodiments of the present disclosure.

Fig. 1B, 1C, 1D, 1E, 1F, 1G, and 1H illustrate simulation results of the power amplifier shown in fig. 1A according to some embodiments of the present disclosure.

Fig. 2 is a schematic diagram illustrating a power amplifier according to some embodiments of the present disclosure.

Fig. 3 is a schematic diagram illustrating a power amplifier according to some embodiments of the present disclosure.

Fig. 4 is a schematic diagram illustrating a power amplifier according to some embodiments of the present disclosure.

Fig. 5A is a schematic diagram illustrating a bandgap reference circuit according to some embodiments of the present disclosure.

Fig. 5B, 5C, and 5D illustrate simulation results of the bandgap reference circuit shown in fig. 5A, according to some embodiments of the present disclosure.

Fig. 6 is a schematic diagram illustrating a bandgap reference circuit according to some embodiments of the present disclosure.

Fig. 7 is a schematic diagram illustrating a bandgap reference circuit according to some embodiments of the present disclosure.

Fig. 8 is a schematic diagram illustrating a bandgap reference circuit according to some embodiments of the present disclosure.

Common reference numerals are used throughout the drawings and detailed description to refer to the same or like components. The present invention will be readily understood by the following detailed description in conjunction with the accompanying drawings.

Detailed Description

Although described with particular reference to portable transceivers, the circuits and methods for biasing gallium arsenide (GaAs) power amplifiers (also referred to as GaAs bias circuits) may be implemented in any GaAs device that requires the provision of bias currents and voltages. Furthermore, the circuits described below may be fabricated using an integrated bipolar field effect transistor (BIFET) process that utilizes the lower turn-on voltage of a field effect transistor. Furthermore, in particular embodiments, the transistors described below include bipolar junction transistors (referred to as BJTs) fabricated using a process referred to as a BIFET process or a BiHEMT process, including heterojunction bipolar junction transistors (referred to as HBTs) and field effect transistors (referred to as FETs) or pseudomorphic high electron mobility transistors (referred to as phemts). In some embodiments, the transistors described below may be fabricated using a process referred to as GaAs, indium phosphide (InP), silicon-germanium (SiGe), gallium nitride (GaN), Complementary Metal Oxide Semiconductor (CMOS), silicon-on-insulator (SOI), or any other suitable process.

As used herein, reference to a base, emitter, collector, or other component of a transistor or other circuit component being connected to a base, emitter, collector, or other component of another transistor or other circuit component may refer to a direct connection, or to a connection between which another circuit component (e.g., a transistor) is disposed.

Fig. 1A is a schematic diagram illustrating a power amplifier 100 according to some embodiments of the present disclosure. Power amplifier 100 includes a current generator 110, a zero-gain transistor switch 120, a current mirror driver 130, and a transistor M141. In some embodiments, all of the transistors of power amplifier 100 are HBTs. Alternatively, power amplifier 100 may include any other type of transistor.

The current generator 110 includes transistors M111, M112, M113, and M114, and resistors R111 and R112. The emitters of transistors M111 and M112 are connected to ground, the base of transistor M111 is connected to the base of transistor M112. The collector of the transistor M111 is connected to the collector of the transistor M113 and the emitter of the transistor M114. The collector of the transistor M112 is connected to the resistor 112. The emitter of transistor M113 is connected to the bases of transistors M111 and M112. The base of transistor M113 is connected to receive a control voltage (or enable voltage) V110. The collector of the transistor M113 is connected to the emitter of the transistor M114 and the collector of the transistor M111. The base and collector of transistor M114 are connected to resistor R111. Resistor R111 is connected between voltage source VDD1 and transistor M114. Resistor R112 is connected between voltage source VDD1 and transistor M112.

The current generator 110 is configured to receive a control voltage V110 and generate a current I110 if the control voltage V110 exceeds a threshold (e.g., 3.2V). In some embodiments, the current I110 may be expressed by the following equation:

in the case where the value of resistor R111 is equal to the value of resistor R112, current I110 may be expressed by the following equation, where current I110 is independent of voltage source VDD 1:

in the case where the value of resistor R111 is two times greater than the value of resistor R112, current I110 may be expressed by the following equation, where current I110 is independent of the operating temperature of power amplifier 100:

fig. 1B, 1C, 1D, 1E, 1F, 1G, and 1H illustrate simulation results of the power amplifier 100 according to some embodiments of the present disclosure. As shown in FIG. 1B, the x-axis represents the control voltage V110(V) and the y-axis represents the current I110 (mA). As shown in FIG. 1C, the x-axis represents the control voltage V110(V) and the y-axis represents the current I110 (mA). As shown in fig. 1D, the x-axis represents the operating temperature (° c) of the power amplifier 100, and the y-axis represents the current I110 (mA). As shown in FIG. 1E, the x-axis represents the voltage source (V) and the y-axis represents the current I110 (mA). As shown in fig. 1F, the x-axis represents the operating temperature (° c) of the power amplifier 100, and the y-axis represents the currents I131 and I141 (mA). As shown in FIG. 1G, the x-axis represents the voltage source VDD2(V) and the y-axis represents the current I131 (mA). As shown in FIG. 1H, the x-axis represents the voltage source VDD2(V) and the y-axis represents the current I141 (mA).

In some embodiments, the current generator 110 is configured to generate a substantially constant current I110 (e.g., about 179mA) once the control voltage V110 exceeds a threshold. In some embodiments, the values of the threshold and the current I110 may vary depending on different specifications.

As shown in fig. 1B, in the case where the control voltage V110 is less than 2.3V, the current I110 of the current generator 110 is about 0 mA. In other words, no output current is generated when the current generator 110 is turned off. This may reduce power consumption of the power amplifier 100. According to an embodiment, when the current generator 110 is turned on (e.g., the control voltage V110 exceeds 3.2V), the current I110 is insensitive to deviations of the control voltage V110. For example, as shown in fig. 1C, which illustrates simulation results of the power amplifier 100, the current I110 has a variation of less than 0.2% as the control voltage V110 changes from about 3.5V to about 5.5V.

The current generator 110 is also insensitive to the operating temperature of the power amplifier or to deviations in the voltage source VDD 1. For example, as shown in fig. 1D, as the operating temperature of power amplifier 100 changes from about-55 ℃ to about 125 ℃, current I110 has a variation of less than 1.5%. For example, as shown in FIG. 1E, as the voltage source VDD1 changes from about 4V to about 6V, the current I110 has a variation of less than 0.2%. According to the embodiment as shown in fig. 1A-1E, the current generator 110 may provide a steady current bias (e.g., current I110) that is insensitive to operating temperature and to deviations in the voltage source VDD1, which will improve the performance of the power amplifier 100. .

The zero-gain transistor switch 120 includes a transistor M121 and resistors R121 and R122. The emitter of transistor M121 is connected to the output of current generator 110 (e.g., to the collector of transistor M112 and resistor R112). The resistor R122 is connected between the base and the collector of the transistor M121. Resistor R121 is connected between control voltage V110 and the base of transistor M121 in some embodiments, transistor M121 may act as a diode when control voltage V110 is less than a threshold. When the control voltage exceeds the threshold, transistor M121 and resistors R121 and R122 act as a zero-gain amplifier that can maintain the voltage at the base of transistor M132 of current mirror driver 130 at a substantially constant voltage, which in turn maintains a substantially constant current (e.g., current I141 flowing through transistor M141) at the output stage of power amplifier 100.

In some embodiments, the zero-gain transistor switch 120 may be omitted or replaced with a diode. However, the current I141 will vary as the control voltage V110 increases. For example, as the control voltage V110 increases from about 3V to about 5.5V, the current I141 may have a deviation of about 120 mA. Such a deviation of the current I141 will adversely affect the performance of the power amplifier 100. By using a zero-gain transistor switch 120 as shown in fig. 1A, current I141 may be maintained at a substantially constant value. For example, as the control voltage V110 increases from about 3V to about 5.5V, the current I141 may have a deviation of less than about 1 mA.

The current mirror driver 130 includes transistors M131, M132 and resistors R131 and R132. The emitter of the transistor M131 is connected to ground. The base of the transistor M131 is connected to the resistor R131. The collector of transistor M131 is connected to the output of the current generator (e.g., to the collector of transistor M112 and resistor R112) and to zero-gain amplifier switch 120 (e.g., to the emitter of transistor M121). The emitter of the transistor M132 is connected to the resistors R131 and R132. The base of transistor M132 is connected to zero-gain amplifier switch 120 (e.g., to the collector of transistor M121). The collector of transistor M132 is connected to a voltage source VDD 2. The resistor R131 is connected between the emitter of the transistor M132 and the base of the transistor M131. The resistor R132 is connected between the emitter of the transistor M132 and the base of the transistor M141. In some embodiments, transistors R131 and R132 are configured to adjust or tune the temperature profile of power amplifier 100.

The current mirror driver 130 is configured to generate a current I130 to the base of transistor M141 from a current I131 flowing through transistor M131. In other words, an output current (e.g., current I141) is generated from current I131. For example, transistor M131 may act as a current mirror for transistor M141. In some embodiments, transistor M131 has a higher current density than transistor M141, and thus the voltage between the base and emitter (Vbe) of transistor M131 is higher than the voltage of transistor M141. The difference between Vbe of transistor M131 and Vbe of transistor M141 can make current I141 independent of changes in the operating temperature of power amplifier 100 by adjusting the values of resistors R131 and R132.

As shown in fig. 1F, current I131 has a deviation of less than about 9% as the operating temperature of power amplifier 100 changes from about-55 ℃ to about 125 ℃, and current I141 has a deviation of less than about 2% as the operating temperature of power amplifier 100 changes from about-55 ℃ to about 125 ℃. As shown in fig. 1G and 1H, current I131 has a deviation of less than about 5% as voltage source VDD2 changes from about 3.2V to about 6V, and current I141 has a deviation of less than about 5% as voltage source VDD2 changes from about 3.2V to about 6V. The stable DC current bias provided to transistor M141 will improve the performance of the power amplifier 100.

Fig. 2 is a schematic diagram illustrating a power amplifier 200 according to some embodiments of the present disclosure. Power amplifier 200 is similar to power amplifier 100 as shown in fig. 1A, except that current mirror driver 230 of power amplifier 200 additionally includes a resistor R231 connected between the base of transistor M131 and transistor M141. In some embodiments, resistor R231 may act as a dynamic bias resistor, which may increase the 1dB compression point (P1dB) of power amplifier 200 and improve the performance of power amplifier 200.

Fig. 3 is a schematic diagram illustrating a power amplifier 300 according to some embodiments of the present disclosure. The power amplifier 300 is similar to the power amplifier 200 as shown in fig. 2, except that the current generator 310 of the power amplifier 300 additionally comprises resistors R311 and R312. The resistor R311 is connected between the emitter of the transistor M111 and ground. The resistor R312 is connected between the emitter of the transistor M112 and ground. The resistors R311 and R312 may reduce the sensitivity of the current generator 310 during the manufacturing process and increase the accuracy of the relationship between the currents flowing through the transistors M111 and M112.

Fig. 4 is a schematic diagram illustrating a power amplifier 400 according to some embodiments of the present disclosure. Power amplifier 400 is similar to power amplifier 100 as shown in fig. 1A, except that current mirror driver 430 of power amplifier 400 additionally includes a resistor R431 connected between the emitter of transistor M131 and ground. The resistor R431 may reduce the aspect ratio of the transistor M131 to reduce the size of the power amplifier 400.

Fig. 5A is a schematic diagram illustrating a bandgap reference circuit 500 according to some embodiments of the present disclosure. The bandgap reference circuit 500 includes a current generator 110, a zero-gain amplifier switch 120, and a bandgap core 510. In some embodiments, the current generator 110 and the zero-gain amplifier switch 120 of the bandgap reference circuit 500 are the same as the current generator 110 and the zero-gain amplifier switch 120 of the power amplifier 100 as shown in fig. 1A, and the description thereof is also applicable herein. In other embodiments, the current generator 110 of the bandgap reference circuit 500 may be replaced with the current generator 310 of the power amplifier 300 as shown in fig. 3.

The bandgap core 510 includes transistors M511, M512, M513, M514 and resistors R511, R512 and R513. The emitter of the transistor M511 is connected to ground. The base of transistor M511 is connected to the collector of transistor M512. The collector of the transistor M511 is connected to the current generator 110 (e.g., to the collector of the transistor M112) and the zero-gain amplifier switch 120 (e.g., to the emitter of the transistor M121). The emitter of transistor M512 is connected to ground through resistor R513. The base of transistor M512 is connected to the collector and base of transistor M513. The emitter of the transistor M513 is connected to ground. The emitter of the transistor M514 is connected to the resistors R511 and R512. The base of transistor M514 is connected to zero-gain amplifier switch 120 (e.g., to the collector of transistor M121). The collector of transistor M514 is connected to a voltage source VDD 1.

Fig. 5B, 5C, and 5D illustrate simulation results of a bandgap reference circuit 500 according to some embodiments of the present disclosure. As shown in FIG. 5B, the x-axis represents the operating temperature (deg.C) of the bandgap reference circuit 500, and the y-axis represents the voltage V500(mV) at the output of the bandgap reference circuit 500. As shown in FIG. 5C, the x-axis represents voltage source VDD1(V), and the y-axis represents voltage V500(mV) at the output of bandgap reference circuit 500. As shown in FIG. 5D, the x-axis represents the control voltage V110(V) and the y-axis represents the voltage V500(mV) at the output of the bandgap reference circuit 500.

As shown in fig. 5B, voltage V500 has a variation of less than 0.008% as the operating temperature of bandgap reference circuit 500 changes from about-55 ℃ to about 125 ℃. As shown in fig. 5C, the voltage V500 has a variation of less than 0.002% as the voltage source VDD1 changes from about 4.5V to about 5.5V. As shown in fig. 5D, the voltage V500 has a variation of less than 0.002% as the current generator 110 changes from about 3.5V to about 5.5V. The bandgap reference circuit 500 may provide a stable reference voltage that is insensitive to operating temperature, the voltage source VDD1, and the control voltage V110. This may increase the Power Supply Rejection Ratio (PSRR) of the bandgap reference circuit 500 and improve the performance of the bandgap reference circuit 500.

Fig. 6 is a schematic diagram illustrating a bandgap reference circuit 600 according to some embodiments of the present disclosure. The bandgap reference circuit 600 is similar to the bandgap reference circuit 500 as shown in fig. 5A, except that the bandgap core 610 of the bandgap reference circuit 600 additionally includes resistors R611 and R612. The resistor R611 is connected between the base of the transistor M513 and the resistor R512. The resistor R612 is connected between the collector of the transistor M513 and the resistor R512.

Fig. 7 is a schematic diagram illustrating a bandgap reference circuit 700 according to some embodiments of the present disclosure. The bandgap reference circuit 700 is similar to the bandgap reference circuit 600 as shown in fig. 6, except that the current generator 710 of the bandgap reference circuit 700 additionally includes a transistor M711 and the bandgap core 720 of the bandgap reference circuit 700 additionally includes a resistor R721. The transistor M711 is connected between the resistor R111 and the collector of the transistor M114. The resistor R721 is connected between the base of the transistor M511 and ground.

Fig. 8 is a schematic diagram illustrating a bandgap reference circuit 800 according to some embodiments of the present disclosure. The bandgap reference circuit 800 is similar to the bandgap reference circuit 700 as shown in fig. 7, except that the bandgap reference circuit 810 of the bandgap reference circuit 800 additionally includes a resistor R811. The resistor R811 is connected between the resistor R512 and ground.

As used herein, the singular terms "a" and "the" may include plural referents unless the context clearly dictates otherwise.

Additionally, amounts, ratios, and other numerical values are sometimes presented herein in a range format. It is to be understood that such range format is used for convenience and brevity, and should be interpreted flexibly to include not only the numerical values explicitly recited as the limits of the range, but also to include all the individual numerical values or sub-ranges encompassed within that range as if each numerical value and sub-range is explicitly recited.

As used herein, and without further definition, the terms "approximately," "substantially," "about," and "about" are used to indicate and explain minor variations. When used in conjunction with an event or circumstance, the terms can encompass the occurrence of the event or circumstance specifically and the close approximation of the event or circumstance. For example, when used in conjunction with numerical values, the term can encompass a range of variation that is less than or equal to ± 10% of the numerical value, such as less than or equal to ± 5%, less than or equal to ± 4%, less than or equal to ± 3%, less than or equal to ± 2%, less than or equal to ± 1%, less than or equal to ± 0.5%, less than or equal to ± 0.1%, or less than or equal to ± 0.05%. For example, two numerical values are "substantially" identical or equal if the difference between the two numerical values is less than or equal to ± 10% of the mean of the values, such as less than or equal to ± 5%, less than or equal to ± 4%, less than or equal to ± 3%, less than or equal to ± 2%, less than or equal to ± 1%, less than or equal to ± 0.5%, less than or equal to ± 0.1%, or less than or equal to ± 0.05%.

While the present disclosure has been described and illustrated with reference to particular embodiments thereof, such description and illustration are not intended to limit the present disclosure. It will be clearly understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof within the embodiments without departing from the true spirit and scope of the present disclosure as defined by the appended claims. The illustrations may not be drawn to scale. There may be a difference between the technical reproduction in the present disclosure and the actual device due to variables in the manufacturing process and the like. There may be other embodiments of the disclosure that are not specifically illustrated. The specification and drawings are to be regarded in an illustrative rather than a restrictive sense. Modifications may be made to adapt a particular situation, material, composition of matter, method, or process to the objective, spirit and scope of the present disclosure. All such modifications are intended to be within the scope of the appended claims. Although the methods disclosed herein have been described with reference to particular operations performed in a particular order, it should be understood that these operations may be combined, sub-divided, or reordered to form equivalent methods without departing from the teachings of the present disclosure. Accordingly, unless specifically indicated herein, the order and grouping of the operations is not a limitation of the present disclosure.