阅读说明：本技术 半导体裸片的临时后辅助嵌入 (Temporary post-assist embedding of semiconductor die ) 是由 R·克尼佩尔 T·沙夫 于 2020-08-21 设计创作，主要内容包括：一种方法,其包括：提供具有第一主表面、与第一主表面相反的第二主表面和第一主表面与第二主表面之间的边缘的半导体裸片；将临时间隔件施加到所述半导体裸片的第一主表面的第一部分,所述第一部分相对于所述第一主表面的外周部分向内定位；在施加所述临时间隔件之后,将所述半导体裸片至少部分地嵌入到嵌入材料中,所述嵌入材料覆盖所述边缘和所述半导体裸片的第一主表面的外周部分,并接触所述临时间隔件的侧壁；以及在所述嵌入之后,将所述临时间隔件从所述半导体裸片的第一主表面移除,以暴露所述半导体裸片的第一主表面的第一部分。还提供了通过所述方法生产的半导体装置。(A method, comprising: providing a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first and second major surfaces; applying a temporary spacer to a first portion of a first major surface of the semiconductor die, the first portion being located inward relative to a peripheral portion of the first major surface; after applying the temporary spacer, at least partially embedding the semiconductor die in an embedding material that covers the edge and a peripheral portion of the first major surface of the semiconductor die and contacts a sidewall of the temporary spacer; and removing the temporary spacer from the first major surface of the semiconductor die after the embedding to expose a first portion of the first major surface of the semiconductor die. Semiconductor devices produced by the method are also provided.)

1. A method, comprising:

providing a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first and second major surfaces;

applying a temporary spacer to a first portion of a first major surface of the semiconductor die, the first portion being located inward relative to a peripheral portion of the first major surface;

after applying the temporary spacer, at least partially embedding the semiconductor die in an embedding material that covers the edge of the semiconductor die and a peripheral portion of the first major surface and contacts a sidewall of the temporary spacer; and

after the embedding, the temporary spacer is removed from the first major surface of the semiconductor die to expose a first portion of the first major surface of the semiconductor die.

2. The method of claim 1, wherein the method further comprises:

prior to the embedding, fixing a side of the temporary spacer facing away from the semiconductor die to a surface of a carrier; and

a frame is secured to a surface of a carrier such that a gap exists between the frame and an edge of the semiconductor die.

3. The method of claim 2, wherein the embedding comprises:

applying the embedding material into a gap between the frame and an edge of the semiconductor die; and

after the applying, removing the carrier from the temporary spacer and the frame.

4. The method of claim 3, wherein a height of the frame is greater than a combined height of the semiconductor die and the temporary spacer, wherein the embedding material covers the second major surface of the semiconductor die and a side of the frame facing the same direction as the second major surface of the semiconductor die.

5. The method of claim 1, wherein the first major surface of the semiconductor die comprises a metal pad, wherein the temporary spacer at least partially covers the metal pad during the embedding, wherein the metal pad is exposed after the embedding by removing the temporary spacer.

6. The method of claim 5, wherein the method further comprises:

applying an additional first temporary spacer to an additional metal pad located at a first major surface of a semiconductor die, the additional first temporary spacer at least partially covering the additional metal pad during the embedding;

removing the additional first temporary spacers from additional metal pads of the semiconductor die after the embedding to expose the additional metal pads; and

a first metallization structure is formed on the exposed metal pad and a second metallization structure is formed on the exposed additional metal pad.

7. The method of claim 6, wherein the method further comprises:

applying an additional second temporary spacer onto the first metallization structure and an additional third temporary spacer onto the second metallization structure;

after applying the second temporary spacer and the third temporary spacer, applying additional embedding material to a side of the embedding material facing away from the semiconductor die;

after applying the additional embedding material, removing a second temporary spacer and a third temporary spacer to expose a portion of the first metallization structure previously covered by the second temporary spacer and to expose a portion of the second metallization structure previously covered by the third temporary spacer; and

a third metallization structure is formed on the exposed portion of the first metallization structure and a fourth metallization structure is formed on the exposed portion of the second metallization structure.

8. The method of claim 1, wherein applying the temporary spacer comprises:

applying a photoresist to a first major surface of a semiconductor die;

exposing the photoresist such that a first region of the photoresist covering a first portion of the first major surface of the semiconductor die is insoluble and a second region of the photoresist covering a peripheral portion of the first major surface of the semiconductor die is soluble; and

removing the soluble portion of the photoresist from the peripheral portion of the first major surface of the semiconductor die.

9. The method of claim 8, wherein the photoresist is exposed such that insoluble portions of the photoresist have sloped sidewalls that form sidewalls of the temporary spacers; or wherein the photoresist comprises a first photoresist layer on the first major surface of the semiconductor die and a second photoresist layer on the first photoresist layer, wherein the first and second photoresist layers are differently exposed such that an insoluble portion of the photoresist has an undercut structure that forms a portion of a sidewall of the temporary spacer.

10. The method of claim 1, wherein the method further comprises:

prior to the embedding, fixing a side of the temporary spacer facing away from the semiconductor die onto a surface of the temporary carrier; and

after the embedding, removing the temporary carrier to expose a temporary spacer for removal,

wherein the embedding material is a molding compound and the embedding is accomplished without the membrane using a mold.

11. The method of claim 1, wherein the embedding comprises:

pressing a mold with a membrane against the temporary spacer in a closed mold cavity such that the membrane contacts a side of the temporary spacer facing away from the semiconductor die and the membrane deforms to the contour shape of the temporary spacer while leaving a gap between the membrane and the outer peripheral portion of the first main surface of the semiconductor die; and

a liquefied molding material is then forced into the closed mold cavity, the liquefied molding material filling a gap between the diaphragm and the peripheral portion of the first major surface of the semiconductor die.

12. The method of claim 1, wherein a first portion of the first major surface of the semiconductor die comprises a sensor structure, wherein the temporary spacer at least partially covers a first side of the sensor structure during the embedding, wherein the first side of the sensor structure is exposed after the embedding by removing the temporary spacer.

13. The method of claim 12, wherein the method further comprises:

applying an additional temporary spacer to a second side of the sensor structure opposite the first side, the additional temporary spacer at least partially covering the second side of the sensor structure during the embedding; and

after the embedding, removing the additional temporary spacer from the second side of the sensor structure to expose the second side of the sensor structure.

14. The method of claim 1, wherein the method further comprises:

providing an additional semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first and second major surfaces;

applying an additional temporary spacer to a first portion of a first major surface of the additional semiconductor die, the first portion being located inward relative to a peripheral portion of the first major surface,

wherein the additional semiconductor die has a different thickness than the semiconductor die,

wherein the temporary spacer and the additional temporary spacer accommodate a height difference between the additional semiconductor die and the semiconductor die such that a combined thickness of the semiconductor die and the temporary spacer is approximately equal to a combined thickness of the additional semiconductor die and the additional temporary spacer.

15. The method of claim 14, wherein the embedding comprises:

pressing the mold with the membrane against the two temporary spacers in the closed mold cavity, such that the membrane contacts a side of the two temporary spacers facing away from the two semiconductor dies, and such that the membrane deforms to the contour shape of the two temporary spacers, while leaving a gap between the membrane and the outer peripheral portions of the first main surfaces of the two semiconductor dies; and

liquefied molding material is then forced into the closed mold cavity, the liquefied molding material filling a gap between the membrane and peripheral portions of the first major surfaces of the two semiconductor dies.

16. The method of claim 15, wherein the method further comprises:

after the embedding, removing the additional temporary spacer from the first major surface of the additional semiconductor die to expose a first portion of the first major surface of the additional semiconductor die; and

after removing the two temporary spacers, a metallization structure is formed which extends to a side of the embedding material facing away from the two semiconductor dies and is connected to a first portion of the first main surface of the semiconductor die and a first portion of the first main surface of the additional semiconductor die.

17. A method, comprising:

providing a semiconductor wafer having a plurality of semiconductor dies, each semiconductor die of the plurality of semiconductor dies having a first major surface, a second major surface opposite the first major surface;

applying a temporary spacer to a first portion of a first major surface of each of the semiconductor dies, the first portion being located inwardly relative to a peripheral portion of the first major surface;

singulating the plurality of semiconductor dies after applying the temporary spacers so as to separate the semiconductor dies and form an edge between the first and second major surfaces of each singulated die;

after the singulating, at least partially embedding each of the singulated semiconductor dies in an embedding material that covers the edges and peripheral portions of the first major surface of each of the singulated semiconductor dies and contacts sidewalls of the respective temporary spacers; and

after the embedding, removing the temporary spacer from the first major surface of the singulated semiconductor die to expose a first portion of the first major surface of the singulated semiconductor die.

18. The method of claim 17, wherein applying the temporary spacer comprises:

applying photoresist to a first major surface of the plurality of semiconductor dies prior to the singulating;

exposing the photoresist such that a first region of the photoresist covering a first portion of the first major surface of each of the semiconductor dies is insoluble and a second region of the photoresist covering a peripheral portion of the first major surface of each of the semiconductor dies is soluble; and

the soluble portion of the photoresist is removed from the peripheral portion of the first major surface of each of the semiconductor dies.

19. A semiconductor device, comprising:

a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first and second major surfaces;

a molding compound covering the edge of the semiconductor die and a peripheral portion of the first major surface, the molding compound including a resin and filler particles embedded within the resin; and

an opening in the mold compound exposing a first portion of a first major surface of the semiconductor die from the mold compound, the first portion being located inward relative to the peripheral portion,

wherein the opening in the molding compound has a sidewall,

wherein predominantly all filler particles disposed along the sidewalls of the opening are completely embedded within the resin and not exposed at all along the sidewalls.

20. The semiconductor device of claim 19, wherein a metal pad of the semiconductor die is exposed from the mold compound through the opening, wherein a metallization structure is formed on an exposed portion of the metal pad.

Technical Field

The present disclosure relates generally to semiconductor technology. More particularly, the present disclosure relates to an embedding method for a semiconductor device and a semiconductor device.

Background

Molding is a standard encapsulation method for semiconductor dies. In many cases, it is preferable to exclude certain areas of the device from the mold application. Typically, this is done by Film Assisted Molding (FAM). Film-assisted molding is a molding process that utilizes a membrane that seals the encapsulated area of the device to an unwanted mold. The membrane must accommodate the height and dimensional tolerances of the encapsulated device and must also be pressed against the device with great force to avoid mold flash. These competing requirements create costly compromises and result in the formation of inappropriate edges at the topographical features of the encapsulated device. In other cases, it may be necessary to protect the features from high local pressures of the diaphragm and/or may require topographies (topologies) that are too small to be formed by a mold stamp covered with a thick diaphragm.

The underfill compound may be applied and/or the size of the filler particles contained in the molding compound may be reduced. However, in both cases, reduced mechanical stability and/or isolation problems can lead to reduced long-term stability. Underfill and smaller filler particles also increase material costs by up to 100 times. In addition, these methods include exposed imide/Cu plating boundary regions, which can cause long term stability problems due to interface uncertainty. These methods do not use film assisted forming and therefore many products are not possible. In many cases, the features are opened after molding, which is laborious and can damage the underlying structure.

Accordingly, there is a need for an improved embedding process for semiconductor devices.

Disclosure of Invention

According to one embodiment of a method, the method comprises: providing a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first major surface and the second major surface; applying a temporary spacer to a first portion of a first major surface of the semiconductor die, the first portion being located inward relative to a peripheral portion of the first major surface; after applying the temporary spacer, at least partially embedding the semiconductor die in an embedding material that covers the edge and a peripheral portion of the first major surface of the semiconductor die and contacts a sidewall of the temporary spacer; and removing the temporary spacer from the first major surface of the semiconductor die after the embedding to expose a first portion of the first major surface of the semiconductor die.

According to one embodiment of a method, the method comprises: providing a semiconductor wafer having a plurality of semiconductor dies, each semiconductor die of the plurality of semiconductor dies having a first major surface, a second major surface opposite the first major surface; applying a temporary spacer to a first portion of a first major surface of each of the semiconductor dies, the first portion being located inward relative to a peripheral portion of the first major surface; after applying the temporary spacers, singulating the plurality of semiconductor dies so as to form an edge between the first and second major surfaces of each die; after the singulating, at least partially embedding each of the singulated semiconductor dies in an embedding material that covers the edge and a peripheral portion of the first major surface of each of the singulated semiconductor dies and contacts a sidewall of the respective temporary spacer; and removing the temporary spacer from the first major surface of the singulated semiconductor die after the embedding to expose a first portion of the first major surface of the singulated semiconductor die.

According to one embodiment of a semiconductor device, the semiconductor device comprises: a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first major surface and the second major surface; a molding compound covering the edge and a peripheral portion of the first major surface of the semiconductor die, the molding compound including a resin and filler particles embedded within the resin; and an opening in the mold compound exposing a first portion of the first major surface of the semiconductor die from the mold compound, the first portion being located inward relative to the peripheral portion, wherein the opening in the mold compound has sidewalls, wherein substantially all of the filler particles disposed along the sidewalls of the opening are completely embedded within the resin and not exposed along the sidewalls at all.

Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings.

Drawings

The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts. Features of the various illustrated embodiments may be combined unless they are mutually exclusive. Embodiments are depicted in the drawings and are described in detail in the following description.

Fig. 1A to 1D show various cross-sectional views of an embodiment of an embedding method during different stages of the method.

Fig. 2A and 2B show various cross-sectional views of another embodiment of an embedding method during different stages of the method.

Fig. 3A and 3B show various cross-sectional views of another embodiment of an embedding method during different stages of the method.

Fig. 4A to 4D show various cross-sectional views of another embodiment of an embedding method during different stages of the method.

Fig. 5A to 5D show various cross-sectional views of another embodiment of an embedding method during different stages of the method.

Fig. 6A to 6D show various cross-sectional views of another embodiment of an embedding method during different stages of the method.

Fig. 7A and 7B show respective partial cross-sectional views of one embodiment of forming a temporary spacer fur used during the embedding process during different stages of the method.

Fig. 8A to 8C show various cross-sectional views of another embodiment of an embedding method during different stages of the method.

Fig. 9A through 9C illustrate various partial cross-sectional views of one embodiment of forming a photoresist-based temporary spacer on a semiconductor die during different stages of the method.

Fig. 10A to 10C show various cross-sectional views of another embodiment of an embedding method during different stages of the method.

Detailed Description

Embodiments described herein introduce a temporary spacer as part of the die encapsulation process. The temporary spacer provides sufficient clearance to dispose an embedding material, such as a molding material, over the die edges to protect the die passivation, which may be damaged, for example, during dicing. After embedding, the temporary spacer is removed to expose the portion of the semiconductor die previously covered by the temporary spacer. In some cases, the portion of the semiconductor die exposed by removing the temporary spacer may include a metal pad, which may then be metallized.

The use of the temporary spacer increases the overall thickness without increasing the lateral dimension of the package. Thus, well-defined regions may be excluded from the embedding process and then used to contact the die. The temporary spacers can be applied in a parallel process at the wafer level or at the board (panel) level, since the embedding after removal of the temporary spacers can be done in a wet and/or dry chemical process.

Various embodiments of an embedding method and a semiconductor device produced by the embedding method are described next.

Fig. 1A to 1D show various cross-sectional views of an embodiment of an embedding method during different stages of the method. According to the embedding method shown in fig. 1A to 1D, a closed mold cavity is used as part of a film-assisted molding process to implement the embedding method.

Fig. 1A shows a semiconductor die 100 positioned within a closed mold cavity prior to embedding. The semiconductor die 100 has a first major surface 102, a second major surface 104 opposite the first major surface 102, and an edge 106 between the first and second major surfaces 102, 104. The temporary spacer 108 is applied to a first portion 110 of the first major surface 102 of the semiconductor die 100, the first portion 110 being positioned inwardly with respect to a peripheral portion 112 of the first major surface 102. The first portion 110 of the first major surface 102 of the semiconductor die 100 may include metal pads 114, such as contact pads. The spacers 108 are temporary because the spacers 108 are sacrificial and not in the final product. In one embodiment, the first portion 110 of the first major surface 102 of the semiconductor die 100 to which the temporary spacer 108 is applied is laterally surrounded by an outer peripheral portion 112 of the first major surface 102.

Fig. 1B shows the mold 116 with the membrane 118, the mold 116 pressing against the temporary spacer 108 in the closed mold cavity, as indicated by the downward facing arrow. Due to the downward pressing of the mold 116, the membrane 118 contacts a side 120 of the temporary spacer 108 facing away from the semiconductor die 100, and the membrane 118 deforms to the contour shape of the temporary spacer 108, while leaving a gap "G" between the membrane 118 and the peripheral portion 112 of the first main surface 102 of the semiconductor die 100. In the case of a mold compound as an embedding material, if the gap is too small, for example, less than 70 μm (micrometers), the mold compound cannot reliably fill the gap. Therefore, the gap should be greater than this minimum allowable value to reliably fill the gap with molding compound.

The temporary spacers 108 define voids and therefore no special molding compound is required to ensure that the gaps are reliably filled. Rather, less expensive molding compounds may be used. The temporary spacer 108 also allows the use of a typical thickness of the film 118. That is, an excessively thick film is not required. The use of the temporary spacer 108 provides good control of the height of the gap between the membrane 118 and the outer peripheral portion 112 of the first major surface 102 of the semiconductor die 100. Furthermore, high deviations in the height of the stack (die plus metal pad) can be absorbed by the membrane thickness without impairing the normal function of the device. In addition, not every pad must be formed separately in the mold tool, thereby reducing tooling costs and the requirements for the membrane 118. In addition, smaller features may be realized because such features do not have to be formed in the mold tool.

Fig. 1C shows the semiconductor die 100 at least partially embedded in an embedding material 124, which in this case is a molding compound. Common molding compounds and resins include, but are not limited to, thermosetting resins, gel elastomers, encapsulants, potting compounds, composites, optical grade materials, such as SiO₂、Al₂O₃And MgO fillers. Embedding material124 cover the edge 106 and the outer peripheral portion 112 of the first major surface 102 of the semiconductor die 100 and contact the sidewalls 122 of the temporary spacers 108. As part of the embedding process, the liquefied molding material is forced into the closed mold cavity. The liquefied molding material fills the gap "G" between the membrane 118 and the peripheral portion 112 of the first major surface 102 of the semiconductor die 100 and solidifies to form a molding compound.

Fig. 1D shows after embedding. The mold 116 with the membrane 118 is retracted from the molding apparatus as indicated by the upward arrow. The temporary spacers 108 are removed from the first major surface 102 of the semiconductor die 100 to expose a first portion 110 of the first major surface 102. In one embodiment, temporary spacers 108 at least partially cover metal pads 114 during the embedding process, and metal pads 114 are exposed by removing temporary spacers 108 after the embedding process. A metallization structure (not shown), such as a Cu metallization structure, may be applied to the exposed metal pads 114, for example, to provide electrical connections to the metal pads 114 at the first major surface 102 of the embedded semiconductor die 100.

Fig. 2A and 2B show respective partial cross-sectional views of another embodiment of an embedding method during different stages of the method. Similar to the embedding method shown in fig. 1A to 1D, the closed mold cavity is used as part of a film assisted molding process to implement the embedding method, where fig. 2A corresponds to fig. 1A and fig. 2B corresponds to fig. 1C. However, in contrast, temporary spacer 108 has an undercut structure 200 that forms a portion of sidewall 122 of temporary spacer 108. According to the present embodiment, the liquefied molding material fills the gap between the membrane 118 and the peripheral portion 112 of the first major surface 102 of the semiconductor die 100 including the undercut structure 200.

Fig. 3A and 3B show respective partial cross-sectional views of another embodiment of an embedding method during different stages of the method. Similar to the embedding method shown in fig. 1A to 1D, the closed mold cavity is used as part of a film assisted molding process to implement the embedding method, where fig. 3A corresponds to fig. 1A and fig. 3B corresponds to fig. 1C. However, differently, the sidewalls 122 of the temporary spacers 108 are inclined to form an angle α greater than 90 ° with respect to the first major surface 102 of the semiconductor die 100.

Fig. 4A to 4D show various cross-sectional views of another embodiment of an embedding method during different stages of the method. According to the embedding method shown in fig. 4A to 4D, a closed mold cavity is used as part of a film-assisted molding process to implement the embedding method.

Fig. 4A shows the semiconductor die 100 positioned within the closed mold cavity prior to the embedding process. The semiconductor die 100 has a first major surface 102, a second major surface 104 opposite the first major surface 102, and an edge 106 between the first major surface 102 and the second major surface 104. The temporary spacer 108 is applied to a first portion 110 of the first major surface 102 of the semiconductor die 100, the first portion 110 being oriented inward from a peripheral portion 112 of the first major surface 102. According to the present embodiment, the first portion 110 of the first main surface 102 of the semiconductor die 100 comprises a sensor structure 400, for example a MEMS (micro electro mechanical system) structure. Temporary spacer 108 at least partially covers a first (top) side of sensor structure 400 to protect sensor structure 400 during a subsequent embedding process.

An additional temporary spacer 402 may be applied to a second (bottom) side of the sensor structure 400 opposite the first side. During subsequent embedding, additional temporary spacers 402 at least partially cover the second side of the sensor structure 400. It is not necessary to protect both sides of the sensor structure 400 in all cases. Protection on only one side of the sensor structure 400 may be sufficient.

Fig. 4B shows the mold 116 with the membrane 118 pressed against the upper temporary spacer 108 in the closed mold cavity, as indicated by the downward arrow. Due to the downward pressing of the mold 116, the membrane 118 contacts a side 120 of the upper temporary spacer 108 facing away from the semiconductor die 100, and the membrane 118 deforms to the contour shape of the upper temporary spacer 108, while leaving a gap "G" between the membrane 118 and the outer peripheral portion 112 of the first main surface 102 of the semiconductor die 100. As explained above in connection with fig. 1B, the upper temporary spacer 108 defines a void, providing a sufficiently large gap between the membrane 118 and the peripheral portion 112 of the first major surface 102 of the semiconductor die 100 to allow adequate molding in the gap.

Fig. 4C shows the semiconductor die 100 at least partially embedded in an embedding material 124, the embedding material 124 in this case being a molding compound. The molding compound 124 covers the edge 106 and the peripheral portion 112 of the first major surface 102 of the semiconductor die 100 and contacts the sidewalls 122 of the upper temporary spacers 108. The upper temporary spacer 108 at least partially covers the top side of the sensor structure 400 during the molding process, and the lower temporary spacer 402 at least partially covers the bottom side of the sensor structure 400 during the molding process. As described above, protection may be sufficient only on one side of the sensor structure 400, and thus one of the temporary spacers 108, 402 may be omitted.

Fig. 4D shows after embedding. As indicated by the upwardly facing arrow, the mold 116 with the membrane 118 is retracted from the molding apparatus and each temporary spacer 108, 402 is removed. The top side of sensor structure 400 is exposed by removing upper temporary spacer 108 and the bottom side of sensor structure 400 is exposed by removing lower temporary spacer 402.

Fig. 5A to 5D show various cross-sectional views of another embodiment of an embedding method during different stages of the method. According to the embedding method shown in fig. 5A to 5D, a closed mold cavity is used as part of a film-assisted molding process to implement the embedding method.

Fig. 5A shows the semiconductor die 100 positioned within the closed mold cavity prior to the embedding process. The semiconductor die 100 has a first major surface 102, a second major surface 104 opposite the first major surface 102, and an edge 106 between the first and second major surfaces 102, 104. According to the present embodiment, the first portion 110 of the first major surface 102 of the semiconductor die 100 includes at least first and second metal pads 500, 502, such as contact pads. At the first main surface 102 of the semiconductor die 100, separate temporary spacers 108, 108' are applied to at least a portion of the respective metal pads 500, 502. Thus, each metal pad 500, 502 at the first main surface 102 of the semiconductor die 100 is at least partially covered by a temporary spacer 108, 108' during the embedding process.

Fig. 5B shows the mold 116 with the membrane 118 pressed against the temporary spacers 108, 108' within the closed mold cavity and the semiconductor die 100 at least partially embedded in the first molding compound 504 as part of a first embedding process. The first molding compound 504 covers the edge 106 and the peripheral portion 112 of the first major surface 102 of the semiconductor die 100 and contacts the sidewalls 122, 122 'of each temporary spacer 108, 108'.

Fig. 5C shows after the first embedding process. The mold 116 with the membrane 118 is retracted from the molding apparatus and each temporary spacer 108, 108' is removed. The temporary spacers 108, 108' are removed after the first embedding process, thereby exposing the previously covered metal pads 500, 502 at the first major surface 102 of the semiconductor die 100. A first metallization structure 506 is then formed on the exposed first metal pad 500 and a second metallization structure 508 is formed on the exposed second metal pad 502. In one embodiment, as a result of removing the temporary spacers 108, 108' after the first embedding process, the first and second metallization structures 506, 508 fill respective holes formed in the first molding compound 504. One or both of the metallization structures 506, 508 may extend onto one side 510 of the first molding compound 504, as shown in fig. 5C.

A new temporary spacer 512 is applied to the first metallization structure 506, e.g. to a portion of the first metallization structure 506 that may extend onto a side 510 of the first molding compound 504 facing away from the semiconductor die 100. Another new temporary spacer 514 is applied to the second metallization structure 508, for example to a portion of the second metallization structure 508 that may extend onto the side 510 of the first molding compound 504 facing away from the semiconductor die 100. The mold 116 with the membrane 118 is pressed against the new temporary spacers 512, 514 within the closed mold cavity, as indicated by the downward facing arrows in fig. 5C, as part of the second embedding process.

Fig. 5D shows a second molding compound 516 applied to the side 510 of the first molding compound 504 facing away from the semiconductor die 100. As part of the second embedding process, the liquefied molding compound is forced into the closed mold cavity and fills the gap "G2" between the membrane 118 and the side 510 of the first molding compound 504 facing away from the semiconductor die 100. The liquefied molding compound solidifies to form the second molding compound 516. The first and second molding compounds 504, 516 may be of the same or different types of molding compounds.

After the second molding compound 516 is applied, the mold 116 with the membrane 118 is retracted from the molding device and the temporary spacers 512, 514 used as part of the second embedding process are removed to expose a portion of the first and second metallization structures 506, 508 previously covered by the temporary spacers 512, 514. A third metallization structure 518 is formed on the exposed portion of the first metallization structure 506 and a fourth metallization structure 520 is formed on the exposed portion of the second metallization structure 508. In one embodiment, as a result of removing the temporary spacers 512, 514 after the second embedding process, the third and fourth metallization structures 518, 520 fill respective holes formed in the second molding compound 516.

The metallization structures 506, 508, 518, 520 shown in fig. 5C and 5D may be formed, for example, outside of a closed mold cavity, for example, in one or more deposition tools, such as an electrochemical deposition (ECD) copper plating tool and/or a Physical Vapor Deposition (PVD) tool. One or more of the metallization structures 506, 508, 518, 520 may form part of a redistribution layer (RDL). For example, one or more of the metallization structures 506, 508, 518, 520 may be used to implement fan-out of the wafer level package. By using temporary spacers 108, 108' on top of the metal pads 500, 502, the molding compound 504 may cover the entire die surface 102 except for the metal pads 500, 502. With the angled spacer design, contacts 506, 508, 518, 520 to the metal pads 500, 502 may be formed directly within the resulting openings formed in the molding compound 504, 516 by removing the temporary spacers 108, 108', 512, 514, for example, as shown in fig. 3A-3B. Thus, a separate opening process, such as laser drilling, is not required to form the openings in the molding compound 504, 516. Optionally, a subsequent planarization process, such as CMP (chemical-mechanical polishing), may be used to planarize the top surface 522 of the second molding compound 516.

Fig. 6A to 6D show various cross-sectional views of another embodiment of an embedding method during different stages of the method. According to the embedding method shown in fig. 6A to 6D, a closed mold cavity is used as part of a film-assisted molding process to implement the embedding method.

Fig. 6A shows at least two semiconductor dies 100, 100' positioned within a closed mold cavity prior to embedding. The semiconductor dies 100, 100' each have a first (top) major surface, a second (bottom) major surface opposite the first major surface, and an edge between the first and second major surfaces. A first portion of the first major surface of each semiconductor die 100, 100' includes a metal pad 600, 602, such as a contact pad. At the first main surface of each semiconductor die 100, 100', a separate temporary spacer 108, 108' is applied to the metal pad 600, 602. Thus, during the embedding process, the metal pads 600, 602 at the first main surface of each semiconductor die 100, 100 'are at least partially covered by the temporary spacers 108, 108'. The first semiconductor die 100 has a first thickness (Td1) and the second semiconductor die 100' has a second thickness (Td2), wherein Td1> Td 2. The temporary spacers 108, 108 'accommodate the height difference (Td1-Td2) between the semiconductor dies 100, 100' such that the combined thickness (Td1+ Ts1) of the first semiconductor die 100 and the first temporary spacer 108 is approximately equal to the combined thickness (Td2+ Ts2) of the second semiconductor die 100 'and the second temporary spacer 108'. Without the temporary spacers 108, 108', it is difficult to achieve accommodation for the height difference between the semiconductor dies 100, 100' using FAM.

Fig. 6B shows the mold 116 with the membrane 118 pressed against the temporary spacer 108, 108 'within the closed mold cavity and the respective semiconductor chip 100, 100' at least partially embedded in the molding compound 604 as part of the embedding process. The membrane 118 contacts a side 120, 120' of each temporary spacer 108, 108' facing away from the semiconductor die 100, 100', and the membrane 118 deforms to the contour shape of the temporary spacer 108, 108' while leaving a gap between the membrane 118 and the outer peripheral portion of the first major surface of each semiconductor die 100, 100 '. The molding compound 604 covers the edges and the peripheral portion of the first major surface of each semiconductor die 108, 108' and contacts the sidewalls 122, 122' of each temporary spacer 108, 108', filling the respective gaps. As previously explained herein, the molding compound 604 may be formed by forcing liquefied molding material into the closed mold cavity such that the liquefied molding material fills the gap between the membrane 118 and the peripheral portion of the first major surface of each semiconductor die 100, 100'.

Fig. 6C shows after the first embedding process. The mold 116 with the membrane 118 is retracted from the molding apparatus as indicated by the upwardly facing arrow and each temporary spacer 108, 108' is removed. The temporary spacers 108, 108 'are removed after the embedding process, exposing the previously covered metal pads 600, 602 at the first major surface of each semiconductor die 100, 100'.

Fig. 6D shows the metallization structure 606 formed after removal of the temporary spacers 108, 108', and the metallization structure 606 may extend onto a side 608 of the molding compound 604 facing away from the two semiconductor dies 100, 100'. In the case of a Cu metallization structure, the metallization structure 606 may be formed, for example, by electroless plating. The metallization structure 606 is connected to the metal pad 600 at the first major surface of the first semiconductor die 100 and the metal pad 602 at the first major surface of the second semiconductor die 100'. The metallization structure 606 may electrically connect the metal pads 600, 602 of different semiconductor dies 100, 100', depending on how the metallization structure 606 is configured. Electrically connecting the die 100, 100' via the metallization structure 606, rather than by using wire bonds, increases thermal distribution, reduces resistivity, and improves reliability. Additionally or separately, the metallization structure 606 may form a portion of a redistribution layer.

Fig. 7A and 7B show various partial cross-sectional views during different stages of the process of forming one embodiment of the temporary spacer described herein. According to the method illustrated in fig. 7A and 7B, the temporary spacers are formed as part of the semiconductor wafer processing.

Fig. 7A shows a semiconductor wafer or board 700 having a plurality of semiconductor dies 100. In the case of a wafer, the semiconductor die 100 has not yet been singulated. In the case of a board, the semiconductor die 100 has been singulated. In either case, each semiconductor die 100 has a first major surface 102 and a second major surface 104 opposite the first major surface 102. Temporary spacers 108 are formed on the first portion 110 of the first major surface 102 of each semiconductor die 100, for example, using a photoresist 702. The first portion 110 is positioned inwardly relative to a peripheral portion 112 of the first major surface 102. The first portion 110 of the first major surface 102 of each semiconductor die 100 can include a metal pad 114, such as a contact pad.

Fig. 7B shows the semiconductor dies separated from each other after the temporary spacers 108 are applied. In the case of board 700, a thin film, e.g., glue or adhesive, may be removed from the carrier to separate the dies 100, or board 700 may be diced or cut to separate the semiconductor dies 100 from each other. In the case of the semiconductor wafer 700, the dies 100 may be singulated, for example by sawing, laser cutting, Electrical Discharge Machining (EDM), etc., to separate the semiconductor dies 108 and form the edge 106 between the first and second major surfaces 102, 104 of each die 100.

Each individual semiconductor die 100 may then be at least partially embedded in an embedding material, such as a molding compound, that covers the edge 106 and the peripheral portion 112 of the first major surface 102 of each of the semiconductor dies 100 and contacts the sidewalls 122 of the respective temporary spacers 108. Embedding may be performed according to any of the related embodiments described herein. After embedding, the temporary spacers 108 are removed to expose the first portion 110 of the first major surface 102 of each semiconductor die 100, as previously described herein.

Fig. 8A to 8C show various cross-sectional views of another embodiment of an embedding method during different stages of the method. According to the embedding method shown in fig. 8A to 8C, the embedding method is implemented without using a closed mold cavity.

Fig. 8A shows a surface 801 where a side of the temporary spacer 108 facing away from the semiconductor die 100 is fixed to a carrier 800 (e.g., a glass carrier, a semiconductor wafer, a tape, etc.) prior to embedding. For example, the semiconductor die 100 may be mounted to the carrier 800 in a flip-chip configuration with the front side of the semiconductor die 100 facing the carrier 800. Frame 802 is secured to surface 801 of carrier 800 such that a lateral gap "G _ lat" exists between frame 802 and edge 106 of semiconductor die 100. The frame 802 may include an insulating material 804 having conductive vias 806. For example, the frame 802 may be a Printed Circuit Board (PCB). However, other types of frames may be used, such as laminates, ceramics, redistribution layers, and the like. More than one semiconductor die 100 may be processed using the same carrier 800 as shown in fig. 8A. This may include having more than one semiconductor die 100 laterally surrounded by the frame 802 and/or mounting multiple semiconductor dies 100 and multiple frames 802 to the same carrier 800.

Fig. 8B shows a dispensing tool 808 for applying an embedding material 810 into a lateral gap between the frame 802 and the edge 106 of the semiconductor die 100. According to this embodiment, the embedding material 810 may or may not be a molding compound. For example, instead of molding compound, the embedding material 810 may be a resin, a polymer, a potting compound, a glue, or the like. In another embodiment, the dispensing tool 808 may apply the embedding material 810 by printing, spraying, or laminating.

Fig. 8C shows carrier 800 removed from temporary spacer 108 and frame 802 after application of embedding material 810. In the case of a tape carrier, the structure including the embedded die 100 and the frame 802 may be lifted or peeled off from the carrier 800. One or more metal pads 114 may be disposed on the portion 110 of the first surface 102 of the semiconductor die 100 previously covered by the temporary spacer 108, and electrical contacts (not shown) to such metal pads 114 may be formed in the spaces 812 formed by removing the temporary spacer 108. After removing the carrier 800, a redistribution layer (not shown) may be applied directly onto the exposed metal pads 114 of the semiconductor die 100 without an additional dielectric layer to create a chip embedded package. In one embodiment, the height (H _ f) of the frame 802 is greater than the combined height of the semiconductor die 100 and the temporary spacer 108, and wherein the embedding material 810 covers the second major surface 104 of the semiconductor die 100 and a side 814 of the frame 802 that faces the same direction as the second major surface 104 of the semiconductor die 100.

In each of the embedding embodiments described herein, the temporary spacers are removed after the respective die is at least partially embedded in the embedding material. That is, the spacers are temporary because the spacers are sacrificial and not in the final product. Any material that is compatible with semiconductor wafer or die processing and can withstand the parameters of the embedding process (e.g., temperature, pressure, etc.) may be used to form the temporary spacers. For example, the temporary spacer may be made of photoresist. The photoresist is compatible with semiconductor wafer processing. Another material that may be used for the temporary spacer is magnesium oxide or other oxide, which is soluble after the embedding process. Typical polymers may be used as temporary spacers and may be formed by inkjet printing. For example, an Ultraviolet (UV) curable ink or hot melt adhesive may be inkjet printed onto a semiconductor die or wafer to form the temporary spacers. Other examples of materials for the temporary spacer are high temperature polymers, composite thermosets such as duroplast and elastomers.

Fig. 9A to 9C show respective partial cross-sectional views of one embodiment of forming a photoresist-based temporary spacer on a semiconductor die during different stages of the process. Although a single semiconductor die is shown for ease of illustration, multiple semiconductor dies may be processed in parallel, for example, as part of a semiconductor wafer before or after singulation, or as part of a board of singulated dies.

Fig. 9A shows a photoresist 900 applied to the first major surface 102 of the semiconductor die 100, for example by spin coating, spray coating, dip coating, lamination, and the like. Photoresist 900 is a photosensitive polymer. The lateral accuracy of the process for forming the temporary spacer is defined by the resist process, which is very high. Thus, the opening formed in the embedding material by removing the photoresist-based temporary spacer may be located precisely over the die pad 114 and require less safe (tolerance) distance to compensate for process variations.

Any photoresist commonly used in semiconductor wafer or die processing may be used. In one embodiment, a photoresist SU-8 is used. SU-8 can withstand temperatures as high as 300 to 400 degrees, which is suitable for typical molding processes. Different photoresists may be selected to meet other requirements.

Fig. 9B shows the photoresist 900 after exposure such that a first region 902 of the photoresist 900 overlying the first portion 110 of the first major surface 102 of the semiconductor die 100 becomes insoluble while a second region 904 of the photoresist 900 overlying the peripheral portion 112 of the first major surface 102 of the semiconductor die 100 remains soluble. The patterned mask 906 may be used to block light such that only the unmasked areas 904 of the photoresist 900 are exposed to light.

In the case of positive photoresist, the photosensitive material of the photoresist 900 is photodegraded and the developer dissolves the areas exposed to the light, leaving behind a coating on which the mask 906 is placed. In the case of a negative photoresist, the photosensitive material of the photoresist 900 is enhanced by light (polymerization or cross-linking) and the developer dissolves only the areas not exposed to light, leaving a coating in the areas where the mask 906 is not placed.

Different spacer geometries may be achieved based on the manner in which the photoresist 900 is processed. For example, photoresist 900 may be exposed such that insoluble regions 902 of photoresist 900 have sloped sidewalls that form the sidewalls of the temporary spacers, e.g., as shown in fig. 3A and 3B. Such sloped resist sidewalls may produce an undercut structure in the embedding material. The photoresist 900 may alternatively include a first photoresist layer formed on the first major surface 102 of the semiconductor die 100 and a second photoresist layer formed on the first photoresist layer. The first and second photoresist layers may be differently exposed such that the insoluble region 902 of the photoresist 900 has an undercut structure that forms a portion of the sidewall of the temporary spacer, for example, as shown in fig. 2A and 2B. In contrast, as shown in fig. 9B, the sidewalls of the temporary spacers may be vertical or nearly vertical with respect to the first major surface 102 of the semiconductor die 100.

In the case of processing an entire semiconductor wafer, photoresist 900 is applied to the first major surface 102 of each die 100 prior to singulating the wafer. As described above, the photoresist 900 is exposed such that a first region 902 of the photoresist 900 overlying the first portion 110 of the first major surface 102 of each semiconductor die 100 on the wafer is insoluble, while a second region 904 of the photoresist 900 overlying the peripheral portion 112 of the first major surface 102 of each semiconductor die 100 is soluble in a corresponding solvent that is generally not water.

Fig. 9C shows semiconductor die 100 after soluble regions 904 of photoresist 900 have been removed from peripheral portion 112 of first major surface 102 of semiconductor die 100 by a suitable developer. The remaining insoluble regions 902 of photoresist 900 form temporary spacers. After the embedding process is complete, the temporary spacers formed by the insoluble regions 902 of the photoresist 900 may be removed by a suitable stripper.

The resulting semiconductor device produced according to the methods described herein includes an embedding material, such as a molding compound or other type of embedding material, that covers the edges of the semiconductor die and the peripheral portion of the first major surface. In the particular case of a molding compound as the embedding material, the molding compound may include a resin and filler particles embedded within the resin. The molding compound has an opening formed by removing the temporary spacer, the opening exposing a first portion of the first major surface of the semiconductor die from the molding compound. The opening in the molding compound has a sidewall. Again, in the case of a molding compound as the embedding material and comprising filler particles embedded in the resin, all the predominant (predomantly all) filler particles disposed along the sidewalls of the opening are completely embedded in the resin and not exposed at all along the sidewalls. That is, most of the filler particles along the sidewalls of the opening are almost completely covered, just like a spherical contact wall. Furthermore, there is a different interaction layer on the surface than the interaction with the resist at the side and the membrane at the top.

Fig. 10A to 10C show various cross-sectional views of another embodiment of an embedding method during different stages of the method. According to the embedding method shown in fig. 10A to 10C, the mold tool will implement the embedding method, but without the membrane 118. Therefore, this embodiment does not use FAM.

Fig. 10A shows that the side of the temporary spacer 108 facing away from the semiconductor die 100 is fixed to a surface 1001 of a temporary carrier 1000 (e.g. a glass carrier, a semiconductor wafer, a tape, a membrane, etc.) before embedding. For example, the semiconductor die 100 may be mounted to the temporary carrier 1000 in a flip-chip configuration with the front side of the semiconductor die 100 to the temporary carrier 1000. More than one semiconductor die 100 may be processed as shown in fig. 10A using the same temporary carrier 1000. This may include more than one semiconductor die 100 secured to the same temporary carrier 1000.

Fig. 10B shows semiconductor die 100 embedded in embedding material 124 using mold 116 but without membrane 118. According to the present embodiment, the embedding material 124 is a molding compound.

Fig. 10C shows the molded package after removal of the temporary carrier 1000 and the temporary spacers 108. The temporary carrier 1000 is removed to allow removal of the temporary spacers. In the case of a tape carrier, the structure including the embedded die 100 may be lifted or peeled off from the temporary carrier 1000. By removing the temporary spacers 108, one or more metal pads 114 may be exposed at the portion 110 of the first surface 102 of the semiconductor die 100, and electrical contacts (not shown) to such metal pads 114 may be formed in the spaces 1002 created by removing the temporary spacers 108. For example, a redistribution layer (not shown) may be applied directly onto the exposed metal pads 114 of the semiconductor die 100 to create a chip embedded package without the need for an additional dielectric layer.

Although the present disclosure is not so limited, the following numbered examples illustrate one or more aspects of the present disclosure.

Example 1. a method, comprising: providing a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first and second major surfaces; applying a temporary spacer to a first portion of a first major surface of the semiconductor die, the first portion being located inward relative to a peripheral portion of the first major surface; after applying the temporary spacer, at least partially embedding the semiconductor die in an embedding material that covers the edge of the semiconductor die and a peripheral portion of the first major surface and contacts a sidewall of the temporary spacer; and removing the temporary spacer from the first major surface of the semiconductor die after the embedding to expose a first portion of the first major surface of the semiconductor die.

Example 2. the method according to example 1, wherein the method further comprises: prior to the embedding, fixing a side of the temporary spacer facing away from the semiconductor die to a surface of a carrier; and securing a frame to a surface of a carrier such that a gap exists between the frame and an edge of the semiconductor die.

Example 3. the method of example 2, wherein the embedding comprises: applying the embedding material into a gap between the frame and an edge of the semiconductor die; and removing the carrier from the temporary spacer and the frame after said applying.

Example 4. the method of example 3, wherein a height of the frame is greater than a combined height of the semiconductor die and the temporary spacer, and wherein the embedding material covers the second major surface of the semiconductor die and a side of the frame facing the same direction as the second major surface of the semiconductor die.

Example 5 the method of any of examples 1 to 4, wherein the first major surface of the semiconductor die includes a metal pad, wherein the temporary spacer at least partially covers the metal pad during the embedding, and wherein the metal pad is exposed after the embedding by removing the temporary spacer.

Example 6. the method of example 5, wherein the method further comprises: applying an additional first temporary spacer to an additional metal pad located at a first major surface of a semiconductor die, the additional first temporary spacer at least partially covering the additional metal pad during the embedding; removing the additional first temporary spacers from additional metal pads of the semiconductor die after the embedding to expose the additional metal pads; and forming a first metallization structure on the exposed metal pad and a second metallization structure on the exposed additional metal pad.

Example 7. according to the method of example 6, the method further comprises: applying an additional second temporary spacer to the first metallization structure and an additional third temporary spacer to the second metallization structure; after applying the second and third temporary spacers, applying additional embedding material to a side of the embedding material facing away from the semiconductor die; after applying the additional embedding material, removing the second and third temporary spacers to expose portions of the first metallization structure previously covered by the second temporary spacers and to expose portions of the second metallization structure previously covered by the third temporary spacers; and forming a third metallization structure on the exposed portion of the first metallization structure and a fourth metallization structure on the exposed portion of the second metallization structure.

Example 8 the method of any of examples 1 to 7, wherein applying the temporary spacer comprises: applying a photoresist to a first major surface of a semiconductor die; exposing the photoresist such that a first region of the photoresist overlying a first portion of the first major surface of the semiconductor die is insoluble and a second region of the photoresist overlying a peripheral portion of the first major surface of the semiconductor die is soluble; and removing the soluble portion of the photoresist from the outer peripheral portion of the first major surface of the semiconductor die.

Example 9. the method of example 8, wherein the photoresist is exposed such that an insoluble portion of the photoresist has sloped sidewalls that form sidewalls of the temporary spacers; or wherein the photoresist comprises a first photoresist layer on the first major surface of the semiconductor die and a second photoresist layer on the first photoresist layer, and wherein the first and second photoresist layers are differently exposed such that an insoluble portion of the photoresist has an undercut structure that forms a portion of a sidewall of the temporary spacer.

Example 10. example according to any of examples 1 and 5-9, wherein the method further comprises: prior to the embedding, fixing a side of the temporary spacer facing away from the semiconductor die onto a surface of the temporary carrier; and after the embedding, removing the temporary carrier to expose the temporary spacer for removal, wherein the embedding material is a molding compound and the embedding is done without the membrane using a mold.

Example 11 the method of any one of examples 1 to 10, wherein the embedding comprises: pressing a mold with a membrane against the temporary spacer in a closed mold cavity such that the membrane contacts a side of the temporary spacer facing away from the semiconductor die and the membrane deforms to the contour shape of the temporary spacer while leaving a gap between the membrane and the outer peripheral portion of the first main surface of the semiconductor die; and thereafter forcing a liquefied molding material into the closed mold cavity, the liquefied molding material filling a gap between the diaphragm and the peripheral portion of the first major surface of the semiconductor die.

Example 12 the method of any of examples 1 to 11, wherein the first portion of the first major surface of the semiconductor die includes a sensor structure, wherein the temporary spacer at least partially covers a first side of the sensor structure during the embedding, and wherein the first side of the sensor structure is exposed after the embedding by removing the temporary spacer.

Example 13. the method according to example 12, wherein the method further comprises: applying an additional temporary spacer on a second side of the sensor structure opposite the first side, the additional temporary spacer at least partially covering the second side of the sensor structure during the embedding; and removing the additional temporary spacer from the second side of the sensor structure after the embedding to expose the second side of the sensor structure.

Example 14. the method of any of examples 1 to 13, wherein the method further comprises: providing an additional semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first and second major surfaces; applying an additional temporary spacer to a first portion of a first major surface of the additional semiconductor die, the first portion being located inward relative to a peripheral portion of the first major surface, wherein the additional semiconductor die has a different thickness than the semiconductor die, wherein the temporary spacer and the additional temporary spacer accommodate a difference in height between the additional semiconductor die and the semiconductor die such that a combined thickness of the semiconductor die and the temporary spacer is approximately equal to a combined thickness of the additional semiconductor die and the additional temporary spacer.

Example 15. the method of example 14, wherein the embedding comprises: pressing the mold with the membrane against the two temporary spacers in the closed mold cavity, such that the membrane contacts a side of the two temporary spacers facing away from the two semiconductor dies, and such that the membrane deforms to the contour shape of the two temporary spacers, while leaving a gap between the membrane and the outer peripheral portions of the first main surfaces of the two semiconductor dies; and thereafter forcing a liquefied molding material into the closed mold cavity, the liquefied molding material filling a gap between the diaphragm and the peripheral portions of the first major surfaces of the two semiconductor dies.

Example 16. according to the method of example 15, the method further comprises: after the embedding, removing the additional temporary spacer from the first major surface of the additional semiconductor die to expose a first portion of the first major surface of the additional semiconductor die; after removing the two temporary spacers, a metallization structure is formed which extends to a side of the embedding material facing away from the two semiconductor dies and is connected to a first portion of the first main surface of the semiconductor die and a first portion of the first main surface of the additional semiconductor die.

Example 17. a method, comprising: providing a semiconductor wafer having a plurality of semiconductor dies, each semiconductor die of the plurality of semiconductor dies having a first major surface, a second major surface opposite the first major surface; and applying a temporary spacer to a first portion of the first major surface of each of the semiconductor dies, the first portion being located inwardly relative to a peripheral portion of the first major surface; singulating the plurality of semiconductor dies after applying the temporary spacers so as to separate the semiconductor dies and form an edge between the first and second major surfaces of each singulated die; after the singulating, at least partially embedding each of the singulated semiconductor dies in an embedding material that covers the edge and a peripheral portion of the first major surface of each of the singulated semiconductor dies and contacts a sidewall of the respective temporary spacer; after the embedding, removing the temporary spacer from the first major surface of the singulated semiconductor die to expose a first portion of the first major surface of the singulated semiconductor die.

Example 18. the method of example 17, wherein applying the temporary spacer comprises: applying photoresist to a first major surface of the plurality of semiconductor dies prior to the singulating; exposing the photoresist such that a first region of the photoresist covering a first portion of the first major surface of each of the semiconductor dies is insoluble and a second region of the photoresist covering a peripheral portion of the first major surface of each of the semiconductor dies is soluble; and removing the soluble portion of the photoresist from the outer peripheral portion of the first major surface of each of the semiconductor dies.

Example 19 a semiconductor device, comprising: a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first and second major surfaces; a molding compound covering the edge and a peripheral portion of the first major surface of the semiconductor die, the molding compound including a resin and filler particles embedded within the resin; and an opening in the mold compound exposing a first portion of the first major surface of the semiconductor die from the mold compound, the first portion being located inward relative to the peripheral portion, wherein the opening in the mold compound has sidewalls, wherein predominantly all filler particles disposed along the sidewalls of the opening are completely embedded within the resin and not exposed along the sidewalls at all.

Example 20 the semiconductor device of example 19, wherein a metal pad of the semiconductor die is exposed from the molding compound through the opening, and wherein a metallization structure is formed on an exposed portion of the metal pad.

Terms such as "first," "second," and the like, are used to describe various elements, regions, sections, etc., and are not intended to be limiting. Throughout the specification, like terms refer to like elements.

As used herein, the terms "having," "including," "containing," and the like are open-ended terms that indicate the presence of stated elements or features, but do not exclude additional elements or features. The articles "a" and "the" are intended to include the plural and singular, unless the context clearly dictates otherwise.

It should be understood that features of the various embodiments described herein may be combined with each other, unless specifically noted otherwise.

Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein.