阅读说明：本技术 半导体封装方法及半导体封装结构 (Semiconductor packaging method and semiconductor packaging structure ) 是由 周辉星 于 2020-03-27 设计创作，主要内容包括：本申请提供一种半导体封装方法及半导体封装结构。所述半导体封装方法包括：将至少一个待封装的裸片贴装于载板上,所述裸片靠近所述载板的表面为正面,所述裸片的正面设有多个焊垫；形成第一包封层,所述第一包封层覆盖在所述载板上,包封住所述至少一个待封装的裸片；剥离所述载板,露出所述裸片的正面；将至少一个引线框固定于所述裸片的正面,并将所述引线框的引脚与对应的裸片的焊垫电连接；所述引线框包括至少一个引脚区,每一所述引脚区与一个所述裸片对应,每一所述引脚区设有至少一个引脚；在所述引脚上形成将所述焊垫引出的导电结构。(The application provides a semiconductor packaging method and a semiconductor packaging structure. The semiconductor packaging method comprises the following steps: mounting at least one bare chip to be packaged on a carrier plate, wherein the surface of the bare chip close to the carrier plate is a front surface, and a plurality of welding pads are arranged on the front surface of the bare chip; forming a first encapsulating layer, wherein the first encapsulating layer covers the carrier plate and encapsulates the at least one bare chip to be encapsulated; stripping the carrier plate to expose the front surface of the bare chip; fixing at least one lead frame on the front surface of the bare chip, and electrically connecting the pins of the lead frame with the welding pads of the corresponding bare chip; the lead frame comprises at least one lead area, each lead area corresponds to one bare chip, and each lead area is provided with at least one lead; and forming a conductive structure for leading out the welding pad on the pin.)