阅读说明：本技术 半导体封装方法 (Semiconductor packaging method ) 是由 陈莉 霍炎 于 2019-04-28 设计创作，主要内容包括：本申请提供一种半导体封装方法,其包括：在基板上形成金属件,所述金属件位于所述基板的正上方；对所述金属件进行塑封形成载板；剥离所述基板,露出所述金属件的正面及所述载板的第一表面。本申请通过在基板上形成金属件,并对所述金属件进行塑封形成载板,即通过塑封的方式形成载板,避免了在生成金属件的打孔等工艺中需要预留的载板厚度,有效的地减薄了载板的整体厚度,而且增强了载板的强度,避免了芯片在受力时易碎裂的情况,从而保证后期封装的成功率及产品的良率。(The application provides a semiconductor packaging method, which comprises the following steps: forming a metal piece on a substrate, wherein the metal piece is positioned right above the substrate; carrying out plastic package on the metal piece to form a carrier plate; and stripping the substrate to expose the front surface of the metal piece and the first surface of the carrier plate. This application is through forming the metalwork on the base plate, and right the metalwork carries out the plastic envelope and forms the support plate, forms the support plate through the mode of plastic envelope promptly, has avoided the support plate thickness that needs to reserve in the processes such as punching that generate the metalwork, has effectually thinned the whole thickness of support plate, has strengthened the intensity of support plate moreover, has avoided the easy cracked condition of chip when the atress to guarantee the success rate of later stage encapsulation and the yield of product.)

1. A semiconductor packaging method, comprising:

forming a metal piece on a substrate, wherein the metal piece is positioned right above the substrate;

carrying out plastic package on the metal piece to form a carrier plate;

and stripping the substrate to expose the front surface of the metal piece and the first surface of the carrier plate.

2. The semiconductor packaging method of claim 1, wherein the forming of the metal piece on the substrate comprises:

forming a first metal piece on the substrate;

a second metal piece is formed over the first metal piece.

3. The semiconductor packaging method according to claim 2, wherein the first metal piece comprises a first metal layer, a second metal layer and a third metal layer, and the first metal layer, the second metal layer and the third metal layer are sequentially stacked to form the first metal piece.

4. The semiconductor packaging method of claim 2, wherein forming a first metal piece on the substrate and a second metal piece over the first metal piece comprises:

pressing a first photosensitive film on the substrate, forming a plurality of first openings in the first photosensitive film, and forming the first metal piece in the plurality of first openings;

pressing a second photosensitive film on the first photosensitive film and the first metal piece, forming a plurality of second openings in the second photosensitive film, and forming a second metal piece in the plurality of second openings, wherein at least part of the second metal piece is positioned above the first metal piece;

and cleaning and removing the first photosensitive films on two sides of the first metal piece and the second photosensitive films on two sides of the second metal piece.

5. The semiconductor packaging method according to claim 4, wherein the first metal member is formed in the plurality of first openings by plating or sputtering; the first metal piece is in a flat plate shape.

6. The semiconductor packaging method according to claim 4, wherein the second metal member is formed in the plurality of second openings by solder reflow after ball-mounting or metal paste brushing; the second metal piece is spherical.

7. The semiconductor packaging method of claim 1, wherein before forming the metal piece on the substrate, the semiconductor packaging method further comprises:

and arranging an adhesive layer on the substrate, and forming the metal piece on the adhesive layer.

8. The semiconductor packaging method according to claim 1, wherein after the peeling of the substrate, the semiconductor packaging method comprises:

and attaching a chip on the first surface of the carrier plate, and connecting the chip and the front surface of the metal piece through a metal connecting piece.

9. The semiconductor packaging method according to claim 8, wherein after the connecting the chip and the front surface of the metal member by the metal connector, the semiconductor packaging method further comprises:

and plastically packaging the chip and the metal connecting piece on the carrier plate to form an encapsulating layer.

10. The semiconductor packaging method according to claim 8, wherein after the connecting the chip and the front surface of the metal member by the metal connector, the semiconductor packaging method further comprises: and thinning the carrier plate to enable the carrier plate to expose the metal piece far away from one end of the chip relative to the second surface arranged on the first surface.

Technical Field

The present disclosure relates to the field of semiconductor technologies, and in particular, to a semiconductor packaging method.

Background

In the semiconductor package technology, a carrier board in a semiconductor package generally uses metal as a base material, and processes such as punching, etching, electroplating, sputtering and the like are performed on the base material to generate a metal layer, so that requirements of chip support and pin extraction are met through the metal layer.

However, since a process such as punching is required on the surface of the carrier, the thickness of the carrier is thick to reserve the depth of the punching, and the back surface of the chip is very easily stressed after being packaged into a single package at a later stage, thereby causing problems such as chip cracking and the like.

Disclosure of Invention

The application provides a semiconductor packaging method, which comprises the following steps:

forming a metal piece on a substrate, wherein the metal piece is positioned right above the substrate;

carrying out plastic package on the metal piece to form a carrier plate;

and stripping the substrate to expose the front surface of the metal piece and the first surface of the carrier plate.

Optionally, the forming a metal piece on a substrate includes:

forming a first metal piece on the substrate;

a second metal piece is formed over the first metal piece.

Optionally, the first metal piece includes a first metal layer, a second metal layer, and a third metal layer, and the first metal layer, the second metal layer, and the third metal layer are sequentially stacked to form the first metal piece.

Optionally, forming a first metal part on the substrate, and forming a second metal part on the first metal part includes:

pressing a first photosensitive film on the substrate, forming a plurality of first openings in the first photosensitive film, and forming the first metal piece in the plurality of first openings;

Pressing a second photosensitive film on the first photosensitive film and the first metal piece, forming a plurality of second openings in the second photosensitive film, and forming a second metal piece in the plurality of second openings, wherein at least part of the second metal piece is positioned above the first metal piece;

and cleaning and removing the first photosensitive films on two sides of the first metal piece and the second photosensitive films on two sides of the second metal piece.

Optionally, the first metal piece is formed in the plurality of first openings by electroplating or sputtering; the first metal piece is in a flat plate shape.

Optionally, forming the second metal piece in the plurality of second openings in a manner of ball-planting or reflow soldering after metal paste is applied; the second metal piece is spherical.

Optionally, before forming the metal piece on the substrate, the semiconductor packaging method further includes:

and arranging an adhesive layer on the substrate, and forming the metal piece on the adhesive layer.

Optionally, after the peeling the substrate, the semiconductor packaging method includes:

and attaching a chip on the first surface of the carrier plate, and connecting the chip and the front surface of the metal piece through a metal connecting piece.

Optionally, after the chip and the front surface of the metal part are connected by the metal connecting member, the semiconductor packaging method further includes:

and plastically packaging the chip and the metal connecting piece on the carrier plate to form an encapsulating layer.

Optionally, after the chip and the front surface of the metal part are connected by the metal connecting member, the semiconductor packaging method further includes: and thinning the carrier plate to enable the carrier plate to expose the metal piece far away from one end of the chip relative to the second surface arranged on the first surface.

According to the semiconductor packaging method provided by the embodiment of the application, the metal part is formed on the substrate, the metal part is plastically packaged to form the carrier plate, namely the carrier plate is formed in a plastic packaging mode, the thickness of the carrier plate needing to be reserved in the processes of punching and the like for generating the metal part is avoided, the overall thickness of the carrier plate is effectively reduced, the strength of the carrier plate is enhanced, the situation that a chip is easy to crack when stressed is avoided, and the success rate of later-period packaging and the yield of products are guaranteed.

Drawings

Fig. 1 is a flowchart of a semiconductor packaging method according to an exemplary embodiment of the present application.

Fig. 2(a) -fig. 2(1) are process flow diagrams of manufacturing a carrier board with a metal element according to a semiconductor packaging method in an exemplary embodiment of the present application.

Fig. 3 is a schematic structural diagram of a carrier board according to an exemplary embodiment of the present application.

Fig. 4 is a schematic structural diagram of another angle of a carrier board according to an exemplary embodiment of the present application.

Fig. 5(a) -5 (f) are process flow diagrams of disposing chips and metal connectors, encapsulating, and thinning a carrier board according to a semiconductor packaging method in an exemplary embodiment of the present application.

Detailed Description

Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The use of the terms "a" or "an" and the like in the description and in the claims of this application do not denote a limitation of quantity, but rather denote the presence of at least one. "plurality" means two or more. The word "comprising" or "comprises", and the like, means that the element or item listed as preceding "comprising" or "includes" covers the element or item listed as following "comprising" or "includes" and its equivalents, and does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Upper" and/or "lower," and the like, are used for convenience of description and are not limited to a single position or orientation in space. As used in this specification and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

In the semiconductor package technology, a carrier board in a semiconductor package generally uses metal as a base material, and processes such as punching, etching, electroplating, sputtering and the like are performed on the base material to generate a metal layer, so that requirements of chip support and pin extraction are met through the metal layer.

However, since a process such as punching is required on the surface of the carrier, the thickness of the carrier is thick to reserve the depth of the punching, and the back surface of the chip is very easily stressed after being packaged into a single package at a later stage, thereby causing problems such as chip cracking and the like.

In order to solve the above-mentioned problems in the semiconductor packaging technology, the present application provides a semiconductor packaging method. In the packaging process, firstly, forming a metal piece on a substrate, wherein the metal piece extends inwards from the upper surface of the substrate; secondly, carrying out plastic package on the metal piece to form a carrier plate; and finally, stripping the substrate to expose the front surface of the metal piece and the first surface of the carrier plate. The above-mentioned embodiment of this application, through forming the metalwork on the base plate, and right the metalwork carries out the plastic envelope and forms the support plate, forms the support plate through the mode of plastic envelope promptly, has avoided the support plate thickness that needs to reserve in the processes such as punching that generate the metalwork, has effectually thinned the whole thickness of support plate, has strengthened the intensity of support plate moreover, has avoided the easy cracked condition of chip when the atress to guarantee the success rate of later stage encapsulation and the yield of product.

Referring to fig. 1, fig. 2(a) -fig. 2(1), fig. 3, fig. 4, fig. 5(a) -fig. 5(f), the present application provides a semiconductor packaging method.

Fig. 1 is a flowchart of a semiconductor packaging method according to an exemplary embodiment of the present application. As shown in fig. 1, the semiconductor packaging method includes the steps of:

step 110: forming a metal piece on a substrate, wherein the metal piece is positioned right above the substrate;

step 120: carrying out plastic package on the metal piece to form a carrier plate;

step 130: and stripping the substrate to expose the front surface of the metal piece and the first surface of the carrier plate.

Before step 110, i.e. before the metal part is formed on the substrate, an adhesive layer may be disposed on the substrate, and then the metal part is formed on the adhesive layer. As shown in fig. 2(a), an adhesive layer 102 is provided on a substrate 101 to form a carrier board 201 on the substrate 101, and the carrier board 201 is provided on the substrate 101 through the adhesive layer 102 and can be more firmly adhered to the substrate 101. Thereby facilitating subsequent operations of disposing the metal member 210 on the carrier plate 201.

The adhesive layer 102 may be made of a material that is easily peelable to peel off the substrate 101 and the carrier plate 201 having the metal member 210, for example, a thermal release material that can be heated to lose its adhesiveness. The adhesive layer 102 may be specifically a thermal decomposition film formed by coating a thermal separation material on the substrate 101.

The thermal separation membrane can adopt two-layer structure, thermal separation material layer and adhesive layer, and the thermal separation material layer is pasted on the support plate that forms in the later stage, can lose the stickness when heating, and then can make the support plate peel off from the base plate, and the adhesive layer adopts has sticky material layer, can be used for pasting the base plate. The thermal separation material layer is provided with heated foaming particles, the heated foaming particles can foam when reaching a specified temperature, the volume is increased sharply, and therefore objects adhered to the adhesion layer are ejected out of the adhesion layer to be separated. The heated foaming particles can reach a specified temperature by receiving laser or ultraviolet rays. In other embodiments, in order to better bond the thermal separation material layer and the adhesion layer, an intermediate layer is further arranged between the thermal separation material layer and the adhesion layer, and the material of the intermediate layer is polyester. The thickness ratio of the thermal release material layer, the intermediate layer and the adhesion layer was 1:0.75: 0.2. Compared with a mechanical separation mode, the separation mode of the thermal decomposition film can reduce the generation of stress and avoid the bad conditions of cracking, breaking and the like of the carrier plate.

The substrate 101 may be made of glass, stainless steel, or metal.

In step 110, the forming a metal piece on a substrate includes:

forming a first metal piece on the substrate;

a second metal piece is formed over the first metal piece.

Still more specifically, it comprises:

step 111: pressing a first photosensitive film on the substrate, forming a plurality of first openings in the first photosensitive film, and forming the first metal piece in the plurality of first openings;

step 112: pressing a second photosensitive film on the first photosensitive film and the first metal piece, forming a plurality of second openings in the second photosensitive film, and forming a second metal piece in the plurality of second openings, wherein at least part of the second metal piece is positioned above the first metal piece;

step 113: and cleaning and removing the first photosensitive films on two sides of the first metal piece and the second photosensitive films on two sides of the second metal piece.

In step 111, the first metal piece includes a first metal layer, a second metal layer, and a third metal layer, and the first metal layer, the second metal layer, and the third metal layer are sequentially stacked to form the first metal piece. As shown in fig. 2(b) -2 (c), a first metal layer 2111 is formed on the adhesive layer 102 by electroplating. The first photosensitive film 2031 is pressed on the adhesive layer 102, and a plurality of first film openings 2041 are formed in the first photosensitive film 2031 by exposure and development. A first metal layer 2111 is formed in the plurality of first film layer openings 2041. The position of the first film opening 2041 can be set according to the specific requirement of the first metal part. The material of the first metal layer 2111 is metallic gold. The thickness of the first metal layer 2111 ranges from 0.4 to 0.7 μm. In other embodiments, the first metal layer 2111 may be formed by sputtering. However, since the first metal layer 2111 is made of gold in this embodiment, the electroplating method is preferred to save material cost.

As shown in fig. 2(d) -2 (e), after the first metal layer 2111 is formed, a second metal layer 2112 is formed over the first metal layer 2111 by means of electroplating. The second metal layer 2112 is also formed by exposure and development. A second photosensitive film 2032 is pressed on the first photosensitive film 2031 and the first metal layer 2111, and a plurality of second film openings 2042 are formed on the second photosensitive film 2032 by exposure and development. A second metal layer 2112 is formed in the plurality of second film layer openings 2042. The position of the second film layer opening 2042 can be set according to the specific requirement of the first metal part. The material of the second metal layer 2112 may comprise metallic titanium or comprise metallic nickel. Optionally, the thickness of the second metal layer is in the range of 0.4-1.2 μm. In other embodiments, the second metal layer 2112 may be formed by electroplating.

As shown in fig. 2(f) -2 (g), after the second metal layer 2112 is formed, a third metal layer 2113 is formed over the second metal layer 2112 by means of electroplating. The third metal layer 2113 is also formed by exposure and development. A third photosensitive film 2033 is pressed on the second photosensitive film 2032 and the second metal layer 2112, and a plurality of third film openings 2043 are formed on the third photosensitive film 2033 by exposure and development. A third metal layer 2113 is formed in the plurality of third film layer openings 2043. The position of the third film opening 2043 can be set according to the specific requirement of the first metal part. The material of the third metal layer 2112 may include metallic titanium or include metallic nickel. Optionally, the thickness of the third metal layer 2113 ranges from 0.4 to 1.2 μm. In other embodiments, the third metal layer 2113 may be formed by electroplating.

Through the above steps, the first metal piece 211 including the first metal layer 2111, the second metal layer 2112, and the third metal layer 2113 is formed. The first metal member 211 is shaped like a flat plate. Also, through the above steps, the first photosensitive film 203 including the first photosensitive film layer 2031, the second photosensitive film layer 2032, and the third photosensitive film layer 2033 is formed.

When the thickness of the second metal layer 2112 satisfies the electrical connection performance, the third metal layer may not be provided. Accordingly, after the second metal layer 2112 is formed, the first metal piece 211 may be formed. Similarly, when the thickness of the first metal layer 2111 and the like satisfy the electrical connection performance, the first metal part 211 may be directly formed by forming the first metal layer 2111 without providing the second metal layer and the third metal layer, and at this time, the first film opening 2041 is the first opening 204.

In step 112, as shown in fig. 2(h) and 2(i), a second photosensitive film 205 is pressed on the first photosensitive film 203 and the first metal part 211, a plurality of second openings 206 are formed in the second photosensitive film 205, and a second metal part 212 is formed in the plurality of second openings 206. Specifically, the second photosensitive film 205 is pressed on the first photosensitive film 203 and the first metal member 211, and a plurality of second openings 206 are formed in the second photosensitive film 205 by exposure and development. A second metal part 212 is formed in the plurality of second openings 206, and the second metal part 212 is at least partially located above the first metal part 211. Specifically, the second metal member 212 is formed in the plurality of second openings 206 by ball-mounting or reflow soldering after metal paste is applied. The second metal piece 212 is spherical, and compared with a flat plate, the effect of leading out more pins can be realized; and, have better heat dissipation's of switching on characteristic and welding effect. Further, when the number of the second metal parts 212 is plural, the plural second metal parts 212 are arranged in a matrix, so that the number of the lead-out pins can be further increased.

The second metal part 212 is used as a lead, and preferably, the material of the second metal part 212 is metallic tin, because in the later step, when the packaged product is mounted on a PCB, tin metal is generally selected as a soldering material, and therefore, the same metal material is used in both the former step and the later step, and good board mounting performance can be ensured. The thickness of the second metal piece 212 ranges from 40 to 100 μm.

In step 113, as shown in fig. 2(j), the first photosensitive films 203 on two sides of the first metal piece 211 and the second photosensitive films 205 on two sides of the second metal piece 212 are cleaned and removed.

Next, in step 120, as shown in fig. 2(k), the metal member 210 is molded to form the carrier 201.

In step 130, as shown in fig. 2(l), the substrate 101 is removed from the bottom of the carrier 201, exposing the front surface of the metal component 210 and the first surface 2011 of the carrier 201. The adhesive layer 102 between the substrate 101 and the carrier 201 is a thermal separation film, and the thermal separation material on the thermal separation film can be foamed after being heated by laser, ultraviolet rays and heating methods, so as to peel off the substrate 101. In other embodiments, the substrate 101 may be mechanically peeled directly.

Fig. 3 is a schematic structural diagram of a carrier 201 obtained by using the above semiconductor packaging method according to an exemplary embodiment of the present application. Fig. 4 is a schematic structural diagram of another angle of the carrier 201 obtained by using the above semiconductor packaging method according to an exemplary embodiment of the present application.

Through the steps, namely the semiconductor packaging method for forming the carrier plate in the plastic packaging mode, the thickness of the carrier plate needing to be reserved in the processes of punching and the like for generating the metal part is avoided, the overall thickness of the carrier plate is effectively reduced, the strength of the carrier plate is enhanced, the situation that a chip is easy to crack when stressed is avoided, and therefore the success rate of later-period packaging and the yield of products are guaranteed.

Thereafter, i.e., after the peeling of the substrate, the semiconductor packaging method further includes:

step 140: attaching a chip on the first surface of the carrier plate, and connecting the chip and the front surface of the metal piece through a metal connecting piece;

step 150: carrying out plastic package on the chip and the metal connecting piece on the carrier plate to form an encapsulating layer;

step 160: and thinning the carrier plate to enable the carrier plate to expose the metal piece far away from one end of the chip relative to the second surface arranged on the first surface.

In step 140, as shown in fig. 5(a), the chip 202 is attached to the first surface 2011 of the carrier 201, and the chip 202 and the front surface of the metal 210 are connected by the metal connecting element 220. The metal connection member 220 includes a first metal connection member 221 and a second metal connection member 222. The first metal connecting element 221 is disposed on a surface of the chip 202 facing the carrier 201, and is used for connecting the chip 202 and a front surface of the metal member 210. One end of the second metal connecting element 222 is connected to the functional end of the chip 202 on the side away from the carrier 201, and the other end is connected to the front surface of the metal element 210.

In step 150, as shown in fig. 5(b), the chip 202 and the metal connector 220 are molded on the carrier 201 to form an encapsulation layer 207. The encapsulating layer 207 may be formed by laminating an epoxy resin film or abf (ajinomoto build film), or may be formed by Injection molding (Injection molding), Compression molding (Compression molding) or Transfer molding (Transfer molding) of an epoxy resin compound.

In other embodiments, the step 160 may be directly performed without plastic molding the chip 202 and the metal connectors 220 to meet the final design of the product.

In step 160, as shown in fig. 5(c), the carrier board 201 is thinned, so that an end of the metal component 210 away from the chip 202 is exposed on a second surface 2012 of the carrier board 201, which is disposed opposite to the first surface 2011. In specific implementation, the carrier plate 201 may be thinned by grinding. After the carrier plate 201 is thinned, the second surface 2012 thereof and the lower surface of the metal member 210 may be in the same plane, or substantially in the same plane, so as to facilitate subsequent operations of mounting a chip and the like.

After the above steps, the thickness of the thinned carrier 201 is only within 100 μm.

In other embodiments, as shown in fig. 5(d), only the first metal connecting member 221 may be provided to connect the chip 202 and the metal member 210. Specifically, the first metal connecting member 221 is a metal pillar. Next, as shown in fig. 5(e), the chip 202 and the metal connector 220 are molded on the carrier 201 to form an encapsulation layer 207. Finally, as shown in fig. 5(f), the second surface 2012 of the carrier 201 disposed opposite to the first surface 2011 is thinned to expose an end of the metal element 210 away from the chip 202, i.e., a lower surface of the metal element 210, so as to complete the manufacturing process.

In the present application, the apparatus embodiments and the method embodiments may be complementary to each other without conflict.

The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the scope of protection of the present application.