阅读说明：本技术 一种基于单极型晶体管的输出反馈逻辑电路及芯片 (Output feedback logic circuit and chip based on unipolar transistor ) 是由 徐煜明 陈荣盛 吴朝晖 李斌 于 2020-06-18 设计创作，主要内容包括：本发明公开了一种基于单极型晶体管的输出反馈逻辑电路及芯片,其中输出反馈逻辑电路包括：第一晶体管的源极与下拉单元的第一端连接,且作为输出反馈逻辑电路的输出端,输入控制开关的第一端与输出控制开关的第一端之间的连接点与第一晶体管的栅极连接；输入控制开关的控制端连接至信号输入端,输入控制开关的第二端与输出反馈逻辑电路的输出端连接；输出控制开关的控制端与输出反馈逻辑电路的输出端连接；下拉单元的控制端连接至信号输入端,下拉单元的第一端与输出反馈逻辑电路的输出端连接。本发明的输出反馈逻辑电路仅由单极型晶体管组成；该输出反馈逻辑电路与传统的设计相比,电路复杂度更低,可广泛应用于半导体集成电路领域。(The invention discloses an output feedback logic circuit and a chip based on a unipolar transistor, wherein the output feedback logic circuit comprises: the source electrode of the first transistor is connected with the first end of the pull-down unit and serves as the output end of the output feedback logic circuit, and the connecting point between the first end of the input control switch and the first end of the output control switch is connected with the grid electrode of the first transistor; the control end of the input control switch is connected to the signal input end, and the second end of the input control switch is connected with the output end of the output feedback logic circuit; the control end of the output control switch is connected with the output end of the output feedback logic circuit; the control end of the pull-down unit is connected to the signal input end, and the first end of the pull-down unit is connected with the output end of the output feedback logic circuit. The output feedback logic circuit of the invention only consists of unipolar transistors; compared with the traditional design, the output feedback logic circuit has lower circuit complexity and can be widely applied to the field of semiconductor integrated circuits.)

1. An output feedback logic circuit based on a unipolar transistor is characterized by comprising a pull-up unit, a pull-down unit, an input control switch and an output control switch, wherein the pull-up unit comprises a first transistor;

the drain electrode of the first transistor is connected with a power supply end, the source electrode of the first transistor is connected with the first end of the pull-down unit and serves as the output end of the output feedback logic circuit, and the connecting point between the first end of the input control switch and the first end of the output control switch is connected with the grid electrode of the first transistor;

the control end of the input control switch is connected to the signal input end, and the second end of the input control switch is connected with the output end of the output feedback logic circuit;

the control end of the output control switch is connected with the output end of the output feedback logic circuit, and the second end of the output control switch is connected with a power supply end;

the control end of the pull-down unit is connected to the signal input end, the first end of the pull-down unit is connected with the output end of the output feedback logic circuit, and the second end of the pull-down unit is connected to the ground end;

the output feedback logic circuit includes at least one of an inverter circuit, a multiple-input nor gate circuit, or a multiple-input nand gate circuit.

2. The output feedback logic circuit based on unipolar transistors according to claim 1, wherein said output control switch is made of one transistor.

3. The output feedback logic circuit based on unipolar transistors according to claim 1, wherein the unipolar transistor is an n-type transistor, the output feedback logic circuit is an inverter circuit, the pull-down unit comprises a second transistor, the output control switch comprises a third transistor, and the input control switch comprises a fourth transistor;

the drain electrode of the second transistor is connected with the output end of the output feedback logic circuit, the grid electrode of the second transistor is connected to the signal input end, and the source electrode of the second transistor is connected to the ground end;

the drain electrode of the third transistor is connected to a power supply end, the grid electrode of the third transistor is connected with the output end of the output feedback logic circuit, and the source electrode of the third transistor is connected with the drain electrode of the fourth transistor;

and the grid electrode of the fourth transistor is connected to the signal input end, and the source electrode of the fourth transistor is connected with the output end of the output feedback logic circuit.

4. The output feedback logic circuit based on unipolar transistors according to claim 1, wherein the unipolar transistor is an n-type transistor, the output feedback logic circuit is a multiple-input nor gate circuit, the pull-down unit comprises m parallel transistors, the input control switch comprises m parallel transistors, the output control switch comprises one transistor, a gate of the transistor is connected to an output end of the output feedback logic circuit, and m is an integer greater than 1.

5. The output feedback logic circuit based on unipolar transistors according to claim 4, wherein the multiple-input NOR gate circuit is a two-input NOR gate circuit, the pull-down unit comprises a fifth transistor and a sixth transistor, and the input control switch comprises a seventh transistor and an eighth transistor;

the drain electrode of the fifth transistor and the drain electrode of the sixth transistor are both connected to the output end of the output feedback logic circuit, the source electrode of the fifth transistor and the source electrode of the sixth transistor are both connected to the ground end, the grid electrode of the fifth transistor is connected to the first signal input end, and the grid electrode of the sixth transistor is connected to the second signal input end;

the drain electrode of the seventh transistor and the drain electrode of the eighth transistor are both connected with the source electrode of the output control switch, the source electrode of the seventh transistor and the source electrode of the eighth transistor are both connected with the output end of the output feedback logic circuit, the grid electrode of the seventh transistor is connected with the first signal input end, and the grid electrode of the eighth transistor is connected with the second signal input end.

6. The output feedback logic circuit based on unipolar transistors according to claim 1, wherein the unipolar transistor is an n-type transistor, the output feedback logic circuit is a multi-input nand gate circuit, the pull-down unit comprises p transistors connected in series, the input control switch comprises p transistors connected in series, the output control switch comprises one transistor, a gate of the transistor is connected to an output end of the output feedback logic circuit, and p is an integer greater than 1.

7. The output feedback logic circuit based on unipolar transistors according to claim 6, wherein the multiple-input NAND gate circuit is a two-input NAND gate circuit, the pull-down unit comprises a ninth transistor and a tenth transistor, and the input control switch comprises an eleventh transistor and a twelfth transistor;

the drain of the ninth transistor is connected with the output end of the output feedback logic circuit, the source of the ninth transistor is connected with the drain of the tenth transistor, and the gate of the ninth transistor is connected to the first signal input end;

a source of the tenth transistor is connected to a ground terminal, and a gate of the tenth transistor is connected to the second signal input terminal;

the drain of the eleventh transistor is connected with the source of the output control switch, the source of the eleventh transistor is connected with the drain of the twelfth transistor, and the gate of the eleventh transistor is connected to the first signal input end;

and the source electrode of the twelfth transistor is connected to the output end of the output feedback logic circuit, and the grid electrode of the twelfth transistor is connected to the second signal input end.

8. A chip comprising a logic circuit employing a unipolar transistor based output feedback logic circuit according to any one of claims 1 to 7.

Technical Field

The invention relates to the field of semiconductor integrated circuits, in particular to an output feedback logic circuit and a chip based on a unipolar transistor.

Background

There are practical difficulties between conventional rigid electronics and flexible articles of daily life such as paper, tapes, human bodies and textiles. We can solve this problem by large area flexible electronics. These large area flexible electronic technologies offer flexibility, light weight, ultra-thin dimensions, transparency, stretchability, large area applicability, low cost and other attractive functionalities.

However, most flexible electronic technologies today can only provide high performance unipolar (pure n-type or pure p-type) devices. For example, a-Si TFT technology, oxide TFT technology with the main device type being n-type transistors; in the organic TFT technology, the main device type of the carbon nanotube technology is a p-type transistor. Therefore, in general, the flexible electronic circuit can be realized based on only unipolar transistors, which means that the conventional CMOS circuit design technology is no longer applicable, and the design of the flexible integrated circuit faces many challenges compared with the mature CMOS integrated circuit design technology.

The invention only uses a pure n-type circuit as an example for discussion, and for a pure p-type circuit, the circuit is just turned over up and down, so detailed description is not needed.

The basic logic gate circuit based on the unipolar device has two designs in common use at present: pseudo-CMOS technology and capacitive bootstrapping technology. Fig. 1 shows a pseudo CMOS inverter structure. Fig. 2 shows a capacitor bootstrapped inverter architecture. From the circuit complexity point of view, the pseudo CMOS technology requires two power supplies, and the capacitor bootstrap technology requires a bootstrap capacitor, which undoubtedly increases the circuit complexity. From a power consumption perspective, when the input is high, neither the pull-up transistor nor the pull-down transistor can be completely turned off, and thus there is a large leakage current, resulting in non-zero static power consumption.

Disclosure of Invention

In order to solve one of the above technical problems, an object of the present invention is to provide an output feedback logic circuit and a chip based on unipolar transistors.

The first technical scheme adopted by the invention is as follows:

an output feedback logic circuit based on a unipolar transistor comprises a pull-up unit, a pull-down unit, an input control switch and an output control switch, wherein the pull-up unit comprises a first transistor;

the drain electrode of the first transistor is connected with a power supply end, the source electrode of the first transistor is connected with the first end of the pull-down unit and serves as the output end of the output feedback logic circuit, and the connecting point between the first end of the input control switch and the first end of the output control switch is connected with the grid electrode of the first transistor;

the control end of the input control switch is connected to the signal input end, and the second end of the input control switch is connected with the output end of the output feedback logic circuit;

the control end of the output control switch is connected with the output end of the output feedback logic circuit, and the second end of the output control switch is connected with a power supply end;

the control end of the pull-down unit is connected to the signal input end, the first end of the pull-down unit is connected with the output end of the output feedback logic circuit, and the second end of the pull-down unit is connected to the ground end;

the output feedback logic circuit includes at least one of an inverter circuit, a multiple-input nor gate circuit, or a multiple-input nand gate circuit.

Further, the output control switch is made of one transistor.

Further, the unipolar transistor is an n-type transistor, the output feedback logic circuit is an inverter circuit, the pull-down unit includes a second transistor, the output control switch includes a third transistor, and the input control switch includes a fourth transistor;

the drain electrode of the second transistor is connected with the output end of the output feedback logic circuit, the grid electrode of the second transistor is connected to the signal input end, and the source electrode of the second transistor is connected to the ground end;

the drain electrode of the third transistor is connected to a power supply end, the grid electrode of the third transistor is connected with the output end of the output feedback logic circuit, and the source electrode of the third transistor is connected with the drain electrode of the fourth transistor;

and the grid electrode of the fourth transistor is connected to the signal input end, and the source electrode of the fourth transistor is connected with the output end of the output feedback logic circuit.

Further, the unipolar transistor is an n-type transistor, the output feedback logic circuit is a multi-input nor gate circuit, the pull-down unit includes m parallel transistors, the input control switch includes m parallel transistors, the output control switch includes a transistor, a gate of the transistor is connected with an output end of the output feedback logic circuit, and m is an integer greater than 1.

Further, the multiple-input nor gate circuit is a two-input nor gate circuit, the pull-down unit includes a fifth transistor and a sixth transistor, and the input control switch includes a seventh transistor and an eighth transistor;

the drain electrode of the fifth transistor and the drain electrode of the sixth transistor are both connected to the output end of the output feedback logic circuit, the source electrode of the fifth transistor and the source electrode of the sixth transistor are both connected to the ground end, the grid electrode of the fifth transistor is connected to the first signal input end, and the grid electrode of the sixth transistor is connected to the second signal input end;

the drain electrode of the seventh transistor and the drain electrode of the eighth transistor are both connected with the source electrode of the output control switch, the source electrode of the seventh transistor and the source electrode of the eighth transistor are both connected with the output end of the output feedback logic circuit, the grid electrode of the seventh transistor is connected with the first signal input end, and the grid electrode of the eighth transistor is connected with the second signal input end.

Further, the unipolar transistor is an n-type transistor, the output feedback logic circuit is a multi-input nand gate circuit, the pull-down unit includes p transistors connected in series, the input control switch includes p transistors connected in series, the output control switch includes a transistor, a gate of the transistor is connected to an output end of the output feedback logic circuit, and p is an integer greater than 1.

Further, the multiple input nand gate circuit is a two input nand gate circuit, the pull-down unit includes a ninth transistor and a tenth transistor, and the input control switch includes an eleventh transistor and a twelfth transistor;

the drain of the ninth transistor is connected with the output end of the output feedback logic circuit, the source of the ninth transistor is connected with the drain of the tenth transistor, and the gate of the ninth transistor is connected to the first signal input end;

a source of the tenth transistor is connected to a ground terminal, and a gate of the tenth transistor is connected to the second signal input terminal;

the drain of the eleventh transistor is connected with the source of the output control switch, the source of the eleventh transistor is connected with the drain of the twelfth transistor, and the gate of the eleventh transistor is connected to the first signal input end;

and the source electrode of the twelfth transistor is connected to the output end of the output feedback logic circuit, and the grid electrode of the twelfth transistor is connected to the second signal input end.

The second technical scheme adopted by the invention is as follows:

a chip comprises a logic circuit, wherein the logic circuit adopts the output feedback logic circuit based on the unipolar transistor.

The invention has the beneficial effects that: the output feedback logic circuit only consists of unipolar transistors and is suitable for the flexible electronic technology; in addition, the output feedback logic circuit is less complex than conventional designs.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description is made on the drawings of the embodiments of the present invention or the related technical solutions in the prior art, and it should be understood that the drawings in the following description are only for convenience and clarity of describing some embodiments in the technical solutions of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.

FIG. 1 is a circuit schematic of a prior art pseudo CMOS inverter;

FIG. 2 is a circuit schematic of a prior art capacitor-bootstrapped inverter;

FIG. 3 is a schematic diagram of an inverter circuit in an embodiment of the invention;

FIG. 4 is an electrical schematic of an inverter circuit according to an embodiment of the present invention;

FIG. 5 is a schematic diagram showing a VTC curve of an inverter circuit in an embodiment;

FIG. 6 is a schematic diagram showing the current consumption of an inverter circuit according to an embodiment;

FIG. 7 is a schematic diagram of the current consumption of a conventional pseudo CMOS logic circuit;

FIG. 8 is a schematic diagram of the current consumption of a conventional capacitive bootstrap logic circuit;

FIG. 9 is a schematic diagram of a two-input NOR gate circuit in an embodiment of the present invention;

FIG. 10 is a schematic diagram of a two input NAND gate circuit in an embodiment of the present invention;

FIG. 11 is a diagram illustrating the operating waveforms and current consumption of a two-input NOR gate according to an embodiment of the present invention;

FIG. 12 is a diagram illustrating the operating waveforms and current consumption of a two-input NAND gate according to an embodiment of the present invention.

Detailed Description

Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.

In the description of the present invention, it should be understood that the orientation or positional relationship referred to in the description of the orientation, such as the upper, lower, front, rear, left, right, etc., is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.

In the description of the present invention, the meaning of a plurality of means is one or more, the meaning of a plurality of means is two or more, and larger, smaller, larger, etc. are understood as excluding the number, and larger, smaller, inner, etc. are understood as including the number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.