阅读说明：本技术 发送器、接收器及用于发送模拟信号的方法 (Transmitter, receiver and method for transmitting analog signal ) 是由 金耕进 彭政谕 王炳南 张坤好 于 2018-07-06 设计创作，主要内容包括：发送器或接收器包括至少一个射频(RF)链。RF链包括发送元件阵列,每个发送元件包括串联连接的带通滤波器和天线,以使用具有通过由阵列内的不同发送元件接收的模拟信号的相移所限定的发射角(AOD)的波束成形来发送模拟信号。移相器使输入信号的相位移位。可变增益放大器(VGA)改变输入信号的振幅。切换器将移相器和VGA连接到阵列中的每个发送元件。其中,在给定的时间点最多一个发送元件被连接到移相器和VGA,使得切换器为单刀M掷(SPMT)模拟开关。控制器控制移相器、VGA和切换器。(The transmitter or receiver includes at least one Radio Frequency (RF) chain. The RF chain includes an array of transmit elements, each including a bandpass filter and an antenna connected in series to transmit analog signals using beamforming with an angle of emission (AOD) defined by phase shifts of the analog signals received by different transmit elements within the array. The phase shifter shifts the phase of the input signal. A Variable Gain Amplifier (VGA) varies the amplitude of the input signal. A switch connects the phase shifter and VGA to each transmit element in the array. Wherein at most one transmit element is connected to the phase shifter and VGA at a given point in time, such that the switch is a single pole M-throw (SPMT) analog switch. The controller controls the phase shifter, the VGA, and the switch.)

1. A transmitter comprising at least one radio frequency, RF, chain, the RF chain comprising:

an array of transmit elements, each transmit element comprising a bandpass filter and an antenna connected in series to transmit an analog signal using beamforming with a transmission angle AOD defined by phase shifts of analog signals received by different transmit elements within the array of transmit elements;

a phase shifter that shifts a phase of an input signal;

a variable gain amplifier VGA that changes an amplitude of the input signal, wherein the phase shifter and the VGA are connected in series;

a switch connecting the phase shifter and the VGA to each transmit element in the array of transmit elements, wherein at most one transmit element is connected to the phase shifter and the VGA at a given point in time, such that the switch is a single-pole M-throw SPMT analog switch, where M is the size of the array of transmit elements; and

a controller that controls the phase shifter, the VGA, and the switch such that, at the given point in time, the transmit element receives a sample of the input signal having a phase and amplitude determined based on the AOD and the position of the transmit element in the array of transmit elements.

2. The transmitter of claim 1, wherein the controller, in response to receiving the AOD, determines a phase shift value and an amplitude value for each transmit element of the array of transmit elements to form a sequence of phase shift values and a sequence of amplitude values corresponding to a sequence of states of the switches connecting the phase shifter to different transmit elements, and controls the phase shifter at each point in time to change a phase of the input signal according to the sequence of phase shift values and the VGA at each point in time to change an amplitude of the input signal according to the sequence of amplitude values.

3. The transmitter of claim 1, wherein the sequence of states of the switch is predetermined and stored in a memory operably connected to the controller.

4. The transmitter of claim 1, further comprising:

a power amplifier connected in series to the phase shifter and the VGA.

5. The transmitter of claim 1, wherein each transmit element comprises a power amplifier connected in series to the band pass filter and the antenna.

6. The transmitter of claim 1, further comprising:

a plurality of RF chains; and

a power splitter that directs the input signal to each of the plurality of RF chains.

7. The transmitter of claim 1, wherein the size M of the array of transmit elements is determined by a frequency of the switch.

8. The transmitter of claim 1, wherein the size M of the array of transmit elements is less than a frequency of the switch divided by a bandwidth of the input signal.

9. A receiver in communication with the transmitter of claim 1, wherein a receive RF chain of the receiver comprises:

an antenna array that receives signals at an angle of arrival, AOA;

a receive switch that activates each antenna in the antenna array such that at most one antenna is active at a given point in time, and the switch is a K-throw, single pole, KTSP, analog switch, where K is the size of the antenna array that produces a combined signal with different phase shifts and amplitudes;

a reception phase shifter that shifts a phase of the combined signal;

a reception variable gain amplifier VGA that changes an amplitude of the combined signal, wherein the reception phase shifter and the reception VGA are connected in series; and

a controller that controls the receive phase shifter, the receive VGA, and the receive switch such that, at a given point in time, the receive phase shifter and the receive VGA modify the phase shift and amplitude of a received signal based on the AOA and the position of a receive antenna in the antenna array.

10. The receiver of claim 9, further comprising:

a plurality of receive RF chains;

a power combiner that combines the outputs of each receive RF chain;

a down converter that down-converts the synthesized signal;

an analog-to-digital converter that converts the downconverted composite signal into the digital domain to produce a digital signal; and

a processor that demodulates the digital signal.

11. The receiver of claim 9, wherein the transmitter is part of a fifth generation 5G communication system.

12. A method for transmitting analog signals by an antenna array using beamforming with a transmission angle AOD defined by phase shifts of analog signals transmitted by different antennas, the method comprising the steps of:

determining a phase shift value and an amplitude value for each antenna in the antenna array based on the AOD and a position of each antenna in the array;

ordering the phase shift values according to an activation sequence of antennas in the array to form a phase shift sequence;

sorting the amplitude values according to an activation sequence of antennas in the array to form an amplitude sequence;

modifying the phase and amplitude of the analog signal according to the values in the phase shift sequence and the amplitude sequence;

sampling the modified analog signal and directing the samples to different antennas in an order determined by an activation sequence of the antennas;

bandpass each sampling directed to each antenna to produce a modified copy of the analog signal for each antenna; and

transmitting the modified copy of the analog signal from a respective antenna.

13. A transmitter comprising at least two radio frequency, RF, chains, the transmitter comprising:

each RF chain comprising:

an array of transmit elements, each transmit element comprising a bandpass filter and an antenna connected in series to transmit an analog signal using beamforming with a transmission angle AOD defined by phase shifts of analog signals received by different transmit elements within the array of transmit elements;

a phase shifter that shifts a phase of an input signal;

a variable gain amplifier VGA that changes an amplitude of the input signal, wherein the phase shifter and the VGA are connected in series;

a switch connecting the phase shifter and the VGA to each transmit element in the array of transmit elements, wherein at most one transmit element is connected to the phase shifter and the VGA at a given point in time, such that the switch is a single-pole M-throw SPMT analog switch, where M is the size of the array of transmit elements; and

a controller that controls the at least two RF chains by controlling at least two phase shifters, at least two VGAs, and at least two switches such that at the given point in time at least two transmit elements in the at least two RF chains receive samples of the input signal having phases and amplitudes determined based on the AODs of the array and the positions of the at least two transmit elements in the array of transmit elements of the at least two RF chains.

14. The transmitter of claim 13, wherein the controller, in response to receiving the AODs of the array, determines a phase shift value and an amplitude value for each transmit element of the array of transmit elements to form a sequence of phase shift values and a sequence of amplitude values corresponding to a sequence of states of the switches connecting the phase shifter to different transmit elements, and controls the phase shifter at each point in time to change the phase of the input signal according to the sequence of phase shift values and the VGA at each point in time to change the amplitude of the input signal according to the sequence of amplitude values.

15. The transmitter of claim 13, wherein different transmit elements within the array of transmit elements are determined by the position of the transmit elements.

16. The transmitter of claim 13, wherein the transmitter is part of a fifth generation 5G communication system.

17. The transmitter of claim 13, wherein the sequence of states of the switch is predetermined and stored in a memory operably connected to the controller.

18. The transmitter of claim 13, further comprising:

a power amplifier connected in series to the phase shifter and the VGA such that each transmit element includes the power amplifier connected in series to the bandpass filter and the antenna.

Technical Field

Embodiments of the present disclosure include devices, methods, and systems related to the field of multiple-input multiple-output (MIMO) wireless communication systems, and more particularly, to massive MIMO wireless communication systems using beamforming transmissions.

Background

The term "antenna array" refers to a geometric arrangement of a large number of antenna elements. The antenna elements may be configured as a single antenna element to achieve a desired antenna gain and directional characteristics such as a particular radiation pattern. This change in radiation pattern may be referred to as beamforming. The antenna array may have applications such as in a multiple-input multiple-output (MIMO) communication system. In particular, very large antenna arrays may be referred to as "massive MIMO arrays". Massive MIMO arrays may use hundreds of antenna elements arranged in a single antenna unit and are considered as key technology components of future communication systems such as fifth generation (5G) communication. The uplink MIMO unit may include, for example, a radio base station receiver, an analog-to-digital converter, and an automatic gain control unit according to conventional techniques.

Massive MIMO may have some advantages, however, these advantages may actually be offset by the increased hardware complexity associated with having many antennas and many associated up/down conversion chains, as well as by the increased power consumption of all hardware required for operation.

US 9,705,579 provides an approach that has the complexity of using a MIMO system, while retaining some of the benefits of antenna selection, where a subset of size L taken from a set of N available antenna signals is selected and connected to L (L < N) Radio Frequency (RF) chains via a switch. However, this approach does not provide a certain amount of beamforming gain and therefore exhibits reduced or unacceptable performance, especially in channels having a small angular spread as typically occurs in conventional cellular systems.

Therefore, shared hardware resources are required for beamforming transmission from the antenna array.

Disclosure of Invention

Embodiments of the present disclosure include devices, methods, and systems related to the field of multiple-input multiple-output (MIMO) wireless communication systems, and more particularly to massive MIMO wireless communication systems using beamformed transmissions from antenna arrays. Some embodiments provide for reducing the implementation cost of a MIMO wireless communication system by sharing analog hardware resources for beamforming transmissions from different antennas of an antenna array. Additionally, some embodiments include reusing phase shifters and/or Variable Gain Amplifiers (VGAs) for transmission with multiple antennas within a MIMO wireless communication system.

Initially, the present disclosure is directed to an aspect of experimentally beamforming or spatial filtering, where beamforming may be understood as a signal processing technique used in a sensor array for directional signal transmission or reception. This can be achieved by combining elements in an antenna array together in such a way that signals at a particular angle undergo constructive interference while others undergo destructive interference. Beamforming may be used at both the transmitting end and the receiving end to achieve spatial selectivity.

To change the directivity of the array at the time of transmission, the beamformer can control the phase and relative amplitude of the signals at each transmission to create patterns of constructive and destructive interference at the wavefront. For example, in a phased array, power from a transmitter may be fed to an antenna through a device called a phase shifter controlled by a computer system. Wherein computer controlled phase shifters can change the phase to steer the radio beam to different directions. Similarly, the VGA can control the amplitude of signals transmitted from different antennas to focus the formed beams.

Some embodiments are based on the following observations: since different antennas need to transmit signals with different phase shifts and amplitudes simultaneously, each antenna needs to be connected to a phase shifter and a VGA dedicated to that antenna. However, one aspect that is known from experimentation is that when the number of antennas increases to thousands, such as in massive MIMO-like systems, the cost of having thousands of phase shifters and VGAs may become impractical.

Some embodiments are based on another recognition: in order to reuse the same phase shifter and/or VGA for transmission with multiple antennas, the dependency on concurrent transmission from multiple antennas needs to be broken. During the experiment, this seems to be unused information, so that for analog beamforming of continuous analog signals, a solution to the problem seems to be unfeasible. However, after our experiments the importance of the knowledge soon became realistic, with some embodiments seeking to decouple the time of analog beamforming using principles borrowed from digital signal processing.

In particular, in the field of digital signal processing, the sampling theorem is a bridge between continuous-time signals (i.e., analog signals) and discrete-time signals (e.g., digital signals). The sampling theorem establishes sufficient conditions for the sampling rate to allow a discrete sample sequence to capture all information from a continuous-time signal of limited bandwidth.

Some embodiments are based on the following recognition, among others: the samples in the sequence of discrete samples are separated by a time period determined by the sampling frequency. If the discrete sample sequences are shifted within the limits of the time period, the two discrete sample sequences (the original sequence and the shifted sequence) represent the analog signal as a whole, and the same analog signal can be reconstructed from one or both of the two discrete sample sequences. However, because the two discrete sample sequences are shifted in time, only one sample is processed at each point in time, which allows the same phase shifter and/or VGA to process samples of different sample sequences.

Furthermore, some embodiments are based on the following recognition: the switch may be used to direct the input signal to different antennas and act as a sampler for the input signal. To this end, if a phase shifter and/or VGA is arranged on the path of the input signal before the switch, the phase shifter and/or VGA can modify the input signal with the value required by the currently connected (i.e. active) antenna. In this way, when the switch connects the pass of the incoming signal to a different antenna, the phase shifter and/or VGA can quickly change their control to the value of the different antenna. After sampling, the sequence of discrete samples presented to each antenna may be converted to an analog signal by a respective band pass filter.

Accordingly, one embodiment discloses at least one transmitter comprising at least one Radio Frequency (RF) chain. The RF chain may include an array of transmit elements such that each transmit element includes a bandpass filter and an antenna connected in series to transmit analog signals using beamforming with an angle of emission (AOD) defined by phase shifts of analog signals received by different transmit elements. The RF chain also includes a phase shifter to shift the phase of the input signal and a Variable Gain Amplifier (VGA) to change the amplitude of the input signal. The phase shifter is connected in series with the VGA.

The RF chain may further include a switch connecting the phase shifter and the variable gain amplifier to each transmit element in the array of transmit elements. The switch may be a single pole, M-throw (SPMT) analog switch, where M is the size of the array of transmit elements, such that at most one transmit element is connected to the phase shifter and variable gain amplifier at a given point in time.

The operation of the RF chain may be controlled by a controller to control one or a combination of a phase shifter, a variable gain amplifier and a switch. Wherein at a given point in time, the transmit element receives a sample of the input signal having a phase and amplitude determined based on the AOD and the position of the transmit element in the array of transmit elements.

For example, in one embodiment, the controller, in response to receiving the AOD, may determine a phase shift value and an amplitude value for each transmit element in the array of transmit elements to form a sequence of phase shift values and a sequence of amplitude values. These two sequences correspond to a sequence of states of switches connecting the phase shifter to different transmit elements. For example, the sequence of states of the switch may be predetermined and stored in a memory operatively connected to the controller. In this way, the sequence of phase shift values and the sequence of amplitude values are synchronized with the operation (i.e., the state) of the switcher, so that the controller controls the phase shifter at each control step to change the phase of the input signal according to the sequence of phase shift values, and controls the variable gain amplifier at each control step to change the amplitude of the input signal according to the sequence of amplitude values. The controlling step has the same frequency as the frequency of the switch.

Further, to transmit a signal with the AOD, the controller determines a sequence of M phase shift values for a sequence of M antennas in the antenna array. If the AOD remains constant during the transmission period, the controller replicates the M phase shift values to form a sequence of phase shift values for the transmission period. In this way, the sequence of phase shift values includes phase shift values for all antennas in the antenna array. In some embodiments, the phase values for the different antennas alternate according to a switching order (i.e., according to a sequence of states of the switches). In one embodiment, the sequence of amplitude values may be determined in a similar manner as the sequence of phase shift values is determined.

In one embodiment, each RF chain may include a power amplifier connected in series to a phase shifter and a variable gain amplifier on a path of the input signal before the switch. Such a configuration allows reuse of the power amplifier for transmission from multiple antennas. In an alternative embodiment, each transmit element may comprise a power amplifier connected in series to a band pass filter and an antenna (i.e. on the path of the input signal after the switch). At least one aspect of this embodiment is to reduce the requirements on the operating frequency of the power amplifier.

Each RF chain may include an array of M transmit elements. The size M of the array of transmit elements may be determined by the frequency of the switch. For example, the size M of the array of transmit elements is less than the frequency of the switch divided by the bandwidth of the input signal, as determined by sampling theorem.

According to an embodiment of the present disclosure, a transmitter includes at least one Radio Frequency (RF) chain. The RF chain includes an array of transmit elements. Wherein each transmit element includes a bandpass filter and an antenna connected in series to transmit analog signals using beamforming with an angle of emission (AOD) defined by phase shifts of analog signals received by different transmit elements within the array of transmit elements. The phase shifter shifts the phase of the input signal. A Variable Gain Amplifier (VGA) changes the amplitude of an input signal, wherein a phase shifter is connected in series with the VGA. A switch connects the phase shifter and the VGA to each transmit element in the array of transmit elements. Where at most one transmit element is connected to the phase shifter and VGA at a given point in time, such that the switch is a single pole M-throw (SPMT) analog switch, where M is the size of the transmit element array. The controller controls the phase shifter, the VGA, and the switch such that at a given point in time, the transmit element receives samples of the input signal having a phase and amplitude determined based on the AOD and the position of the transmit element within the array of transmit elements.

According to an embodiment of the present disclosure, a method for transmitting analog signals by an antenna array using beamforming with an angle of transmission (AOD) defined by phase shifts of the analog signals transmitted by different transmit elements. The method comprises the following steps: phase shift and amplitude values are determined for each antenna in the antenna array based on the AOD and the position of each antenna in the array. The phase shift values are ordered according to the activation sequence of the antennas in the array to form a phase shift sequence. The amplitude values are ordered according to the activation sequence of the antennas in the array to form an amplitude sequence. The phase and amplitude of the analog signal are modified according to the values in the phase shift sequence and the amplitude sequence. The modified analog signal is sampled and the samples are directed to different antennas in an order determined by the active sequence of the antennas. Each sampling directed to each antenna is bandpass-passed to produce a modified replica of the analog signal for each antenna. The modified copies of the analog signals are transmitted from the respective antennas.

According to an embodiment of the present disclosure, a transmitter includes at least two Radio Frequency (RF) chains. The transmitter includes RF chains having an array of transmit elements. Wherein each transmit element includes a bandpass filter and an antenna connected in series to transmit analog signals using beamforming with an angle of emission (AOD) defined by phase shifts of analog signals received by different transmit elements within the array of transmit elements. The phase shifter shifts the phase of the input signal. A Variable Gain Amplifier (VGA) changes the amplitude of an input signal, wherein a phase shifter is connected in series with the VGA. A switch connects the phase shifter and the VGA to each transmit element in the array of transmit elements. Where at most one transmit element is connected to the phase shifter and VGA at a given point in time, such that the switch is a single pole M-throw (SPMT) analog switch, where M is the size of the transmit element array. The controller controls the at least two RF chains by controlling the at least two phase shifters, the at least two VGAs, and the at least two switches such that, at a given point in time, at least two transmit elements in the at least two RF chains receive samples of the input signal having phases and amplitudes determined based on the AODs of the array and the positions of the at least two transmit elements in the array of transmit elements of the at least two RF chains.

The presently disclosed embodiments will be further explained with reference to the drawings. The drawings shown are not necessarily to scale, emphasis instead generally being placed upon illustrating the principles of the presently disclosed embodiments.

Drawings

[ FIG. 1A ]

Fig. 1A illustrates a block diagram of some methods for embodiments of a wireless communication system using beamformed transmissions, according to one embodiment of the present disclosure.

[ FIG. 1B ]

Fig. 1B illustrates a schematic diagram of a wireless communication system including some components, according to some embodiments of the present disclosure.

[ FIG. 1C ]

Fig. 1C illustrates a schematic diagram of another wireless communication system including multiple components, according to some embodiments of the present disclosure.

[ FIG. 1D ]

Fig. 1D illustrates one analog waveform sampled by two discrete sample sequences with time offsets, according to some embodiments of the present disclosure.

[ FIG. 2]

Fig. 2 is a diagram illustrating a transmitter control sequence that causes only one RF channel of M channels to be activated at a particular time according to an embodiment of the present disclosure.

[ FIG. 3]

Fig. 3 is a schematic diagram illustrating some control signals for T1 that cause a clock signal output to be used as an address input to a memory similar to a look-up table (LUT), according to an embodiment of the present disclosure.

[ FIG. 4]

Fig. 4 shows a schematic diagram of another wireless communication system including multiple components, in accordance with an embodiment of the present disclosure.

[ FIG. 5A ]

FIG. 5A is a graph illustrating a bandwidth of B Hz and a center frequency of f according to an embodiment of the present disclosure_cSchematic diagram of the RF signal x (t) of (1).

[ FIG. 5B ]

Fig. 5B is a diagram illustrating the frequency domain spectrum x (f) of x (t) of fig. 5A, according to an embodiment of the present disclosure.

[ FIG. 6A ]

Fig. 6A is a schematic diagram illustrating a waveform of a periodic signal c (t) as a square wave, which may be used as a time control signal, according to an embodiment of the present disclosure.

[ FIG. 6B ]

Fig. 6B is a schematic diagram illustrating the spectrum c (f) in the frequency domain of c (t) of fig. 6A according to an embodiment of the present disclosure.

[ FIG. 7A ]

FIG. 7A is a block diagram illustrating having only a limited duration T according to an embodiment of the present disclosure_wThe signal y (t) of x (t) being transmitted is x (t) c (t).

[ FIG. 7B ]

Fig. 7B is a diagram illustrating a spectrum y (f) in the frequency domain of y (t) according to an embodiment of the present disclosure.

[ FIG. 8A ]

Fig. 8A is a schematic diagram illustrating a fully recovered RF signal according to an embodiment of the present disclosure.

[ FIG. 8B ]

Fig. 8B is a diagram illustrating a spectrum of a restored RF signal according to an embodiment of the present disclosure.

[ FIG. 9]

Fig. 9 is a schematic diagram illustrating a time control sequence for different RF chains according to an embodiment of the present disclosure.

[ FIG. 10]

FIG. 10 is a block diagram illustrating the method of FIG. 1A that can be implemented using an alternative computer or processor in accordance with embodiments of the present disclosure.

Detailed Description

While the above-identified drawing figures set forth the presently disclosed embodiments, other embodiments are also contemplated, as noted in the discussion. The present disclosure presents exemplary embodiments by way of representation and not limitation. Numerous other modifications and embodiments can be devised by those skilled in the art which fall within the scope and spirit of the principles of the presently disclosed embodiments.

SUMMARY

Embodiments of the present disclosure include devices, methods, and systems related to the field of multiple-input multiple-output (MIMO) wireless communication systems, and more particularly to massive MIMO wireless communication systems using beamformed transmissions from antenna arrays. Some embodiments provide for reducing the implementation cost of a MIMO wireless communication system by sharing analog hardware resources for beamforming transmissions from different antennas of an antenna array. Additionally, some embodiments include a method of reusing phase shifters and/or Variable Gain Amplifiers (VGAs) for transmission with multiple antennas within a MIMO wireless communication system, i.e., a reduction via a hardware shared hardware architecture.

In particular, embodiments of the present disclosure include sharing hardware resources of an analog beamforming transceiver structure that may have a transmitter antenna array and a receiver antenna array. For a transmitter array, some embodiments may have one channel modulated or unmodulated video (RF) signal divided into N channel signals by time division multiplexing. Each channel may include a phase shifter, a variable gain amplifier, other necessary signal conditioning components, and a single pole, M-throw (SPMT) analog switch. The SPMT analog switch may also connect M signal paths with a bandpass filter and an antenna for each signal path. On a receiver array, some embodiments may have L × K antennas grouped into L groups, where each group includes K antennas. The K antennas may be connected to a K-throw single pole (KTSP) analog switch. The common port of the KTSP analog switch may be connected to a band pass filter, a low noise amplifier, a phase shifter, a variable gain amplifier, a down conversion circuit, a low pass filter, an analog to digital converter, and a digital processor.

Accordingly, embodiments of the present disclosure are based on a number of insights that have been experimentally identified and observations made while undergoing an experimental process. For example, some embodiments are based on the following observations: since different antennas need to transmit signals with different phase shifts and amplitudes simultaneously, each antenna needs to be connected to a phase shifter and a VGA dedicated to that antenna. However, it is known from experiments that on the one hand, when the number of antennas increases to thousands, for example in massive MIMO-like systems, the cost of having thousands of phase shifters and VGAs may become impractical.

For example, the experiment starts with an analog beamformer that controls the phase and relative amplitude of the signal at each transmission in order to create constructive and destructive interference patterns at the wavefront. Thus, in a phased array, power from a transmitter is fed to an antenna through a device called a phase shifter, which is controlled by a computer system, which can change phase to steer the beam of radio waves in different directions. Similarly, the VGA controls the amplitude of the signals transmitted from the different antennas to focus the formed beams. However, since different antennas need to transmit signals with different phase shifts and amplitudes at the same time, each antenna needs to be connected to a phase shifter and a VGA dedicated to the antenna. Thus, it is appreciated that when the number of antennas increases to thousands, such as in massive MIMO-like systems, the cost of having thousands of phase shifters and VGAs may become impractical.

It is further appreciated from experimentation that at least one proposed solution uses a smaller number of antennas than can be used to communicate information, but such a solution does not provide the same amount of beamforming gain as in a MIMO system or similar system having one RF chain per antenna. Potentially, the cause of the problem may be a need to break the dependence on concurrent transmissions from multiple antennas, which would seem unrealistic for analog beamforming of continuous analog signals if time were considered a continuous matter. However, it has been found that in order to reuse the same phase shifter and/or VGA for multi-antenna transmission, the reliance on concurrent transmissions from multiple antennas needs to be broken. Some embodiments during the experiment seek to decouple the timing of analog beamforming, among other things, using principles borrowed from digital signal processing and observations during the experiment.

In particular, in the field of digital signal processing, the sampling theorem is a bridge between continuous-time signals (i.e., analog signals) and discrete-time signals (e.g., digital signals). The sampling theorem establishes sufficient conditions for the sampling rate to allow a discrete sample sequence to capture all information from a continuous-time signal of limited bandwidth.

Some embodiments are based on the following recognition, among others: the samples in the sequence of discrete samples are separated by a time period determined by the sampling frequency. If the discrete sample sequences are shifted within the limits of the time period, the two discrete sample sequences (the original sequence and the shifted sequence) represent the analog signal as a whole, and the same analog signal can be reconstructed from one or both of the two discrete sample sequences. However, since the two discrete sample sequences are shifted in time, only one sample can be processed at each point in time, which allows the same phase shifter and/or VGA to process samples of different sample sequences.

Furthermore, some embodiments present a problem solution based on the following recognition: the switch may be used to direct the input signal to different antennas and act as a sampler for the input signal. To this end, if a phase shifter and/or VGA is arranged on the path of the input signal before the switch, the phase shifter and/or VGA can modify the input signal with the value required by the currently connected (i.e. active) antenna. In this way, when the switch connects the pass of the incoming signal to a different antenna, the phase shifter and/or VGA can quickly change their control to the value of the different antenna. After sampling, the sequence of discrete samples presented to each antenna may be converted to an analog signal by a respective band pass filter.

Further, one embodiment discloses at least one transmitter comprising at least one Radio Frequency (RF) chain. The RF chain may include an array of transmit elements such that each transmit element includes a bandpass filter and an antenna connected in series to transmit analog signals using beamforming with an angle of emission (AOD) defined by phase shifts of analog signals received by different transmit elements. The RF chain also includes a phase shifter to shift the phase of the input signal and a variable gain amplifier to change the amplitude of the input signal. The phase shifter and the variable gain amplifier are connected in series.

The RF chain may further include a switch connecting the phase shifter and the variable gain amplifier to each transmit element in the array of transmit elements. The switch may be a single pole, M-throw (SPMT) analog switch, where M is the size of the array of transmit elements, such that at most one transmit element is connected to the phase shifter and variable gain amplifier at a given point in time.

The operation of the RF chain may be controlled by a controller to control one or a combination of a phase shifter, a variable gain amplifier, or a switch. Wherein at a given point in time, the transmit element receives a sample of the input signal having a phase and amplitude determined based on the AOD and the position of the transmit element within the array of transmit elements. For example, in one embodiment, in response to receiving the AOD, the controller may determine a phase shift value and an amplitude value for each transmit element in the array of transmit elements to form a sequence of phase shift values and a sequence of amplitude values. These two sequences correspond to a sequence of states of switches connecting the phase shifter to different transmit elements. For example, the sequence of states of the switch may be predetermined and stored in a memory operatively connected to the controller. In this way, the sequence of phase shift values and the sequence of amplitude values are synchronized with the operation (i.e., the state) of the switcher, so that the controller controls the phase shifter at each control step to change the phase of the input signal according to the sequence of phase shift values, and controls the variable gain amplifier at each control step to change the amplitude of the input signal according to the sequence of amplitude values. The controlling step has the same frequency as the frequency of the switch.

Further, to transmit a signal with the AOD, the controller determines a sequence of M phase shift values for a sequence of M antennas in the antenna array. If the AOD remains constant during the transmission period, the controller replicates the M phase shift values to form a sequence of phase shift values for the transmission period. In this way, the sequence of phase shift values includes phase shift values for all antennas in the antenna array. In some embodiments, the phase values for the different antennas alternate according to a switching order (i.e., according to a sequence of states of the switches). In one embodiment, the sequence of amplitude values may be determined in a similar manner as the sequence of phase shift values is determined.

In one embodiment, each RF chain may include a power amplifier connected in series to a phase shifter and a variable gain amplifier on a path of the input signal before the switch. Such a configuration allows reuse of the power amplifier for transmission from multiple antennas. In an alternative embodiment, each transmit element may comprise a power amplifier connected in series to a band pass filter and an antenna (i.e. on the path of the input signal after the switch). At least one aspect of this embodiment is to reduce the requirements on the operating frequency of the power amplifier.

Each RF chain may include an array of M transmit elements. The size M of the array of transmit elements may be determined by the frequency of the switch. For example, the size M of the array of transmit elements is less than the frequency of the switch divided by the bandwidth of the input signal, as determined by sampling theorem.

Fig. 1A illustrates a block diagram of some methods for embodiments of a wireless communication system using beamformed transmissions, according to one embodiment of the present disclosure. The method 100 is for transmitting analog signals by an antenna array using beamforming with an angle of transmission (AOD) defined by phase shifts of the analog signals transmitted by different antennas. The method 100 may be implemented with a controller 103 that may include a memory. The wireless communication system may be a multiple-input multiple-output (MIMO) wireless communication system, including a massive MIMO wireless communication system that uses beamformed transmissions from antenna arrays. Wherein the MIMO wireless communication system may share analog hardware resources for beamforming transmissions from different antennas of the antenna array.

Step 115 of fig. 1A of method 100 may include determining a phase shift value and an amplitude value for each antenna in an antenna array based on the AOD and the position of each antenna in the array.

Step 120 of fig. 1A of method 100 may include ordering the phase shift values according to an activation sequence of antennas in the array to form a phase shift sequence.

Step 125 of fig. 1A of method 100 may include sorting the amplitude values according to an activation sequence of antennas in the array to form an amplitude sequence.

Step 130 of fig. 1A of method 100 may include modifying the phase and amplitude of the analog signal according to the values in the phase shift sequence and the amplitude sequence.

Step 135 of fig. 1A of method 100 may include sampling the modified analog signal and directing the samples to different antennas in an order determined by the activation sequence of the antennas.

Step 140 of fig. 1A of method 100 may include bandpass-passing each sample directed to each antenna to produce a modified copy of the analog signal for each antenna.

Step 145 of fig. 1A of method 100 may include transmitting a modified copy of the analog signal from the respective antenna.

Fig. 1B illustrates a schematic diagram of a wireless communication system including some components, according to some embodiments of the present disclosure. Fig. 1C illustrates a schematic diagram of the wireless communication system of fig. 1B including multiple clusters in a cluster-based transmitter architecture, in accordance with some embodiments of the present disclosure.

Fig. 1B and 1C illustrate a cluster-based transmitter architecture 102 according to the present disclosure. Fig. 1B illustrates a single cluster of the cluster-based transmitter architecture 102, while fig. 1C illustrates multiple clusters of the cluster-based transmitter architecture 102.

For example, fig. 1B shows a cluster 101A, which cluster 101A is comprised of a phase shifter 105A, a Variable Gain Amplifier (VGA)107A, a Power Amplifier (PA)109A, a time scheduling signal (T1)113A, and a Single Pole M Throw (SPMT) analog switch 114A. Using a set of antenna elements in a single cluster 101A, P1 and G1 represent a set of M phase shifts (P1)111A and VGA gains (G1) 112A. Where they are stored in a separate memory 104A in the controller 103A.

FIG. 1C illustrates a plurality of clusters 101A, 101B, 101N of a cluster-based transmitter architecture 102. The architecture divides the N × M antenna elements into N clusters 101A, 101B, 101N, such that each cluster consists of M antenna elements. For example, using a set of antenna elements in each cluster 101A, 101B, 101N, P1 and G1 represent a set of M phase shifts (P1)111A, 111B, 111N and VGA gains (G1)112A, 112B, 112N. They may be stored in separate memories 104A, 104B, 104N in the controllers 103A, 103B, 103N.

Fig. 1C shows that each cluster 101A, 101B, 101N may have the same structure and have different memories 104A, 104B, 104N for phase shifts P1111A, 111B, 111N and VGA gains G2112A, 112B, 112N. By means of the SPMTs 114A, 114B, 114N, the input RF signals 11, 12, 13 from the power splitter 3 can feed the M antennas after applying some RF operations and passing through the band pass filters 116A, 117A, 118A, 116B, 117B, 118B, 116N, 117N, 118N.

Fig. 1D illustrates one analog waveform sampled by two discrete sample sequences with time offsets, according to some embodiments of the present disclosure.

To better understand the operation of fig. 1D and 1C, it is important to review some of the knowledge that is known experimentally. It is recognized that there is the possibility to decouple the time dependence of the analog beamforming using principles borrowed from digital signal processing. For example, the sampling theorem of the present disclosure establishes sufficient conditions for the sampling rate to allow a discrete sampling sequence to capture all of the information from a continuous signal. If the discrete sample sequences are shifted within the limit of the time period of the sampling rate, the two discrete sample sequences (the original sequence and the shifted sequence) represent the analog signal as a whole, and the same analog signal can be reconstructed from one or both of the two discrete sample sequences. Another insight found is that because the two discrete sample sequences are shifted in time, only one sample is processed at each point in time, which allows the same phase shifter and/or VGA to process samples of different sample sequences. Thus, at least one solution including an embodiment with switches directing the input signal to different antennas is used as a sampler of the input signal. To this end, if a phase shifter and/or VGA is arranged on the path of the input signal before the switch, the phase shifter and/or VGA can modify the input signal with the value required by the currently connected (i.e. active) antenna. Wherein after sampling, the sequence of discrete samples presented to each antenna can be converted to an analog signal by a respective band pass filter.

Fig. 2 is a diagram illustrating a transmitter control sequence that causes only one RF channel of M channels to be activated at a particular time according to an embodiment of the present disclosure. The set of timing signals 210 represents a set of time schedules for all RF channels of cluster 1, 101A. For example, 211 is the time schedule for RF channel 1. It specifies the duration of time when a particular phase and gain are activated for a particular RF channel for beamforming pattern calculation. For example, for duration 213, only phase 1, 233 and gain 1, 235 are used to calculate RF channel 1

Wherein, c₁Is a beamforming constant that depends on the channel index, the wavelength, and the distance between the two antenna elements. In the next duration 223, only phase 2, 243 and gain 2, 245 are activated for calculation of RF channel 2Wherein c is₂Is a beamforming constant that depends on the index of the RF channel, the wavelength, and the distance between the antenna elements. After all of these calculations are completed, RF channel 1 is again activated for duration 214And (5) operating. With this time division multiplexing, only one phase shifter and VGA are needed in each cluster. However, in order to generate the same beamforming as the related art method by time division demultiplexing combination, the interval time 212 should be determined according to a beamforming bandwidth.

Fig. 3 is a schematic diagram illustrating some control signals for T1 that cause a clock signal output to be used as an address input to a memory similar to a look-up table (LUT), according to an embodiment of the present disclosure.

For example, more description of FIG. 2 is provided by using FIG. 3. For the clock signal 301 and the reset signal 302, a counter 304, and a counter output 303. These counter outputs 303 will be used as address inputs to a memory as a kind of look-up table (LUT)111, 112. The two LUTs 111, 112 hold sets of phase outputs 310 and gain outputs 360. The LUT may generate the required phases 313, 323, 333, …, and gains 363, 373, 383, …, etc. by synchronizing the clock and reset signals. Similar timing schedules are used for T2113B and TN 113N.

FIG. 4 illustrates a cluster-based receiver architecture according to embodiments of the present disclosure; and figure 4 shows a cluster-based receiver architecture 400. In fig. 4, cluster 1, 410, cluster 2, 420 and cluster L, 430 are all substantially the same structure for this particular application. The receiver cluster 1, 410 may consist of K receive antenna elements. Wherein only one of the K receive antennas will be selected by a K-throw single-pole (KTSP) analog switch 411A. Since there are L clusters in the receiver, L antennas are simultaneously selected for receive beamforming. For analog switch output 413A, this particular implementation applies bandpass filter 414A, LNA 415A, phase shifter 418A, and VGA 419A. As in the transmitter 102, we have two LUTs 416A and 417A, with LUTs 416A and 417A holding the phase and gain that is used exclusively by the selected receive antenna. The selection of a particular phase and gain is specified by the control signals T1, 412A. Similarly, other clusters are also provided by T2, 412B and TL, 412L.

The receiver cluster 2, 420 and the cluster L, 430 may consist of K receive antenna elements. Wherein only one of the K receive antennas will be selected by K-throw single pole (KTSP) analog switches 411B, 411L. Since there are L clusters in the receiver, L antennas are simultaneously selected for receive beamforming. For the analog switch outputs 413B, 413L, this particular embodiment applies bandpass filters 414B, 414L, LNA 415B, 415L, phase shifters 418B, 418L, and VGAs 419B, 419L. As in the transmitter 102, we have two LUTs 416B, 416L and 417B, 417L that hold the phase and gain that are used exclusively by the selected receive antenna. The selection of a particular phase and gain is specified by the control signals T2, 412B, TL, 412L.

For this particular embodiment, the time schedule may be the same as 200 in fig. 2 and 300 in fig. 3. The outputs from the L clusters 440, 450, 460 are combined by a power combiner 470. The beamformed signals in the baseband may be used in a digital processor 474 after applying down conversion of 471, low pass filtering 472, analog to digital conversion 473. In each cluster 440, 450, 460, the controller 403A, 403B, 403L provides a timing sequence. The cycle is stored in a memory 404A, 404B, 404L installed inside the controller 403A, 403B, 403L.

Principle of

Fig. 5A-9 relate to some principles understood during experimentation and applied to some embodiments according to the present disclosure. For example, fig. 5A is a diagram illustrating a bandwidth of B Hz and a center frequency of f according to an embodiment of the present disclosure_cSchematic diagram of the RF signal x (t) of (1). Where x (t) represents the modulated RF signal or unmodulated RF signal 10 of one channel in fig. 1C.

Fig. 5B is a graph illustrating the frequency domain spectrum x (f) of x (t) of fig. 5 according to an embodiment of the present disclosure.

Fig. 6A is a schematic diagram illustrating a waveform of a periodic signal c (t) as a square wave, which may be used as a time control signal, according to an embodiment of the present disclosure. Thus, C (t) is the control sequence for SMPT 114A, 114B, 114N in FIG. 1C.

Fig. 6B is a schematic diagram illustrating the spectrum c (f) in the frequency domain of c (t) of fig. 6A according to an embodiment of the present disclosure. E.g. T_cIs the period of the square wave, and T_wIs the pulse width of a square wave. In the frequency domain, the frequency spectrum of c (T) is 1/T_cIs a series of delta signals at intervals.

Still referring to fig. 6A, where c (t) can be mathematically expressed as follows:

wherein

Where, as shown in fig. 6B, the fourier transform of c (t) is given by:

another time-delayed square wave delayed by p τ may have:

wherein p is an integer value, andwhen applying A_k,pτWhen we haveIt yields the following fourier transform:

this means that the time delay causes an additional phase rotation of the impulse train. The different phase rotations depend on k.

FIG. 7A is a block diagram illustrating having only a limited duration T according to an embodiment of the present disclosure_wThe signal y (t) of x (t) being transmitted is x (t) c (t).

For exampleThe multiplication in the time domain is equal to the convolution of the frequencies. y (t) Fourier transform Y (f) of

It is given.

Fig. 7B is a diagram illustrating a spectrum y (f) of y (t) in the frequency domain according to an embodiment of the present disclosure. Thus, y (t) is the output of SPMTs 114A, 114B, 114N in FIG. 1C.

Fig. 8A is a schematic diagram illustrating a fully recovered RF signal after the band pass filters 116A, 117A, 118A in fig. 1C, according to an embodiment of the present disclosure.

Fig. 8B is a diagram illustrating a spectrum of a restored RF signal according to an embodiment of the present disclosure.

Referring back to fig. 8B, to fully recover x (t), a bandpass filter as shown in fig. 8B may be applied, corresponding to k ═ 0So that Y is_BPF(f)＝A₀x(f)。

Still referring to FIG. 8B, similarly for c_pτ(t) we have

The output of the band-pass filter is Y_pτ,BFP(f)＝A₀X (f) is given. Thus, the time-delayed square wave can generate the same BPF output as the original square wave.

Fig. 9 is a schematic diagram illustrating a time control sequence for different RF chains according to an embodiment of the present disclosure. Among these, it should be further noted that the bandwidth B and the period Tc of the square wave should satisfy the following criteria for a complete recovery:

1/T_c> B type (5)

In addition, T with specified switching speed is used_wWe define the number of channels M according to:

T_c＝MT_wformula (6)

From the above equation (5), we can replace T by the relationship given by equation (6)_cCome to countThe maximum allowed bandwidth is calculated.

Thus, the maximum allowable bandwidth is determined by

It is given. In other words, when the switching speed and the target beamforming bandwidth are specified, we can passTo find the maximum number of channels available, where int (·) denotes an integer value.

Feature(s)

Aspects of the present disclosure may include: in response to receiving the AOD, the controller may determine a phase shift value and an amplitude value for each transmit element in the array of transmit elements to form a sequence of phase shift values and a sequence of amplitude values corresponding to a sequence of states of a switch connecting the phase shifter to different transmit elements. Wherein the controller may control the phase shifter at each point in time to change the phase of the input signal according to the sequence of phase shift values, and control the VGA at each point in time to change the amplitude of the input signal according to the sequence of amplitude values.

Another aspect of the present disclosure may include that the sequence of states of the switch may be predetermined and stored in a memory operatively connected to the controller. Further, an aspect may include a power amplifier connected in series to the phase shifter and the VGA. For each transmit element, an aspect can include a power amplifier connected in series to a bandpass filter and an antenna.

Another aspect of the present disclosure may include a plurality of RF chains; and a power divider that directs the input signal to each of the plurality of RF chains. Further, the size M of the array of transmit elements may be determined by the frequency of the switch. Another aspect can include the size M of the array of transmit elements being less than the frequency of the switch divided by the bandwidth of the input signal.

Another aspect of the disclosure may include a plurality of receive RF chains, a power combiner to combine the outputs of each receive RF chain, a down-converter to down-convert the combined signals, an analog-to-digital converter to convert the down-converted combined signals to the digital domain to produce digital signals, and a processor to demodulate the digital signals. Still another aspect may include the transmitter being part of a fifth generation (5G) communication system.

FIG. 10 is a block diagram illustrating the method of FIG. 1A that may be implemented using an alternative controller in accordance with embodiments of the present disclosure. The controller 1011 includes a processor 1040, a computer readable memory 1012, storage 1058, and a user interface 1049 with a display 1052 and a keyboard 1051 connected by a bus 1056. For example, a user interface 1049 in communication with the processor 1040 and the computer-readable memory 1012 obtains data and stores data in the computer-readable memory 1012 when user input is received from a surface of the user interface 1057, a keyboard surface.

It is contemplated that memory 1012 may store processor-executable instructions, historical data, and any data that may be utilized by the methods and systems of the present disclosure. Processor 1040 may be a single-core processor, a multi-core processor, a computing cluster, or any number of other configurations. The processor 1040 may be connected to one or more input and output devices through a bus 1056. Memory 1012 may include Random Access Memory (RAM), Read Only Memory (ROM), flash memory, or any other suitable memory system.

Still referring to FIG. 10, the storage device 1058 may be adapted to store supplemental data and/or software modules for use by the processor. For example, the storage device 858 may store historical data and other related data mentioned above in connection with the present disclosure. Additionally or alternatively, the storage device 858 may store historical data similar to the data mentioned above as pertaining to the present disclosure. The storage device 1058 may include a hard disk drive, an optical disk drive, a thumb drive, an array of drives, or any combination thereof.

The system may optionally be linked through bus 1056 to a display interface (not shown) suitable for connecting the system to a display device (not shown), which may include a computer monitor, camera, television, projector, mobile device, or the like.

The controller 1011 may include a power supply 1054, and the power supply 1054 may optionally be located external to the controller 1011, depending on the application. Linked through bus 1056 may be a user input interface 1057 suitable for connecting to a display device 1048, where display device 1048 may include a computer monitor, camera, television, projector, mobile device, or the like. The printer interface 1059 may also be connected via a bus 1056 and adapted to connect to a printing device 1032, where the printing device 1032 may include a liquid inkjet printer, a solid ink printer, a large commercial printer, a thermal printer, a UV printer, or a dye sublimation printer, among others. A Network Interface Controller (NIC)1034 is adapted to be connected to network 1036 via bus 1056, where data or other data, etc., may be presented on a third party display device, a third party imaging device, and/or a third party printing device external to controller 1011.

Still referring to fig. 10, in addition to that, data or other data or the like can be communicated over communication channels of the network 1036 and/or stored within the storage system 1058 for storage and/or further processing. Further, data or other data may be received wirelessly or hardwired from receiver 1046 (or external receiver 1038), or transmitted wirelessly or hardwired via transmitter 1047 (or external transmitter 1039), both receiver 1046 and transmitter 1047 connected by bus 1056. Further, the GPS 1001 may be connected to the controller 1011 via the bus 1056. The controller 1011 may be connected to an external sensing device 1044 and an external input/output device 1041 via an input interface 1008. The controller 1011 may be connected to other external computers 1042. Further, the controller 10011 can be connected to external sensors 1004 that communicate with the machine 1002 and the memory device 1006. An output interface 1009 may output processed data from the processor 1040.

This description provides exemplary embodiments only, and is not intended to limit the scope, applicability, or configuration of the disclosure. Rather, the following description of the exemplary embodiments will provide those skilled in the art with a full description of the manner in which one or more of the exemplary embodiments may be implemented. It is contemplated that various changes may be made in the function and arrangement of elements without departing from the spirit and scope of the subject matter as set forth in the appended claims. In the following description specific details are given to provide a thorough understanding of the embodiments. However, it will be understood by those of ordinary skill in the art that the embodiments may be practiced without these specific details. For example, systems, processes, and other elements of the disclosed subject matter may be shown in block diagram form as components in order not to obscure the implementations in unnecessary detail. In other instances, well-known processes, structures and techniques may be shown without unnecessary detail in order to avoid obscuring the embodiments. Moreover, like reference numbers and designations in the various drawings indicate like elements.

Furthermore, various embodiments may be described as a process which is depicted as a flowchart, a flow diagram, a data flow diagram, a structure diagram, or a block diagram. Although a flowchart may describe the operations as a sequential process, many of the operations can be performed in parallel or concurrently. In addition, the order of the operations may be rearranged. A process may terminate when its operations are completed, but may have other steps not discussed or included in the figure. Moreover, not all operations in any particular described process may occur in all embodiments. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, etc. When the procedure corresponds to a function, the termination of the function may correspond to a return of the function to the calling function or the main function.

Furthermore, embodiments of the disclosed subject matter may be implemented, at least in part, manually or automatically. Manual or automated implementations may be performed or at least assisted by using machines, hardware, software, firmware, middleware, microcode, hardware description languages, or any combination thereof. When implemented in software, firmware, middleware or microcode, the program code or code segments to perform the necessary tasks may be stored in a machine-readable medium. The processor may perform the necessary tasks.

The above-described embodiments of the present disclosure may be implemented in any of a variety of ways. For example, embodiments may be implemented using hardware, software, or a combination thereof. Use of ordinal terms such as "first," "second," and the like in the claims to modify a claim element does not by itself connote any priority, precedence, or order of one claim element over another or the temporal order in which acts of a method are performed, but are used merely as labels to distinguish one claim element having a certain name from another element having a same name (but for use of the ordinal term) to distinguish the claim elements.

Additionally, embodiments of the present disclosure may be embodied as a method, examples of which have been provided. The actions performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than illustrated, which may include performing some acts concurrently, even though shown as sequential acts in exemplary embodiments.