阅读说明：本技术 一种光模块以及数据传输方法 (Optical module and data transmission method ) 是由 王安忆 李刚 王麟 于 2020-04-22 设计创作，主要内容包括：本申请提供的光模块以及数据传输方法,包括：电路板,一端设置有金手指；MCU,设置在电路板上,通过I2C接口连接金手指以使MCU与上位机I2C通信；MAC芯片,设置在电路板上,通过串口连接MCU,通过MCU连接金手指；其中,MCU被配置为：通过I2C接口接收上位机需要发送至MAC芯片的目标数据,将目标数据存储至第一缓存区；将存储至第一缓存区的目标数据通过串口发送至MAC芯片；通过串口接收MAC芯片的返回值数据,将返回值数据存储至第二缓存区；接收上位机的读取指令,将存储至第二缓存区的返回值数据通过I2C接口发送至上位机。实现上位机通过I2C通信调试MAC芯片,进而便于实现上位机对MAC芯片的调试。(The application provides an optical module and a data transmission method, which comprise the following steps: a circuit board, one end of which is provided with a golden finger; the MCU is arranged on the circuit board and is connected with the golden finger through an I2C interface so as to enable the MCU to communicate with an upper computer I2C; the MAC chip is arranged on the circuit board, is connected with the MCU through a serial port and is connected with the golden finger through the MCU; wherein the MCU is configured to: receiving target data which are required to be sent to an MAC chip by an upper computer through an I2C interface, and storing the target data in a first cache region; sending the target data stored in the first cache region to the MAC chip through a serial port; receiving return value data of the MAC chip through a serial port, and storing the return value data to a second cache region; and receiving a reading instruction of the upper computer, and sending the return value data stored in the second cache region to the upper computer through an I2C interface. The upper computer is enabled to debug the MAC chip through I2C communication, and therefore debugging of the MAC chip by the upper computer is facilitated.)

1. A light module, comprising:

the circuit board is provided with a golden finger at one end;

the MCU is arranged on the circuit board, comprises an I2C interface and an MCU serial port and is connected with the golden finger through an I2C interface so as to enable the MCU to be communicated with an upper computer I2C;

the MAC chip is arranged on the circuit board and comprises an MAC chip serial port, and the MAC chip serial port is connected with the MCU serial port;

wherein the MCU is configured to:

receiving target data which are required to be sent to the MAC chip by an upper computer through an I2C interface, and storing the target data into a first cache region;

sending the target data stored in the first cache region to the MAC chip through an MCU serial port;

receiving return value data of the MAC chip through an MCU serial port, and storing the return value data to a second cache region;

and receiving a reading instruction of the upper computer, and enabling the upper computer to read the return value data of the second cache region through an I2C interface.

2. The optical module of claim 1, wherein after storing the target data in a first buffer, the MCU is further configured to: if the target data is stored in a first cache region, setting a flag bit to be started to be sent;

and sending the target data stored in the first cache region to the MAC chip through an MCU serial port, wherein the method comprises the following steps:

and if the flag bit for starting sending is detected to be set, sending the target data stored in the first cache region to the MAC chip through the MCU serial port.

3. The optical module of claim 1, wherein storing the target data to a first buffer comprises:

monitoring a data end character in the process of storing the target data in a first cache region;

and if the data end character is detected, ending the storage of the target data in the first cache region.

4. The optical module of claim 1, wherein storing the target data to a first buffer comprises:

receiving a debugging password input by an upper computer through an I2C interface, and verifying the debugging password, wherein the debugging password is a password input to an MCU password area when the upper computer sends the target data;

and if the debugging password is correct, storing the target data to a first cache region.

5. The optical module of claim 1, wherein receiving return value data of the MAC chip through an MCU serial port and storing the return value data to a second buffer area comprises:

monitoring a waiting time for receiving return value data;

and if the waiting time for receiving the return value data is less than or equal to the threshold waiting time, receiving the return value data of the MAC chip through the MCU serial port, and storing the return value data to a second cache region.

6. The optical module of claim 1, wherein receiving return value data of the MAC chip through an MCU serial port and storing the return value data to a second buffer area comprises:

receiving the return value data of the MAC chip through an MCU serial port, and monitoring the length of the return value data received through the MCU serial port in the process of storing the return value data in a second cache region;

and if the length of the return value data received by the MCU serial port exceeds the cache length of the second cache region, ending the reception of the return value data.

7. The light module of claim 2, wherein the MCU is further configured to:

if the target data is completely sent, resetting the starting sending zone bit;

and if the flag bit reset starting to be sent is monitored, deleting the target data stored in the first cache region.

8. The optical module of claim 3, wherein before storing the target data in the first buffer, further comprising:

monitoring the length of the target data;

and if the length of the target data exceeds the buffer length of the second buffer area, ending the receiving of the target data through the I2C interface.

9. The optical module of claim 1, wherein the return value data of the MAC chip is received through an MCU serial port and stored in a second buffer, further comprising:

acquiring threshold value accumulation time for receiving the return value data of the MAC chip;

and if the accumulated time for receiving the return value data of the MAC chip is greater than the threshold accumulated time, finishing storing the return value data received by the MCU serial port into a second cache region.

10. The optical module of claim 1, wherein the first buffer area and the second buffer area are disposed within the MCU.

Technical Field

The present application relates to the field of optical communications technologies, and in particular, to an optical module and a data transmission method.

Background

The optical communication technology can be applied to novel services and application modes such as cloud computing, mobile internet, video and the like. In optical communication, an optical module is a tool for realizing the interconversion of optical signals and is one of the key devices in optical communication equipment. When the optical module is used, the optical module is connected with an upper computer such as an optical network terminal through a golden finger, and then a chip on the optical module is communicated with the upper computer through the golden finger. For example, the MCU on the optical module communicates with the upper computer I2C through the I2C pin of the golden finger.

Among the optical modules, there is a PON STICK optical module, which includes a Media Access Control (MAC) chip, where an upper computer needs to set and read a physical address of the MAC chip through communication with the MAC chip, and a main operating state and a debugging mode of the MAC chip are implemented through a serial port. However, the gold finger interface of the PON STICK optical module needs to refer to protocols such as SFP-MSA, the number of pins of the gold finger is limited, and redundant pins are not used for realizing serial port communication between the MAC chip and an upper computer, so that debugging of the MAC chip by the PON STICK optical module is a difficult point.

Disclosure of Invention

The embodiment of the application provides an optical module and a data transmission method, which are used for realizing communication debugging of an MAC chip through I2C by an upper computer.

In a first aspect, the present application provides an optical module, comprising:

the circuit board is provided with a golden finger at one end;

the MCU is arranged on the circuit board, comprises an I2C interface and an MCU serial port and is connected with the golden finger through an I2C interface so as to enable the MCU to be communicated with an upper computer I2C;

the MAC chip is arranged on the circuit board and comprises an MAC chip serial port, and the MAC chip serial port is connected with the MCU serial port;

wherein the MCU is configured to:

receiving target data which are required to be sent to the MAC chip by an upper computer through an I2C interface, and storing the target data into a first cache region;

sending the target data stored in the first cache region to the MAC chip through an MCU serial port;

receiving return value data of the MAC chip through an MCU serial port, and storing the return value data to a second cache region;

and receiving a reading instruction of the upper computer, and enabling the upper computer to read the return value data of the second cache region through an I2C interface.

In a second aspect, the present application provides a data transmission method, which is applied to an optical module, where the optical module includes an MCU and an MAC chip; the method comprises the following steps:

the MCU receives target data which are required to be sent to the MAC chip by an upper computer through an I2C interface, and the target data are stored in a first cache region;

the MCU sends the target data stored in the first cache region to the MAC chip through an MCU serial port;

the MCU receives the return value data of the MAC chip through a serial port and stores the return value data to a second cache region;

and the MCU receives a reading instruction of the upper computer, so that the upper computer reads the return value data of the second cache region through an I2C interface.

According to the optical module and the data transmission method, the I2C interface of the MCU in the optical module is connected with the golden finger, and the MAC chip is connected with the MCU through a serial port. Wherein: when the MCU is connected with the upper computer through the golden finger, the MCU establishes I2C communication with the upper computer; if the upper computer needs to send target data to the MAC chip, the MCU receives the target data which needs to be sent to the MAC chip by the upper computer through an I2C interface, and stores the target data in a first cache region; then sending the target data of the first cache region to the MAC chip through a serial port; the MAC chip generates return value data of the upper computer needing the return value, and the return value data is returned to the MCU through the serial port; the MCU receives the return value data through the serial port and stores the return value data to a second cache region; and the MCU receives a return value data reading instruction of the upper computer, and sends the return value data stored in the second cache region to the upper computer through an I2C interface. Like this, realize through MCU that the MAC chip changes serial port communication with the I2C of host computer, solved because the pin quantity of golden finger is limited and there is not unnecessary pin to be used for realizing the problem of the serial port communication of MAC chip and host computer, realize that the host computer passes through I2C and changes serial port communication debugging MAC chip, and then be convenient for realize the debugging of host computer to the MAC chip.

Drawings

In order to more clearly illustrate the technical solution of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious to those skilled in the art that other drawings can be obtained according to the drawings without any inventive exercise.

Fig. 1 is a schematic diagram of a connection relationship of an optical communication terminal;

fig. 2 is a schematic structural diagram of an optical network terminal;

fig. 3 is a schematic structural diagram of an optical module according to an embodiment of the present invention;

FIG. 4 is an exploded view of an optical module according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of a circuit board according to an embodiment of the present invention;

fig. 6 is a schematic diagram of MCU data transmission according to an embodiment of the present invention;

fig. 7 is a schematic basic flow chart of a data transmission method according to an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

One of the core links of optical fiber communication is the interconversion of optical and electrical signals. The optical fiber communication uses optical signals carrying information to transmit in information transmission equipment such as optical fibers/optical waveguides, and the information transmission with low cost and low loss can be realized by using the passive transmission characteristic of light in the optical fibers/optical waveguides; meanwhile, the information processing device such as a computer uses an electric signal, and in order to establish information connection between the information transmission device such as an optical fiber or an optical waveguide and the information processing device such as a computer, it is necessary to perform interconversion between the electric signal and the optical signal.

The optical module realizes the function of interconversion of optical signals and electrical signals in the technical field of optical fiber communication, and the interconversion of the optical signals and the electrical signals is the core function of the optical module. The optical module is electrically connected with an external upper computer through a golden finger on an internal circuit board of the optical module, and the main electrical connection comprises power supply, I2C signals, data signals, grounding and the like; the electrical connection mode realized by the gold finger has become the mainstream connection mode of the optical module industry, and on the basis of the mainstream connection mode, the definition of the pin on the gold finger forms various industry protocols/specifications.

Fig. 1 is a schematic diagram of connection relationship of an optical communication terminal. As shown in fig. 1, the connection of the optical communication terminal mainly includes the interconnection among the optical network terminal 100, the optical module 200, the optical fiber 101 and the network cable 103;

one end of the optical fiber 101 is connected with a far-end server, one end of the network cable 103 is connected with local information processing equipment, and the connection between the local information processing equipment and the far-end server is completed by the connection between the optical fiber 101 and the network cable 103; and the connection between the optical fiber 101 and the network cable 103 is made by the optical network terminal 100 having the optical module 200.

An optical port of the optical module 200 is externally accessed to the optical fiber 101, and establishes bidirectional optical signal connection with the optical fiber 101; an electrical port of the optical module 200 is externally connected to the optical network terminal 100, and establishes bidirectional electrical signal connection with the optical network terminal 100; the optical module realizes the interconversion of optical signals and electric signals, thereby realizing the establishment of information connection between the optical fiber and the optical network terminal; specifically, the optical signal from the optical fiber is converted into an electrical signal by the optical module and then input to the optical network terminal 100, and the electrical signal from the optical network terminal 100 is converted into an optical signal by the optical module and input to the optical fiber.

The optical network terminal is provided with an optical module interface 102, which is used for accessing an optical module 200 and establishing bidirectional electric signal connection with the optical module 200; the optical network terminal is provided with a network cable interface 104, which is used for accessing the network cable 103 and establishing bidirectional electric signal connection with the network cable 103; the optical module 200 is connected to the network cable 103 through the optical network terminal 100, specifically, the optical network terminal transmits a signal from the optical module to the network cable and transmits the signal from the network cable to the optical module, and the optical network terminal serves as an upper computer of the optical module to monitor the operation of the optical module.

At this point, a bidirectional signal transmission channel is established between the remote server and the local information processing device through the optical fiber, the optical module, the optical network terminal and the network cable.

Common information processing apparatuses include routers, switches, electronic computers, and the like; the optical network terminal is an upper computer of the optical module, provides data signals for the optical module, and receives the data signals from the optical module, and the common upper computer of the optical module also comprises an optical line terminal and the like.

Fig. 2 is a schematic diagram of an optical network terminal structure. As shown in fig. 2, the optical network terminal 100 has a circuit board 105, and a cage 106 is disposed on a surface of the circuit board 105; an electric connector is arranged in the cage 106 and used for connecting an electric port of an optical module such as a golden finger; the cage 106 is provided with a heat sink 107, and the heat sink 107 has a projection such as a fin that increases a heat radiation area.

The optical module 200 is inserted into the optical network terminal, specifically, the electrical port of the optical module is inserted into the electrical connector inside the cage 106, and the optical port of the optical module is connected to the optical fiber 101.

The cage 106 is positioned on the circuit board, and the electrical connector on the circuit board is wrapped in the cage, so that the electrical connector is arranged in the cage; the optical module is inserted into the cage, held by the cage, and the heat generated by the optical module is conducted to the cage 106 and then diffused by the heat sink 107 on the cage.

Fig. 3 is a schematic diagram of an optical module according to an embodiment of the present invention, and fig. 4 is a schematic diagram of an optical module according to an embodiment of the present invention. As shown in fig. 3 and 4, the optical module 200 provided by the embodiment of the present invention includes an upper housing 201, a lower housing 202, an unlocking member 203, a circuit board 300, a light emitting module 400, and a light receiving module 500;

the upper shell 201 is covered on the lower shell 202 to form a wrapping cavity with two openings; the outer contour of the wrapping cavity is generally a square body, and specifically, the lower shell comprises a main plate and two side plates which are positioned at two sides of the main plate and are perpendicular to the main plate; the upper shell comprises a cover plate, and the cover plate covers two side plates of the upper shell to form a wrapping cavity; the upper shell can also comprise two side walls which are positioned at two sides of the cover plate and are perpendicular to the cover plate, and the two side walls are combined with the two side plates to realize that the upper shell covers the lower shell.

The two openings may be two ends (204, 205) in the same direction, or two openings in different directions; one opening is an electric port 204, and a gold finger of the circuit board extends out of the electric port 204 and is inserted into an upper computer such as an optical network terminal; the other opening is an optical port 205 for external optical fiber access to connect the optical transmitting assembly 400 and the optical receiving assembly 500 inside the optical module; the optoelectronic devices such as the circuit board 300, the light emitting assembly 400 and the light receiving assembly 500 are positioned in the package cavity.

The assembly mode of combining the upper shell and the lower shell is adopted, so that the circuit board 300, the light emitting assembly 400, the light receiving assembly 500 and other devices can be conveniently installed in the shells, and the outermost packaging protection shell of the optical module is formed by the upper shell and the lower shell; the upper shell and the lower shell are made of metal materials generally, so that electromagnetic shielding and heat dissipation are facilitated; generally, the housing of the optical module is not made into an integrated component, so that when devices such as a circuit board and the like are assembled, the positioning component, the heat dissipation component and the electromagnetic shielding component cannot be installed, and the production automation is not facilitated.

The unlocking component 203 is located on the outer wall of the wrapping cavity/lower shell 202, and is used for realizing the fixed connection between the optical module and the upper computer or releasing the fixed connection between the optical module and the upper computer.

The unlocking component 203 is provided with a clamping component matched with the upper computer cage; the end of the unlocking component can be pulled to enable the unlocking component to move relatively on the surface of the outer wall; the optical module is inserted into a cage of the upper computer, and the optical module is fixed in the cage of the upper computer by a clamping component of the unlocking component; by pulling the unlocking component, the clamping component of the unlocking component moves along with the unlocking component, so that the connection relation between the clamping component and the upper computer is changed, the clamping relation between the optical module and the upper computer is released, and the optical module can be drawn out from the cage of the upper computer.

The circuit board 300 is located in a package cavity formed by the upper and the housing. The circuit board 300 is provided with circuit trace chips, capacitors, resistors and other electrical devices. The method comprises the following steps of selecting chips to be set according to the requirements of products, wherein common chips comprise a microprocessor MCU, a clock data recovery chip CDR, a laser driving chip, a transimpedance amplifier TIA chip, an amplitude limiting amplifier LA chip, a power management chip and the like. The circuit board 300 connects the electrical devices in the optical module together according to the circuit design through circuit wiring to realize the electrical functions of power supply, electrical signal transmission, grounding and the like.

The circuit board 300 is generally a rigid circuit board, which can also perform a bearing function due to its relatively rigid material, for example, the rigid circuit board can stably bear a chip; the rigid circuit board may also provide a smooth load bearing when the light emitting assembly 205 and the light receiving assembly 206 are located on the circuit board; the hard circuit board can also be inserted into an electric connector in the upper computer cage, and specifically, a metal pin/golden finger is formed on the surface of the tail end of one side of the hard circuit board and is used for being connected with the electric connector; these are not easily implemented with flexible circuit boards.

The transimpedance amplifier chip is closely associated with the light receiving chip, the short-distance wiring design can ensure good received signal quality, and in one packaging form of the optical module, the transimpedance amplifier chip and the light receiving chip are packaged together in an independent packaging body, such as the same coaxial tube shell TO or the same square cavity; the independent packaging body is independent of the circuit board 300, and the light receiving chip and the transimpedance amplifier chip are electrically connected with the circuit board 300 through the independent packaging body; in another package form of the optical module, the light receiving chip and the transimpedance amplifier chip may be disposed on the surface of the circuit board 300 without using a separate package. Of course, the light receiving chip may be packaged separately, and the transimpedance amplifier chip may be disposed on the circuit board 300, so that the received signal quality may also meet some relatively low requirements.

The chip on the circuit board 300 may be an all-in-one chip, for example, a laser driver chip and an MCU chip are integrated into one chip, or a laser driver chip, a limiting amplifier chip and an MCU chip are integrated into one chip, and the chip is an integrated circuit, but the functions of each circuit do not disappear due to the integration, and only the circuit form is integrated. Therefore, when the circuit board 300 is provided with three independent chips, namely, the MCU, the laser driving chip and the amplitude limiting amplifier chip, the scheme is equivalent to that when a single chip with three functions is provided on the circuit.

The circuit board 300 is a carrier of main components of the optical module, and components not arranged on the circuit board 300 are finally electrically connected with the circuit board 300, and the connector on the circuit board 300 realizes the electrical connection between the optical module and an upper computer thereof. Such as the light emitting assembly 400 and the light receiving assembly 500 of fig. 4. The light emitting assembly 400 and the light receiving assembly 500 may be collectively referred to as an optical sub-assembly. The optical transmitter module 400 and the optical receiver module 500 are used for transmitting and receiving optical signals. The light emitting module 400 and the light receiving module 500 may be combined together to form a light transceiving integrated structure.

A flexible circuit board is also used in a part of the optical module to supplement a rigid circuit board; the flexible circuit board is generally used in combination with a rigid circuit board, for example, the rigid circuit board may be connected to the optical transceiver device through the flexible circuit board.

In the embodiment of the present application, the optical transmitter module 400 is a coaxial TO package, physically separated from the circuit board, and electrically connected TO the flexible board. In the embodiment of the present application, the light receiving module 500 is also packaged in a coaxial TO package, and is physically separated from the circuit board, and is electrically connected TO the flexible board. In another common implementation, the light emitting assembly 400 and the light receiving assembly 500 may be disposed on a surface of the circuit board 300.

The circuit board 300 has a gold finger 301 on the surface of the end, the gold finger is composed of a pin independent from each other, the circuit board 300 is inserted into the electric connector in the cage, and the gold finger is electrically connected with the upper computer. The upper computer and the optical module can adopt an I2C protocol to carry out information transmission through I2C pins.

The upper computer can write information into the optical module, and specifically, the upper computer can write the information into a register of an MCU in the optical module; the optical module cannot write information into the upper computer, and when the optical module needs to provide information to the upper computer, the optical module writes the information into a preset register (such as a transmission status register, a data transmission failure register, and the like set in this embodiment) in the optical module, and the upper computer reads the register, and the register of the optical module is generally integrated in an MCU of the optical module, or can be independently set on the circuit board 300 of the optical module.

In some optical modules, a MAC chip is included in the optical module, and the MAC chip is disposed on the circuit board 300. Further, the upper computer needs to establish communication with the MAC chip, for example, an instruction for setting and reading a physical address of the MAC chip by the upper computer, and the like. The MAC chip comprises an MAC chip serial port, the main working state and the debugging mode of the MAC chip are realized through the serial port, and because the number of pins on the golden finger 301 is limited, no pins are usually used for realizing the serial port communication between the MAC chip and an upper computer. In the embodiment of the application, the MCU comprises an I2C interface and an MCU serial port, so that the MAC chip is communicated with an upper computer through the MCU.

Fig. 5 is a structural diagram of a circuit board 300 according to an embodiment of the present application. As shown in fig. 5, the light emitting module 400 and the light receiving module 500 are connected to the circuit board 300 through a flexible circuit board, and the circuit board 300 further includes an MCU302 and a MAC chip 303 thereon. The I2C interface of the MCU302 is connected with the golden finger 301, and the MCU302 establishes I2C communication with the upper computer through the golden finger 301, so as to realize data interaction with the upper computer. The serial port of the MAC chip 303 is connected to the serial port of the MCU302, and the MAC chip 303 and the MCU302 perform serial port communication. In the embodiment of the present application, the MCU302 is connected to the upper computer through the I2C pin of the golden finger based on the SFF8472 protocol, but is not limited to the SFF8472 protocol, and is also connected to the upper computer through the other pin of the golden finger according to other protocols.

Based on the above configuration, during data transmission, the MCU302 may receive data (hereinafter referred to as target data) from the upper computer through the gold finger 301 and store the target data in its internal preset data storage area. Therefore, the MCU302 establishes I2C communication with the upper computer through the golden finger 301, and can be used to forward data between the MAC chip and the upper computer. If the upper computer sends the target data needing to be sent to the MAC chip 303 to the MCU302 through the golden finger, the MCU302 receives the target data needing to be sent to the MAC chip 303 by the upper computer, then the MCU302 forwards the received target data to the MAC chip 303 through the serial port, the data generated after the processing of the MAC chip 303 is transmitted to the MCU302 through the serial port return value, and the upper computer reads the MCU302 to obtain the return value of the MAC chip 303.

Fig. 6 is a schematic diagram of MCU data transmission provided in an embodiment of the present application. As shown in fig. 6, the MCU302 is connected to the upper computer via the pin I2C of the gold finger, so that the MCU302 communicates with the upper computer in a I2C manner; the MCU302 is connected with the MAC chip 303 through a serial port. Optionally, a Transmit (TX) pin of the MCU302 is connected to a Receive (RX) pin of the MAC chip 303, and the Receive (RX) pin of the MCU302 is connected to the Transmit (TX) pin of the MAC chip 303.

As shown in fig. 6, the target data that the upper computer needs to send to the MAC chip 303 is written into the MCU302 through the gold finger, and is sent to the MAC chip 303 through the MCU302, then the MAC chip 303 receives the target data, processes the target data, and returns a data value to the MCU302, and the upper computer reads the returned data value returned to the MCU302 through the gold finger. Furthermore, the optical module provided in the embodiment of the present application realizes communication between the upper computer and the MAC chip 303 through the MCU 302.

In order to realize the communication between the upper computer and the MAC chip 303 orderly and accurately, the optical module comprises a first cache region and a second cache region. Optionally, the first buffer area and the second buffer area are disposed in the MCU 302. The first cache region is used for storing target data which needs to be sent to the MAC chip 303 by the upper computer, namely the first cache region is used for the upper computer to write the target data which needs to be sent to the MAC chip 303; the second cache region is used for storing return value data of the MAC chip 303 which needs to be returned to the upper computer, namely the second cache region is used for the upper computer to read and obtain the return value data of the MAC chip 303. Optionally, the buffer length of the first buffer and the second buffer is a fixed value, for example, the buffer length of the first buffer and the second buffer is 128 bytes.

Optionally, the first buffer and the second buffer are located at page 0xDE of MCU 302. When the upper computer writes target data which needs to be sent to the MAC chip 303 into the first cache region, the upper computer writes a debugging password into the MCU302, and the MCU302 verifies the debugging password written by the upper computer. If the MCU302 verifies that the debugging password written by the upper computer is correct, the MCU302 allows the upper computer to write the target data to be sent to the MAC chip 303 into the first cache area. The data written in the first cache region can be effectively prevented from being tampered by verifying the debugging password. Similarly, the debugging password can be verified when data is written into the second cache region, and the data written into the second cache region is further prevented from being tampered.

Optionally, the MCU302 receives a debugging password written by the upper computer. For example, the A2[7B ] address of MCU302 is used to write the debug password and the A2[7F ] address is used to write the page select value 0 xDE. If the host computer needs to send the target data to the MAC chip 303, the debug password is first written at the a2[7B ] address, and then the page select value 0xDE is written at the a2[7F ] address.

Further, in this embodiment of the application, the MCU302 further caches a start flag bit. If the MCU302 receives target data that the host computer needs to send to the MAC chip 303, it will start sending a flag bit. When the MCU302 detects that the flag bit is to be sent, the MCU302 starts to send the target data, which needs to be sent to the MAC chip 303 by the host computer, to the MAC chip 303, that is, the flag bit is used to determine when to send the target data, which needs to be sent to the MAC chip 303 by the host computer, to the MAC chip 303. If the MCU302 receives the target data that the host computer needs to transmit to the MAC chip 303, the start transmission flag is set to "1".

Optionally, the sending flag bit is set in a buffer of the MCU302, for example, a buffer different from the first buffer and the second buffer. Optionally, the MCU302 reads the sending flag bit in real time, and if the sending flag bit is read, the target data in the first buffer area is sent to the MAC chip 303. Further, after the MCU302 transmits the target data of the first buffer to the MAC chip 303, the MCU302 clears the target data of the first buffer and resets the transmission flag. Further, it is more convenient for the next time the host computer needs to store and send data to the MAC chip 303. For example, after the MCU302 transmits the target data in the first buffer to the MAC chip 303, the start transmission flag is set to "0".

In this embodiment of the application, the upper computer needs to send the end of the target data of the MAC chip 303 to carry a data end character. Monitoring a data end character in the process of storing the target data in the first cache region; and if the data end character is detected, ending the storage of the target data in the first cache region, namely, the upper computer writes the target data in the first cache region by taking the data end character as an end character, and ending the writing of the data when encountering the data end character in the writing process. Optionally, the data end character includes 0x0A and 0x0D, i.e. the target data written into the first buffer by the upper computer ends with 0x0A and 0x 0D. In addition, in the process that the upper computer writes the target data into the first cache region of the MCU302, the length of the target data written into the first cache region is detected, and if the data length of the target data written into the first cache region by the upper computer exceeds the cache length of the first cache region, the storage of the target data into the first cache region is terminated.

Further, in the process that the MCU302 sends the target data to the MAC chip 303, a data end character is detected; if an end of data character is encountered, the continued transmission of data to the MAC chip 303 is stopped.

When the MCU302 receives the return value data of the MAC chip 303, the length of the return value data written into the second buffer is detected; if the length of the return value data of the MAC chip 303 exceeds the buffer length of the second buffer, the MCU302 finishes receiving the return value data of the MAC chip 303.

In this embodiment of the application, if the MCU302 sends the target data stored in the first buffer area to the MAC chip 303, the waiting time for receiving the return value data is monitored; if the waiting time for receiving the return value data is less than or equal to the threshold waiting time, receiving the return value data of the MAC chip, and storing the received return value data to a second cache region; if the waiting time exceeds the threshold waiting time, the return value data of the MAC chip is not received. Typically, the threshold latency may be set to one communication cycle, such as 200 ms. In this way, it is helpful to ensure timeliness of receiving return value data.

Or, in this embodiment of the present application, if the MCU302 sends the target data stored in the first cache region to the MAC chip 303, the threshold cumulative time for receiving the return value data of the MAC chip is obtained; and if the accumulated time for receiving the return value data of the MAC chip is greater than the threshold accumulated time, finishing storing the received return value data into a second cache region. This also helps to ensure timeliness of the received return value data.

In this embodiment of the application, the upper computer reads the second buffer area in the MCU302 according to the communication cycle, and obtains the return value data of the MAC chip 303 from the second buffer area. If the target data is written into the first cache region in the MCU302 by the upper computer, an instruction for reading the return value data of the MAC chip in the second cache region is sent to the MCU302 after waiting for a communication cycle, and the MCU302 feeds back the return value data of the MAC chip 303 to the upper computer according to the received instruction for reading the return value data of the MAC chip. Further, after the upper computer reads the return value data of the MAC chip in the second cache region, the return value data of the MAC chip in the second cache region is clear.

According to the optical module provided by the application, the MCU is connected with the golden finger in the optical module, and the MAC chip is connected with the golden finger through the MCU. Wherein: when the MCU is connected with the upper computer through the golden finger, if the upper computer needs to send target data to the MAC chip, the target data which the upper computer needs to send to the MAC chip are received, and the target data are stored in a first cache region; then sending the target data of the first cache region to the MAC chip; the MAC chip generates return value data of the upper computer needing the return value and returns the return value data to the MCU; the MCU receives the return value data and stores the return value data to a second cache region; and the MCU receives a return value data reading instruction of the upper computer and feeds back the return value data stored in the second cache region to the upper computer. Therefore, the communication between the MAC chip and the upper computer is realized through the MCU, the problem that no redundant pins are used for realizing serial port communication between the MAC chip and the upper computer because the number of the pins of the golden fingers is limited is solved, and the debugging of the MAC chip by the upper computer is further facilitated.

Based on the optical module provided by the embodiment of the application, the embodiment of the application also provides a data transmission method, and the data transmission method is used for the optical module. Fig. 7 is a schematic basic flow chart of a data transmission method according to an embodiment. As shown in fig. 7, the method includes:

s101: the MCU receives target data which are required to be sent to the MAC chip by an upper computer through an I2C interface, and the target data are stored in a first cache region.

Optionally, the first buffer area is located in the MCU. When the upper computer needs to send target data to the MAC chip, the upper computer sends the target data to the MCU through the golden finger, the MCU receives the target data through the I2C interface, and the target data are stored in a first cache region of the MCU.

Optionally, the target data is ended with a data end character. The end of data characters may include 0x0A and 0x 0D. When the upper computer writes target data into the first cache region, the MCU monitors data ending characters, and if the data ending characters are met, the data sent by the upper computer are stopped being written into the first cache region. Or, in the process that the upper computer writes the target data into the first cache region of the MCU, detecting the length of the target data written into the first cache region, and if the data length of the target data written into the first cache region by the upper computer exceeds the cache length of the first cache region, finishing storing the target data into the first cache region.

In addition, in the embodiment of the present application, a start-to-send flag is set in the buffer of the MCU, where the start-to-send flag is used to confirm that the target data in the first buffer is properly sent to the MAC chip. If the MCU receives the target data, the flag bit for starting to send is automatically set to be 1, and when the MCU monitors that the flag bit for starting to send is set to be 1, the target data in the first cache region is sent to the MAC chip.

Optionally, when the upper computer writes target data to be sent to the MAC chip 303 into the first cache region, the upper computer writes a debugging password into the MCU302, and the MCU302 verifies the debugging password written by the upper computer. If the MCU302 verifies that the debugging password written by the upper computer is correct, the MCU302 allows the upper computer to write the target data to be sent to the MAC chip 303 into the first cache area.

S102: and the MCU sends the target data stored in the first cache region to the MAC chip through an MCU serial port.

After the upper computer writes the target data into the first cache region through the golden finger, the MCU sends the target data stored in the first cache region to the MAC chip through the serial port. For example, the target data stored in the first buffer area is transmitted to the RX pin of the MAC chip through the TX pin of the MCU.

In addition, in the process that the MCU sends the target data stored in the first cache region to the MAC chip, a data end character is monitored, and if the data end character is met, the target data is stopped being sent to the MAC chip.

Further, after the MCU transmits the target data stored in the first buffer area to the MAC chip, the start transmission flag is reset, and the entry is set to "0". When the MCU monitors that the flag bit is set to be 0, the target data in the first cache region is clear.

S103: and the MCU receives the return value data of the MAC chip through a serial port and stores the return value data to a second cache region.

Optionally, the second buffer area is located in the MCU. After receiving the target data through the serial port, the MAC chip carries out a series of processing according to the target data, and then correspondingly generates return value data which needs to be returned to the upper computer. The MAC chip sends return value data needing to be returned to the upper computer to the MCU through the serial port, and the MCU receives the return value data through the serial port and stores the return value data to a second cache region of the MCU. For example, the return value data of the MAC chip is transmitted to the RX pin of the MCU through the TX pin of the MAC chip.

Optionally, when the MCU receives the return value data of the MAC chip, the length of the return value data written into the second buffer area is detected; and if the length of the return value data of the MAC chip exceeds the cache length of the second cache region, the MCU finishes receiving the return value data of the MAC chip.

Optionally, after the MCU sends the target data stored in the first buffer area to the MAC chip, the waiting time for receiving the return value data is monitored; and if the waiting time for receiving the return value data is less than or equal to the threshold waiting time, receiving the return value data of the MAC chip and storing the received return value data to the second cache region. Or when the MCU sends the target data stored in the first cache region to the MAC chip, acquiring the threshold value accumulation time for receiving the return value data of the MAC chip; and if the accumulated time for receiving the return value data of the MAC chip is greater than the threshold accumulated time, finishing storing the received return value data into a second cache region.

S104: and the MCU receives a reading instruction of the upper computer, so that the upper computer reads the return value data of the second cache region through an I2C interface.

In order to ensure that the MAC chip executes the target data, the upper computer needs to receive the return data of the MAC chip to determine the execution result of the MAC chip, and thus the upper computer sends an instruction for reading the return data to the MCU. And the MCU receives an instruction of reading the return value data from the upper computer and feeds the return value data stored in the second cache region back to the upper computer so as to realize that the upper computer reads the return value data of the MAC chip stored in the second cache region in the MCU.

In the embodiment of the application, the upper computer reads the second cache region in the MCU according to the communication cycle, and obtains the return value data of the MAC chip from the second cache region. If the target data are written into the first cache region in the MCU by the upper computer, an instruction for reading the return value data of the MAC chip in the second cache region is sent to the MCU after waiting for a communication period, and the return value data of the MAC chip is fed back to the upper computer by the MCU according to the received instruction for reading the return value data of the MAC chip. Further, after the upper computer reads the return value data of the MAC chip in the second cache region, the return value data of the MAC chip in the second cache region is clear.

For the inexhaustible part of the data transmission method provided by the embodiment of the present application, reference may be made to the optical module provided by the above embodiment.

Finally, it should be noted that: the embodiment is described in a progressive manner, and different parts can be mutually referred; in addition, the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.