阅读说明：本技术 半导体装置以及半导体装置的制造方法 (Semiconductor device and method for manufacturing semiconductor device ) 是由 山崎舜平 泽井宽美 德丸亮 竹内敏彦 村川努 永松翔 森若智昭 于 2018-11-27 设计创作，主要内容包括：提供一种通态电流大的半导体装置。一种半导体装置,包括：第一绝缘体；第一绝缘体上的第一氧化物；第一氧化物上的第二氧化物；第二氧化物上的第一导电体及第二导电体；第二氧化物上的第三氧化物；第三氧化物上的第二绝缘体；位于第二绝缘体上并与第三氧化物重叠的第三导电体；与第一绝缘体上、第一氧化物的侧面、第二氧化物的侧面、第一导电体的侧面、第一导电体的顶面、第二导电体的侧面、第二导电体的顶面接触的第三绝缘体；以及第三导电体、第二绝缘体、第三氧化物及第三绝缘体上的第四绝缘体,其中第四绝缘体与第三导电体、第二绝缘体及第三氧化物的每一个的顶面接触。(A semiconductor device with a large on-state current is provided. A semiconductor device, comprising: a first insulator; a first oxide over the first insulator; a second oxide over the first oxide; a first conductor and a second conductor on the second oxide; a third oxide on the second oxide; a second insulator on the third oxide; a third electrical conductor on the second insulator and overlapping the third oxide; a third insulator in contact with the first insulator, the side surface of the first oxide, the side surface of the second oxide, the side surface of the first conductor, the top surface of the first conductor, the side surface of the second conductor, and the top surface of the second conductor; and a third conductor, a second insulator, a third oxide, and a fourth insulator on the third insulator, wherein the fourth insulator is in contact with a top surface of each of the third conductor, the second insulator, and the third oxide.)

1. A semiconductor device, comprising:

a first insulator;

a first oxide over the first insulator;

a second oxide on the first oxide;

a first conductor and a second conductor on the second oxide;

a third oxide on the second oxide;

a second insulator on the third oxide;

a third electrical conductor on the second insulator and overlapping the third oxide;

a third insulator in contact with the first insulator, the side surface of the first oxide, the side surface of the second oxide, the side surface of the first conductor, the top surface of the first conductor, the side surface of the second conductor, and the top surface of the second conductor; and

a third conductor, a second insulator, a third oxide, and a fourth insulator over the third insulator,

wherein the fourth insulator is in contact with a top surface of each of the third conductor, the second insulator, and the third oxide.

2. The semiconductor device according to claim 1, wherein the first and second electrodes are formed on a substrate,

wherein both the third insulator and the fourth insulator are less permeable to one or both of oxygen and hydrogen than the first insulator.

3. The semiconductor device according to claim 1 or claim 2,

wherein both the third insulator and the fourth insulator are less permeable to one or both of oxygen and hydrogen than the second insulator.

4. The semiconductor device according to any one of claims 1 to 3,

wherein the third insulator and the fourth insulator are both an oxide containing one or both of aluminum and hafnium.

5. The semiconductor device according to any one of claims 1 to 4,

wherein the third insulator and the fourth insulator are both alumina.

6. The semiconductor device according to any one of claims 1 to 5,

wherein the first oxide to the third oxide have In, an element M (M is Al, Ga, Y, or Sn), and Zn.

7. A semiconductor device including a transistor having a gate electrode,

wherein the transistor includes:

a first insulator;

a first oxide over the first insulator;

a second oxide on the first oxide;

a first conductor and a second conductor on the second oxide;

a third oxide on the second oxide;

a second insulator on the third oxide; and

a third electrical conductor on the second insulator and overlapping the third oxide,

in a cross section in a channel length direction of the transistor, a height of a bottom surface of the third conductor in a region overlapping with the second oxide is lower than a height of a top surface of the second conductor with reference to a height of a bottom surface of the first insulator,

in a cross section in a channel width direction of the transistor, a height of a bottom surface of the third conductor in a region not overlapping with the second oxide is lower than a height of a bottom surface of the second oxide, based on a height of a bottom surface of the first insulator.

8. A method of manufacturing a semiconductor device, comprising the steps of:

forming a first insulator on a substrate;

forming a first oxide film and a first conductive film in this order over the first insulator;

processing the first oxide film and the first conductive film to form a first oxide layer and a conductor layer;

forming a first insulating film and a second insulating film in this order so as to cover the first oxide and the conductor layer;

forming a first conductor, a second conductor, and a second insulator by forming an opening in the conductor layer, the first insulating film, and the second insulating film, the opening exposing the first oxide;

carrying out first heating treatment to form a second oxide film;

performing a second heat treatment to form a third insulating film;

forming a second conductive film;

forming a second oxide, a third insulator, and a third conductor by performing planarization until a part of the second insulating film is exposed and removing the second oxide film, the third insulating film, and the second conductive film;

forming a fourth insulating film so as to cover the second insulating film, the second oxide, the third insulator, and the third conductor; and

and carrying out third heating treatment.

9. The method for manufacturing a semiconductor device according to claim 8,

wherein the first heat treatment and the second oxide film formation are sequentially performed under reduced pressure.

10. The method for manufacturing a semiconductor device according to claim 8,

wherein the second heat treatment and the third insulating film formation are sequentially performed under reduced pressure.

11. The method for manufacturing a semiconductor device according to claim 8,

wherein the third heat treatment is performed under a nitrogen-containing atmosphere.

12. The method for manufacturing a semiconductor device according to claim 8,

wherein as the fourth insulating film, a metal oxide containing aluminum is formed by using a sputtering method.

Technical Field

One embodiment of the present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. One embodiment of the present invention relates to a semiconductor wafer, a module, and an electronic device.

Note that in this specification and the like, a semiconductor device refers to all devices which can operate by utilizing semiconductor characteristics. In addition to a semiconductor element such as a transistor, a semiconductor circuit, an arithmetic device, or a memory device is also one embodiment of a semiconductor device. A display device (a liquid crystal display device, a light-emitting display device, or the like), a projection device, an illumination device, an electro-optical device, a power storage device, a memory device, a semiconductor circuit, an imaging device, an electronic apparatus, or the like may include a semiconductor device.

Note that one embodiment of the present invention is not limited to the above-described technical field. One embodiment of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method. In addition, one embodiment of the present invention relates to a process (process), a machine (machine), a product (manufacture), or a composition (machine).

Background

As a semiconductor thin film which can be applied to a transistor, a silicon-based semiconductor material is widely known. In addition, as another material, an oxide semiconductor has attracted attention. As an oxide semiconductor, for example, a multi-component metal oxide is known in addition to a single-component metal oxide such as indium oxide and zinc oxide. Among the multi-component metal oxides, In-Ga-Zn oxides (hereinafter also referred to as IGZO) have been studied particularly In the presence of fire.

By studying IGZO, a CAAC (c-axis aligned crystalline) structure and nc (nanocrystalline) structure, which are neither single crystal nor amorphous, have been found in oxide semiconductors (see non-patent documents 1 to 3). Non-patent document 1 and non-patent document 2 disclose a technique for manufacturing a transistor using an oxide semiconductor having a CAAC structure. Further, non-patent documents 4 and 5 disclose that an oxide semiconductor having a lower crystallinity than the CAAC structure and the nc structure also has a fine crystal.

Transistors using IGZO as an active layer have an extremely low off-state current (see non-patent document 6), and LSIs and displays utilizing this characteristic are known (see non-patent documents 7 and 8).

[ Prior Art document ]

[ non-patent document ]

[ non-patent document 1] S.Yamazaki et al, "SID Symposium Digest of technical papers", 2012, volume 43, issue 1, p.183-186

[ non-patent document 2] S.Yamazaki et al, "Japanese Journal of Applied Physics", 2014, volume 53, Number 4S, p.04ED18-1-04ED18-10

[ non-patent document 3] S.Ito et al, "The Proceedings of AM-FPD' 13Digest of technical Papers", 2013, p.151-154

[ non-patent document 4] S.Yamazaki et al, "ECS Journal of Solid State Science and technology", 2014, volume 3, issue 9, p.Q3012-Q3022

[ non-patent document 5] S.Yamazaki, "ECS Transactions", 2014, volume 64, issue 10, p.155-164

[ non-patent document 6] K.Kato et al, "Japanese Journal of Applied Physics", 2012, volume 51, p.021201-1-021201-7

[ non-patent document 7] S.Matsuda et al, "2015 Symposium on VLSI Technology Digest of technical Papers", 2015, p.T216-T217

[ non-patent document 8] S.Amano et al, "SID Symposium Digest of Technical Papers", 2010, volume 41, issue 1, p.626-629

Disclosure of Invention

Technical problem to be solved by the invention

An object of one embodiment of the present invention is to provide a semiconductor device with a large on-state current. Another object of one embodiment of the present invention is to provide a semiconductor device having high frequency characteristics. Another object of one embodiment of the present invention is to provide a semiconductor device with high reliability. Another object of one embodiment of the present invention is to provide a semiconductor device which can be miniaturized or highly integrated. Another object of one embodiment of the present invention is to provide a semiconductor device having excellent electrical characteristics. It is another object of an embodiment of the present invention to provide a semiconductor device having a high greenness.

An object of one embodiment of the present invention is to provide a semiconductor device capable of holding data for a long period of time. An object of one embodiment of the present invention is to provide a semiconductor device with a high data writing speed. An object of one embodiment of the present invention is to provide a semiconductor device with a high degree of freedom in design. An object of one embodiment of the present invention is to provide a semiconductor device in which power consumption can be suppressed. An object of one embodiment of the present invention is to provide a novel semiconductor device.

Note that the description of the above object does not hinder the existence of other objects. In addition, one embodiment of the present invention does not necessarily achieve all of the above-described objects. The objects other than these objects will be apparent from the description of the specification, drawings, claims, and the like, and the objects other than these can be derived from the description of the specification, drawings, claims, and the like.

Means for solving the problems

One embodiment of the present invention is a semiconductor device including: a first insulator; a first oxide over the first insulator; a second oxide over the first oxide; a first conductor and a second conductor on the second oxide; a third oxide on the second oxide; a second insulator on the third oxide; a third electrical conductor on the second insulator and overlapping the third oxide; a third insulator in contact with the first insulator, the side surface of the first oxide, the side surface of the second oxide, the side surface of the first conductor, the top surface of the first conductor, the side surface of the second conductor, and the top surface of the second conductor; and a third conductor, a second insulator, a third oxide, and a fourth insulator on the third insulator, wherein the fourth insulator is in contact with a top surface of each of the third conductor, the second insulator, and the third oxide.

In addition, it is preferable that both the third insulator and the fourth insulator are less permeable to one or both of oxygen and hydrogen than the first insulator.

In addition, it is preferable that both the third insulator and the fourth insulator are less permeable to one or both of oxygen and hydrogen than the second insulator.

Preferably, the third insulator and the fourth insulator are both an oxide containing one or both of aluminum and hafnium.

Further, the third insulator and the fourth insulator are preferably both alumina.

Further, the first to third oxides preferably have In, an element M (M is Al, Ga, Y, or Sn), and Zn.

Another embodiment of the present invention is a semiconductor device including a transistor, wherein the transistor includes: a first insulator; a first oxide over the first insulator; a second oxide over the first oxide; a first conductor and a second conductor on the second oxide; a third oxide on the second oxide; a second insulator on the third oxide; and a third conductor located on the second insulator and overlapping the third oxide, wherein in a cross section in a channel length direction of the transistor, a height of a bottom surface of the third conductor in a region overlapping the second oxide is lower than a height of a top surface of the second conductor with reference to a height of a bottom surface of the first insulator, and in a cross section in a channel width direction of the transistor, a height of a bottom surface of the third conductor in a region not overlapping the second oxide is lower than a height of a bottom surface of the second oxide with reference to a height of the bottom surface of the first insulator.

Another embodiment of the present invention is a method for manufacturing a semiconductor device, including the steps of: forming a first insulator on a substrate; forming a first oxide film and a first conductive film in this order over the first insulator; processing the first oxide film and the first conductive film to form a first oxide layer and a conductor layer; forming a first insulating film and a second insulating film in this order so as to cover the first oxide layer and the conductor layer; forming a first conductor, a second conductor, and a second insulator by forming an opening in the conductor layer, the first insulating film, and the second insulating film, the opening exposing the first oxide; carrying out first heating treatment to form a second oxide film; performing a second heat treatment to form a third insulating film; forming a second conductive film; forming a second oxide, a third insulator, and a third conductor by performing planarization until a part of the second insulating film is exposed and removing the second oxide film, the third insulating film, and the second conductive film; forming a fourth insulating film so as to cover the second insulating film, the second oxide, the third insulator, and the third conductor; and performing a third heat treatment.

Further, it is preferable that the first heat treatment and the second oxide film formation are sequentially performed under reduced pressure.

Further, it is preferable that the second heat treatment and the third insulating film formation are performed in this order under reduced pressure.

Further, the third heat treatment is preferably performed in an atmosphere containing nitrogen.

Further, it is preferable that, as the fourth insulating film, a metal oxide containing aluminum is formed by using a sputtering method.

Effects of the invention

According to one embodiment of the present invention, a semiconductor device with a large on-state current can be provided. In addition, according to one embodiment of the present invention, a semiconductor device having high frequency characteristics can be provided. In addition, according to one embodiment of the present invention, a semiconductor device with high reliability can be provided. In addition, according to one embodiment of the present invention, a semiconductor device which can be miniaturized or highly integrated can be provided. In addition, according to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. In addition, according to one embodiment of the present invention, a semiconductor device with high productivity can be provided.

In addition, a semiconductor device capable of holding data for a long period can be provided. In addition, a semiconductor device with a high data writing speed can be provided. Further, a semiconductor device with a high degree of freedom in design can be provided. In addition, a semiconductor device capable of suppressing power consumption can be provided. In addition, a novel semiconductor device can be provided.

Note that the description of these effects does not hinder the existence of other effects. In addition, one embodiment of the present invention does not necessarily have all of the above effects. Effects other than these effects are naturally apparent from the description of the specification, drawings, claims, and the like, and the effects other than these can be derived from the description of the specification, drawings, claims, and the like.