Thin film transistor switch, preparation method thereof, array substrate and display panel

文档序号:1289650 发布日期:2020-08-28 浏览:6次 中文

阅读说明:本技术 一种薄膜晶体管开关及其制备方法、阵列基板和显示面板 (Thin film transistor switch, preparation method thereof, array substrate and display panel ) 是由 王利忠 周天民 胡合合 于 2020-05-29 设计创作,主要内容包括:本发明涉及显示技术领域,公开了一种薄膜晶体管开关及其制备方法、阵列基板和显示面板,该薄膜晶体管开关包括:衬底;结晶氧化物半导体,结晶氧化物半导体沿衬底的厚度方向延伸;包围于结晶氧化物半导体周侧的栅绝缘层;绕结晶氧化物设置且位于栅绝缘层的外周侧的栅极;设于栅极上且覆盖栅极的钝化层;设于结晶氧化物半导体周侧的一侧且与结晶氧化物半导体朝向衬底的一端电连接的源极;设于结晶氧化物半导体远离衬底的一侧且与结晶氧化物半导体电连接的漏极。该薄膜晶体管开关的有源层为结晶氧化物半导体,形成垂直TFT结构,有效提高了薄膜晶体管开关的迁移率和稳定性,应用于显示屏时,可以减小结构尺寸,有效提升显示屏的透过率。(The invention relates to the technical field of display, and discloses a thin film transistor switch, a preparation method thereof, an array substrate and a display panel, wherein the thin film transistor switch comprises: a substrate; a crystalline oxide semiconductor extending in a thickness direction of the substrate; a gate insulating layer surrounding the crystalline oxide semiconductor; a gate electrode disposed around the crystalline oxide and located on an outer peripheral side of the gate insulating layer; a passivation layer arranged on the grid and covering the grid; a source electrode provided on one side of the peripheral side of the crystalline oxide semiconductor and electrically connected to one end of the crystalline oxide semiconductor facing the substrate; and the drain electrode is arranged on one side of the crystalline oxide semiconductor far away from the substrate and is electrically connected with the crystalline oxide semiconductor. The active layer of the thin film transistor switch is a crystalline oxide semiconductor, a vertical TFT structure is formed, the mobility and the stability of the thin film transistor switch are effectively improved, the structural size can be reduced when the thin film transistor switch is applied to a display screen, and the transmittance of the display screen is effectively improved.)

1. A thin film transistor switch, comprising:

a substrate;

a crystalline oxide semiconductor extending in a thickness direction of the substrate;

a gate insulating layer surrounding the crystalline oxide semiconductor;

a gate electrode disposed around the crystalline oxide and on an outer peripheral side of the gate insulating layer;

the passivation layer is arranged on the grid electrode and covers the grid electrode;

a source electrode provided on one side of the periphery of the crystalline oxide semiconductor and electrically connected to one end of the crystalline oxide semiconductor facing the substrate;

and the drain electrode is arranged on one side of the crystalline oxide semiconductor, which is far away from the substrate, and is electrically connected with the crystalline oxide semiconductor.

2. The thin film transistor switch according to claim 1, wherein a thickness of the crystalline oxide semiconductor in a direction perpendicular to the substrate is greater than or equal toAnd is less than or equal to

3. The thin film transistor switch according to claim 1, wherein an end of the crystalline oxide semiconductor facing the substrate forms an extension connection portion extending toward a side of a peripheral side, and wherein the source electrode is provided on the extension connection portion and electrically connected to the extension connection portion.

4. The thin film transistor switch of claim 1, wherein the gate electrode is disposed around the crystalline oxide and surrounds an outer peripheral side of the gate insulating layer.

5. A method of manufacturing a thin film transistor switch, for manufacturing a thin film transistor switch according to any one of claims 1 to 4, comprising:

forming a crystalline oxide film layer on a substrate, and forming a crystalline oxide semiconductor extending in a thickness direction of the substrate through a patterning process;

forming a gate insulating layer on the crystalline oxide semiconductor;

forming a gate electrode layer on the gate insulating layer and performing patterning on the gate electrode layer to form a gate electrode disposed around the crystalline oxide and located on an outer peripheral side of the gate insulating layer;

forming a passivation layer on the grid electrode, and carrying out patterning treatment on the passivation layer so as to expose one end, far away from the substrate, of the crystalline oxide semiconductor, wherein the passivation layer covers the grid electrode;

and forming a metal layer on the passivation layer and the crystalline oxide semiconductor, and performing patterning treatment on the metal layer to form a source electrode which is positioned on one side of the crystalline oxide semiconductor and electrically connected with one end of the crystalline oxide semiconductor facing the substrate, and a drain electrode which is positioned on one side of the crystalline oxide semiconductor far away from the substrate and electrically connected with the crystalline oxide semiconductor.

6. The method according to claim 5, wherein the forming of the crystalline oxide semiconductor through the patterning process and the forming of the passivation layer on the gate electrode and the patterning process of the passivation layer specifically include:

patterning the crystalline oxide film layer by adopting an exposure and development technology to form a crystalline oxide semiconductor, wherein one end of the crystalline oxide semiconductor, facing the substrate, is provided with an extension connecting part extending towards one side of the peripheral side;

and forming a passivation layer on the grid electrode, and carrying out patterning treatment on the passivation layer to expose one end of the crystalline oxide semiconductor, which is far away from the substrate, so that a through hole is formed in the passivation layer, which corresponds to the extension connecting part, to expose the extension connecting part, and the passivation layer covers the grid electrode.

7. The method according to claim 5, wherein the forming a metal layer on the passivation layer and the crystalline oxide semiconductor specifically comprises:

depositing a metal on the passivation layer and the crystalline oxide semiconductor, and plasma bombarding the metal deposited on the passivation layer and the crystalline oxide semiconductor during the metal deposition process to conduce an end portion of the crystalline oxide semiconductor on a side away from the substrate and to conduct the extended connection portion.

8. An array substrate comprising the thin film transistor switch of any one of claims 1 to 4.

9. The array substrate of claim 8, wherein the substrate is a flexible substrate.

10. A display panel comprising the array substrate according to claim 8 or 9.

Technical Field

The invention relates to the technical field of display, in particular to a thin film transistor switch, a preparation method thereof, an array substrate and a display panel.

Background

With the continuous improvement of the requirement of people on the display effect, the traditional a-Si LCD product cannot meet the performance requirements of narrow frame, high definition and high refresh frequency, and compared with the a-Si thin film transistor, the oxide thin film transistor has higher mobility and meets the requirement of high-end large-size TV products, but the current high-transmittance filtration is the key that restricts the further improvement of the display effect, so how to further improve the transmittance of the display screen and improve the display effect is the problem that needs to be researched and solved urgently at present.

Disclosure of Invention

The invention discloses a thin film transistor switch, a preparation method thereof, an array substrate and a display panel, wherein an active layer of the thin film transistor switch is a crystalline oxide semiconductor and extends along a direction vertical to a substrate to form a vertical TFT structure, so that the mobility and the stability of the thin film transistor switch are effectively improved, and when the thin film transistor switch is applied to a display screen, the structure size can be reduced, and the transmittance of the display screen is effectively improved.

In order to achieve the purpose, the invention provides the following technical scheme:

a thin film transistor switch, comprising:

a substrate;

a crystalline oxide semiconductor extending in a thickness direction of the substrate;

a gate insulating layer surrounding the crystalline oxide semiconductor;

a gate electrode disposed around the crystalline oxide and on an outer peripheral side of the gate insulating layer;

the passivation layer is arranged on the grid electrode and covers the grid electrode;

a source electrode provided on one side of the periphery of the crystalline oxide semiconductor and electrically connected to one end of the crystalline oxide semiconductor facing the substrate;

and the drain electrode is arranged on one side of the crystalline oxide semiconductor, which is far away from the substrate, and is electrically connected with the crystalline oxide semiconductor.

For convenience of description, the direction perpendicular to the substrate is taken as a vertical direction, and the direction parallel to the surface of the substrate is taken as a horizontal direction in the above-mentioned thin film transistor switch. The thin film transistor switch of the present invention is an oxide thin film transistor switch, including a crystalline oxide semiconductor which is a crystal and is an active layer of the thin film transistor switch, and which is extended in a thickness direction (i.e., a vertical direction) of a substrate to form a crystalline nanowire, a gate insulating layer is surrounded around the crystalline oxide semiconductor, a gate electrode is disposed around the gate insulating layer, and the gate electrode may be disposed around the crystalline oxide semiconductor entirely or partially around the crystalline oxide semiconductor, as long as the gate electrode is disposed around the crystalline oxide semiconductor so as to supply a voltage signal to the gate electrode, a passivation layer is disposed on the gate electrode, the passivation layer covers the gate electrode, and the passivation layer and the top of the crystalline oxide semiconductor are provided with openings to expose the top of the crystalline oxide semiconductor, a source electrode is arranged on one side of the peripheral side of the crystalline oxide semiconductor, the source electrode is connected with one end of the crystalline oxide semiconductor facing the substrate, namely, the bottom of the crystalline oxide semiconductor to form an electrical connection relation, a drain electrode is arranged on one side of the crystalline oxide semiconductor far away from the substrate, the drain electrode is arranged on the top of the crystalline oxide semiconductor to be connected with the crystalline oxide semiconductor to form an electrical connection relation, namely, the length of the channel of the thin film transistor switch is formed by extending along the direction vertical to the substrate, the thin film transistor switch is formed as a vertical TFT, the active layer in the thin film transistor switch is the crystalline oxide semiconductor, the defect state of the active layer can be greatly reduced, and the mobility and the stability of the thin film transistor switch can, when the thin film transistor switch is applied to a display panel, the structural size of the thin film transistor switch can be made smaller, the transmittance of the display panel can be further improved, the thin film transistor switch is of a vertical TFT structure, an active layer of the thin film transistor switch is arranged in a direction perpendicular to a substrate in an extending mode, the phenomenon that the active layer is too long in the horizontal direction of the substrate to cause folding fracture can be effectively avoided in the design application of a flexible screen, a bending screen or a folding screen, the length of a channel of the thin film transistor switch extends in the direction perpendicular to the substrate, when the display screen is bent, the channel layer is influenced a little, and the stability of the thin film transistor switch can be guaranteed.

Therefore, the active layer of the thin film transistor switch is a crystalline oxide semiconductor and extends in the direction perpendicular to the substrate to form a vertical TFT structure, so that the mobility and the stability of the thin film transistor switch are effectively improved, the structural size can be reduced when the thin film transistor switch is applied to a display screen, and the transmittance of the display screen is effectively improved.

Optionally, a thickness of the crystalline oxide semiconductor in a direction perpendicular to the substrate is greater than or equal toAnd is less than or equal to

Alternatively, the crystalline oxide semiconductor may be formed with an extension connection portion extending toward one side of the peripheral side toward one end of the substrate, and the source electrode may be provided on and electrically connected to the extension connection portion.

Optionally, the gate electrode is disposed around the crystalline oxide and surrounds an outer peripheral side of the gate insulating layer.

Based on the same inventive concept, the present invention further provides a method for manufacturing a thin film transistor switch, which is used for manufacturing any one of the thin film transistor switches provided by the above technical solutions, and comprises:

forming a crystalline oxide film layer on a substrate, and forming a crystalline oxide semiconductor extending in a thickness direction of the substrate through a patterning process;

forming a gate insulating layer on the crystalline oxide semiconductor;

forming a gate electrode layer on the gate insulating layer and performing patterning on the gate electrode layer to form a gate electrode disposed around the crystalline oxide and located on an outer peripheral side of the gate insulating layer;

forming a passivation layer on the grid electrode, and carrying out patterning treatment on the passivation layer so as to expose one end, far away from the substrate, of the crystalline oxide semiconductor, wherein the passivation layer covers the grid electrode;

and forming a metal layer on the passivation layer and the crystalline oxide semiconductor, and performing patterning treatment on the metal layer to form a source electrode which is positioned on one side of the crystalline oxide semiconductor and electrically connected with one end of the crystalline oxide semiconductor facing the substrate, and a drain electrode which is positioned on one side of the crystalline oxide semiconductor far away from the substrate and electrically connected with the crystalline oxide semiconductor.

Optionally, the forming a crystalline oxide semiconductor through patterning, forming a passivation layer on the gate, and patterning the passivation layer specifically includes:

patterning the crystalline oxide film layer by adopting an exposure and development technology to form a crystalline oxide semiconductor, wherein one end of the crystalline oxide semiconductor, facing the substrate, is provided with an extension connecting part extending towards one side of the peripheral side;

and forming a passivation layer on the grid electrode, and carrying out patterning treatment on the passivation layer to expose one end of the crystalline oxide semiconductor, which is far away from the substrate, so that a through hole is formed in the passivation layer, which corresponds to the extension connecting part, to expose the extension connecting part, and the passivation layer covers the grid electrode.

Optionally, the forming a metal layer on the passivation layer and the crystalline oxide semiconductor specifically includes:

depositing a metal on the passivation layer and the crystalline oxide semiconductor, and plasma bombarding the metal deposited on the passivation layer and the crystalline oxide semiconductor during the metal deposition process to conduce an end portion of the crystalline oxide semiconductor on a side away from the substrate and to conduct the extended connection portion.

The invention also provides an array substrate which comprises the thin film transistor switch provided by the technical scheme.

Optionally, the substrate is a flexible substrate.

The invention also provides a display panel which comprises any one of the array substrates provided by the technical scheme.

Drawings

Fig. 1 to fig. 5 are schematic diagrams illustrating structural changes of a film layer in a process of manufacturing a thin film transistor switch according to an embodiment of the present invention;

fig. 6 is a schematic flow chart of a method for manufacturing a thin film transistor switch according to an embodiment of the present invention;

icon: 1-a substrate; 2-crystalline oxide semiconductor; 3-a gate insulating layer; 4-a gate; 5-a passivation layer; 6-source electrode; 7-a drain electrode; 21-extending the connection.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

As shown in fig. 5, fig. 5 is a schematic structural diagram of a thin film transistor switch according to an embodiment of the present invention. An embodiment of the present invention provides a thin film transistor switch, including: a substrate 1; a crystalline oxide semiconductor 2, the crystalline oxide semiconductor 2 extending in a thickness direction of the substrate 1; a gate insulating layer 3 surrounding the periphery of the crystalline oxide semiconductor 2; a gate electrode 4 provided around the crystalline oxide and located on an outer peripheral side of the gate insulating layer 3; a passivation layer 5 disposed on the gate electrode 4 and covering the gate electrode 4; a source electrode 6 provided on one side of the periphery of the crystalline oxide semiconductor 2 and electrically connected to one end of the crystalline oxide semiconductor 2 facing the substrate 1; and a drain electrode 7 provided on a side of the crystalline oxide semiconductor 2 remote from the substrate 1 and electrically connected to the crystalline oxide semiconductor 2.

For convenience of description, the thin film transistor switch has a vertical direction perpendicular to the substrate 1 and a horizontal direction parallel to the surface of the substrate 1. The thin film transistor switch of the present invention is an oxide thin film transistor switch, comprising a crystalline oxide semiconductor 2 disposed on a substrate 1, the crystalline oxide semiconductor 2 being a crystal and being an active layer of the thin film transistor switch, and the crystalline oxide semiconductor 2 being disposed extending in a thickness direction (i.e., a vertical direction) of the substrate 1 to form a crystalline nanowire, the crystalline oxide semiconductor 2 being surrounded by a gate insulating layer 3 on a peripheral side thereof, a gate electrode 4 being disposed on an outer peripheral side of the gate insulating layer 3, the gate electrode 4 being disposed around the crystalline oxide semiconductor 2, and the gate electrode 4 being disposed around the crystalline oxide semiconductor 2 either entirely or partially on the peripheral side of the crystalline oxide semiconductor 2, as long as the gate electrode 4 is disposed on the peripheral side of the crystalline oxide semiconductor 2 so that the gate electrode 4 supplies a voltage signal to the crystalline oxide semiconductor 2, a passivation layer 5 is disposed on the gate electrode 4, the passivation layer 5 covers the gate electrode 4, and an opening may be formed at a portion of the passivation layer 5 corresponding to the top of the crystalline oxide semiconductor 2 to expose the top of the crystalline oxide semiconductor 2, a source electrode 6 is disposed at one side of the peripheral side of the crystalline oxide semiconductor 2, the source electrode 6 is connected to one end of the crystalline oxide semiconductor 2 facing the substrate 1, that is, connected to the bottom of the crystalline oxide semiconductor 2, to form an electrical connection relationship, a drain electrode 7 is disposed at one side of the crystalline oxide semiconductor 2 away from the substrate 1, the drain electrode 7 is disposed at the top of the crystalline oxide semiconductor 2 to be connected to the crystalline oxide semiconductor 2, to form an electrical connection relationship, that is, the channel length of the thin film transistor switch is formed to extend in a direction perpendicular to the substrate 1, the thin film transistor switch is formed as a vertical TFT, the active layer of, the defect state of an active layer can be greatly reduced, the mobility and the stability of a thin film transistor switch are effectively improved, and further when the thin film transistor switch is applied to a display panel, the structural size of the thin film transistor switch can be made smaller, the transmittance of the display panel is further improved, the thin film transistor switch is of a vertical TFT structure, the active layer of the thin film transistor switch is arranged in a direction perpendicular to a substrate 1 in an extending mode, the phenomenon that the active layer is too long in the horizontal direction of the substrate 1 to cause folding fracture can be effectively avoided in the design and application of a flexible screen, a bending screen or a folding screen, the length of a channel of the thin film transistor switch extends in the direction perpendicular to the substrate 1, when the display screen is bent, the influence on the channel layer is small, and the stability of the thin film transistor switch is guaranteed.

Therefore, the active layer of the thin film transistor switch is a crystalline oxide semiconductor and extends in the direction perpendicular to the substrate to form a vertical TFT structure, so that the mobility and the stability of the thin film transistor switch are effectively improved, the structural size can be reduced when the thin film transistor switch is applied to a display screen, and the transmittance of the display screen is effectively improved.

Specifically, as shown in fig. 1, in the thin film transistor switch described above, the thickness D of the crystalline oxide semiconductor 2 in the direction perpendicular to the substrate 1 is greater than or equal toAnd is less than or equal toThe size of the crystalline oxide semiconductor 2 in the direction perpendicular to the substrate 1 may be inThe above-described thin film transistor can be made to perform better and to have a more suitable size by selecting a suitable thickness within a range, and preferably, the thickness of the crystalline oxide semiconductor 2 in the direction perpendicular to the substrate 1 can be set to OrThe thickness can be set according to actual requirements, and the embodiment is not limited.

As shown in fig. 1, in the thin film transistor, the crystalline oxide semiconductor 2 may be in the shape of a strip-shaped column with its length direction perpendicular to the substrate 1, specifically, the clean oxide semiconductor may be in the shape of a cylinder with its central axis perpendicular to the substrate 1, and the crystalline oxide semiconductor 2 may also be in the shape of a rectangular parallelepiped, or in other shapes, but the present embodiment is not limited thereto, and in the cross section of the crystalline oxide semiconductor 2 perpendicular to the substrate 1, the dimension B of the cross section in the direction parallel to the substrate 1 is greater than or equal to 40nm or less than or equal to 60nm, preferably 45nm, 48nm, 50nm, 52nm, or 55nm, or other dimension values, but the present embodiment is not limited thereto.

Specifically, the material of the gate insulating layer may be silicon oxide, and the thickness of the gate insulating layer may be set to be

Specifically, as shown in fig. 3, the gate electrode 4 may be copper, molybdenum or a stacked structure of copper and molybdenum, the gate electrode 4 is disposed around the crystalline oxide semiconductor 2 and attached to the outer surface of the gate insulating layer 3 around the crystalline oxide semiconductor 2, and the thickness dimension C of the gate electrode 4 in a direction parallel to the substrate 1 isPreferably, can be arranged asOrOther dimensions are also possible, and the embodiment is not limited.

Wherein the passivation layer may be silicon oxide, silicon nitride or a stacked structure of silicon oxide and silicon nitride, and the thickness of the passivation layer may be set to be

Specifically, as shown in fig. 5, in the thin film transistor switch, the extension connection portion 21 extending toward one side of the peripheral side is formed at one end of the crystalline oxide semiconductor 2 facing the substrate 1, the source electrode 6 is disposed on the extension connection portion 21 and electrically connected to the extension connection portion 21, and the extension connection portion 21 may be integrally formed with the crystalline oxide semiconductor 2 and formed in the same manufacturing process, so that the source electrode 6 is electrically connected to the crystalline oxide semiconductor 2.

Specifically, as shown in fig. 3, in the thin film transistor, the gate electrode 4 is disposed around the crystalline oxide and surrounds the outer periphery of the gate insulating layer 3, and the gate electrode 4 completely surrounds the periphery of the crystalline oxide semiconductor 2, so that an electrical signal can be better applied to the active layer, which is beneficial to improving the sensitivity of the thin film transistor.

Specifically, an insulating dielectric layer and an ITO layer are formed on the source electrode and the drain electrode, so that the thin film transistor is electrically connected with other devices to complete corresponding functions.

Based on the same inventive concept, as shown in fig. 1 to 5 with reference to fig. 6, the present invention further provides a method for manufacturing a thin film transistor switch, which is used for manufacturing any one of the thin film transistor switches provided by the above technical solutions, and includes:

step S101, as shown in fig. 1, forming a crystalline oxide film layer on a substrate 1, and forming a crystalline oxide semiconductor 2 extending in a thickness direction of the substrate 1 by patterning;

step S102, as shown in fig. 2, forming a gate insulating layer 3 on the crystalline oxide semiconductor 2;

step S103, as shown in fig. 3, forming a gate electrode 4 layer on the gate insulating layer 3, and performing patterning processing on the gate electrode 4 layer to form a gate electrode 4 disposed around the crystalline oxide and located on an outer peripheral side of the gate insulating layer 3;

step S104, as shown in fig. 4, forming a passivation layer 5 on the gate 4, and performing patterning on the passivation layer 5 to expose the top of the crystalline oxide semiconductor 2, wherein the passivation layer 5 covers the gate 4;

in step S105, as shown in fig. 5, a metal layer is formed on the passivation layer 5 and the crystalline oxide semiconductor 2, and patterning is performed on the metal layer to form a source electrode 6 located on the side of the crystalline oxide semiconductor 2 and electrically connected to one end of the crystalline oxide semiconductor 2 facing the substrate 1, and a drain electrode 7 located on the side of the crystalline oxide semiconductor away from the substrate 1 and electrically connected to the crystalline oxide semiconductor 2.

The active layer of the thin film transistor switch prepared by the preparation method is a crystalline oxide semiconductor and extends along the direction vertical to the substrate to form a vertical TFT structure, so that the mobility and the stability of the thin film transistor switch are effectively improved, and when the thin film transistor switch is applied to a display screen, the structure size can be reduced, and the transmittance of the display screen is effectively improved.

Specifically, in step S101, as shown in fig. 1, the crystalline oxide semiconductor 2 is formed by patterning processing, specifically including: patterning the crystalline oxide film layer by using an exposure and development technology to form a crystalline oxide semiconductor 2, wherein one end of the crystalline oxide semiconductor 2 facing the substrate 1 is formed with an extension connecting part 21 extending towards one side of the peripheral side; in subsequent step S104, as shown in fig. 4, a passivation layer 5 is formed on the gate 4, and the patterning process is performed on the passivation layer 5, which specifically includes: a passivation layer 5 is formed on the gate electrode 4, and patterning is performed on the passivation layer 5 to expose the top of the crystalline oxide semiconductor 2, so that a via hole is formed in the passivation layer 5 corresponding to the extension connection portion 21 to expose the extension connection portion 21, and the passivation layer 5 covers the gate electrode 4.

Specifically, in step S105, as shown in fig. 5, a metal layer is formed on the passivation layer 5 and the crystalline oxide semiconductor 2, specifically including: depositing a metal on the passivation layer 5 and the crystalline oxide semiconductor 2, and subjecting the metal deposited on the passivation layer 5 and the crystalline oxide semiconductor 2 to plasma bombardment during the deposition of the metal to conduct an end portion of the crystalline oxide semiconductor 2 on a side away from the substrate 1 and conduct the extension connection portion 21; when the metal for preparing the source electrode 6 and the drain electrode 7 is deposited and plasma bombardment is performed at the same time, the exposed top of the crystalline oxide semiconductor 2 away from the substrate 1 can be made conductive, and the extension connection portion 21 can be made conductive, so that a channel is formed in the crystalline oxide semiconductor 2 at a position between the source electrode 6 and the drain electrode 7.

The invention also provides an array substrate, which comprises the thin film transistor switch provided by the embodiment, the thin film transistor switch is arranged in the display area of the array substrate, and the thin film transistor switch in the display area is positioned in each sub-pixel unit, so that the light transmittance of the display area can be effectively increased; in addition, the thin film transistor switch can be arranged in a non-display area of the array substrate, such as a wiring area, so that the frame width can be effectively reduced, and the narrow frame design is realized.

Specifically, in the array substrate, the substrate of the array substrate may be a flexible substrate, and the array substrate may be used to form a flexible display panel, so as to ensure stability of the tft switch, ensure normal display of the flexible display panel when the flexible display panel is bent, and prolong a service life of the flexible display panel.

The invention also provides a display panel which comprises any one of the array substrates provided by the above embodiments.

It will be apparent to those skilled in the art that various changes and modifications may be made in the embodiments of the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

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