阅读说明：本技术 硅基光电探测器及其制造方法 (Silicon-based photoelectric detector and manufacturing method thereof ) 是由 唐波 张鹏 李志华 李彬 刘若男 于 2020-01-20 设计创作，主要内容包括：本发明公开了一种硅基光电探测器及其制造方法,所述硅基光电探测器的制造方法包括：在半导体衬底的上表面形成第一介质层；对所述第一介质层和所述半导体衬底进行刻蚀,形成第一凹槽；在所述第一凹槽的底部生长探测层；对所述探测层进行表面平坦化处理,使所述探测层的上表面和所述第一介质层的上表面位于同一平面内。本发明提供的硅基光电探测器及其制造方法,通过将外延生长探测层的窗口设置在所述第一介质层和所述半导体衬底上,可以达到减小硅基光电探测器暗电流的目的。(The invention discloses a silicon-based photoelectric detector and a manufacturing method thereof, wherein the manufacturing method of the silicon-based photoelectric detector comprises the following steps: forming a first dielectric layer on the upper surface of the semiconductor substrate; etching the first dielectric layer and the semiconductor substrate to form a first groove; growing a detection layer at the bottom of the first groove; and carrying out surface planarization treatment on the detection layer to enable the upper surface of the detection layer and the upper surface of the first medium layer to be positioned in the same plane. According to the silicon-based photoelectric detector and the manufacturing method thereof provided by the invention, the window of the epitaxial growth detection layer is arranged on the first dielectric layer and the semiconductor substrate, so that the aim of reducing the dark current of the silicon-based photoelectric detector can be achieved.)

1. A method of fabricating a silicon-based photodetector, comprising:

forming a first dielectric layer on the upper surface of the semiconductor substrate;

etching the first dielectric layer and the semiconductor substrate to form a first groove;

growing a detection layer at the bottom of the first groove;

and carrying out surface planarization treatment on the detection layer to enable the upper surface of the detection layer and the upper surface of the first medium layer to be positioned in the same plane.

2. The method of manufacturing a silicon-based photodetector as claimed in claim 1, wherein said semiconductor substrate is an SOI substrate, and further comprising, before said forming a first dielectric layer on an upper surface of said semiconductor substrate:

forming the SOI substrate, wherein the SOI substrate comprises a silicon substrate, a buried oxide layer and a top silicon layer which are sequentially stacked from bottom to top;

and carrying out doping treatment on the top silicon layer to form an intrinsic region, an N-type lightly doped region positioned on one side of the intrinsic region, a P-type lightly doped region positioned on the other side of the intrinsic region, an N-type heavily doped region positioned on one side of the N-type lightly doped region far away from the intrinsic region and a P-type heavily doped region positioned on one side of the P-type lightly doped region far away from the intrinsic region, wherein the first groove is positioned right above the intrinsic region.

3. The method of claim 2, further comprising, after the planarizing the surface of the detection layer:

forming a second medium layer on the upper surface of the detection layer and the upper surface of the first medium layer;

forming a first through hole and a second through hole which penetrate through the first dielectric layer and the second dielectric layer, wherein the lower bottom surface of the first through hole is abutted against the N-type heavily doped region, and the lower bottom surface of the second through hole is abutted against the P-type heavily doped region;

filling a conductive material into the first through hole and the second through hole to form a first conductive plug and a second conductive plug;

and depositing a metal film on the upper surfaces of the first conductive plug and the second conductive plug to form a first contact electrode and a second contact electrode.

4. The method of claim 3, wherein the second dielectric layer is made of silicon dioxide, and has a thickness of 200nm to 1000 nm;

the forming a second dielectric layer on the upper surface of the detection layer and the upper surface of the first dielectric layer comprises:

and forming the second dielectric layer on the upper surface of the detection layer and the upper surface of the first dielectric layer by adopting a chemical vapor deposition process.

5. The method of claim 1, wherein the first dielectric layer is made of silicon dioxide, and has a thickness of 1-4 μm;

the forming of the first dielectric layer on the upper surface of the semiconductor substrate comprises:

and forming the first dielectric layer on the upper surface of the semiconductor substrate by adopting a plasma enhanced chemical vapor deposition or low-pressure chemical vapor deposition process.

6. The method of claim 1, wherein the etching the first dielectric layer and the semiconductor substrate comprises:

etching the first dielectric layer until part of the upper surface of the semiconductor substrate is exposed to form a second groove;

and etching the bottom of the second groove to form the first groove.

7. The method of claim 1, wherein the difference between the depth of the first recess and the thickness of the first dielectric layer is 50nm to 200nm, and the material of the detection layer is germanium or silicon germanium.

8. The method of any one of claims 1 to 7, further comprising, before growing a detection layer on the bottom of the first recess:

forming a sacrificial layer at the bottom of the first groove;

and removing the sacrificial layer.

9. The method of claim 8, wherein the sacrificial layer is made of silicon dioxide, the sacrificial layer has a thickness of 10 nm to 200nm, and the forming the sacrificial layer at the bottom of the first groove comprises:

and forming the sacrificial layer at the bottom of the first groove by adopting a high-temperature thermal oxidation process.

10. A silicon-based photodetector, comprising:

a semiconductor substrate;

the first dielectric layer is arranged on the upper surface of the semiconductor substrate;

the first groove is arranged on the first dielectric layer and the semiconductor substrate;

the upper surface of the detection layer and the upper surface of the first medium layer are positioned in the same plane.

Technical Field

The invention relates to the technical field of semiconductors, in particular to a silicon-based photoelectric detector and a manufacturing method thereof.

Background

Nowadays, the technology fields such as information industry and biomedicine are more and more concerned, and novel photoelectron and optical communication technologies are inevitably developed at a faster speed. The silicon-based photoelectronic integration adopts a mature and cheap microelectronic processing technology to integrate an optical device with a microelectronic circuit with multiple functions, and is an effective way for realizing popularization and development of optical communication and optical interconnection. The silicon-based photoelectric detector is one of key devices of a silicon-based optical communication system, and with the breakthrough development of silicon-based germanium material epitaxy technology in recent years, the germanium detector becomes a hot spot of current research because of taking silicon-based photoelectron integration and efficient detection of optical communication wave bands into consideration.

In conventional germanium detectors, the germanium layer is grown directly on the substrate silicon layer, but since silicon and germanium have a 4.2% lattice mismatch, germanium is more prone to defects when grown on silicon, resulting in large dark current of the germanium detector, which affects the performance of the germanium detector.

Disclosure of Invention

The invention aims to solve the problem that a germanium detector manufactured by the prior art has large dark current.

The invention is realized by the following technical scheme:

a method of fabricating a silicon-based photodetector, comprising:

forming a first dielectric layer on the upper surface of the semiconductor substrate;

etching the first dielectric layer and the semiconductor substrate to form a first groove;

growing a detection layer at the bottom of the first groove;

and carrying out surface planarization treatment on the detection layer to enable the upper surface of the detection layer and the upper surface of the first medium layer to be positioned in the same plane.

Optionally, the semiconductor substrate is an SOI substrate, and before forming the first dielectric layer on the upper surface of the semiconductor substrate, the method further includes:

forming the SOI substrate, wherein the SOI substrate comprises a silicon substrate, a buried oxide layer and a top silicon layer which are sequentially stacked from bottom to top;

and carrying out doping treatment on the top silicon layer to form an intrinsic region, an N-type lightly doped region positioned on one side of the intrinsic region, a P-type lightly doped region positioned on the other side of the intrinsic region, an N-type heavily doped region positioned on one side of the N-type lightly doped region far away from the intrinsic region and a P-type heavily doped region positioned on one side of the P-type lightly doped region far away from the intrinsic region, wherein the first groove is positioned right above the intrinsic region.

Optionally, after the performing the surface planarization process on the detection layer, the method further includes:

forming a second medium layer on the upper surface of the detection layer and the upper surface of the first medium layer;

forming a first through hole and a second through hole which penetrate through the first dielectric layer and the second dielectric layer, wherein the lower bottom surface of the first through hole is abutted against the N-type heavily doped region, and the lower bottom surface of the second through hole is abutted against the P-type heavily doped region;

filling a conductive material into the first through hole and the second through hole to form a first conductive plug and a second conductive plug;

and depositing a metal film on the upper surfaces of the first conductive plug and the second conductive plug to form a first contact electrode and a second contact electrode.

Optionally, the second dielectric layer is made of silicon dioxide, and the thickness of the second dielectric layer is 200nm to 1000 nm;

the forming a second dielectric layer on the upper surface of the detection layer and the upper surface of the first dielectric layer comprises:

and forming the second dielectric layer on the upper surface of the detection layer and the upper surface of the first dielectric layer by adopting a chemical vapor deposition process.

Optionally, the first dielectric layer is made of silicon dioxide, and the thickness of the first dielectric layer is 1 to 4 micrometers;

the forming of the first dielectric layer on the upper surface of the semiconductor substrate comprises:

and forming the first dielectric layer on the upper surface of the semiconductor substrate by adopting a plasma enhanced chemical vapor deposition or low-pressure chemical vapor deposition process.

Optionally, the etching the first dielectric layer and the semiconductor substrate includes:

etching the first dielectric layer until part of the upper surface of the semiconductor substrate is exposed to form a second groove;

and etching the bottom of the second groove to form the first groove.

Optionally, a difference between the depth of the first groove and the thickness of the first dielectric layer is 50nm to 200nm, and the detection layer is made of germanium or silicon-germanium.

Optionally, before growing the detection layer at the bottom of the first groove, the method further includes:

forming a sacrificial layer at the bottom of the first groove;

and removing the sacrificial layer.

Optionally, the material of the sacrificial layer is silicon dioxide, the thickness of the sacrificial layer is 10 nm to 200nm, and the forming of the sacrificial layer at the bottom of the first groove includes:

and forming the sacrificial layer at the bottom of the first groove by adopting a high-temperature thermal oxidation process.

Based on the same inventive concept, the invention also provides a silicon-based photodetector, comprising:

a semiconductor substrate;

the first dielectric layer is arranged on the upper surface of the semiconductor substrate;

the first groove is arranged on the first dielectric layer and the semiconductor substrate;

the upper surface of the detection layer and the upper surface of the first medium layer are positioned in the same plane.

Compared with the prior art, the invention has the following advantages and beneficial effects:

compared with the prior art that the window of the epitaxial growth detection layer is arranged on the dielectric layer, the window of the epitaxial growth detection layer is arranged on the first dielectric layer and the semiconductor substrate, the window of the epitaxial growth detection layer is firstly grown at low temperature and then grown at high temperature, so that the detection layer grown at low temperature has more defects, and the detection layer grown at low temperature and more defects can be moved downwards by arranging the window of the epitaxial growth detection layer on the first dielectric layer and the semiconductor substrate, so that current passes through the detection layer grown at high temperature and less defects. Therefore, the manufacturing method of the silicon-based photoelectric detector can achieve the purpose of reducing the dark current of the silicon-based germanium detector.

Drawings

The accompanying drawings, which are included to provide a further understanding of the embodiments of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principles of the invention. In the drawings:

fig. 1 to 13 are schematic structural diagrams of a manufacturing process of a silicon-based photodetector according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to examples and accompanying drawings, and the exemplary embodiments and descriptions thereof are only used for explaining the present invention and are not meant to limit the present invention.