阅读说明：本技术 一种图腾柱电路 (Totem-pole circuit ) 是由 王中于 于 2020-03-24 设计创作，主要内容包括：本发明公开了一种图腾柱电路,包括两个均为NPN型的三极管Q1、Q2和两个二极管D1、D2；三极管Q1的集电极连接输入电压Vin,输入电压Vin经电阻R1与三极管Q1的基极相连,三极管Q1的基极经二极管D2与三极管Q2的集电极相连,三极管Q1的发射极经二极管D1与三极管Q2的集电极相连；三极管Q2的基极输入驱动脉冲信号PWM,其发射极接地,其集电极连接驱动输出端。本发明电路在高温环境下具有更稳定的电路性能,同时还具有反向输出功能。(The invention discloses a totem pole circuit, which comprises two NPN triodes Q1 and Q2 and two diodes D1 and D2; the collector of the triode Q1 is connected with the input voltage Vin, the input voltage Vin is connected with the base of the triode Q1 through the resistor R1, the base of the triode Q1 is connected with the collector of the triode Q2 through the diode D2, and the emitter of the triode Q1 is connected with the collector of the triode Q2 through the diode D1; the transistor Q2 has a base to which the driving pulse signal PWM is input, an emitter grounded, and a collector connected to the driving output terminal. The circuit has more stable circuit performance in a high-temperature environment and also has a reverse output function.)

1. A totem pole circuit is characterized by comprising two NPN-type triodes Q1 and Q2 and two diodes D1 and D2; the collector of the triode Q1 is connected with the input voltage Vin, the input voltage Vin is connected with the base of the triode Q1 through the resistor R1, the base of the triode Q1 is connected with the collector of the triode Q2 through the diode D2, and the emitter of the triode Q1 is connected with the collector of the triode Q2 through the diode D1; the transistor Q2 has a base to which the driving pulse signal PWM is input, an emitter grounded, and a collector connected to the driving output terminal.

2. The totem-pole circuit of claim 1, wherein the driving pulse signal PWM is a square wave signal.

3. The totem pole circuit of claim 2, wherein the base of transistor Q1 is connected to the anode of diode D2, and the cathode of diode D2 is connected to the collector of transistor Q2.

4. The totem pole circuit of claim 3, wherein the emitter of transistor Q1 is connected to the anode of diode D1, and the cathode of diode D1 is connected to the collector of transistor Q2.

5. The totem pole circuit of claim 4, wherein when a low signal is inputted to the base of the transistor Q2, the transistor Q2 is turned off, the collector of the transistor Q2 and the cathode of the diode D2 connected to the collector of the transistor Q2 are both high, so that the diode D2 is turned off; the input voltage Vin provides a bias current to the base of the transistor Q1 through the resistor R1, the transistor Q1 is turned on, and the input voltage Vin outputs a high level through the transistor Q1 and the diode D1.

6. The totem pole circuit of claim 5, wherein when a low signal is input to the base of the transistor Q2, the high voltage output by the driving output terminal is Vin-VCE-VD1, where VCE is the voltage between the collector and emitter of the transistor Q1 when conducting, and VD1 is the voltage when the diode D1 is conducting.

7. The totem pole circuit of claim 4, wherein when a high signal is input to the base of transistor Q2, transistor Q2 is turned on, the collector of transistor Q2 and the cathode of diode D2 connected to the collector of transistor Q2 are all low, such that diode D2 is turned on and transistor Q1 is off, and the drive output is low.

8. The totem pole circuit of claim 1, wherein the drive output is connected to a drive circuit comprising a capacitor C1 and a transformer T1 connected in series.

9. The totem pole circuit of claim 8, wherein the driver circuit drives transistor Q2 on, turning off transistor Q1; when the driving circuit stops driving the transistor Q2, the transistor Q2 is cut off, and the transistor Q1 is conducted.

Technical Field

The invention relates to the technical field of electronic circuits, in particular to a totem-pole circuit.

Background

At present, an existing totem-pole circuit generally consists of an NPN-type triode and a PNP-type triode, as shown in fig. 1, an emitter of the NPN-type triode is connected with a collector of the PNP-type triode, a base of the NPN-type triode is connected with a base of the PNP-type triode to form a totem-pole circuit, the circuit can obtain a high level and a low level by utilizing the mutual conduction of the NPN-type triode and the PNP-type triode, when the high level is input, the NPN-type triode is conducted, the PNP-type triode is cut off, and an output end is the high level; similarly, when a low level is input, the output is also low.

However, since the NPN transistor and the PNP transistor have different temperature characteristics, the output waveform may become unstable in a high temperature environment.

Next, referring to fig. 2, in the case that the input voltage is high, a driving circuit needs to be connected to the conventional totem-pole circuit outside the NPN-type triode and the PNP-type triode to respectively drive the NPN-type triode and the PNP-type triode, so that the driving circuit of the conventional totem-pole circuit is complex.

Disclosure of Invention

In order to overcome the disadvantages of the prior art, an object of the present invention is to provide a totem-pole circuit, which has more stable circuit performance in a high temperature environment and also has an inverted output function.

The purpose of the invention is realized by adopting the following technical scheme:

a totem pole circuit comprises two NPN triodes Q1 and Q2 and two diodes D1 and D2; the collector of the triode Q1 is connected with the input voltage Vin, the input voltage Vin is connected with the base of the triode Q1 through the resistor R1, the base of the triode Q1 is connected with the collector of the triode Q2 through the diode D2, and the emitter of the triode Q1 is connected with the collector of the triode Q2 through the diode D1; the transistor Q2 has a base to which the driving pulse signal PWM is input, an emitter grounded, and a collector connected to the driving output terminal.

Further, the driving pulse signal PWM is a square wave signal.

Further, the base of the transistor Q1 is connected to the anode of the diode D2, and the cathode of the diode D2 is connected to the collector of the transistor Q2.

Further, the emitter of the transistor Q1 is connected to the anode of the diode D1, and the cathode of the diode D1 is connected to the collector of the transistor Q2.

Further, when a low level signal is input to the base of the transistor Q2, the transistor Q2 is turned off, and the collector of the transistor Q2 and the cathode of the diode D2 connected to the collector of the transistor Q2 are both at a high level, so that the diode D2 is in a turned-off state; the input voltage Vin provides a bias current to the base of the transistor Q1 through the resistor R1, the transistor Q1 is turned on, and the input voltage Vin outputs a high level through the transistor Q1 and the diode D1.

Further, when a low-level signal is input to the base of the transistor Q2, the high-level voltage output by the driving output terminal is Vin-VCE-VD1, where VCE is the voltage between the collector and the emitter of the transistor Q1 when conducting, and VD1 is the voltage when the diode D1 is conducting.

Further, when a high level signal is input to the base of the transistor Q2, the transistor Q2 is turned on, the collector of the transistor Q2 and the cathode of the diode D2 connected to the collector of the transistor Q2 are both at a low level, so that the diode D2 is turned on, and the transistor Q1 is in an off state, so that the driving output is at a low level.

Furthermore, the driving output end is connected with a driving circuit formed by serially connecting a capacitor C1 and a transformer T1.

Further, the driving circuit drives the transistor Q2 to be turned on, so that the transistor Q1 is turned off; when the driving circuit stops driving the transistor Q2, the transistor Q2 is cut off, and the transistor Q1 is conducted.

Compared with the prior art, the invention has the beneficial effects that:

the totem pole circuit is formed by utilizing the two NPN type triodes, and the output waveform of the totem pole circuit is more stable in a high-temperature environment due to the same characteristics of the two triodes; in addition, the circuit can output high level when inputting low level or output low level when inputting high level, and has the function of reverse output.

Drawings

FIG. 1 is a circuit diagram of a conventional totem-pole circuit in the background art;

FIG. 2 is a circuit diagram of a conventional totem-pole circuit connected to a driving circuit in the prior art;

FIG. 3 is a circuit diagram of a totem-pole circuit of the present invention;

fig. 4 is a circuit diagram of a totem-pole circuit connected with a driving circuit according to the present invention.

Detailed Description

The present invention will be further described with reference to the accompanying drawings and the detailed description, and it should be noted that any combination of the embodiments or technical features described below can be used to form a new embodiment without conflict.

A totem-pole circuit has a totem-pole output with good stability, and meanwhile, the circuit has a reverse output function and simplifies a driving circuit.

Referring to fig. 3, the totem-pole circuit includes two NPN transistors with the same characteristics, which are named as NPN transistor Q1 and NPN transistor Q2, respectively; secondly, the totem-pole circuit also comprises two diodes D1 and D2.

The collector of the NPN transistor Q1 is connected to an input voltage Vin, which is connected to the base of the NPN transistor Q1 via a resistor R1, the emitter of the NPN transistor Q1 is connected to the anode of a diode D1, and the cathode of a diode D1 is connected to the collector of the NPN transistor Q2.

The base of the NPN transistor Q1 is connected to the anode of the diode D2, the cathode of the diode D2 is connected to the collector of the NPN transistor Q2, the base of the NPN transistor Q2 inputs the driving pulse signal PWM, the emitter thereof is grounded, and the driving output terminal is connected to the cathodes of the diode D1 and the diode D2 (i.e., the collector of the NPN transistor Q2).

In this embodiment, the driving pulse signal PWM input to the totem-pole circuit is a square wave signal. When a low-level signal is input to the base of the NPN transistor Q2, the NPN transistor Q2 is turned off, and at this time, the collector of the NPN transistor Q2 is at a high level, and the cathode of the diode D2 connected to the collector of the NPN transistor Q2 is also at a high level, so that the diode D2 is in a cut-off state; at this time, the input voltage Vin provides a bias current to the base of the NPN transistor Q1 through the resistor R1, the NPN transistor Q1 is turned on, the input voltage Vin passes through the collector and emitter of the NPN transistor Q1 and flows through the diode D1, and a high level is output from the driving output terminal, the high level voltage is Vin-VCE-VD1, where VCE is a voltage between the collector and the emitter of the NPN transistor Q1 when turned on, and VD1 is a voltage when the diode D1 is turned on.

When a high-level signal is input to the base of the NPN transistor Q2, the NPN transistor Q2 is turned on, the collector of the NPN transistor Q2 is at a low level, and the cathode of the diode D2 connected to the collector of the NPN transistor Q2 is also at a low level, so that the diode D2 is turned on, and at this time, the voltage between the base and the emitter of the NPN transistor Q1 is: ube is VD1-VD2-Vbe, and therefore, Ube is a negative voltage, so that the NPN transistor Q1 is in an off state, and the circuit output is at a low level; wherein VD2 is the voltage at which diode D2 conducts.

It can be seen that the circuit of this embodiment has an inverse output function, that is, when the driving signal is at a high level and a low level, the output is at a low level and a high level.

In addition, under the condition that the input voltage is high, the present embodiment only needs a simple low-voltage driving signal to drive the NPN transistor Q2, and in the present embodiment, the function of driving the NPN transistor Q2 is realized by a driving circuit, as shown in fig. 4, the driving circuit includes a capacitor C1 and a transformer T1, the capacitor C1 is connected to the driving output end, and the capacitor C1 and the transformer T1 are connected in series and then grounded, according to the above circuit principle, the driving circuit can drive the transistor Q2 to be turned on, so that the transistor Q1 is turned off; when the driving circuit stops driving the triode Q2, the triode Q2 is cut off, so that the triode Q1 is conducted, and the circuit is further simplified.

The above embodiments are only preferred embodiments of the present invention, and the protection scope of the present invention is not limited thereby, and any insubstantial changes and substitutions made by those skilled in the art based on the present invention are within the protection scope of the present invention.