阅读说明：本技术 一种数字音频功放和功放环路 (Digital audio power amplifier and power amplifier loop ) 是由 周佳宁 张海军 姚炜 杜黎明 程剑涛 孙洪军 于 2019-11-29 设计创作，主要内容包括：本申请公开了一种数字音频功放和功放环路,该功放环路包括运放U1、电容C1、功放输出级、电阻R1、电阻R2和噪声控制单元,其中：运放U1的反相输入端分别连接到电容C1的一端、所述噪声控制单元的一端以及前级的所述DAC电流源的输出端；运放U1的输出端分别连接到所述功放输出级的控制端和电容C1的另一端；所述功放输出级的输出端依次经过电阻R1、R2接地；所述噪声控制单元的另一端连接到电阻R1与R2的连结点；电阻R1、R2的阻值设置满足R1/R2＝(N-2)/2,N＞2；运放U1的参考电压等于PVDD/N,PVDD为功放输出级的电源电压；所述噪声控制单元为电阻模块。本申请保证了数字音频功放正常工作。(The application discloses digital audio power amplifier and power amplifier loop, this power amplifier loop include that the fortune is put U1, electric capacity C1, power amplifier output stage, resistance R1, resistance R2 and noise control unit, wherein: the inverting input end of the operational amplifier U1 is respectively connected to one end of a capacitor C1, one end of the noise control unit and the output end of the DAC current source of the previous stage; the output end of the operational amplifier U1 is respectively connected to the control end of the power amplifier output stage and the other end of the capacitor C1; the output end of the power amplifier output stage is grounded through resistors R1 and R2 in sequence; the other end of the noise control unit is connected to a junction point of the resistors R1 and R2; the resistance values of the resistors R1 and R2 are set to satisfy the conditions that R1/R2 is (N-2)/2, and N is larger than 2; the reference voltage of the operational amplifier U1 is equal to PVDD/N, and PVDD is the power supply voltage of the power amplifier output stage; the noise control unit is a resistance module. The application ensures the normal work of the digital audio power amplifier.)

1. The utility model provides a digital audio power amplifier, includes PWM modulator, two way DAC current sources and two way power amplifier loops, wherein, digital audio signal passes through output PWMP ripples and PWMN ripples after PWM modulator modulation, the PWMP ripples is through DAC current source all the way, the power amplifier loop of the same way handles back output voltage signal, the PWMN ripples is through another way DAC current source, another way power amplifier loop and handles back output voltage signal, its characterized in that:

each power amplifier loop comprises an operational amplifier U1, a capacitor C1, a power amplifier output stage, a first resistor R1, a second resistor R2 and a noise control unit, wherein:

the inverting input end of the operational amplifier U1 is respectively connected to one end of a capacitor C1, one end of the noise control unit and the output end of the DAC current source of the previous stage;

the output end of the operational amplifier U1 is respectively connected to the control end of the power amplifier output stage and the other end of the capacitor C1;

the output end of the power amplifier output stage is grounded through a first resistor R1 and a second resistor R2 in sequence;

the other end of the noise control unit is connected to a junction point of a first resistor R1 and a second resistor R2;

the resistance values of the first resistor R1 and the second resistor R2 are set to satisfy the conditions that R1/R2 is (N-2)/2, and N is greater than 2; a reference voltage is added to a non-inverting input end of the operational amplifier U1, the reference voltage is equal to PVDD/N, and the PVDD is the power supply voltage of the power amplifier output stage;

the noise control unit is a resistance module.

2. The digital audio power amplifier of claim 1, wherein the noise control unit is an adjustable resistor module, and the magnitude of the resistance value of the adjustable resistor module decreases with the decrease of the amplitude of the digital audio signal.

3. The digital audio power amplifier of claim 2, wherein the resistance of the adjustable resistance module changes in steps with the amplitude of the digital audio signal.

4. The digital audio power amplifier of claim 2, wherein the noise control unit comprises a plurality of series resistors, each of which is connected in parallel with a switch; the switching state of the different switches depends on the magnitude of the digital audio signal.

5. The digital audio power amplifier of claim 4, wherein the noise control unit comprises three resistors in series, each resistor being a resistor R_F0Resistance R_F1And a resistance R_F2Wherein R is_F1＝R_F0，R_F2＝2*R_F0。

6. The digital audio power amplifier of claim 2, wherein the noise control unit delays to the zero crossing point of the digital audio signal and adjusts the self resistance.

7. The digital audio power amplifier of claim 2, wherein the gain of the PWM modulator increases with decreasing resistance of the adjustable resistance module, such that the total gain of the digital audio power amplifier is constant.

8. The digital audio power amplifier of claim 1, wherein R2-2R 1.

9. The utility model provides a power amplifier loop circuit, its characterized in that includes that the operational amplifier U1, electric capacity C1, power amplifier output stage, first resistance R1, second resistance R2 and noise control unit, wherein:

the inverting input end of the operational amplifier U1 is respectively connected to one end of a capacitor C1, one end of the noise control unit and the output end of the DAC current source at the previous stage;

the output end of the operational amplifier U1 is respectively connected to the control end of the power amplifier output stage and the other end of the capacitor C1;

the output end of the power amplifier output stage is grounded through a first resistor R1 and a second resistor R2 in sequence;

the other end of the noise control unit is connected to a junction point of a first resistor R1 and a second resistor R2;

the resistance values of the first resistor R1 and the second resistor R2 are set to satisfy the conditions that R1/R2 is (N-2)/2, and N is greater than 2; a reference voltage is added to a non-inverting input end of the operational amplifier U1, the reference voltage is equal to PVDD/N, and the PVDD is the power supply voltage of the power amplifier output stage;

the noise control unit is a resistance module.

10. The power amplifier loop of claim 9, wherein the noise control unit is an adjustable resistor module, and the magnitude of the adjustable resistor module decreases with the decrease of the amplitude of the digital audio signal.

Technical Field

The invention relates to the technical field of power electronics, in particular to a digital audio power amplifier and a power amplifier loop.

Background

The input of the digital audio power amplifier is a digital audio signal, and the audio signal is transmitted in a digital signal form, so that the digital audio power amplifier has extremely high RF (Radio Frequency) interference resistance and low bottom noise.

Fig. 1 shows a digital audio power amplifier used at the present stage, and its components include a PWM (Pulse width modulation) modulator (not shown in fig. 1), two DAC current sources, and two power amplifier loops, specifically: the digital audio signal is modulated by the PWM modulator to output PWMP wave and PWMN wave, the PWMP wave is processed by a DAC current source and a power amplifier loop to output voltage V_OUTPThe PWMN wave outputs a voltage V after being processed by the other DAC current source and the other power amplifier loop_OUTN。

The inventor discovers through analysis that for any one of the power amplifier loops, when the power amplifier output voltage is required to reach the power supply voltage PVDD in order to maintain the charge-discharge balance of the capacitor in the power amplifier loop, the reference voltage V of the power amplifier loop_REFThe maximum working voltage which can be supported by the DAC current source and the power amplifier loop is PVDD/2 under certain occasions, and the DAC current source and the power amplifier loop do not have enough voltage margin at the moment, so that the digital audio power amplifier cannot work normally.

Disclosure of Invention

In view of this, the present invention provides a digital audio power amplifier and a power amplifier loop circuit, so as to ensure the normal operation of the digital audio power amplifier.

The utility model provides a digital audio power amplifier, includes PWM modulator, two way DAC current sources and two way power amplifier loops, wherein, digital audio signal passes through PWM modulator modulation back output PWMP ripples and PWMN ripples, the PWMP ripples is through DAC current source of one way, the power amplifier loop of one way handles back output voltage signal, the PWMN ripples is through another way DAC current source, another way power amplifier loop handles back output voltage signal, wherein:

each power amplifier loop comprises an operational amplifier U1, a capacitor C1, a power amplifier output stage, a first resistor R1, a second resistor R2 and a noise control unit, wherein:

the inverting input end of the operational amplifier U1 is respectively connected to one end of a capacitor C1, one end of the noise control unit and the output end of the DAC current source of the previous stage;

the output end of the operational amplifier U1 is respectively connected to the control end of the power amplifier output stage and the other end of the capacitor C1;

the output end of the power amplifier output stage is grounded through a first resistor R1 and a second resistor R2 in sequence;

the other end of the noise control unit is connected to a junction point of a first resistor R1 and a second resistor R2;

the resistance values of the first resistor R1 and the second resistor R2 are set to satisfy the conditions that R1/R2 is (N-2)/2, and N is greater than 2; a reference voltage is added to a non-inverting input end of the operational amplifier U1, the reference voltage is equal to PVDD/N, and the PVDD is the power supply voltage of the power amplifier output stage;

the noise control unit is a resistance module.

Optionally, the noise control unit is an adjustable resistor module, and the resistance value of the adjustable resistor module decreases with the decrease of the amplitude of the digital audio signal.

Optionally, the resistance value of the adjustable resistance module changes in a step change along with the amplitude value of the digital audio signal.

Optionally, the noise control unit includes a plurality of series resistors, each of which is connected in parallel with a switch; the switching state of the different switches depends on the magnitude of the digital audio signal.

Optionally, the noise control unit includes three series resistors, each resistor being a resistor R_F0Resistance R_F1And a resistance R_F2Wherein R is_F1＝R_F0，R_F2＝2*R_F0。

Optionally, the noise control unit delays to the zero crossing point of the digital audio signal and adjusts the resistance value of the noise control unit.

Optionally, the gain of the PWM modulator increases with the decrease of the resistance value of the adjustable resistance module, so that the total gain of the digital audio power amplifier is not changed.

Optionally, R2-2 × R1.

A power amplifier loop comprises an operational amplifier U1, a capacitor C1, a power amplifier output stage, a first resistor R1, a second resistor R2 and a noise control unit, wherein:

the inverting input end of the operational amplifier U1 is respectively connected to one end of a capacitor C1, one end of the noise control unit and the output end of the DAC current source at the previous stage;

the output end of the operational amplifier U1 is respectively connected to the control end of the power amplifier output stage and the other end of the capacitor C1;

the output end of the power amplifier output stage is grounded through a first resistor R1 and a second resistor R2 in sequence;

the other end of the noise control unit is connected to a junction point of a first resistor R1 and a second resistor R2;

the resistance values of the first resistor R1 and the second resistor R2 are set to satisfy the conditions that R1/R2 is (N-2)/2, and N is greater than 2; a reference voltage is added to a non-inverting input end of the operational amplifier U1, the reference voltage is equal to PVDD/N, and the PVDD is the power supply voltage of the power amplifier output stage;

the noise control unit is a resistance module.

Optionally, in the power amplifier loop disclosed above, the noise control unit is an adjustable resistor module, and a resistance value of the adjustable resistor module decreases with a decrease in the amplitude of the digital audio signal.

According to the technical scheme, the resistors R1 and R2 are added on the power amplifier loop to form voltage division, the resistance values of the resistors R1 and R2 and the reference voltage V of the power amplifier loop_REFThe size of the compound satisfies the condition that R1/R2 is (N-2)/2, V_REFPVDD/N, N > 2; at the moment, the charge and the discharge of the capacitor in the power amplification loop are balanced, and the reference voltage V of the power amplification loop_REFIs always smaller than PVDD/2, so that the current source and the power amplifier loop always have certain voltage margin, and the digital audio power amplifier can work normally.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a schematic diagram of a digital audio power amplifier disclosed in the prior art;

fig. 2 is a schematic diagram of a digital audio power amplifier according to an embodiment of the present invention;

fig. 3 is a waveform diagram illustrating charging and discharging of a capacitor C1 according to an embodiment of the present invention;

fig. 4 is a schematic structural diagram of another digital audio power amplifier disclosed in the embodiment of the present invention;

fig. 5 is a schematic diagram of a power amplifier loop structure disclosed in the embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 2, an embodiment of the present invention discloses a digital audio power amplifier, including a PWM modulator (not shown in fig. 2), two DAC current sources, and two power amplifier loops, wherein:

the digital audio signal is modulated by the PWM modulator to output PWMP wave and PWMN wave, and the PWMP wave is processed by a DAC current source and a power amplifier loop to output voltage V_OUTPThe PWMN wave outputs a voltage V after being processed by the other DAC current source and the other power amplifier loop_OUTN；

Each power amplifier loop comprises an operational amplifier U1, a capacitor C1, a power amplifier output stage 11, a resistor R1, a resistor R2 and a noise control unit 12, wherein:

the inverting input end of the operational amplifier U1 is respectively connected to one end of the capacitor C1, one end of the noise control unit 12 and the output end of the DAC current source of the previous stage;

the output end of the operational amplifier U1 is respectively connected to the control end of the power amplifier output stage 11 and the other end of the capacitor C1;

the output end of the power amplifier output stage 11 is grounded through a resistor R1 and a resistor R2 in sequence;

the other end of the noise control unit 12 is connected to a connection point of the resistor R1 and the resistor R2;

the resistance values of the resistors R1 and R2 are set to satisfy the conditions that R1/R2 is (N-2)/2, and N is larger than 2; reference voltage V_REFA reference voltage V is added at the non-inverting input end of the operational amplifier U1_REFPVDD/N is the power supply voltage of the power amplifier output stage 11;

in one embodiment, the noise control unit 12 is a resistive module.

In the embodiment of the invention, because the circuit structures of the two DAC current sources and the two power amplifier loops are the same, only PWMP wave → DAC current source → power amplifier loop → V is used below_OUTPThis way is an example, and details the working principle of the digital audio power amplifier according to the embodiment of the present invention:

compared with the existing power amplifier loop, the power amplifier loop disclosed in the embodiment of the invention adds the resistors R1 and R2 to form voltage division, the resistance values of the resistors R1 and R2 and the reference voltage V of the power amplifier loop_REFThe size of the capacitor is in order to satisfy the 'charge-discharge balance of the capacitor in the power amplifier loop circuit'; and when V_OUTPWhen the power supply voltage PVDD is reached, the reference voltage V of the power amplifier loop_REFThe setting is carried out based on the PVDD/2', and the specific setting in the embodiment of the invention is that R1/R2 is (N-2)/2, N is more than 2, V_REFPVDD/N. In order to facilitate practical application and simplify calculation, the embodiment of the invention recommends taking N as an integer. For example, if N is 3, R2 is 2R 1, and the reference voltage V is set_REFPVDD/3, which means when PVDD equals 10V, V_REFApproximately equals to 3.33V, and the circuit can still work normally under the condition that the maximum working voltage which can be supported by the current source and the power amplifier loop is equal to 5V.

Next, for PWMP wave → DAC current source → power amplifier loop → V_OUTPThis way, taking N-3 as an example, verifies when R2-2R 1, V_REFWhen the PVDD/3 is reached, the digital audio power amplifier can work normally. The specific verification process is as follows:

defining the equivalent resistance of the noise control unit 12 as R_F(ii) a The output current of DAC current source is I_DAC；V_OUT＝V_OUTP-V_OUTN(ii) a One charge-discharge period T of the capacitor C1 is divided into four time periods T1, T2, T3 and T4 corresponding to PWMP waves and V_OUTAnd the charging and discharging current I of the capacitor C1_C1Capacitor C1 right node potential V_C1The waveform of (2) is shown in fig. 3:

period t 1: PWMP wave being high level logic "1", V_OUTHigh logic "1", current I_DACThe capacitor C1 is charged, and the power amplifier output end (i.e. the output end of the power amplifier output stage) passes through the equivalent resistor R_FCharging capacitor C1 (V)_OUTWhen high logic "1", V_OUTPThe voltage is PVDD, and the potential of the connecting point of the resistors R1 and R2 is equal to PVDD 2/3 because the resistors R1 and R2 form partial voltage; the potential of the inverting input end of the operational amplifier U1 is equal to that of the non-inverting input end and is V_REFPVDD/3; from this, the equivalent resistance R can be obtained_FThe potential difference between the two ends is PVDD/3-PVDD 2/3 ═ 1/3 PVDD, the power amplifier output end passes through the equivalent resistance R_FThe current for charging the capacitor C1 is 1/3 × PVDD/R_F) The current on the capacitor C1 is

I_{C1_t1}＝I_DAC+1/3*PVDD/R_FFormula (2.1)

Period t 2: PWMP wave being high level logic "1", V_OUTLogic "0" at low level, current I_DACCharging capacitor C1, and passing through equivalent resistor R at the output end of power amplifier_FDischarging (V) capacitor C1_OUTWhen it is low logic "0", V_OUTPThe voltage is zero, and the potential of the junction point of the resistors R1 and R2 is also zero; the potential of the inverting input end of the operational amplifier U1 is equal to that of the non-inverting input end and is V_REFPVDD/3; from this, the equivalent resistance R can be obtained_FThe potential difference between the two ends is PVDD/3, the power amplifier output end passes through an equivalent resistor R_FThe current for discharging the capacitor C1 is 1/3 × PVDD/R), and the current on the capacitor C1 is

I_{C1_t2}＝I_DAC-1/3*PVDD/R_FFormula (2.2)

Period t 3: PWMP wave being low level logic "0", V_OUTLogic "0" at low level, current I_DACDischarging to the capacitor C1, and passing through the equivalent resistor R at the output end of the power amplifier_FDischarging the capacitor C1 (in the same way as the t2 period when V is_OUTWhen the logic '0' is low level, the power amplifier output end passes through the equivalent resistor R_FThe current for discharging the capacitor C1 is 1/3 × PVDD/R_F) The current on the capacitor C1 is

I_{C1_t3}＝-I_DAC-1/3*PVDD/R_FFormula (2.3)

Period t 4: PWMP wave being low level logic "0", V_OUTHigh logic "1", current I_DACDischarging to the capacitor C1, and passing through the equivalent resistor R at the output end of the power amplifier_FCharging capacitor C1 (the same as the t1 period when V_OUTWhen the logic 1 is high level, the power amplifier output end passes through the equivalent resistor R_FThe current for charging the capacitor C1 is 1/3 × PVDD/R_F) The current on the capacitor C1 is

I_{C1_t4}＝-I_DAC+1/3*PVDD/R_FWhen the digital audio power amplifier of formula (2.4) works normally, the capacitor C1 is charged and discharged in a charging and discharging period T for balance, there is

I_{C1_t1}*t1+I_{C1_t2}*t2＝-I_{C1_t3}*t3-I_{C1_t4}T4 type (2.5)

Can be obtained by substituting the formulae (2.1) to (2.4) into the formula (2.5)

I_DAC*(t₁+t₂)-I_DAC*(t₃+t₄)＝1/3*PVDD/R_F*(t₂+t₃)-1/3*PVDD/R_F*(t₁+t₄) Formula (2.6)

By D_INRepresenting the input duty cycle of the PWMP wave, t1+ t2 is equal to D_IN*T，t3+t4＝(1-D_IN) T, by D_OUTRepresenting the output duty ratio of the PWMP wave, t1+ t4 is D_OUT*T，t2+t3＝(1-D_OUT) T, based on which the arrangement of the formula (2.6) gives

And due to V_OUTP＝D_OUTPVDD, further elaboration of formula (2.7) gives

Formula (2.8) shows V_OUTPIs a signal centered at 1/2 × PVDD common mode point and 50% input duty cycle.

In the same way, V can be obtained_OUTNThe relationship (c) of (a) to (b),

V_OUTNagain a signal centered at 1/2 × PVDD common mode point with 50% input duty cycle.

When setting R2-2 × R1, V_REFWhen PVDD/3, from V_OUTPAnd V_OUTNThe relation shows that the digital audio power amplifier can work normally, and the capacitor C1 is charged and discharged for balance in a charging and discharging period T.

In the embodiment of the invention, R1/R2 is (N-2)/2, N is more than 2, and V is_REFWhen the value of N is larger than PVDD/N, the reference voltage V is larger_REFThe smaller the value of (d), the larger the voltage margin left by the DAC current source and the power amplifier loop, and since the voltage margin to be reserved is generally fixed, the fixed resistors are generally recommended for the resistors R1 and R2.

In the embodiment of the present invention, the equivalent resistance R of the noise control unit 12_FThe resistance value directly influences the gain of the power amplifier loop, and the specific analysis is as follows:

will V_OUTP、V_OUTNSubstituting the relational expression into V_OUT＝V_OUTP-V_OUTNIs obtained by

V_OUT＝3*R_F*I_DAC(2*D_IN-1) formula (2.9)

From the formula (2.9), the gain of the power amplifier loop is 3 × R_F*I_DACAnd R is_FAnd (4) correlating. By adjusting the equivalent resistance R of the noise control unit 12_FThe resistance value can be adjusted freely to adjust the gain of the power amplifier loop.

The influence of noise of a DAC current source on output noise in the high-voltage digital audio power amplifier is the largest, the reduction of gain of a power amplifier loop can effectively reduce the output noise, but if the gain of the power amplifier loop is too small, the power amplifier loop can only output very small power without distortion, the requirement of improving the loudness of a loudspeaker in practical application is not met, and therefore the signal-to-noise ratio (the proportion of the output noise in the output signal of the digital audio power amplifier) of the output signal needs to be ensured to be kept in a relatively ideal state. The smaller the amplitude of the digital audio signal is, the larger the output power of the power amplifier loop is, the larger the proportion of the output noise in the output signal of the digital audio power amplifier is, and the more the output noise needs to be reduced, so that the gain of the power amplifier loop needs to be reasonably set according to the amplitude of the digital audio signal, a good balance is obtained between the output power and the output noise, and the larger output power is ensured, and the noise of the output signal is also reduced.

The noise control unit 12 may be a fixed resistor module, i.e., a resistor module with a fixed resistance value, but this may cause the application range of the digital audio power amplifier to the input digital audio signal to be limited, and therefore, the embodiment of the present invention recommends that the noise control unit 12 adopts an adjustable resistor module, i.e., a resistor module with an adjustable resistance value, and the resistance value of the adjustable resistor module decreases with the decrease of the amplitude value of the digital audio signal.

Further, in the embodiment of the present invention, it is recommended to set the resistance value of the adjustable resistance module 12 to be in step change along with the amplitude change of the digital audio signal. The topology of the noise control unit 12 can be adopted as shown in fig. 4, and the noise control unit 12 includes k series resistors R_F0～R_F(k-1)K is not less than 1, wherein the resistance R_F1～R_F(k-1)Each of which is connected in parallel with a switch; for convenience of description, the resistor R is_FX(X＝1、2.…, k-1) parallel switch is marked as T_XFig. 4 is only exemplified by k — 3. R_FThe resistance value of (a) varies with the variation of the switch combination state in the noise control unit 12, and the switch combination state in the noise control unit 12 depends on the magnitude of the digital audio signal.

For example, if k is 3, then when the switch T is turned on₁And T₂When all are disconnected, the gain of the power amplifier loop is 3 (R)_F0+R_F1+R_F2)*I_DAC(ii) a When the switch T₂Conduction, T₁When disconnected, the gain of the power amplifier loop is 3 (R)_F0+R_F1)*I_DAC(ii) a When the switch T₁And T₂When all are conducted, the gain of the power amplifier loop is 3R_F0*I_DAC. Setting the resistance to R_F1＝R_F0，R_F2＝2*R_F0Then, it is shown in the following table 1:

status of state	Switch combination state	Gain of power amplifier loop
			1	T1And T2Are all disconnected	12*RF0*IDAC
2	T2Conduction, T1Disconnect	6*RF0*IDAC
			3	T1And T2Are all conducted	3*RF0*IDAC

Corresponding to table 1, when the amplitude of the digital audio signal is greater than a set threshold 1, the power amplifier loop is made to work in the state 1; when the amplitude of the digital audio signal is lower than a set threshold 1 but greater than a set threshold 2 (the threshold 1 is greater than the threshold 2), after a certain delay time, switching the circuit state at the zero crossing of the digital audio signal (if the gain adjustment is not at the signal zero crossing, the output signal may have sudden change, which affects the experience), and making the power amplifier loop work in the state 2; when the amplitude of the digital audio signal is lower than the set threshold 2, after a certain delay time, the circuit state is switched at the zero crossing of the digital audio signal, so that the power amplifier loop works in the state 3. Therefore, when the noise control unit 12 adopts an adjustable resistor module, the noise control unit 12 needs to adjust the resistance value of the digital audio signal input to the DAC current source when the digital audio signal is delayed to the zero crossing point.

In addition, it should be noted that reducing the gain of the power amplifier can effectively reduce the output noise, but in order to meet the requirement of increasing the loudness of the horn in practical application and avoid the problem of sudden and sudden loudness of the horn, it is necessary to ensure that the total gain of the digital audio power amplifier is unchanged as much as possible, so the embodiment of the invention can correspondingly increase the gain of the PWM modulator in the digital audio power amplifier while reducing the gain of the power amplifier loop. For example, corresponding to table 1, when the power amplifier loop operates in the state 1, the gain of the PWM modulator is not processed; when the power amplifier loop works in the state 2, the gain of the PWM modulator is increased to 2 times of the original gain; when the power amplifier loop works in the state 3, the gain of the PWM modulator is increased to 4 times of the original gain.

As shown in fig. 5, an embodiment of the present invention further discloses a power amplifier loop, which includes an operational amplifier U1, a capacitor C1, a power amplifier output stage, a resistor R1, a resistor R2, and a noise control unit, wherein:

the inverting input end of the operational amplifier U1 is respectively connected to one end of a capacitor C1, one end of the noise control unit and the output end of the DAC current source at the previous stage;

the output end of the operational amplifier U1 is respectively connected to the control end of the power amplifier output stage and the other end of the capacitor C1;

the output end of the power amplifier output stage is grounded through a resistor R1 and a resistor R2 in sequence;

the other end of the noise control unit is connected to a junction point of a resistor R1 and a resistor R2;

the resistance values of the resistors R1 and R2 are set to satisfy the conditions that R1/R2 is (N-2)/2, and N is larger than 2; a reference voltage is added to a non-inverting input end of the operational amplifier U1, the reference voltage is equal to PVDD/N, and the PVDD is the power supply voltage of the power amplifier output stage;

the noise control unit is a resistance module.

Optionally, the noise control unit is an adjustable resistor module, and the resistance value of the adjustable resistor module decreases with the decrease of the amplitude of the digital audio signal.

Optionally, the resistance value of the adjustable resistance module changes in a step change along with the amplitude value of the digital audio signal.

Optionally, the noise control unit includes a plurality of series resistors, each of which is connected in parallel with a switch; the switching state of the different switches depends on the magnitude of the digital audio signal.

Optionally, the noise control unit delays to the zero crossing point of the digital audio signal and adjusts the resistance value of the noise control unit.

In the present specification, each digital audio power amplifier embodiment is described in a progressive manner, each digital audio power amplifier embodiment is mainly described as different from other digital audio power amplifier embodiments, and the same and similar parts among the digital audio power amplifier embodiments are referred to each other. For the embodiment of the power amplifier loop, because the technical content disclosed by the embodiment of the digital audio power amplifier corresponds to the embodiment of the power amplifier loop, the description is simple, and the relevant points can be referred to the relevant description of the embodiment part of the digital audio power amplifier.

In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the use of the verb "comprise a" to define an element does not exclude the presence of another, identical element in a process, method, article, or apparatus that comprises the element.

Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the embodiments. Thus, the present embodiments are not intended to be limited to the embodiments shown herein but are to be accorded the widest scope consistent with the principles and novel features disclosed herein.